[gd32][spi] add spi3\spi4 support and rt_hw_spi_device_attach

bsp/gd32/arm/libraries/gd32_drivers/drv_spi.c

@@ -11,7 +11,7 @@
 
 #ifdef RT_USING_SPI
 
-#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2)
+#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) || defined(BSP_USING_SPI4)
 #define LOG_TAG              "drv.spi"
 
 #include <rtdbg.h>
@@ -25,6 +25,12 @@ static struct rt_spi_bus spi_bus1;
 #ifdef BSP_USING_SPI2
 static struct rt_spi_bus spi_bus2;
 #endif
+#ifdef BSP_USING_SPI3
+static struct rt_spi_bus spi_bus3;
+#endif
+#ifdef BSP_USING_SPI4
+static struct rt_spi_bus spi_bus4;
+#endif
 
 static const struct gd32_spi spi_bus_obj[] = {
 
@@ -36,10 +42,13 @@ static const struct gd32_spi spi_bus_obj[] = {
         RCU_GPIOA,
         &spi_bus0,
         GPIOA,
+#if defined SOC_SERIES_GD32F4xx
+        GPIO_AF_5,
+#endif
         GPIO_PIN_5,
         GPIO_PIN_6,
         GPIO_PIN_7,
-    }
+    },
 #endif /* BSP_USING_SPI0 */
 
 #ifdef BSP_USING_SPI1
@@ -50,10 +59,13 @@ static const struct gd32_spi spi_bus_obj[] = {
         RCU_GPIOB,
         &spi_bus1,
         GPIOB,
+#if defined SOC_SERIES_GD32F4xx
+        GPIO_AF_5,
+#endif
         GPIO_PIN_12,
         GPIO_PIN_14,
         GPIO_PIN_15,
-    }
+    },
 #endif /* BSP_USING_SPI1 */
 
 #ifdef BSP_USING_SPI2
@@ -64,11 +76,48 @@ static const struct gd32_spi spi_bus_obj[] = {
         RCU_GPIOB,
         &spi_bus2,
         GPIOB,
+#if defined SOC_SERIES_GD32F4xx
+        GPIO_AF_6,
+#endif
         GPIO_PIN_3,
         GPIO_PIN_4,
         GPIO_PIN_5,
-    }
+    },
 #endif /* BSP_USING_SPI2 */
+
+#ifdef BSP_USING_SPI3
+    {
+        SPI2,
+        "spi2",
+        RCU_SPI3,
+        RCU_GPIOE,
+        &spi_bus3,
+        GPIOB,
+#if defined SOC_SERIES_GD32F4xx
+        GPIO_AF_5,
+#endif
+        GPIO_PIN_2,
+        GPIO_PIN_5,
+        GPIO_PIN_6,
+    },
+#endif /* BSP_USING_SPI3 */
+
+#ifdef BSP_USING_SPI4
+    {
+        SPI4,
+        "spi4",
+        RCU_SPI4,
+        RCU_GPIOF,
+        &spi_bus4,
+        GPIOF,
+#if defined SOC_SERIES_GD32F4xx
+        GPIO_AF_5,
+#endif
+        GPIO_PIN_7,
+        GPIO_PIN_8,
+        GPIO_PIN_9,
+    }
+#endif /* BSP_USING_SPI4 */
 };
 
 /* private rt-thread spi ops function */
@@ -94,11 +143,10 @@ static void gd32_spi_init(struct gd32_spi *gd32_spi)
 
 #if defined SOC_SERIES_GD32F4xx
     /*GPIO pin configuration*/
-    gpio_af_set(gd32_spi->spi_port, GPIO_AF_5,  gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
+    gpio_af_set(gd32_spi->spi_port, gd32_spi->alt_func_num, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
 
     gpio_mode_set(gd32_spi->spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
     gpio_output_options_set(gd32_spi->spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_200MHZ, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
-
 #else
     /* Init SPI SCK MOSI */
     gpio_init(gd32_spi->spi_port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, gd32_spi->sck_pin | gd32_spi->mosi_pin);
@@ -331,6 +379,42 @@ static rt_uint32_t spixfer(struct rt_spi_device* device, struct rt_spi_message*
     return message->length;
 };
 
+/**
+  * Attach the spi device to SPI bus, this function must be used after initialization.
+  */
+rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin)
+{
+    RT_ASSERT(bus_name != RT_NULL);
+    RT_ASSERT(device_name != RT_NULL);
+
+    rt_err_t result;
+    struct rt_spi_device *spi_device;
+
+    /* attach the device to spi bus*/
+    spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
+    RT_ASSERT(spi_device != RT_NULL);
+
+    if(cs_pin != PIN_NONE)
+    {
+        /* initialize the cs pin && select the slave*/
+        rt_pin_mode(cs_pin, PIN_MODE_OUTPUT);
+        rt_pin_write(cs_pin, PIN_HIGH);
+    }
+
+    result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
+
+    if (result != RT_EOK)
+    {
+        LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
+    }
+
+    RT_ASSERT(result == RT_EOK);
+
+    LOG_D("%s attach to %s done", device_name, bus_name);
+
+    return result;
+}
+
 int rt_hw_spi_init(void)
 {
     int result = 0;
@@ -352,5 +436,5 @@ int rt_hw_spi_init(void)
 
 INIT_BOARD_EXPORT(rt_hw_spi_init);
 
-#endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 */
+#endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 || BSP_USING_SPI3 || BSP_USING_SPI4*/
 #endif /* RT_USING_SPI */

bsp/gd32/arm/libraries/gd32_drivers/drv_spi.h

@@ -34,11 +34,16 @@ struct gd32_spi
     rcu_periph_enum gpio_clk;
     struct rt_spi_bus *spi_bus;
     uint32_t spi_port;
+#if defined SOC_SERIES_GD32F4xx
+    uint32_t alt_func_num;
+#endif
     uint16_t sck_pin;
     uint16_t miso_pin;
     uint16_t mosi_pin;
 };
 
+rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin);
+
 #ifdef __cplusplus
 }
 #endif