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port rt-thread to M16C

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@619 bbd45198-f89e-11dd-88c7-29a3b14d5316
dzzxzz há 15 anos atrás
pai
commit
02564df01e
3 ficheiros alterados com 198 adições e 0 exclusões
  1. 117 0
      libcpu/m16c/context.asm
  2. 22 0
      libcpu/m16c/interrupt.c
  3. 59 0
      libcpu/m16c/stack.c

+ 117 - 0
libcpu/m16c/context.asm

@@ -0,0 +1,117 @@
+/*
+ * File      : context.asm
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-04-09     fify         the first version
+ *
+ * For       : Renesas M16C
+ * Toolchain : IAR's EW for M16C v3.401
+*/
+
+;********************************************************************************************************
+;                                           PUBLIC FUNCTIONS
+;********************************************************************************************************
+
+    RSEG        CSTACK
+
+    RSEG        ISTACK
+
+    RSEG        CODE(1)
+
+    EXTERN    rt_thread_switch_interrput_flag
+    EXTERN    rt_interrupt_from_thread
+    EXTERN    rt_interrupt_to_thread
+    EXTERN    rt_interrupt_enter
+    EXTERN    rt_tick_increase
+    EXTERN    rt_interrupt_leave
+    EXTERN    u0rec_handler
+
+    PUBLIC    rt_hw_interrupt_disable
+    PUBLIC    rt_hw_interrupt_enable    
+    PUBLIC    rt_hw_context_switch_to
+    PUBLIC    rt_hw_context_switch
+    PUBLIC    rt_hw_context_switch_interrupt
+    PUBLIC    rt_hw_timer_handler
+    PUBLIC    rt_hw_uart0_receive_handler
+
+rt_hw_interrupt_disable
+    FCLR    I
+    RTS
+
+rt_hw_interrupt_enable
+    FSET    I
+    RTS
+    
+;/*
+; * void rt_hw_context_switch_to(rt_uint32 to);
+; * r0 --> to
+; * this fucntion is used to perform the first thread switch
+; */
+rt_hw_context_switch_to
+    MOV.W   R0, A0
+    LDC     [A0], ISP
+    POPM    R0,R1,R2,R3,A0,A1,SB,FB
+    REIT
+
+rt_hw_context_switch
+    PUSHM    R0,R1,R2,R3,A0,A1,SB,FB 
+    MOV.W    R0, A0
+    STC      ISP, [A0]
+    MOV.W    R1, A0
+    LDC      [A0], ISP
+    POPM     R0,R1,R2,R3,A0,A1,SB,FB         ; Restore all processor registers from the new task's stack
+    REIT
+  
+rt_hw_context_switch_interrupt
+    CMP.W    #1,rt_thread_switch_interrput_flag
+    JEQ      jump
+    MOV.W    #1,rt_thread_switch_interrput_flag
+    MOV.W    R0, rt_interrupt_from_thread
+jump
+    MOV.W    R1, rt_interrupt_to_thread
+    RTS
+
+rt_hw_context_switch_interrupt_do
+    MOV.W    #0, rt_thread_switch_interrput_flag    
+    MOV.W    rt_interrupt_from_thread, A0
+    STC      ISP, [A0]    
+    
+    MOV.W    rt_interrupt_to_thread, A0
+    LDC      [A0], ISP
+    POPM     R0,R1,R2,R3,A0,A1,SB,FB         ; Restore all processor registers from the new task's stack
+    RTS                                      ; Normal return
+    
+    .EVEN
+rt_hw_timer_handler:
+    PUSHM    R0,R1,R2,R3,A0,A1,SB,FB             ; Save current task's registers
+    JSR      rt_interrupt_enter                   
+    JSR      rt_tick_increase                           
+    JSR      rt_interrupt_leave
+
+    CMP.W    #1,rt_thread_switch_interrput_flag
+    JEQ      rt_hw_context_switch_interrupt_do
+    
+    POPM     R0,R1,R2,R3,A0,A1,SB,FB             ; Restore registers from the new task's stack
+    REIT                                         ; Return from interrup
+
+    .EVEN
+rt_hw_uart0_receive_handler:
+    PUSHM    R0,R1,R2,R3,A0,A1,SB,FB             ; Save current task's registers
+    JSR      rt_interrupt_enter 
+    JSR      u0rec_handler                         
+    JSR      rt_interrupt_leave
+
+    CMP.W    #1, rt_thread_switch_interrput_flag
+    JEQ      rt_hw_context_switch_interrupt_do
+    
+    POPM     R0,R1,R2,R3,A0,A1,SB,FB             ; Restore registers from the new task's stack
+    REIT                                         ; Return from interrup
+
+    END

+ 22 - 0
libcpu/m16c/interrupt.c

@@ -0,0 +1,22 @@
+/*
+ * File      : interrupt.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-04-09     fify         the first version
+ *
+ * For       : Renesas M16C
+ * Toolchain : IAR's EW for M16C v3.401
+*/
+
+#include <rtthread.h>
+
+rt_uint16_t rt_interrupt_from_thread;
+rt_uint16_t rt_interrupt_to_thread;
+rt_uint16_t rt_thread_switch_interrput_flag;

+ 59 - 0
libcpu/m16c/stack.c

@@ -0,0 +1,59 @@
+/*
+ * File      : stack.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-04-09     fify         the first version
+ *
+ * For       : Renesas M16C
+ * Toolchain : IAR's EW for M16C v3.401
+*/
+
+#include <rtthread.h>
+
+/**
+ * This function will initialize thread stack
+ *
+ * @param tentry the entry of thread
+ * @param parameter the parameter of entry
+ * @param stack_addr the beginning stack address
+ * @param texit the function will be called when thread exit
+ *
+ * @return stack address
+ */
+rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
+	rt_uint8_t *stack_addr, void *texit)
+{
+    rt_uint16_t  *pstk16;
+    rt_uint16_t   flag;
+
+
+    flag       = 0x0040;
+    pstk16     = (rt_uint16_t *)stack_addr;
+    pstk16--;
+
+                                                                /* Simulate ISR entry                                       */
+    *pstk16--  = (flag                 &     0x00FF)            /* ... The lowest  byte   of the FLAG register              */
+               | (((rt_uint32_t)tentry >>  8) & 0x00000F00)            /* ... The highest nibble of the PC   register              */
+               | ((flag         <<  4) &     0xF000);           /* ... The highest nibble of the FLAG register              */
+    *pstk16--  = (((rt_uint32_t)tentry      ) & 0x0000FFFF);           /* ... The lowest  bytes  of the PC   register              */
+
+                                                                /* Save registers onto stack frame                          */
+    *pstk16--  = (rt_uint16_t)0xFBFB;				                /* ... FB register                                          */
+    *pstk16--  = (rt_uint16_t)0x3B3B;                                /* ... SB register                                          */
+    *pstk16--  = (rt_uint16_t)0xA1A1;				                /* ... A1 register                                          */
+    *pstk16--  = (rt_uint16_t)0xA0A0;				                /* ... A0 register                                          */
+    *pstk16--  = (rt_uint16_t)0x3333;				                /* ... R3 register                                          */
+    *pstk16--  = (rt_uint32_t)parameter >> 16L;				            /* ... Pass argument in R2 register                         */
+    *pstk16--  = (rt_uint32_t)parameter & 0x0000FFFFL;				    /* ... Pass argument in R1 register                         */
+    *pstk16    = (rt_uint16_t)0x0000;				                /* ... R0 register                                          */
+
+	/* return task's current stack address */
+	return (rt_uint8_t *)pstk16;
+}