[BSP] code cleanup

bsp/imx6ull-100ask-smart/drivers/board.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/imx6ull-100ask-smart/drivers/drv_timer.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -25,22 +25,22 @@ static int g_sys_freq;
 
 /* System Counter */
 struct sctr_regs {
-	rt_uint32_t cntcr;
-	rt_uint32_t cntsr;
-	rt_uint32_t cntcv1;
-	rt_uint32_t cntcv2;
-	rt_uint32_t resv1[4];
-	rt_uint32_t cntfid0;
-	rt_uint32_t cntfid1;
-	rt_uint32_t cntfid2;
-	rt_uint32_t resv2[1001];
-	rt_uint32_t counterid[1];
+    rt_uint32_t cntcr;
+    rt_uint32_t cntsr;
+    rt_uint32_t cntcv1;
+    rt_uint32_t cntcv2;
+    rt_uint32_t resv1[4];
+    rt_uint32_t cntfid0;
+    rt_uint32_t cntfid1;
+    rt_uint32_t cntfid2;
+    rt_uint32_t resv2[1001];
+    rt_uint32_t counterid[1];
 };
 
-#define SC_CNTCR_ENABLE		(1 << 0)
-#define SC_CNTCR_HDBG		(1 << 1)
-#define SC_CNTCR_FREQ0		(1 << 8)
-#define SC_CNTCR_FREQ1		(1 << 9)
+#define SC_CNTCR_ENABLE     (1 << 0)
+#define SC_CNTCR_HDBG       (1 << 1)
+#define SC_CNTCR_FREQ0      (1 << 8)
+#define SC_CNTCR_FREQ1      (1 << 9)
 
 
 #define isb() __asm__ __volatile__ ("" : : : "memory")
@@ -96,79 +96,76 @@ volatile unsigned int *CCM_CLPCR;
 
 static void imx6ull_enable_clk_in_waitmode(void)
 {
-	CCM_CLPCR = rt_hw_kernel_phys_to_virt((void*)0x20C4054, 4); 
-	*CCM_CLPCR &= ~(1<<5 | 0x3);
+    CCM_CLPCR = rt_hw_kernel_phys_to_virt((void*)0x20C4054, 4);
+    *CCM_CLPCR &= ~(1<<5 | 0x3);
 }
 
 static void system_counter_clk_source_init(void)
 {
-	/* to do */
+    /* to do */
 }
 
 static void system_counter_init(void)
 {
-	/* enable system_counter */
-#define SCTR_BASE_ADDR	0x021DC000
+    /* enable system_counter */
+#define SCTR_BASE_ADDR  0x021DC000
 #define CONFIG_SC_TIMER_CLK  8000000
 
-	/* imx6ull, enable system counter */
-	struct sctr_regs *sctr = (struct sctr_regs *)rt_hw_kernel_phys_to_virt((void*)SCTR_BASE_ADDR, sizeof(struct sctr_regs));
-	unsigned long val, freq;
+    /* imx6ull, enable system counter */
+    struct sctr_regs *sctr = (struct sctr_regs *)rt_hw_kernel_phys_to_virt((void*)SCTR_BASE_ADDR, sizeof(struct sctr_regs));
+    unsigned long val, freq;
 
-	freq = CONFIG_SC_TIMER_CLK;
-	asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
+    freq = CONFIG_SC_TIMER_CLK;
+    asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
 
-	sctr->cntfid0 = freq;
+    sctr->cntfid0 = freq;
 
-	/* Enable system counter */
-	val = sctr->cntcr;
-	val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
-	val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
-	sctr->cntcr = val;
-	
-	imx6ull_enable_clk_in_waitmode();
+    /* Enable system counter */
+    val = sctr->cntcr;
+    val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
+    val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
+    sctr->cntcr = val;
+
+    imx6ull_enable_clk_in_waitmode();
 }
 
 static void arch_timer_init(void)
 {
-	g_sys_freq = read_cntfrq();
-	
-	/* set timeout val */
-	disable_cntp();
-	write_cntp_tval(TICK_PERIOD);
-	
-	/* start timer */
-	enable_cntp();
-	
-	/* enable irq */
-	
-}
+    g_sys_freq = read_cntfrq();
+
+    /* set timeout val */
+    disable_cntp();
+    write_cntp_tval(TICK_PERIOD);
 
+    /* start timer */
+    enable_cntp();
+
+    /* enable irq */
+}
 
 static void rt_hw_timer_isr(int vector, void *param)
 {
     rt_tick_increase();
 
-	/* setup for next irq */
+    /* setup for next irq */
     /* clear interrupt */
-	disable_cntp();
+    disable_cntp();
     write_cntp_cval(read_cntp_cval() + TICK_PERIOD);
-	enable_cntp();
+    enable_cntp();
 }
 
 int rt_hw_timer_init(void)
 {
     /* Setup Timer for generating irq */
     /* enable timer */
-	system_counter_clk_source_init(); 
-	system_counter_init();
-	arch_timer_init();
+    system_counter_clk_source_init();
+    system_counter_init();
+    arch_timer_init();
 
-	/* insall irq, enable irq */
+    /* insall irq, enable irq */
     rt_hw_interrupt_install(IRQ_SYS_TICK, rt_hw_timer_isr, RT_NULL, "tick");
     rt_hw_interrupt_umask(IRQ_SYS_TICK);
 
     return 0;
 }
 INIT_BOARD_EXPORT(rt_hw_timer_init);
-

bsp/imx6ull-100ask-smart/drivers/drv_timer.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/imx6ull-100ask-smart/drivers/imx6ul.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/imx6ull-100ask-smart/drivers/rt_lcd.h

@@ -30,7 +30,7 @@ struct fb_bitfield
 {
     uint32_t offset;        /* beginning of bitfield */
     uint32_t length;        /* length of bitfield */
-    uint32_t msb_right;     /* != 0 : Most significant bit is */ 
+    uint32_t msb_right;     /* != 0 : Most significant bit is */
     /* right */
 };
 

bsp/imx6ull-100ask-smart/drivers/serial.c

@@ -1,26 +1,7 @@
 /*
- *  serial.c UART driver
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * COPYRIGHT (C) 2013, Shanghai Real-Thread Technology Co., Ltd
- *
- *  This file is part of RT-Thread (http://www.rt-thread.org)
- *  Maintainer: bernard.xiong <bernard.xiong at gmail.com>
- *
- *  All rights reserved.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -36,12 +17,12 @@
 
 /*根据IMX6ULL芯片手册<<55.15 UART Memory Map/Register Definition>>的3608页，定义UART的结构体,*/
 typedef struct {
-  volatile unsigned int  URXD;               /**< UART Receiver Register, offset: 0x0 	           串口接收寄存器，偏移地址0x0     */
-  		   unsigned char RESERVED_0[60];		
+  volatile unsigned int  URXD;               /**< UART Receiver Register, offset: 0x0              串口接收寄存器，偏移地址0x0     */
+           unsigned char RESERVED_0[60];
   volatile unsigned int  UTXD;               /**< UART Transmitter Register, offset: 0x40          串口发送寄存器，偏移地址0x40*/
-  		   unsigned char RESERVED_1[60];		
-  volatile unsigned int  UCR1;               /**< UART Control Register 1, offset: 0x80 	       串口控制寄存器1，偏移地址0x80*/
-  volatile unsigned int  UCR2;               /**< UART Control Register 2, offset: 0x84 	       串口控制寄存器2，偏移地址0x84*/
+           unsigned char RESERVED_1[60];
+  volatile unsigned int  UCR1;               /**< UART Control Register 1, offset: 0x80            串口控制寄存器1，偏移地址0x80*/
+  volatile unsigned int  UCR2;               /**< UART Control Register 2, offset: 0x84            串口控制寄存器2，偏移地址0x84*/
   volatile unsigned int  UCR3;               /**< UART Control Register 3, offset: 0x88            串口控制寄存器3，偏移地址0x88*/
   volatile unsigned int  UCR4;               /**< UART Control Register 4, offset: 0x8C            串口控制寄存器4，偏移地址0x8C*/
   volatile unsigned int  UFCR;               /**< UART FIFO Control Register, offset: 0x90         串口FIFO控制寄存器，偏移地址0x90*/
@@ -50,10 +31,10 @@ volatile unsigned int  USR2;               /**< UART Status Register 2, offset:
   volatile unsigned int  UESC;               /**< UART Escape Character Register, offset: 0x9C     串口转义字符寄存器，偏移地址0x9C*/
   volatile unsigned int  UTIM;               /**< UART Escape Timer Register, offset: 0xA0         串口转义定时器寄存器 偏移地址0xA0*/
   volatile unsigned int  UBIR;               /**< UART BRM Incremental Register, offset: 0xA4      串口二进制倍率增加寄存器 偏移地址0xA4*/
-  volatile unsigned int  UBMR;               /**< UART BRM Modulator Register, offset: 0xA8 	   串口二进制倍率调节寄存器 偏移地址0xA8*/
+  volatile unsigned int  UBMR;               /**< UART BRM Modulator Register, offset: 0xA8        串口二进制倍率调节寄存器 偏移地址0xA8*/
   volatile unsigned int  UBRC;               /**< UART Baud Rate Count Register, offset: 0xAC      串口波特率计数寄存器 偏移地址0xAC*/
   volatile unsigned int  ONEMS;              /**< UART One Millisecond Register, offset: 0xB0      串口一毫秒寄存器 偏移地址0xB0*/
-  volatile unsigned int  UTS;                /**< UART Test Register, offset: 0xB4                 串口测试寄存器 偏移地址0xB4*/		
+  volatile unsigned int  UTS;                /**< UART Test Register, offset: 0xB4                 串口测试寄存器 偏移地址0xB4*/
   volatile unsigned int  UMCR;               /**< UART RS-485 Mode Control Register, offset: 0xB8  串口485模式控制寄存器 偏移地址0xB8*/
 } UART_Type;
 
@@ -87,61 +68,61 @@ static void rt_hw_uart_isr(int irqno, void *param)
 
 static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
-	/* 115200,8n1 */
-	volatile unsigned int *IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA ;
-	volatile unsigned int *IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA	;
-	volatile unsigned int *IOMUXC_UART1_RX_DATA_SELECT_INPUT ;
-	volatile unsigned int *CCM_CSCDR1;
-	volatile unsigned int *CCM_CCGR5;
-
-	IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA 	= (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x20E0084, 4);
-	IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA 	= (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x20E0088, 4);
-	IOMUXC_UART1_RX_DATA_SELECT_INPUT		= (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x20E0624, 4);
-	CCM_CSCDR1 = (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x020C4024, 4);
-	CCM_CCGR5 = (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x020C407C, 4);
+    /* 115200,8n1 */
+    volatile unsigned int *IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA ;
+    volatile unsigned int *IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA  ;
+    volatile unsigned int *IOMUXC_UART1_RX_DATA_SELECT_INPUT ;
+    volatile unsigned int *CCM_CSCDR1;
+    volatile unsigned int *CCM_CCGR5;
+
+    IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA     = (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x20E0084, 4);
+    IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA     = (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x20E0088, 4);
+    IOMUXC_UART1_RX_DATA_SELECT_INPUT       = (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x20E0624, 4);
+    CCM_CSCDR1 = (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x020C4024, 4);
+    CCM_CCGR5 = (volatile unsigned int *)rt_hw_kernel_phys_to_virt((void *)0x020C407C, 4);
 
     struct hw_uart_device * uart = (struct hw_uart_device *)serial->parent.user_data;
 
-	UART_Type *uart_reg = (UART_Type *)uart->hw_base;
+    UART_Type *uart_reg = (UART_Type *)uart->hw_base;
 
-	/* 设置UART的总时钟
-	 * UART_CLK_ROOT = 80Mhz
-	 */
-	*CCM_CSCDR1 &= ~((1<<6) | (0x3f));
+    /* 设置UART的总时钟
+     * UART_CLK_ROOT = 80Mhz
+     */
+    *CCM_CSCDR1 &= ~((1<<6) | (0x3f));
 
-	/* 给UART1模块提供时钟
-	 * uart1_clk_enable
-	 */
-	*CCM_CCGR5 |= (3<<24);
+    /* 给UART1模块提供时钟
+     * uart1_clk_enable
+     */
+    *CCM_CCGR5 |= (3<<24);
 
-	/* 配置引脚功能 */
-	*IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA &= ~0xf;
-	*IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA &= ~0xf;
+    /* 配置引脚功能 */
+    *IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA &= ~0xf;
+    *IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA &= ~0xf;
 
-	/* IMX6ULL特殊的地方 */
-	*IOMUXC_UART1_RX_DATA_SELECT_INPUT |= 3;
+    /* IMX6ULL特殊的地方 */
+    *IOMUXC_UART1_RX_DATA_SELECT_INPUT |= 3;
 
 
-	/* 设置波特率 
-	 * 115200 = 80M/(16*(UBMR+1)/(UBIR+1))
-	 * UBIR = 15
-	 * 115200 = 80M/(UBMR+1)
-	 * UBMR = 80,000,000/115200 = 694 - 1 = 693
-	 * 真正的baudrate = 80,000,000/694 = 115274
-	 * 先设置UBIR, 后设置UBMR
-	 */
-	uart_reg->UFCR |= (5<<7);
-	uart_reg->UBIR = 15;
-	uart_reg->UBMR = 693;
+    /* 设置波特率
+     * 115200 = 80M/(16*(UBMR+1)/(UBIR+1))
+     * UBIR = 15
+     * 115200 = 80M/(UBMR+1)
+     * UBMR = 80,000,000/115200 = 694 - 1 = 693
+     * 真正的baudrate = 80,000,000/694 = 115274
+     * 先设置UBIR, 后设置UBMR
+     */
+    uart_reg->UFCR |= (5<<7);
+    uart_reg->UBIR = 15;
+    uart_reg->UBMR = 693;
 
-	/* 设置数据格式 */
-	uart_reg->UCR2 |= (1<<14) | (0<<8) | (0<<6) | (1<<5) | (1<<2) | (1<<1);
+    /* 设置数据格式 */
+    uart_reg->UCR2 |= (1<<14) | (0<<8) | (0<<6) | (1<<5) | (1<<2) | (1<<1);
 
-	/* IMX6ULL芯片要求必须设置 */
-	uart_reg->UCR3 |= (1<<2);
+    /* IMX6ULL芯片要求必须设置 */
+    uart_reg->UCR3 |= (1<<2);
 
-	/* 使能UART */
-	uart_reg->UCR1 |= (1<<0);	
+    /* 使能UART */
+    uart_reg->UCR1 |= (1<<0);
 
     return RT_EOK;
 }
@@ -149,11 +130,11 @@ static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_co
 static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
 {
     struct hw_uart_device *uart;
-	UART_Type *uart_reg;
+    UART_Type *uart_reg;
 
     RT_ASSERT(serial != RT_NULL);
     uart = (struct hw_uart_device *)serial->parent.user_data;
-	uart_reg = (UART_Type *)uart->hw_base;
+    uart_reg = (UART_Type *)uart->hw_base;
 
     switch (cmd)
     {
@@ -164,7 +145,7 @@ static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg
 
     case RT_DEVICE_CTRL_SET_INT:
         /* enable rx irq */
-		uart_reg->UCR4 |= (1<<0);
+        uart_reg->UCR4 |= (1<<0);
         rt_hw_interrupt_umask(uart->irqno);
         break;
     }
@@ -175,14 +156,14 @@ static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg
 static int uart_putc(struct rt_serial_device *serial, char c)
 {
     struct hw_uart_device *uart;
-	UART_Type *uart_reg;
+    UART_Type *uart_reg;
 
     RT_ASSERT(serial != RT_NULL);
     uart = (struct hw_uart_device *)serial->parent.user_data;
-	uart_reg = (UART_Type *)uart->hw_base;
+    uart_reg = (UART_Type *)uart->hw_base;
 
-	while ((uart_reg->USR2 & (1<<3)) == 0);
-	uart_reg->UTXD = c;
+    while ((uart_reg->USR2 & (1<<3)) == 0);
+    uart_reg->UTXD = c;
 
     return 1;
 }
@@ -191,16 +172,16 @@ static int uart_getc(struct rt_serial_device *serial)
 {
     int ch;
     struct hw_uart_device *uart;
-	UART_Type *uart_reg;
+    UART_Type *uart_reg;
 
     RT_ASSERT(serial != RT_NULL);
     uart = (struct hw_uart_device *)serial->parent.user_data;
-	uart_reg = (UART_Type *)uart->hw_base;
+    uart_reg = (UART_Type *)uart->hw_base;
 
-	if ((uart_reg->USR2 & (1<<0)) == 0)
-		ch = -1;
-	else
-		ch = uart_reg->URXD;
+    if ((uart_reg->USR2 & (1<<0)) == 0)
+        ch = -1;
+    else
+        ch = uart_reg->URXD;
 
     return ch;
 }

bsp/imx6ull-100ask-smart/drivers/serial.h

@@ -1,26 +1,7 @@
 /*
- *  UART driver
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
- * COPYRIGHT (C) 2013, Shanghai Real-Thread Technology Co., Ltd
- *
- *  This file is part of RT-Thread (http://www.rt-thread.org)
- *  Maintainer: bernard.xiong <bernard.xiong at gmail.com>
- *
- *  All rights reserved.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
  * Date           Author       Notes
@@ -35,5 +16,3 @@
 int rt_hw_uart_init(void);
 
 #endif
-
-