stm3210 up to lib3.1.2

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@75 bbd45198-f89e-11dd-88c7-29a3b14d5316

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/arm/startup_stm32f10x_cl.s

@@ -1,8 +1,8 @@
 ;******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
 ;* File Name          : startup_stm32f10x_cl.s
 ;* Author             : MCD Application Team
-;* Version            : V3.1.0
-;* Date               : 06/19/2009
+;* Version            : V3.1.2
+;* Date               : 09/28/2009
 ;* Description        : STM32F10x Connectivity line devices vector table for RVMDK 
 ;*                      toolchain. 
 ;*                      This module performs:

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/arm/startup_stm32f10x_hd.s

@@ -1,8 +1,8 @@
 ;******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
 ;* File Name          : startup_stm32f10x_hd.s
 ;* Author             : MCD Application Team
-;* Version            : V3.1.0
-;* Date               : 06/19/2009
+;* Version            : V3.1.2
+;* Date               : 09/28/2009
 ;* Description        : STM32F10x High Density Devices vector table for RVMDK 
 ;*                      toolchain. 
 ;*                      This module performs:

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/arm/startup_stm32f10x_ld.s

@@ -1,8 +1,8 @@
 ;******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
 ;* File Name          : startup_stm32f10x_ld.s
 ;* Author             : MCD Application Team
-;* Version            : V3.1.0
-;* Date               : 06/19/2009
+;* Version            : V3.1.2
+;* Date               : 09/28/2009
 ;* Description        : STM32F10x Low Density Devices vector table for RVMDK 
 ;*                      toolchain. 
 ;*                      This module performs:

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/arm/startup_stm32f10x_md.s

@@ -1,8 +1,8 @@
 ;******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
 ;* File Name          : startup_stm32f10x_md.s
 ;* Author             : MCD Application Team
-;* Version            : V3.1.0
-;* Date               : 06/19/2009
+;* Version            : V3.1.2
+;* Date               : 09/28/2009
 ;* Description        : STM32F10x Medium Density Devices vector table for RVMDK 
 ;*                      toolchain.  
 ;*                      This module performs:

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/gcc/startup_stm32f10x_cl.s

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    startup_stm32f10x_cl.s
   * @author  MCD Application Team
- * @version  V3.1.0
- * @date     06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   STM32F10x Connectivity line Devices vector table for RIDE7 toolchain.
   *          This module performs:
   *                - Set the initial SP
@@ -25,28 +25,27 @@
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
- */	
+ */  
     
   .syntax unified
-	.cpu cortex-m3
-	.fpu softvfp
-	.thumb
+  .cpu cortex-m3
+  .fpu softvfp
+  .thumb
 
-.global	g_pfnVectors
-.global	SystemInit_ExtMemCtl_Dummy
-.global	Default_Handler
+.global  g_pfnVectors
+.global  Default_Handler
 
 /* start address for the initialization values of the .data section. 
 defined in linker script */
-.word	_sidata
+.word  _sidata
 /* start address for the .data section. defined in linker script */  
-.word	_sdata
+.word  _sdata
 /* end address for the .data section. defined in linker script */
-.word	_edata
+.word  _edata
 /* start address for the .bss section. defined in linker script */
-.word	_sbss
+.word  _sbss
 /* end address for the .bss section. defined in linker script */
-.word	_ebss
+.word  _ebss
 
 .equ  BootRAM, 0xF1E0F85F
 /**
@@ -58,43 +57,43 @@ defined in linker script */
  * @retval : None
 */
 
-    .section	.text.Reset_Handler
-	.weak	Reset_Handler
-	.type	Reset_Handler, %function
-Reset_Handler:	
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler:  
 
 /* Copy the data segment initializers from flash to SRAM */  
-  movs	r1, #0
-  b	LoopCopyDataInit
+  movs  r1, #0
+  b  LoopCopyDataInit
 
 CopyDataInit:
-	ldr	r3, =_sidata
-	ldr	r3, [r3, r1]
-	str	r3, [r0, r1]
-	adds	r1, r1, #4
+  ldr  r3, =_sidata
+  ldr  r3, [r3, r1]
+  str  r3, [r0, r1]
+  adds  r1, r1, #4
     
 LoopCopyDataInit:
-	ldr	r0, =_sdata
-	ldr	r3, =_edata
-	adds	r2, r0, r1
-	cmp	r2, r3
-	bcc	CopyDataInit
-	ldr	r2, =_sbss
-	b	LoopFillZerobss
+  ldr  r0, =_sdata
+  ldr  r3, =_edata
+  adds  r2, r0, r1
+  cmp  r2, r3
+  bcc  CopyDataInit
+  ldr  r2, =_sbss
+  b  LoopFillZerobss
 
 /* Zero fill the bss segment. */  
 FillZerobss:
-	movs	r3, #0
-	str	r3, [r2], #4
+  movs  r3, #0
+  str  r3, [r2], #4
     
 LoopFillZerobss:
-	ldr	r3, = _ebss
-	cmp	r2, r3
-	bcc	FillZerobss
+  ldr  r3, = _ebss
+  cmp  r2, r3
+  bcc  FillZerobss
 /* Call the application's entry point.*/
-	bl	main
-	bx	lr    
-.size	Reset_Handler, .-Reset_Handler
+  bl  main
+  bx  lr    
+.size  Reset_Handler, .-Reset_Handler
 
 /**
  * @brief  This is the code that gets called when the processor receives an 
@@ -104,11 +103,11 @@ LoopFillZerobss:
  * @param  None     
  * @retval : None       
 */
-    .section	.text.Default_Handler,"ax",%progbits
+    .section  .text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
-	b	Infinite_Loop
-	.size	Default_Handler, .-Default_Handler
+  b  Infinite_Loop
+  .size  Default_Handler, .-Default_Handler
 
 /******************************************************************************
 *
@@ -117,79 +116,79 @@ Infinite_Loop:
 * 0x0000.0000.
 *
 ******************************************************************************/    
- 	.section	.isr_vector,"a",%progbits
-	.type	g_pfnVectors, %object
-	.size	g_pfnVectors, .-g_pfnVectors
+   .section  .isr_vector,"a",%progbits
+  .type  g_pfnVectors, %object
+  .size  g_pfnVectors, .-g_pfnVectors
     
     
 g_pfnVectors:
-	.word	_estack
-	.word	Reset_Handler
-	.word	NMI_Handler
-	.word	HardFault_Handler
-	.word	MemManage_Handler
-	.word	BusFault_Handler
-	.word	UsageFault_Handler
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	SVC_Handler
-	.word	DebugMon_Handler
-	.word	0
-	.word	PendSV_Handler
-	.word	SysTick_Handler
-	.word	WWDG_IRQHandler
-	.word	PVD_IRQHandler
-	.word	TAMPER_IRQHandler
-	.word	RTC_IRQHandler
-	.word	FLASH_IRQHandler
-	.word	RCC_IRQHandler
-	.word	EXTI0_IRQHandler
-	.word	EXTI1_IRQHandler
-	.word	EXTI2_IRQHandler
-	.word	EXTI3_IRQHandler
-	.word	EXTI4_IRQHandler
-	.word	DMA1_Channel1_IRQHandler
-	.word	DMA1_Channel2_IRQHandler
-	.word	DMA1_Channel3_IRQHandler
-	.word	DMA1_Channel4_IRQHandler
-	.word	DMA1_Channel5_IRQHandler
-	.word	DMA1_Channel6_IRQHandler
-	.word	DMA1_Channel7_IRQHandler
-	.word	ADC1_2_IRQHandler
+  .word  _estack
+  .word  Reset_Handler
+  .word  NMI_Handler
+  .word  HardFault_Handler
+  .word  MemManage_Handler
+  .word  BusFault_Handler
+  .word  UsageFault_Handler
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  SVC_Handler
+  .word  DebugMon_Handler
+  .word  0
+  .word  PendSV_Handler
+  .word  SysTick_Handler
+  .word  WWDG_IRQHandler
+  .word  PVD_IRQHandler
+  .word  TAMPER_IRQHandler
+  .word  RTC_IRQHandler
+  .word  FLASH_IRQHandler
+  .word  RCC_IRQHandler
+  .word  EXTI0_IRQHandler
+  .word  EXTI1_IRQHandler
+  .word  EXTI2_IRQHandler
+  .word  EXTI3_IRQHandler
+  .word  EXTI4_IRQHandler
+  .word  DMA1_Channel1_IRQHandler
+  .word  DMA1_Channel2_IRQHandler
+  .word  DMA1_Channel3_IRQHandler
+  .word  DMA1_Channel4_IRQHandler
+  .word  DMA1_Channel5_IRQHandler
+  .word  DMA1_Channel6_IRQHandler
+  .word  DMA1_Channel7_IRQHandler
+  .word  ADC1_2_IRQHandler
   .word CAN1_TX_IRQHandler
   .word CAN1_RX0_IRQHandler
- 	.word	CAN1_RX1_IRQHandler
-	.word	CAN1_SCE_IRQHandler
-	.word	EXTI9_5_IRQHandler
-	.word	TIM1_BRK_IRQHandler
-	.word	TIM1_UP_IRQHandler
-	.word	TIM1_TRG_COM_IRQHandler
-	.word	TIM1_CC_IRQHandler
-	.word	TIM2_IRQHandler
-	.word	TIM3_IRQHandler
-	.word	TIM4_IRQHandler
-	.word	I2C1_EV_IRQHandler
-	.word	I2C1_ER_IRQHandler
-	.word	I2C2_EV_IRQHandler
-	.word	I2C2_ER_IRQHandler
-	.word	SPI1_IRQHandler
-	.word	SPI2_IRQHandler
-	.word	USART1_IRQHandler
-	.word	USART2_IRQHandler
-	.word	USART3_IRQHandler
-	.word	EXTI15_10_IRQHandler
-	.word	RTCAlarm_IRQHandler
-	.word	OTG_FS_WKUP_IRQHandler	
-  .word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word TIM5_IRQHandler            
+   .word  CAN1_RX1_IRQHandler
+  .word  CAN1_SCE_IRQHandler
+  .word  EXTI9_5_IRQHandler
+  .word  TIM1_BRK_IRQHandler
+  .word  TIM1_UP_IRQHandler
+  .word  TIM1_TRG_COM_IRQHandler
+  .word  TIM1_CC_IRQHandler
+  .word  TIM2_IRQHandler
+  .word  TIM3_IRQHandler
+  .word  TIM4_IRQHandler
+  .word  I2C1_EV_IRQHandler
+  .word  I2C1_ER_IRQHandler
+  .word  I2C2_EV_IRQHandler
+  .word  I2C2_ER_IRQHandler
+  .word  SPI1_IRQHandler
+  .word  SPI2_IRQHandler
+  .word  USART1_IRQHandler
+  .word  USART2_IRQHandler
+  .word  USART3_IRQHandler
+  .word  EXTI15_10_IRQHandler
+  .word  RTCAlarm_IRQHandler
+  .word  OTG_FS_WKUP_IRQHandler  
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word TIM5_IRQHandler            
   .word SPI3_IRQHandler            
   .word UART4_IRQHandler           
   .word UART5_IRQHandler           
@@ -253,213 +252,213 @@ g_pfnVectors:
 * this definition.
 *
 *******************************************************************************/
-  .weak	NMI_Handler
-	.thumb_set NMI_Handler,Default_Handler
-	
-  .weak	HardFault_Handler
-	.thumb_set HardFault_Handler,Default_Handler
-	
-  .weak	MemManage_Handler
-	.thumb_set MemManage_Handler,Default_Handler
-	
-  .weak	BusFault_Handler
-	.thumb_set BusFault_Handler,Default_Handler
+  .weak  NMI_Handler
+  .thumb_set NMI_Handler,Default_Handler
+  
+  .weak  HardFault_Handler
+  .thumb_set HardFault_Handler,Default_Handler
+  
+  .weak  MemManage_Handler
+  .thumb_set MemManage_Handler,Default_Handler
+  
+  .weak  BusFault_Handler
+  .thumb_set BusFault_Handler,Default_Handler
 
-	.weak	UsageFault_Handler
-	.thumb_set UsageFault_Handler,Default_Handler
+  .weak  UsageFault_Handler
+  .thumb_set UsageFault_Handler,Default_Handler
 
-	.weak	SVC_Handler
-	.thumb_set SVC_Handler,Default_Handler
+  .weak  SVC_Handler
+  .thumb_set SVC_Handler,Default_Handler
 
-	.weak	DebugMon_Handler
-	.thumb_set DebugMon_Handler,Default_Handler
+  .weak  DebugMon_Handler
+  .thumb_set DebugMon_Handler,Default_Handler
 
-	.weak	PendSV_Handler
-	.thumb_set PendSV_Handler,Default_Handler
+  .weak  PendSV_Handler
+  .thumb_set PendSV_Handler,Default_Handler
 
-	.weak	SysTick_Handler
-	.thumb_set SysTick_Handler,Default_Handler
+  .weak  SysTick_Handler
+  .thumb_set SysTick_Handler,Default_Handler
 
-	.weak	WWDG_IRQHandler
-	.thumb_set WWDG_IRQHandler,Default_Handler
+  .weak  WWDG_IRQHandler
+  .thumb_set WWDG_IRQHandler,Default_Handler
 
-	.weak	PVD_IRQHandler
-	.thumb_set PVD_IRQHandler,Default_Handler
+  .weak  PVD_IRQHandler
+  .thumb_set PVD_IRQHandler,Default_Handler
 
-	.weak	TAMPER_IRQHandler
-	.thumb_set TAMPER_IRQHandler,Default_Handler
+  .weak  TAMPER_IRQHandler
+  .thumb_set TAMPER_IRQHandler,Default_Handler
 
-	.weak	RTC_IRQHandler
-	.thumb_set RTC_IRQHandler,Default_Handler
+  .weak  RTC_IRQHandler
+  .thumb_set RTC_IRQHandler,Default_Handler
 
-	.weak	FLASH_IRQHandler
-	.thumb_set FLASH_IRQHandler,Default_Handler
+  .weak  FLASH_IRQHandler
+  .thumb_set FLASH_IRQHandler,Default_Handler
 
-	.weak	RCC_IRQHandler
-	.thumb_set RCC_IRQHandler,Default_Handler
+  .weak  RCC_IRQHandler
+  .thumb_set RCC_IRQHandler,Default_Handler
 
-	.weak	EXTI0_IRQHandler
-	.thumb_set EXTI0_IRQHandler,Default_Handler
+  .weak  EXTI0_IRQHandler
+  .thumb_set EXTI0_IRQHandler,Default_Handler
 
-	.weak	EXTI1_IRQHandler
-	.thumb_set EXTI1_IRQHandler,Default_Handler
+  .weak  EXTI1_IRQHandler
+  .thumb_set EXTI1_IRQHandler,Default_Handler
 
-	.weak	EXTI2_IRQHandler
-	.thumb_set EXTI2_IRQHandler,Default_Handler
+  .weak  EXTI2_IRQHandler
+  .thumb_set EXTI2_IRQHandler,Default_Handler
 
-	.weak	EXTI3_IRQHandler
-	.thumb_set EXTI3_IRQHandler,Default_Handler
+  .weak  EXTI3_IRQHandler
+  .thumb_set EXTI3_IRQHandler,Default_Handler
 
-	.weak	EXTI4_IRQHandler
-	.thumb_set EXTI4_IRQHandler,Default_Handler
+  .weak  EXTI4_IRQHandler
+  .thumb_set EXTI4_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel1_IRQHandler
-	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+  .weak  DMA1_Channel1_IRQHandler
+  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel2_IRQHandler
-	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+  .weak  DMA1_Channel2_IRQHandler
+  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel3_IRQHandler
-	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+  .weak  DMA1_Channel3_IRQHandler
+  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel4_IRQHandler
-	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+  .weak  DMA1_Channel4_IRQHandler
+  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel5_IRQHandler
-	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+  .weak  DMA1_Channel5_IRQHandler
+  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel6_IRQHandler
-	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+  .weak  DMA1_Channel6_IRQHandler
+  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel7_IRQHandler
-	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+  .weak  DMA1_Channel7_IRQHandler
+  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
 
-	.weak	ADC1_2_IRQHandler
-	.thumb_set ADC1_2_IRQHandler,Default_Handler
+  .weak  ADC1_2_IRQHandler
+  .thumb_set ADC1_2_IRQHandler,Default_Handler
 
-	.weak	CAN1_TX_IRQHandler
-	.thumb_set CAN1_TX_IRQHandler,Default_Handler
+  .weak  CAN1_TX_IRQHandler
+  .thumb_set CAN1_TX_IRQHandler,Default_Handler
 
-	.weak	CAN1_RX0_IRQHandler
-	.thumb_set CAN1_RX0_IRQHandler,Default_Handler
+  .weak  CAN1_RX0_IRQHandler
+  .thumb_set CAN1_RX0_IRQHandler,Default_Handler
 
-	.weak	CAN1_RX1_IRQHandler
-	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
+  .weak  CAN1_RX1_IRQHandler
+  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 
-	.weak	CAN1_SCE_IRQHandler
-	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
+  .weak  CAN1_SCE_IRQHandler
+  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
 
-	.weak	EXTI9_5_IRQHandler
-	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+  .weak  EXTI9_5_IRQHandler
+  .thumb_set EXTI9_5_IRQHandler,Default_Handler
 
-	.weak	TIM1_BRK_IRQHandler
-	.thumb_set TIM1_BRK_IRQHandler,Default_Handler
+  .weak  TIM1_BRK_IRQHandler
+  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
 
-	.weak	TIM1_UP_IRQHandler
-	.thumb_set TIM1_UP_IRQHandler,Default_Handler
+  .weak  TIM1_UP_IRQHandler
+  .thumb_set TIM1_UP_IRQHandler,Default_Handler
 
-	.weak	TIM1_TRG_COM_IRQHandler
-	.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
+  .weak  TIM1_TRG_COM_IRQHandler
+  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
 
-	.weak	TIM1_CC_IRQHandler
-	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+  .weak  TIM1_CC_IRQHandler
+  .thumb_set TIM1_CC_IRQHandler,Default_Handler
 
-	.weak	TIM2_IRQHandler
-	.thumb_set TIM2_IRQHandler,Default_Handler
+  .weak  TIM2_IRQHandler
+  .thumb_set TIM2_IRQHandler,Default_Handler
 
-	.weak	TIM3_IRQHandler
-	.thumb_set TIM3_IRQHandler,Default_Handler
+  .weak  TIM3_IRQHandler
+  .thumb_set TIM3_IRQHandler,Default_Handler
 
-	.weak	TIM4_IRQHandler
-	.thumb_set TIM4_IRQHandler,Default_Handler
+  .weak  TIM4_IRQHandler
+  .thumb_set TIM4_IRQHandler,Default_Handler
 
-	.weak	I2C1_EV_IRQHandler
-	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+  .weak  I2C1_EV_IRQHandler
+  .thumb_set I2C1_EV_IRQHandler,Default_Handler
 
-	.weak	I2C1_ER_IRQHandler
-	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+  .weak  I2C1_ER_IRQHandler
+  .thumb_set I2C1_ER_IRQHandler,Default_Handler
 
-	.weak	I2C2_EV_IRQHandler
-	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+  .weak  I2C2_EV_IRQHandler
+  .thumb_set I2C2_EV_IRQHandler,Default_Handler
 
-	.weak	I2C2_ER_IRQHandler
-	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+  .weak  I2C2_ER_IRQHandler
+  .thumb_set I2C2_ER_IRQHandler,Default_Handler
 
-	.weak	SPI1_IRQHandler
-	.thumb_set SPI1_IRQHandler,Default_Handler
+  .weak  SPI1_IRQHandler
+  .thumb_set SPI1_IRQHandler,Default_Handler
 
-	.weak	SPI2_IRQHandler
-	.thumb_set SPI2_IRQHandler,Default_Handler
+  .weak  SPI2_IRQHandler
+  .thumb_set SPI2_IRQHandler,Default_Handler
 
-	.weak	USART1_IRQHandler
-	.thumb_set USART1_IRQHandler,Default_Handler
+  .weak  USART1_IRQHandler
+  .thumb_set USART1_IRQHandler,Default_Handler
 
-	.weak	USART2_IRQHandler
-	.thumb_set USART2_IRQHandler,Default_Handler
+  .weak  USART2_IRQHandler
+  .thumb_set USART2_IRQHandler,Default_Handler
 
-	.weak	USART3_IRQHandler
-	.thumb_set USART3_IRQHandler,Default_Handler
+  .weak  USART3_IRQHandler
+  .thumb_set USART3_IRQHandler,Default_Handler
 
-	.weak	EXTI15_10_IRQHandler
-	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+  .weak  EXTI15_10_IRQHandler
+  .thumb_set EXTI15_10_IRQHandler,Default_Handler
 
-	.weak	RTCAlarm_IRQHandler
-	.thumb_set RTCAlarm_IRQHandler,Default_Handler
+  .weak  RTCAlarm_IRQHandler
+  .thumb_set RTCAlarm_IRQHandler,Default_Handler
 
-	.weak	OTG_FS_WKUP_IRQHandler
-	.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
+  .weak  OTG_FS_WKUP_IRQHandler
+  .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
 
-	.weak	TIM5_IRQHandler
-	.thumb_set TIM5_IRQHandler,Default_Handler
+  .weak  TIM5_IRQHandler
+  .thumb_set TIM5_IRQHandler,Default_Handler
 
-	.weak	SPI3_IRQHandler	
-	.thumb_set SPI3_IRQHandler,Default_Handler
+  .weak  SPI3_IRQHandler  
+  .thumb_set SPI3_IRQHandler,Default_Handler
 
-	.weak	UART4_IRQHandler	
-	.thumb_set UART4_IRQHandler,Default_Handler
+  .weak  UART4_IRQHandler  
+  .thumb_set UART4_IRQHandler,Default_Handler
 
-	.weak	UART5_IRQHandler	
-	.thumb_set UART5_IRQHandler,Default_Handler
+  .weak  UART5_IRQHandler  
+  .thumb_set UART5_IRQHandler,Default_Handler
 
-	.weak	TIM6_IRQHandler	
-	.thumb_set TIM6_IRQHandler,Default_Handler
+  .weak  TIM6_IRQHandler  
+  .thumb_set TIM6_IRQHandler,Default_Handler
 
-	.weak	TIM7_IRQHandler	
-	.thumb_set TIM7_IRQHandler,Default_Handler
+  .weak  TIM7_IRQHandler  
+  .thumb_set TIM7_IRQHandler,Default_Handler
 
-	.weak	DMA2_Channel1_IRQHandler	
-	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+  .weak  DMA2_Channel1_IRQHandler  
+  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
 
-	.weak	DMA2_Channel2_IRQHandler	
-	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+  .weak  DMA2_Channel2_IRQHandler  
+  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
 
-	.weak	DMA2_Channel3_IRQHandler	
-	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+  .weak  DMA2_Channel3_IRQHandler  
+  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
 
-	.weak	DMA2_Channel4_IRQHandler	
-	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+  .weak  DMA2_Channel4_IRQHandler  
+  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
 
-	.weak	DMA2_Channel5_IRQHandler	
-	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+  .weak  DMA2_Channel5_IRQHandler  
+  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
 
-	.weak	ETH_IRQHandler	
-	.thumb_set ETH_IRQHandler,Default_Handler
+  .weak  ETH_IRQHandler  
+  .thumb_set ETH_IRQHandler,Default_Handler
 
-	.weak	ETH_WKUP_IRQHandler	
-	.thumb_set ETH_WKUP_IRQHandler,Default_Handler
+  .weak  ETH_WKUP_IRQHandler  
+  .thumb_set ETH_WKUP_IRQHandler,Default_Handler
 
-	.weak	CAN2_TX_IRQHandler	
-	.thumb_set CAN2_TX_IRQHandler,Default_Handler
+  .weak  CAN2_TX_IRQHandler  
+  .thumb_set CAN2_TX_IRQHandler,Default_Handler
 
-	.weak	CAN2_RX0_IRQHandler	
-	.thumb_set CAN2_RX0_IRQHandler,Default_Handler
+  .weak  CAN2_RX0_IRQHandler  
+  .thumb_set CAN2_RX0_IRQHandler,Default_Handler
 
-	.weak	CAN2_RX1_IRQHandler	
-	.thumb_set CAN2_RX1_IRQHandler,Default_Handler
+  .weak  CAN2_RX1_IRQHandler  
+  .thumb_set CAN2_RX1_IRQHandler,Default_Handler
 
-	.weak	CAN2_SCE_IRQHandler	
-	.thumb_set CAN2_SCE_IRQHandler,Default_Handler
+  .weak  CAN2_SCE_IRQHandler  
+  .thumb_set CAN2_SCE_IRQHandler,Default_Handler
 
-	.weak	OTG_FS_IRQHandler	
-	.thumb_set OTG_FS_IRQHandler ,Default_Handler
+  .weak  OTG_FS_IRQHandler  
+  .thumb_set OTG_FS_IRQHandler ,Default_Handler
  

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/gcc/startup_stm32f10x_hd.s

@@ -1,53 +1,53 @@
 /**
- ******************************************************************************
- * @file      startup_stm32f10x_hd.s
- * @author    MCD Application Team
- * @version   V3.1.0
- * @date      06/19/2009
- * @brief     STM32F10x High Density Devices vector table for RIDE7 toolchain. 
- *            This module performs:
- *                - Set the initial SP
- *                - Set the initial PC == Reset_Handler,
- *                - Set the vector table entries with the exceptions ISR address,
- *                - Configure external SRAM mounted on STM3210E-EVAL board
- *                  to be used as data memory (optional, to be enabled by user)
- *                - Branches to main in the C library (which eventually
- *                  calls main()).
- *            After Reset the Cortex-M3 processor is in Thread mode,
- *            priority is Privileged, and the Stack is set to Main.
- *******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
- */	
+  ******************************************************************************
+  * @file      startup_stm32f10x_hd.s
+  * @author    MCD Application Team
+  * @version   V3.1.2
+  * @date      09/28/2009
+  * @brief     STM32F10x High Density Devices vector table for RIDE7 toolchain. 
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address,
+  *                - Configure external SRAM mounted on STM3210E-EVAL board
+  *                  to be used as data memory (optional, to be enabled by user)
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M3 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
+  */  
     
     .syntax unified
-	.cpu cortex-m3
-	.fpu softvfp
-	.thumb
+  .cpu cortex-m3
+  .fpu softvfp
+  .thumb
 
-.global	g_pfnVectors
-.global	SystemInit_ExtMemCtl_Dummy
-.global	Default_Handler
+.global  g_pfnVectors
+.global  SystemInit_ExtMemCtl_Dummy
+.global  Default_Handler
 
 /* start address for the initialization values of the .data section. 
 defined in linker script */
-.word	_sidata
+.word  _sidata
 /* start address for the .data section. defined in linker script */  
-.word	_sdata
+.word  _sdata
 /* end address for the .data section. defined in linker script */
-.word	_edata
+.word  _edata
 /* start address for the .bss section. defined in linker script */
-.word	_sbss
+.word  _sbss
 /* end address for the .bss section. defined in linker script */
-.word	_ebss
+.word  _ebss
 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
 
 .equ  Initial_spTop,  0x20000400 
@@ -61,58 +61,58 @@ defined in linker script */
  * @retval : None
 */
 
-    .section	.text.Reset_Handler
-	.weak	Reset_Handler
-	.type	Reset_Handler, %function
-Reset_Handler:	
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler:  
 
 /* FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is 
   required, then adjust the Register Addresses */
-  bl	SystemInit_ExtMemCtl
+  bl  SystemInit_ExtMemCtl
 /* restore original stack pointer */  
   LDR r0, =_estack
   MSR msp, r0
 /* Copy the data segment initializers from flash to SRAM */  
-  movs	r1, #0
-  b	LoopCopyDataInit
+  movs  r1, #0
+  b  LoopCopyDataInit
 
 CopyDataInit:
-	ldr	r3, =_sidata
-	ldr	r3, [r3, r1]
-	str	r3, [r0, r1]
-	adds	r1, r1, #4
+  ldr  r3, =_sidata
+  ldr  r3, [r3, r1]
+  str  r3, [r0, r1]
+  adds  r1, r1, #4
     
 LoopCopyDataInit:
-	ldr	r0, =_sdata
-	ldr	r3, =_edata
-	adds	r2, r0, r1
-	cmp	r2, r3
-	bcc	CopyDataInit
-	ldr	r2, =_sbss
-	b	LoopFillZerobss
+  ldr  r0, =_sdata
+  ldr  r3, =_edata
+  adds  r2, r0, r1
+  cmp  r2, r3
+  bcc  CopyDataInit
+  ldr  r2, =_sbss
+  b  LoopFillZerobss
 /* Zero fill the bss segment. */  
 FillZerobss:
-	movs	r3, #0
-	str	r3, [r2], #4
+  movs  r3, #0
+  str  r3, [r2], #4
     
 LoopFillZerobss:
-	ldr	r3, = _ebss
-	cmp	r2, r3
-	bcc	FillZerobss
+  ldr  r3, = _ebss
+  cmp  r2, r3
+  bcc  FillZerobss
 /* Call the application's entry point.*/
-	bl	main
-	bx	lr    
-.size	Reset_Handler, .-Reset_Handler
+  bl  main
+  bx  lr    
+.size  Reset_Handler, .-Reset_Handler
 
 /**
  * @brief  Dummy SystemInit_ExtMemCtl function 
  * @param  None     
  * @retval : None       
 */
-	.section	.text.SystemInit_ExtMemCtl_Dummy,"ax",%progbits
+  .section  .text.SystemInit_ExtMemCtl_Dummy,"ax",%progbits
 SystemInit_ExtMemCtl_Dummy:
-	bx	lr
-	.size	SystemInit_ExtMemCtl_Dummy, .-SystemInit_ExtMemCtl_Dummy
+  bx  lr
+  .size  SystemInit_ExtMemCtl_Dummy, .-SystemInit_ExtMemCtl_Dummy
 
 /**
  * @brief  This is the code that gets called when the processor receives an 
@@ -122,11 +122,11 @@ SystemInit_ExtMemCtl_Dummy:
  * @param  None     
  * @retval : None       
 */
-    .section	.text.Default_Handler,"ax",%progbits
+    .section  .text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
-	b	Infinite_Loop
-	.size	Default_Handler, .-Default_Handler
+  b  Infinite_Loop
+  .size  Default_Handler, .-Default_Handler
 /******************************************************************************
 *
 * The minimal vector table for a Cortex M3.  Note that the proper constructs
@@ -134,133 +134,133 @@ Infinite_Loop:
 * 0x0000.0000.
 *
 ******************************************************************************/    
- 	.section	.isr_vector,"a",%progbits
-	.type	g_pfnVectors, %object
-	.size	g_pfnVectors, .-g_pfnVectors
+   .section  .isr_vector,"a",%progbits
+  .type  g_pfnVectors, %object
+  .size  g_pfnVectors, .-g_pfnVectors
     
     
 g_pfnVectors:
-	.word	Initial_spTop
-	.word	Reset_Handler
-	.word	NMI_Handler
-	.word	HardFault_Handler
-	.word	MemManage_Handler
-	.word	BusFault_Handler
-	.word	UsageFault_Handler
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	SVC_Handler
-	.word	DebugMon_Handler
-	.word	0
-	.word	PendSV_Handler
-	.word	SysTick_Handler
-	.word	WWDG_IRQHandler
-	.word	PVD_IRQHandler
-	.word	TAMPER_IRQHandler
-	.word	RTC_IRQHandler
-	.word	FLASH_IRQHandler
-	.word	RCC_IRQHandler
-	.word	EXTI0_IRQHandler
-	.word	EXTI1_IRQHandler
-	.word	EXTI2_IRQHandler
-	.word	EXTI3_IRQHandler
-	.word	EXTI4_IRQHandler
-	.word	DMA1_Channel1_IRQHandler
-	.word	DMA1_Channel2_IRQHandler
-	.word	DMA1_Channel3_IRQHandler
-	.word	DMA1_Channel4_IRQHandler
-	.word	DMA1_Channel5_IRQHandler
-	.word	DMA1_Channel6_IRQHandler
-	.word	DMA1_Channel7_IRQHandler
-	.word	ADC1_2_IRQHandler
-	.word	USB_HP_CAN1_TX_IRQHandler
-	.word	USB_LP_CAN1_RX0_IRQHandler
-	.word	CAN1_RX1_IRQHandler
-	.word	CAN1_SCE_IRQHandler
-	.word	EXTI9_5_IRQHandler
-	.word	TIM1_BRK_IRQHandler
-	.word	TIM1_UP_IRQHandler
-	.word	TIM1_TRG_COM_IRQHandler
-	.word	TIM1_CC_IRQHandler
-	.word	TIM2_IRQHandler
-	.word	TIM3_IRQHandler
-	.word	TIM4_IRQHandler
-	.word	I2C1_EV_IRQHandler
-	.word	I2C1_ER_IRQHandler
-	.word	I2C2_EV_IRQHandler
-	.word	I2C2_ER_IRQHandler
-	.word	SPI1_IRQHandler
-	.word	SPI2_IRQHandler
-	.word	USART1_IRQHandler
-	.word	USART2_IRQHandler
-	.word	USART3_IRQHandler
-	.word	EXTI15_10_IRQHandler
-	.word	RTCAlarm_IRQHandler
-	.word	USBWakeUp_IRQHandler
-	.word	TIM8_BRK_IRQHandler
-	.word	TIM8_UP_IRQHandler
-	.word	TIM8_TRG_COM_IRQHandler
-	.word	TIM8_CC_IRQHandler
-	.word	ADC3_IRQHandler
-	.word	FSMC_IRQHandler
-	.word	SDIO_IRQHandler
-	.word	TIM5_IRQHandler
-	.word	SPI3_IRQHandler
-	.word	UART4_IRQHandler
-	.word	UART5_IRQHandler
-	.word	TIM6_IRQHandler
-	.word	TIM7_IRQHandler
-	.word	DMA2_Channel1_IRQHandler
-	.word	DMA2_Channel2_IRQHandler
-	.word	DMA2_Channel3_IRQHandler
-	.word	DMA2_Channel4_5_IRQHandler
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	BootRAM       /* @0x1E0. This is for boot in RAM mode for 
+  .word  Initial_spTop
+  .word  Reset_Handler
+  .word  NMI_Handler
+  .word  HardFault_Handler
+  .word  MemManage_Handler
+  .word  BusFault_Handler
+  .word  UsageFault_Handler
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  SVC_Handler
+  .word  DebugMon_Handler
+  .word  0
+  .word  PendSV_Handler
+  .word  SysTick_Handler
+  .word  WWDG_IRQHandler
+  .word  PVD_IRQHandler
+  .word  TAMPER_IRQHandler
+  .word  RTC_IRQHandler
+  .word  FLASH_IRQHandler
+  .word  RCC_IRQHandler
+  .word  EXTI0_IRQHandler
+  .word  EXTI1_IRQHandler
+  .word  EXTI2_IRQHandler
+  .word  EXTI3_IRQHandler
+  .word  EXTI4_IRQHandler
+  .word  DMA1_Channel1_IRQHandler
+  .word  DMA1_Channel2_IRQHandler
+  .word  DMA1_Channel3_IRQHandler
+  .word  DMA1_Channel4_IRQHandler
+  .word  DMA1_Channel5_IRQHandler
+  .word  DMA1_Channel6_IRQHandler
+  .word  DMA1_Channel7_IRQHandler
+  .word  ADC1_2_IRQHandler
+  .word  USB_HP_CAN1_TX_IRQHandler
+  .word  USB_LP_CAN1_RX0_IRQHandler
+  .word  CAN1_RX1_IRQHandler
+  .word  CAN1_SCE_IRQHandler
+  .word  EXTI9_5_IRQHandler
+  .word  TIM1_BRK_IRQHandler
+  .word  TIM1_UP_IRQHandler
+  .word  TIM1_TRG_COM_IRQHandler
+  .word  TIM1_CC_IRQHandler
+  .word  TIM2_IRQHandler
+  .word  TIM3_IRQHandler
+  .word  TIM4_IRQHandler
+  .word  I2C1_EV_IRQHandler
+  .word  I2C1_ER_IRQHandler
+  .word  I2C2_EV_IRQHandler
+  .word  I2C2_ER_IRQHandler
+  .word  SPI1_IRQHandler
+  .word  SPI2_IRQHandler
+  .word  USART1_IRQHandler
+  .word  USART2_IRQHandler
+  .word  USART3_IRQHandler
+  .word  EXTI15_10_IRQHandler
+  .word  RTCAlarm_IRQHandler
+  .word  USBWakeUp_IRQHandler
+  .word  TIM8_BRK_IRQHandler
+  .word  TIM8_UP_IRQHandler
+  .word  TIM8_TRG_COM_IRQHandler
+  .word  TIM8_CC_IRQHandler
+  .word  ADC3_IRQHandler
+  .word  FSMC_IRQHandler
+  .word  SDIO_IRQHandler
+  .word  TIM5_IRQHandler
+  .word  SPI3_IRQHandler
+  .word  UART4_IRQHandler
+  .word  UART5_IRQHandler
+  .word  TIM6_IRQHandler
+  .word  TIM7_IRQHandler
+  .word  DMA2_Channel1_IRQHandler
+  .word  DMA2_Channel2_IRQHandler
+  .word  DMA2_Channel3_IRQHandler
+  .word  DMA2_Channel4_5_IRQHandler
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  BootRAM       /* @0x1E0. This is for boot in RAM mode for 
                          STM32F10x High Density devices. */
    
 /*******************************************************************************
@@ -271,213 +271,213 @@ g_pfnVectors:
 *
 *******************************************************************************/
     
-  .weak	NMI_Handler
-	.thumb_set NMI_Handler,Default_Handler
-	
-  .weak	HardFault_Handler
-	.thumb_set HardFault_Handler,Default_Handler
-	
-  .weak	MemManage_Handler
-	.thumb_set MemManage_Handler,Default_Handler
-	
-  .weak	BusFault_Handler
-	.thumb_set BusFault_Handler,Default_Handler
+  .weak  NMI_Handler
+  .thumb_set NMI_Handler,Default_Handler
+  
+  .weak  HardFault_Handler
+  .thumb_set HardFault_Handler,Default_Handler
+  
+  .weak  MemManage_Handler
+  .thumb_set MemManage_Handler,Default_Handler
+  
+  .weak  BusFault_Handler
+  .thumb_set BusFault_Handler,Default_Handler
 
-	.weak	UsageFault_Handler
-	.thumb_set UsageFault_Handler,Default_Handler
+  .weak  UsageFault_Handler
+  .thumb_set UsageFault_Handler,Default_Handler
 
-	.weak	SVC_Handler
-	.thumb_set SVC_Handler,Default_Handler
+  .weak  SVC_Handler
+  .thumb_set SVC_Handler,Default_Handler
 
-	.weak	DebugMon_Handler
-	.thumb_set DebugMon_Handler,Default_Handler
+  .weak  DebugMon_Handler
+  .thumb_set DebugMon_Handler,Default_Handler
 
-	.weak	PendSV_Handler
-	.thumb_set PendSV_Handler,Default_Handler
+  .weak  PendSV_Handler
+  .thumb_set PendSV_Handler,Default_Handler
 
-	.weak	SysTick_Handler
-	.thumb_set SysTick_Handler,Default_Handler
+  .weak  SysTick_Handler
+  .thumb_set SysTick_Handler,Default_Handler
 
-	.weak	WWDG_IRQHandler
-	.thumb_set WWDG_IRQHandler,Default_Handler
+  .weak  WWDG_IRQHandler
+  .thumb_set WWDG_IRQHandler,Default_Handler
 
-	.weak	PVD_IRQHandler
-	.thumb_set PVD_IRQHandler,Default_Handler
+  .weak  PVD_IRQHandler
+  .thumb_set PVD_IRQHandler,Default_Handler
 
-	.weak	TAMPER_IRQHandler
-	.thumb_set TAMPER_IRQHandler,Default_Handler
+  .weak  TAMPER_IRQHandler
+  .thumb_set TAMPER_IRQHandler,Default_Handler
 
-	.weak	RTC_IRQHandler
-	.thumb_set RTC_IRQHandler,Default_Handler
+  .weak  RTC_IRQHandler
+  .thumb_set RTC_IRQHandler,Default_Handler
 
-	.weak	FLASH_IRQHandler
-	.thumb_set FLASH_IRQHandler,Default_Handler
+  .weak  FLASH_IRQHandler
+  .thumb_set FLASH_IRQHandler,Default_Handler
 
-	.weak	RCC_IRQHandler
-	.thumb_set RCC_IRQHandler,Default_Handler
+  .weak  RCC_IRQHandler
+  .thumb_set RCC_IRQHandler,Default_Handler
 
-	.weak	EXTI0_IRQHandler
-	.thumb_set EXTI0_IRQHandler,Default_Handler
+  .weak  EXTI0_IRQHandler
+  .thumb_set EXTI0_IRQHandler,Default_Handler
 
-	.weak	EXTI1_IRQHandler
-	.thumb_set EXTI1_IRQHandler,Default_Handler
+  .weak  EXTI1_IRQHandler
+  .thumb_set EXTI1_IRQHandler,Default_Handler
 
-	.weak	EXTI2_IRQHandler
-	.thumb_set EXTI2_IRQHandler,Default_Handler
+  .weak  EXTI2_IRQHandler
+  .thumb_set EXTI2_IRQHandler,Default_Handler
 
-	.weak	EXTI3_IRQHandler
-	.thumb_set EXTI3_IRQHandler,Default_Handler
+  .weak  EXTI3_IRQHandler
+  .thumb_set EXTI3_IRQHandler,Default_Handler
 
-	.weak	EXTI4_IRQHandler
-	.thumb_set EXTI4_IRQHandler,Default_Handler
+  .weak  EXTI4_IRQHandler
+  .thumb_set EXTI4_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel1_IRQHandler
-	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+  .weak  DMA1_Channel1_IRQHandler
+  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel2_IRQHandler
-	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+  .weak  DMA1_Channel2_IRQHandler
+  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel3_IRQHandler
-	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+  .weak  DMA1_Channel3_IRQHandler
+  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel4_IRQHandler
-	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+  .weak  DMA1_Channel4_IRQHandler
+  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel5_IRQHandler
-	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+  .weak  DMA1_Channel5_IRQHandler
+  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel6_IRQHandler
-	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+  .weak  DMA1_Channel6_IRQHandler
+  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel7_IRQHandler
-	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+  .weak  DMA1_Channel7_IRQHandler
+  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
 
-	.weak	ADC1_2_IRQHandler
-	.thumb_set ADC1_2_IRQHandler,Default_Handler
+  .weak  ADC1_2_IRQHandler
+  .thumb_set ADC1_2_IRQHandler,Default_Handler
 
-	.weak	USB_HP_CAN1_TX_IRQHandler
-	.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
+  .weak  USB_HP_CAN1_TX_IRQHandler
+  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
 
-	.weak	USB_LP_CAN1_RX0_IRQHandler
-	.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
+  .weak  USB_LP_CAN1_RX0_IRQHandler
+  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
 
-	.weak	CAN1_RX1_IRQHandler
-	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
+  .weak  CAN1_RX1_IRQHandler
+  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 
-	.weak	CAN1_SCE_IRQHandler
-	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
+  .weak  CAN1_SCE_IRQHandler
+  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
 
-	.weak	EXTI9_5_IRQHandler
-	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+  .weak  EXTI9_5_IRQHandler
+  .thumb_set EXTI9_5_IRQHandler,Default_Handler
 
-	.weak	TIM1_BRK_IRQHandler
-	.thumb_set TIM1_BRK_IRQHandler,Default_Handler
+  .weak  TIM1_BRK_IRQHandler
+  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
 
-	.weak	TIM1_UP_IRQHandler
-	.thumb_set TIM1_UP_IRQHandler,Default_Handler
+  .weak  TIM1_UP_IRQHandler
+  .thumb_set TIM1_UP_IRQHandler,Default_Handler
 
-	.weak	TIM1_TRG_COM_IRQHandler
-	.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
+  .weak  TIM1_TRG_COM_IRQHandler
+  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
 
-	.weak	TIM1_CC_IRQHandler
-	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+  .weak  TIM1_CC_IRQHandler
+  .thumb_set TIM1_CC_IRQHandler,Default_Handler
 
-	.weak	TIM2_IRQHandler
-	.thumb_set TIM2_IRQHandler,Default_Handler
+  .weak  TIM2_IRQHandler
+  .thumb_set TIM2_IRQHandler,Default_Handler
 
-	.weak	TIM3_IRQHandler
-	.thumb_set TIM3_IRQHandler,Default_Handler
+  .weak  TIM3_IRQHandler
+  .thumb_set TIM3_IRQHandler,Default_Handler
 
-	.weak	TIM4_IRQHandler
-	.thumb_set TIM4_IRQHandler,Default_Handler
+  .weak  TIM4_IRQHandler
+  .thumb_set TIM4_IRQHandler,Default_Handler
 
-	.weak	I2C1_EV_IRQHandler
-	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+  .weak  I2C1_EV_IRQHandler
+  .thumb_set I2C1_EV_IRQHandler,Default_Handler
 
-	.weak	I2C1_ER_IRQHandler
-	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+  .weak  I2C1_ER_IRQHandler
+  .thumb_set I2C1_ER_IRQHandler,Default_Handler
 
-	.weak	I2C2_EV_IRQHandler
-	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+  .weak  I2C2_EV_IRQHandler
+  .thumb_set I2C2_EV_IRQHandler,Default_Handler
 
-	.weak	I2C2_ER_IRQHandler
-	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+  .weak  I2C2_ER_IRQHandler
+  .thumb_set I2C2_ER_IRQHandler,Default_Handler
 
-	.weak	SPI1_IRQHandler
-	.thumb_set SPI1_IRQHandler,Default_Handler
+  .weak  SPI1_IRQHandler
+  .thumb_set SPI1_IRQHandler,Default_Handler
 
-	.weak	SPI2_IRQHandler
-	.thumb_set SPI2_IRQHandler,Default_Handler
+  .weak  SPI2_IRQHandler
+  .thumb_set SPI2_IRQHandler,Default_Handler
 
-	.weak	USART1_IRQHandler
-	.thumb_set USART1_IRQHandler,Default_Handler
+  .weak  USART1_IRQHandler
+  .thumb_set USART1_IRQHandler,Default_Handler
 
-	.weak	USART2_IRQHandler
-	.thumb_set USART2_IRQHandler,Default_Handler
+  .weak  USART2_IRQHandler
+  .thumb_set USART2_IRQHandler,Default_Handler
 
-	.weak	USART3_IRQHandler
-	.thumb_set USART3_IRQHandler,Default_Handler
+  .weak  USART3_IRQHandler
+  .thumb_set USART3_IRQHandler,Default_Handler
 
-	.weak	EXTI15_10_IRQHandler
-	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+  .weak  EXTI15_10_IRQHandler
+  .thumb_set EXTI15_10_IRQHandler,Default_Handler
 
-	.weak	RTCAlarm_IRQHandler
-	.thumb_set RTCAlarm_IRQHandler,Default_Handler
+  .weak  RTCAlarm_IRQHandler
+  .thumb_set RTCAlarm_IRQHandler,Default_Handler
 
-	.weak	USBWakeUp_IRQHandler
-	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+  .weak  USBWakeUp_IRQHandler
+  .thumb_set USBWakeUp_IRQHandler,Default_Handler
 
-	.weak	TIM8_BRK_IRQHandler
-	.thumb_set TIM8_BRK_IRQHandler,Default_Handler
+  .weak  TIM8_BRK_IRQHandler
+  .thumb_set TIM8_BRK_IRQHandler,Default_Handler
 
-	.weak	TIM8_UP_IRQHandler
-	.thumb_set TIM8_UP_IRQHandler,Default_Handler
+  .weak  TIM8_UP_IRQHandler
+  .thumb_set TIM8_UP_IRQHandler,Default_Handler
 
-	.weak	TIM8_TRG_COM_IRQHandler
-	.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
+  .weak  TIM8_TRG_COM_IRQHandler
+  .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
 
-	.weak	TIM8_CC_IRQHandler
-	.thumb_set TIM8_CC_IRQHandler,Default_Handler
+  .weak  TIM8_CC_IRQHandler
+  .thumb_set TIM8_CC_IRQHandler,Default_Handler
 
-	.weak	ADC3_IRQHandler
-	.thumb_set ADC3_IRQHandler,Default_Handler
+  .weak  ADC3_IRQHandler
+  .thumb_set ADC3_IRQHandler,Default_Handler
 
-	.weak	FSMC_IRQHandler
-	.thumb_set FSMC_IRQHandler,Default_Handler
+  .weak  FSMC_IRQHandler
+  .thumb_set FSMC_IRQHandler,Default_Handler
 
-	.weak	SDIO_IRQHandler
-	.thumb_set SDIO_IRQHandler,Default_Handler
+  .weak  SDIO_IRQHandler
+  .thumb_set SDIO_IRQHandler,Default_Handler
 
-	.weak	TIM5_IRQHandler
-	.thumb_set TIM5_IRQHandler,Default_Handler
+  .weak  TIM5_IRQHandler
+  .thumb_set TIM5_IRQHandler,Default_Handler
 
-	.weak	SPI3_IRQHandler
-	.thumb_set SPI3_IRQHandler,Default_Handler
+  .weak  SPI3_IRQHandler
+  .thumb_set SPI3_IRQHandler,Default_Handler
 
-	.weak	UART4_IRQHandler
-	.thumb_set UART4_IRQHandler,Default_Handler
+  .weak  UART4_IRQHandler
+  .thumb_set UART4_IRQHandler,Default_Handler
 
-	.weak	UART5_IRQHandler
-	.thumb_set UART5_IRQHandler,Default_Handler
+  .weak  UART5_IRQHandler
+  .thumb_set UART5_IRQHandler,Default_Handler
 
-	.weak	TIM6_IRQHandler
-	.thumb_set TIM6_IRQHandler,Default_Handler
+  .weak  TIM6_IRQHandler
+  .thumb_set TIM6_IRQHandler,Default_Handler
 
-	.weak	TIM7_IRQHandler
-	.thumb_set TIM7_IRQHandler,Default_Handler
+  .weak  TIM7_IRQHandler
+  .thumb_set TIM7_IRQHandler,Default_Handler
 
-	.weak	DMA2_Channel1_IRQHandler
-	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+  .weak  DMA2_Channel1_IRQHandler
+  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
 
-	.weak	DMA2_Channel2_IRQHandler
-	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+  .weak  DMA2_Channel2_IRQHandler
+  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
 
-	.weak	DMA2_Channel3_IRQHandler
-	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+  .weak  DMA2_Channel3_IRQHandler
+  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
 
-	.weak	DMA2_Channel4_5_IRQHandler
-	.thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
+  .weak  DMA2_Channel4_5_IRQHandler
+  .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
 
-	.weak	SystemInit_ExtMemCtl
-	.thumb_set SystemInit_ExtMemCtl,SystemInit_ExtMemCtl_Dummy
+  .weak  SystemInit_ExtMemCtl
+  .thumb_set SystemInit_ExtMemCtl,SystemInit_ExtMemCtl_Dummy
 

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/gcc/startup_stm32f10x_ld.s

@@ -1,51 +1,50 @@
 /**
- ******************************************************************************
- * @file      startup_stm32f10x_ld.s
- * @author    MCD Application Team
- * @version   V3.1.0
- * @date      06/19/2009
- * @brief     STM32F10x Low Density Devices vector table for RIDE7 toolchain.
- *            This module performs:
- *                - Set the initial SP
- *                - Set the initial PC == Reset_Handler,
- *                - Set the vector table entries with the exceptions ISR address.
- *                - Branches to main in the C library (which eventually
- *                  calls main()).
- *            After Reset the Cortex-M3 processor is in Thread mode,
- *            priority is Privileged, and the Stack is set to Main.
- *******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
- */	
+  ******************************************************************************
+  * @file      startup_stm32f10x_ld.s
+  * @author    MCD Application Team
+  * @version   V3.1.2
+  * @date      09/28/2009
+  * @brief     STM32F10x Low Density Devices vector table for RIDE7 toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address.
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M3 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @copy
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
+  */  
     
   .syntax unified
-	.cpu cortex-m3
-	.fpu softvfp
-	.thumb
+  .cpu cortex-m3
+  .fpu softvfp
+  .thumb
 
-.global	g_pfnVectors
-.global	SystemInit_ExtMemCtl_Dummy
-.global	Default_Handler
+.global  g_pfnVectors
+.global  Default_Handler
 
 /* start address for the initialization values of the .data section. 
 defined in linker script */
-.word	_sidata
+.word  _sidata
 /* start address for the .data section. defined in linker script */  
-.word	_sdata
+.word  _sdata
 /* end address for the .data section. defined in linker script */
-.word	_edata
+.word  _edata
 /* start address for the .bss section. defined in linker script */
-.word	_sbss
+.word  _sbss
 /* end address for the .bss section. defined in linker script */
-.word	_ebss
+.word  _ebss
 
 .equ  BootRAM, 0xF108F85F
 /**
@@ -57,42 +56,42 @@ defined in linker script */
  * @retval : None
 */
 
-    .section	.text.Reset_Handler
-	.weak	Reset_Handler
-	.type	Reset_Handler, %function
-Reset_Handler:	
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler:  
 
 /* Copy the data segment initializers from flash to SRAM */  
-  movs	r1, #0
-  b	LoopCopyDataInit
+  movs  r1, #0
+  b  LoopCopyDataInit
 
 CopyDataInit:
-	ldr	r3, =_sidata
-	ldr	r3, [r3, r1]
-	str	r3, [r0, r1]
-	adds	r1, r1, #4
+  ldr  r3, =_sidata
+  ldr  r3, [r3, r1]
+  str  r3, [r0, r1]
+  adds  r1, r1, #4
     
 LoopCopyDataInit:
-	ldr	r0, =_sdata
-	ldr	r3, =_edata
-	adds	r2, r0, r1
-	cmp	r2, r3
-	bcc	CopyDataInit
-	ldr	r2, =_sbss
-	b	LoopFillZerobss
+  ldr  r0, =_sdata
+  ldr  r3, =_edata
+  adds  r2, r0, r1
+  cmp  r2, r3
+  bcc  CopyDataInit
+  ldr  r2, =_sbss
+  b  LoopFillZerobss
 /* Zero fill the bss segment. */  
 FillZerobss:
-	movs	r3, #0
-	str	r3, [r2], #4
+  movs  r3, #0
+  str  r3, [r2], #4
     
 LoopFillZerobss:
-	ldr	r3, = _ebss
-	cmp	r2, r3
-	bcc	FillZerobss
+  ldr  r3, = _ebss
+  cmp  r2, r3
+  bcc  FillZerobss
 /* Call the application's entry point.*/
-	bl	main
-	bx	lr    
-.size	Reset_Handler, .-Reset_Handler
+  bl  main
+  bx  lr    
+.size  Reset_Handler, .-Reset_Handler
 
 /**
  * @brief  This is the code that gets called when the processor receives an 
@@ -102,11 +101,11 @@ LoopFillZerobss:
  * @param  None     
  * @retval : None       
 */
-    .section	.text.Default_Handler,"ax",%progbits
+    .section  .text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
-	b	Infinite_Loop
-	.size	Default_Handler, .-Default_Handler
+  b  Infinite_Loop
+  .size  Default_Handler, .-Default_Handler
 /******************************************************************************
 *
 * The minimal vector table for a Cortex M3.  Note that the proper constructs
@@ -114,79 +113,79 @@ Infinite_Loop:
 * 0x0000.0000.
 *
 ******************************************************************************/    
- 	.section	.isr_vector,"a",%progbits
-	.type	g_pfnVectors, %object
-	.size	g_pfnVectors, .-g_pfnVectors
+   .section  .isr_vector,"a",%progbits
+  .type  g_pfnVectors, %object
+  .size  g_pfnVectors, .-g_pfnVectors
     
     
 g_pfnVectors:
-	.word	_estack
-	.word	Reset_Handler
-	.word	NMI_Handler
-	.word	HardFault_Handler
-	.word	MemManage_Handler
-	.word	BusFault_Handler
-	.word	UsageFault_Handler
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	SVC_Handler
-	.word	DebugMon_Handler
-	.word	0
-	.word	PendSV_Handler
-	.word	SysTick_Handler
-	.word	WWDG_IRQHandler
-	.word	PVD_IRQHandler
-	.word	TAMPER_IRQHandler
-	.word	RTC_IRQHandler
-	.word	FLASH_IRQHandler
-	.word	RCC_IRQHandler
-	.word	EXTI0_IRQHandler
-	.word	EXTI1_IRQHandler
-	.word	EXTI2_IRQHandler
-	.word	EXTI3_IRQHandler
-	.word	EXTI4_IRQHandler
-	.word	DMA1_Channel1_IRQHandler
-	.word	DMA1_Channel2_IRQHandler
-	.word	DMA1_Channel3_IRQHandler
-	.word	DMA1_Channel4_IRQHandler
-	.word	DMA1_Channel5_IRQHandler
-	.word	DMA1_Channel6_IRQHandler
-	.word	DMA1_Channel7_IRQHandler
-	.word	ADC1_2_IRQHandler
-	.word	USB_HP_CAN1_TX_IRQHandler
-	.word	USB_LP_CAN1_RX0_IRQHandler
-	.word	CAN1_RX1_IRQHandler
-	.word	CAN1_SCE_IRQHandler
-	.word	EXTI9_5_IRQHandler
-	.word	TIM1_BRK_IRQHandler
-	.word	TIM1_UP_IRQHandler
-	.word	TIM1_TRG_COM_IRQHandler
-	.word	TIM1_CC_IRQHandler
-	.word	TIM2_IRQHandler
-	.word	TIM3_IRQHandler
-	0
-	.word	I2C1_EV_IRQHandler
-	.word	I2C1_ER_IRQHandler
-	0
-	0
-	.word	SPI1_IRQHandler
-	0
-	.word	USART1_IRQHandler
-	.word	USART2_IRQHandler
-	0
-	.word	EXTI15_10_IRQHandler
-	.word	RTCAlarm_IRQHandler
-	.word	USBWakeUp_IRQHandler	
-  .word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	BootRAM        /* @0x108. This is for boot in RAM mode for 
+  .word  _estack
+  .word  Reset_Handler
+  .word  NMI_Handler
+  .word  HardFault_Handler
+  .word  MemManage_Handler
+  .word  BusFault_Handler
+  .word  UsageFault_Handler
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  SVC_Handler
+  .word  DebugMon_Handler
+  .word  0
+  .word  PendSV_Handler
+  .word  SysTick_Handler
+  .word  WWDG_IRQHandler
+  .word  PVD_IRQHandler
+  .word  TAMPER_IRQHandler
+  .word  RTC_IRQHandler
+  .word  FLASH_IRQHandler
+  .word  RCC_IRQHandler
+  .word  EXTI0_IRQHandler
+  .word  EXTI1_IRQHandler
+  .word  EXTI2_IRQHandler
+  .word  EXTI3_IRQHandler
+  .word  EXTI4_IRQHandler
+  .word  DMA1_Channel1_IRQHandler
+  .word  DMA1_Channel2_IRQHandler
+  .word  DMA1_Channel3_IRQHandler
+  .word  DMA1_Channel4_IRQHandler
+  .word  DMA1_Channel5_IRQHandler
+  .word  DMA1_Channel6_IRQHandler
+  .word  DMA1_Channel7_IRQHandler
+  .word  ADC1_2_IRQHandler
+  .word  USB_HP_CAN1_TX_IRQHandler
+  .word  USB_LP_CAN1_RX0_IRQHandler
+  .word  CAN1_RX1_IRQHandler
+  .word  CAN1_SCE_IRQHandler
+  .word  EXTI9_5_IRQHandler
+  .word  TIM1_BRK_IRQHandler
+  .word  TIM1_UP_IRQHandler
+  .word  TIM1_TRG_COM_IRQHandler
+  .word  TIM1_CC_IRQHandler
+  .word  TIM2_IRQHandler
+  .word  TIM3_IRQHandler
+  0
+  .word  I2C1_EV_IRQHandler
+  .word  I2C1_ER_IRQHandler
+  0
+  0
+  .word  SPI1_IRQHandler
+  0
+  .word  USART1_IRQHandler
+  .word  USART2_IRQHandler
+  0
+  .word  EXTI15_10_IRQHandler
+  .word  RTCAlarm_IRQHandler
+  .word  USBWakeUp_IRQHandler  
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  BootRAM        /* @0x108. This is for boot in RAM mode for 
                           STM32F10x Low Density devices.*/
    
 /*******************************************************************************
@@ -197,144 +196,144 @@ g_pfnVectors:
 *
 *******************************************************************************/
     
-  .weak	NMI_Handler
-	.thumb_set NMI_Handler,Default_Handler
-	
-  .weak	HardFault_Handler
-	.thumb_set HardFault_Handler,Default_Handler
-	
-  .weak	MemManage_Handler
-	.thumb_set MemManage_Handler,Default_Handler
-	
-  .weak	BusFault_Handler
-	.thumb_set BusFault_Handler,Default_Handler
+  .weak  NMI_Handler
+  .thumb_set NMI_Handler,Default_Handler
+  
+  .weak  HardFault_Handler
+  .thumb_set HardFault_Handler,Default_Handler
+  
+  .weak  MemManage_Handler
+  .thumb_set MemManage_Handler,Default_Handler
+  
+  .weak  BusFault_Handler
+  .thumb_set BusFault_Handler,Default_Handler
 
-	.weak	UsageFault_Handler
-	.thumb_set UsageFault_Handler,Default_Handler
+  .weak  UsageFault_Handler
+  .thumb_set UsageFault_Handler,Default_Handler
 
-	.weak	SVC_Handler
-	.thumb_set SVC_Handler,Default_Handler
+  .weak  SVC_Handler
+  .thumb_set SVC_Handler,Default_Handler
 
-	.weak	DebugMon_Handler
-	.thumb_set DebugMon_Handler,Default_Handler
+  .weak  DebugMon_Handler
+  .thumb_set DebugMon_Handler,Default_Handler
 
-	.weak	PendSV_Handler
-	.thumb_set PendSV_Handler,Default_Handler
+  .weak  PendSV_Handler
+  .thumb_set PendSV_Handler,Default_Handler
 
-	.weak	SysTick_Handler
-	.thumb_set SysTick_Handler,Default_Handler
+  .weak  SysTick_Handler
+  .thumb_set SysTick_Handler,Default_Handler
 
-	.weak	WWDG_IRQHandler
-	.thumb_set WWDG_IRQHandler,Default_Handler
+  .weak  WWDG_IRQHandler
+  .thumb_set WWDG_IRQHandler,Default_Handler
 
-	.weak	PVD_IRQHandler
-	.thumb_set PVD_IRQHandler,Default_Handler
+  .weak  PVD_IRQHandler
+  .thumb_set PVD_IRQHandler,Default_Handler
 
-	.weak	TAMPER_IRQHandler
-	.thumb_set TAMPER_IRQHandler,Default_Handler
+  .weak  TAMPER_IRQHandler
+  .thumb_set TAMPER_IRQHandler,Default_Handler
 
-	.weak	RTC_IRQHandler
-	.thumb_set RTC_IRQHandler,Default_Handler
+  .weak  RTC_IRQHandler
+  .thumb_set RTC_IRQHandler,Default_Handler
 
-	.weak	FLASH_IRQHandler
-	.thumb_set FLASH_IRQHandler,Default_Handler
+  .weak  FLASH_IRQHandler
+  .thumb_set FLASH_IRQHandler,Default_Handler
 
-	.weak	RCC_IRQHandler
-	.thumb_set RCC_IRQHandler,Default_Handler
+  .weak  RCC_IRQHandler
+  .thumb_set RCC_IRQHandler,Default_Handler
 
-	.weak	EXTI0_IRQHandler
-	.thumb_set EXTI0_IRQHandler,Default_Handler
+  .weak  EXTI0_IRQHandler
+  .thumb_set EXTI0_IRQHandler,Default_Handler
 
-	.weak	EXTI1_IRQHandler
-	.thumb_set EXTI1_IRQHandler,Default_Handler
+  .weak  EXTI1_IRQHandler
+  .thumb_set EXTI1_IRQHandler,Default_Handler
 
-	.weak	EXTI2_IRQHandler
-	.thumb_set EXTI2_IRQHandler,Default_Handler
+  .weak  EXTI2_IRQHandler
+  .thumb_set EXTI2_IRQHandler,Default_Handler
 
-	.weak	EXTI3_IRQHandler
-	.thumb_set EXTI3_IRQHandler,Default_Handler
+  .weak  EXTI3_IRQHandler
+  .thumb_set EXTI3_IRQHandler,Default_Handler
 
-	.weak	EXTI4_IRQHandler
-	.thumb_set EXTI4_IRQHandler,Default_Handler
+  .weak  EXTI4_IRQHandler
+  .thumb_set EXTI4_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel1_IRQHandler
-	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+  .weak  DMA1_Channel1_IRQHandler
+  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel2_IRQHandler
-	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+  .weak  DMA1_Channel2_IRQHandler
+  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel3_IRQHandler
-	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+  .weak  DMA1_Channel3_IRQHandler
+  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel4_IRQHandler
-	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+  .weak  DMA1_Channel4_IRQHandler
+  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel5_IRQHandler
-	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+  .weak  DMA1_Channel5_IRQHandler
+  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel6_IRQHandler
-	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+  .weak  DMA1_Channel6_IRQHandler
+  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel7_IRQHandler
-	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+  .weak  DMA1_Channel7_IRQHandler
+  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
 
-	.weak	ADC1_2_IRQHandler
-	.thumb_set ADC1_2_IRQHandler,Default_Handler
+  .weak  ADC1_2_IRQHandler
+  .thumb_set ADC1_2_IRQHandler,Default_Handler
 
-	.weak	USB_HP_CAN1_TX_IRQHandler
-	.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
+  .weak  USB_HP_CAN1_TX_IRQHandler
+  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
 
-	.weak	USB_LP_CAN1_RX0_IRQHandler
-	.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
+  .weak  USB_LP_CAN1_RX0_IRQHandler
+  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
 
-	.weak	CAN1_RX1_IRQHandler
-	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
+  .weak  CAN1_RX1_IRQHandler
+  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 
-	.weak	CAN1_SCE_IRQHandler
-	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
+  .weak  CAN1_SCE_IRQHandler
+  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
 
-	.weak	EXTI9_5_IRQHandler
-	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+  .weak  EXTI9_5_IRQHandler
+  .thumb_set EXTI9_5_IRQHandler,Default_Handler
 
-	.weak	TIM1_BRK_IRQHandler
-	.thumb_set TIM1_BRK_IRQHandler,Default_Handler
+  .weak  TIM1_BRK_IRQHandler
+  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
 
-	.weak	TIM1_UP_IRQHandler
-	.thumb_set TIM1_UP_IRQHandler,Default_Handler
+  .weak  TIM1_UP_IRQHandler
+  .thumb_set TIM1_UP_IRQHandler,Default_Handler
 
-	.weak	TIM1_TRG_COM_IRQHandler
-	.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
+  .weak  TIM1_TRG_COM_IRQHandler
+  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
 
-	.weak	TIM1_CC_IRQHandler
-	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+  .weak  TIM1_CC_IRQHandler
+  .thumb_set TIM1_CC_IRQHandler,Default_Handler
 
-	.weak	TIM2_IRQHandler
-	.thumb_set TIM2_IRQHandler,Default_Handler
+  .weak  TIM2_IRQHandler
+  .thumb_set TIM2_IRQHandler,Default_Handler
 
-	.weak	TIM3_IRQHandler
-	.thumb_set TIM3_IRQHandler,Default_Handler
+  .weak  TIM3_IRQHandler
+  .thumb_set TIM3_IRQHandler,Default_Handler
 
-	.weak	I2C1_EV_IRQHandler
-	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+  .weak  I2C1_EV_IRQHandler
+  .thumb_set I2C1_EV_IRQHandler,Default_Handler
 
-	.weak	I2C1_ER_IRQHandler
-	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+  .weak  I2C1_ER_IRQHandler
+  .thumb_set I2C1_ER_IRQHandler,Default_Handler
 
-	.weak	SPI1_IRQHandler
-	.thumb_set SPI1_IRQHandler,Default_Handler
+  .weak  SPI1_IRQHandler
+  .thumb_set SPI1_IRQHandler,Default_Handler
 
-	.weak	USART1_IRQHandler
-	.thumb_set USART1_IRQHandler,Default_Handler
+  .weak  USART1_IRQHandler
+  .thumb_set USART1_IRQHandler,Default_Handler
 
-	.weak	USART2_IRQHandler
-	.thumb_set USART2_IRQHandler,Default_Handler
+  .weak  USART2_IRQHandler
+  .thumb_set USART2_IRQHandler,Default_Handler
 
-	.weak	EXTI15_10_IRQHandler
-	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+  .weak  EXTI15_10_IRQHandler
+  .thumb_set EXTI15_10_IRQHandler,Default_Handler
 
-	.weak	RTCAlarm_IRQHandler
-	.thumb_set RTCAlarm_IRQHandler,Default_Handler
+  .weak  RTCAlarm_IRQHandler
+  .thumb_set RTCAlarm_IRQHandler,Default_Handler
 
-	.weak	USBWakeUp_IRQHandler
-	.thumb_set USBWakeUp_IRQHandler,Default_Handler  
+  .weak  USBWakeUp_IRQHandler
+  .thumb_set USBWakeUp_IRQHandler,Default_Handler  
 

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/gcc/startup_stm32f10x_md.s

@@ -1,51 +1,50 @@
 /**
- ******************************************************************************
- * @file      startup_stm32f10x_md.s
- * @author    MCD Application Team
- * @version   V3.1.0
- * @date      06/19/2009
- * @brief     STM32F10x Medium Density Devices vector table for RIDE7 toolchain.
- *            This module performs:
- *                - Set the initial SP
- *                - Set the initial PC == Reset_Handler,
- *                - Set the vector table entries with the exceptions ISR address
- *                - Branches to main in the C library (which eventually
- *                  calls main()).
- *            After Reset the Cortex-M3 processor is in Thread mode,
- *            priority is Privileged, and the Stack is set to Main.
- *******************************************************************************
- * @copy
- *
- * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
- * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
- * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
- * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
- * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
- * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
- *
- * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
- */	
+  ******************************************************************************
+  * @file      startup_stm32f10x_md.s
+  * @author    MCD Application Team
+  * @version   V3.1.2
+  * @date      09/28/2009
+  * @brief     STM32F10x Medium Density Devices vector table for RIDE7 toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M3 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  *******************************************************************************
+  * @copy
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
+  */  
     
   .syntax unified
-	.cpu cortex-m3
-	.fpu softvfp
-	.thumb
+  .cpu cortex-m3
+  .fpu softvfp
+  .thumb
 
-.global	g_pfnVectors
-.global	SystemInit_ExtMemCtl_Dummy
-.global	Default_Handler
+.global  g_pfnVectors
+.global  Default_Handler
 
 /* start address for the initialization values of the .data section. 
 defined in linker script */
-.word	_sidata
+.word  _sidata
 /* start address for the .data section. defined in linker script */  
-.word	_sdata
+.word  _sdata
 /* end address for the .data section. defined in linker script */
-.word	_edata
+.word  _edata
 /* start address for the .bss section. defined in linker script */
-.word	_sbss
+.word  _sbss
 /* end address for the .bss section. defined in linker script */
-.word	_ebss
+.word  _ebss
 
 .equ  BootRAM, 0xF108F85F
 /**
@@ -57,42 +56,42 @@ defined in linker script */
  * @retval : None
 */
 
-    .section	.text.Reset_Handler
-	.weak	Reset_Handler
-	.type	Reset_Handler, %function
-Reset_Handler:	
+    .section  .text.Reset_Handler
+  .weak  Reset_Handler
+  .type  Reset_Handler, %function
+Reset_Handler:  
 
 /* Copy the data segment initializers from flash to SRAM */  
-  movs	r1, #0
-  b	LoopCopyDataInit
+  movs  r1, #0
+  b  LoopCopyDataInit
 
 CopyDataInit:
-	ldr	r3, =_sidata
-	ldr	r3, [r3, r1]
-	str	r3, [r0, r1]
-	adds	r1, r1, #4
+  ldr  r3, =_sidata
+  ldr  r3, [r3, r1]
+  str  r3, [r0, r1]
+  adds  r1, r1, #4
     
 LoopCopyDataInit:
-	ldr	r0, =_sdata
-	ldr	r3, =_edata
-	adds	r2, r0, r1
-	cmp	r2, r3
-	bcc	CopyDataInit
-	ldr	r2, =_sbss
-	b	LoopFillZerobss
+  ldr  r0, =_sdata
+  ldr  r3, =_edata
+  adds  r2, r0, r1
+  cmp  r2, r3
+  bcc  CopyDataInit
+  ldr  r2, =_sbss
+  b  LoopFillZerobss
 /* Zero fill the bss segment. */  
 FillZerobss:
-	movs	r3, #0
-	str	r3, [r2], #4
+  movs  r3, #0
+  str  r3, [r2], #4
     
 LoopFillZerobss:
-	ldr	r3, = _ebss
-	cmp	r2, r3
-	bcc	FillZerobss
+  ldr  r3, = _ebss
+  cmp  r2, r3
+  bcc  FillZerobss
 /* Call the application's entry point.*/
-	bl	main
-	bx	lr    
-.size	Reset_Handler, .-Reset_Handler
+  bl  main
+  bx  lr    
+.size  Reset_Handler, .-Reset_Handler
 
 /**
  * @brief  This is the code that gets called when the processor receives an 
@@ -102,11 +101,11 @@ LoopFillZerobss:
  * @param  None     
  * @retval : None       
 */
-    .section	.text.Default_Handler,"ax",%progbits
+    .section  .text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
-	b	Infinite_Loop
-	.size	Default_Handler, .-Default_Handler
+  b  Infinite_Loop
+  .size  Default_Handler, .-Default_Handler
 /******************************************************************************
 *
 * The minimal vector table for a Cortex M3.  Note that the proper constructs
@@ -114,79 +113,79 @@ Infinite_Loop:
 * 0x0000.0000.
 *
 ******************************************************************************/    
- 	.section	.isr_vector,"a",%progbits
-	.type	g_pfnVectors, %object
-	.size	g_pfnVectors, .-g_pfnVectors
+   .section  .isr_vector,"a",%progbits
+  .type  g_pfnVectors, %object
+  .size  g_pfnVectors, .-g_pfnVectors
     
     
 g_pfnVectors:
-	.word	_estack
-	.word	Reset_Handler
-	.word	NMI_Handler
-	.word	HardFault_Handler
-	.word	MemManage_Handler
-	.word	BusFault_Handler
-	.word	UsageFault_Handler
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	SVC_Handler
-	.word	DebugMon_Handler
-	.word	0
-	.word	PendSV_Handler
-	.word	SysTick_Handler
-	.word	WWDG_IRQHandler
-	.word	PVD_IRQHandler
-	.word	TAMPER_IRQHandler
-	.word	RTC_IRQHandler
-	.word	FLASH_IRQHandler
-	.word	RCC_IRQHandler
-	.word	EXTI0_IRQHandler
-	.word	EXTI1_IRQHandler
-	.word	EXTI2_IRQHandler
-	.word	EXTI3_IRQHandler
-	.word	EXTI4_IRQHandler
-	.word	DMA1_Channel1_IRQHandler
-	.word	DMA1_Channel2_IRQHandler
-	.word	DMA1_Channel3_IRQHandler
-	.word	DMA1_Channel4_IRQHandler
-	.word	DMA1_Channel5_IRQHandler
-	.word	DMA1_Channel6_IRQHandler
-	.word	DMA1_Channel7_IRQHandler
-	.word	ADC1_2_IRQHandler
-	.word	USB_HP_CAN1_TX_IRQHandler
-	.word	USB_LP_CAN1_RX0_IRQHandler
-	.word	CAN1_RX1_IRQHandler
-	.word	CAN1_SCE_IRQHandler
-	.word	EXTI9_5_IRQHandler
-	.word	TIM1_BRK_IRQHandler
-	.word	TIM1_UP_IRQHandler
-	.word	TIM1_TRG_COM_IRQHandler
-	.word	TIM1_CC_IRQHandler
-	.word	TIM2_IRQHandler
-	.word	TIM3_IRQHandler
-	.word	TIM4_IRQHandler
-	.word	I2C1_EV_IRQHandler
-	.word	I2C1_ER_IRQHandler
-	.word	I2C2_EV_IRQHandler
-	.word	I2C2_ER_IRQHandler
-	.word	SPI1_IRQHandler
-	.word	SPI2_IRQHandler
-	.word	USART1_IRQHandler
-	.word	USART2_IRQHandler
-	.word	USART3_IRQHandler
-	.word	EXTI15_10_IRQHandler
-	.word	RTCAlarm_IRQHandler
-	.word	USBWakeUp_IRQHandler	
-  .word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	0
-	.word	BootRAM          /* @0x108. This is for boot in RAM mode for 
+  .word  _estack
+  .word  Reset_Handler
+  .word  NMI_Handler
+  .word  HardFault_Handler
+  .word  MemManage_Handler
+  .word  BusFault_Handler
+  .word  UsageFault_Handler
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  SVC_Handler
+  .word  DebugMon_Handler
+  .word  0
+  .word  PendSV_Handler
+  .word  SysTick_Handler
+  .word  WWDG_IRQHandler
+  .word  PVD_IRQHandler
+  .word  TAMPER_IRQHandler
+  .word  RTC_IRQHandler
+  .word  FLASH_IRQHandler
+  .word  RCC_IRQHandler
+  .word  EXTI0_IRQHandler
+  .word  EXTI1_IRQHandler
+  .word  EXTI2_IRQHandler
+  .word  EXTI3_IRQHandler
+  .word  EXTI4_IRQHandler
+  .word  DMA1_Channel1_IRQHandler
+  .word  DMA1_Channel2_IRQHandler
+  .word  DMA1_Channel3_IRQHandler
+  .word  DMA1_Channel4_IRQHandler
+  .word  DMA1_Channel5_IRQHandler
+  .word  DMA1_Channel6_IRQHandler
+  .word  DMA1_Channel7_IRQHandler
+  .word  ADC1_2_IRQHandler
+  .word  USB_HP_CAN1_TX_IRQHandler
+  .word  USB_LP_CAN1_RX0_IRQHandler
+  .word  CAN1_RX1_IRQHandler
+  .word  CAN1_SCE_IRQHandler
+  .word  EXTI9_5_IRQHandler
+  .word  TIM1_BRK_IRQHandler
+  .word  TIM1_UP_IRQHandler
+  .word  TIM1_TRG_COM_IRQHandler
+  .word  TIM1_CC_IRQHandler
+  .word  TIM2_IRQHandler
+  .word  TIM3_IRQHandler
+  .word  TIM4_IRQHandler
+  .word  I2C1_EV_IRQHandler
+  .word  I2C1_ER_IRQHandler
+  .word  I2C2_EV_IRQHandler
+  .word  I2C2_ER_IRQHandler
+  .word  SPI1_IRQHandler
+  .word  SPI2_IRQHandler
+  .word  USART1_IRQHandler
+  .word  USART2_IRQHandler
+  .word  USART3_IRQHandler
+  .word  EXTI15_10_IRQHandler
+  .word  RTCAlarm_IRQHandler
+  .word  USBWakeUp_IRQHandler  
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  0
+  .word  BootRAM          /* @0x108. This is for boot in RAM mode for 
                             STM32F10x Medium Density devices. */
    
 /*******************************************************************************
@@ -197,160 +196,160 @@ g_pfnVectors:
 *
 *******************************************************************************/
     
-  .weak	NMI_Handler
-	.thumb_set NMI_Handler,Default_Handler
-	
-  .weak	HardFault_Handler
-	.thumb_set HardFault_Handler,Default_Handler
-	
-  .weak	MemManage_Handler
-	.thumb_set MemManage_Handler,Default_Handler
-	
-  .weak	BusFault_Handler
-	.thumb_set BusFault_Handler,Default_Handler
+  .weak  NMI_Handler
+  .thumb_set NMI_Handler,Default_Handler
+  
+  .weak  HardFault_Handler
+  .thumb_set HardFault_Handler,Default_Handler
+  
+  .weak  MemManage_Handler
+  .thumb_set MemManage_Handler,Default_Handler
+  
+  .weak  BusFault_Handler
+  .thumb_set BusFault_Handler,Default_Handler
 
-	.weak	UsageFault_Handler
-	.thumb_set UsageFault_Handler,Default_Handler
+  .weak  UsageFault_Handler
+  .thumb_set UsageFault_Handler,Default_Handler
 
-	.weak	SVC_Handler
-	.thumb_set SVC_Handler,Default_Handler
+  .weak  SVC_Handler
+  .thumb_set SVC_Handler,Default_Handler
 
-	.weak	DebugMon_Handler
-	.thumb_set DebugMon_Handler,Default_Handler
+  .weak  DebugMon_Handler
+  .thumb_set DebugMon_Handler,Default_Handler
 
-	.weak	PendSV_Handler
-	.thumb_set PendSV_Handler,Default_Handler
+  .weak  PendSV_Handler
+  .thumb_set PendSV_Handler,Default_Handler
 
-	.weak	SysTick_Handler
-	.thumb_set SysTick_Handler,Default_Handler
+  .weak  SysTick_Handler
+  .thumb_set SysTick_Handler,Default_Handler
 
-	.weak	WWDG_IRQHandler
-	.thumb_set WWDG_IRQHandler,Default_Handler
+  .weak  WWDG_IRQHandler
+  .thumb_set WWDG_IRQHandler,Default_Handler
 
-	.weak	PVD_IRQHandler
-	.thumb_set PVD_IRQHandler,Default_Handler
+  .weak  PVD_IRQHandler
+  .thumb_set PVD_IRQHandler,Default_Handler
 
-	.weak	TAMPER_IRQHandler
-	.thumb_set TAMPER_IRQHandler,Default_Handler
+  .weak  TAMPER_IRQHandler
+  .thumb_set TAMPER_IRQHandler,Default_Handler
 
-	.weak	RTC_IRQHandler
-	.thumb_set RTC_IRQHandler,Default_Handler
+  .weak  RTC_IRQHandler
+  .thumb_set RTC_IRQHandler,Default_Handler
 
-	.weak	FLASH_IRQHandler
-	.thumb_set FLASH_IRQHandler,Default_Handler
+  .weak  FLASH_IRQHandler
+  .thumb_set FLASH_IRQHandler,Default_Handler
 
-	.weak	RCC_IRQHandler
-	.thumb_set RCC_IRQHandler,Default_Handler
+  .weak  RCC_IRQHandler
+  .thumb_set RCC_IRQHandler,Default_Handler
 
-	.weak	EXTI0_IRQHandler
-	.thumb_set EXTI0_IRQHandler,Default_Handler
+  .weak  EXTI0_IRQHandler
+  .thumb_set EXTI0_IRQHandler,Default_Handler
 
-	.weak	EXTI1_IRQHandler
-	.thumb_set EXTI1_IRQHandler,Default_Handler
+  .weak  EXTI1_IRQHandler
+  .thumb_set EXTI1_IRQHandler,Default_Handler
 
-	.weak	EXTI2_IRQHandler
-	.thumb_set EXTI2_IRQHandler,Default_Handler
+  .weak  EXTI2_IRQHandler
+  .thumb_set EXTI2_IRQHandler,Default_Handler
 
-	.weak	EXTI3_IRQHandler
-	.thumb_set EXTI3_IRQHandler,Default_Handler
+  .weak  EXTI3_IRQHandler
+  .thumb_set EXTI3_IRQHandler,Default_Handler
 
-	.weak	EXTI4_IRQHandler
-	.thumb_set EXTI4_IRQHandler,Default_Handler
+  .weak  EXTI4_IRQHandler
+  .thumb_set EXTI4_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel1_IRQHandler
-	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+  .weak  DMA1_Channel1_IRQHandler
+  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel2_IRQHandler
-	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+  .weak  DMA1_Channel2_IRQHandler
+  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel3_IRQHandler
-	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+  .weak  DMA1_Channel3_IRQHandler
+  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel4_IRQHandler
-	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+  .weak  DMA1_Channel4_IRQHandler
+  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel5_IRQHandler
-	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+  .weak  DMA1_Channel5_IRQHandler
+  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel6_IRQHandler
-	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+  .weak  DMA1_Channel6_IRQHandler
+  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
 
-	.weak	DMA1_Channel7_IRQHandler
-	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+  .weak  DMA1_Channel7_IRQHandler
+  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
 
-	.weak	ADC1_2_IRQHandler
-	.thumb_set ADC1_2_IRQHandler,Default_Handler
+  .weak  ADC1_2_IRQHandler
+  .thumb_set ADC1_2_IRQHandler,Default_Handler
 
-	.weak	USB_HP_CAN1_TX_IRQHandler
-	.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
+  .weak  USB_HP_CAN1_TX_IRQHandler
+  .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
 
-	.weak	USB_LP_CAN1_RX0_IRQHandler
-	.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
+  .weak  USB_LP_CAN1_RX0_IRQHandler
+  .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
 
-	.weak	CAN1_RX1_IRQHandler
-	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
+  .weak  CAN1_RX1_IRQHandler
+  .thumb_set CAN1_RX1_IRQHandler,Default_Handler
 
-	.weak	CAN1_SCE_IRQHandler
-	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
+  .weak  CAN1_SCE_IRQHandler
+  .thumb_set CAN1_SCE_IRQHandler,Default_Handler
 
-	.weak	EXTI9_5_IRQHandler
-	.thumb_set EXTI9_5_IRQHandler,Default_Handler
+  .weak  EXTI9_5_IRQHandler
+  .thumb_set EXTI9_5_IRQHandler,Default_Handler
 
-	.weak	TIM1_BRK_IRQHandler
-	.thumb_set TIM1_BRK_IRQHandler,Default_Handler
+  .weak  TIM1_BRK_IRQHandler
+  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
 
-	.weak	TIM1_UP_IRQHandler
-	.thumb_set TIM1_UP_IRQHandler,Default_Handler
+  .weak  TIM1_UP_IRQHandler
+  .thumb_set TIM1_UP_IRQHandler,Default_Handler
 
-	.weak	TIM1_TRG_COM_IRQHandler
-	.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
+  .weak  TIM1_TRG_COM_IRQHandler
+  .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
 
-	.weak	TIM1_CC_IRQHandler
-	.thumb_set TIM1_CC_IRQHandler,Default_Handler
+  .weak  TIM1_CC_IRQHandler
+  .thumb_set TIM1_CC_IRQHandler,Default_Handler
 
-	.weak	TIM2_IRQHandler
-	.thumb_set TIM2_IRQHandler,Default_Handler
+  .weak  TIM2_IRQHandler
+  .thumb_set TIM2_IRQHandler,Default_Handler
 
-	.weak	TIM3_IRQHandler
-	.thumb_set TIM3_IRQHandler,Default_Handler
+  .weak  TIM3_IRQHandler
+  .thumb_set TIM3_IRQHandler,Default_Handler
 
-	.weak	TIM4_IRQHandler
-	.thumb_set TIM4_IRQHandler,Default_Handler
+  .weak  TIM4_IRQHandler
+  .thumb_set TIM4_IRQHandler,Default_Handler
 
-	.weak	I2C1_EV_IRQHandler
-	.thumb_set I2C1_EV_IRQHandler,Default_Handler
+  .weak  I2C1_EV_IRQHandler
+  .thumb_set I2C1_EV_IRQHandler,Default_Handler
 
-	.weak	I2C1_ER_IRQHandler
-	.thumb_set I2C1_ER_IRQHandler,Default_Handler
+  .weak  I2C1_ER_IRQHandler
+  .thumb_set I2C1_ER_IRQHandler,Default_Handler
 
-	.weak	I2C2_EV_IRQHandler
-	.thumb_set I2C2_EV_IRQHandler,Default_Handler
+  .weak  I2C2_EV_IRQHandler
+  .thumb_set I2C2_EV_IRQHandler,Default_Handler
 
-	.weak	I2C2_ER_IRQHandler
-	.thumb_set I2C2_ER_IRQHandler,Default_Handler
+  .weak  I2C2_ER_IRQHandler
+  .thumb_set I2C2_ER_IRQHandler,Default_Handler
 
-	.weak	SPI1_IRQHandler
-	.thumb_set SPI1_IRQHandler,Default_Handler
+  .weak  SPI1_IRQHandler
+  .thumb_set SPI1_IRQHandler,Default_Handler
 
-	.weak	SPI2_IRQHandler
-	.thumb_set SPI2_IRQHandler,Default_Handler
+  .weak  SPI2_IRQHandler
+  .thumb_set SPI2_IRQHandler,Default_Handler
 
-	.weak	USART1_IRQHandler
-	.thumb_set USART1_IRQHandler,Default_Handler
+  .weak  USART1_IRQHandler
+  .thumb_set USART1_IRQHandler,Default_Handler
 
-	.weak	USART2_IRQHandler
-	.thumb_set USART2_IRQHandler,Default_Handler
+  .weak  USART2_IRQHandler
+  .thumb_set USART2_IRQHandler,Default_Handler
 
-	.weak	USART3_IRQHandler
-	.thumb_set USART3_IRQHandler,Default_Handler
+  .weak  USART3_IRQHandler
+  .thumb_set USART3_IRQHandler,Default_Handler
 
-	.weak	EXTI15_10_IRQHandler
-	.thumb_set EXTI15_10_IRQHandler,Default_Handler
+  .weak  EXTI15_10_IRQHandler
+  .thumb_set EXTI15_10_IRQHandler,Default_Handler
 
-	.weak	RTCAlarm_IRQHandler
-	.thumb_set RTCAlarm_IRQHandler,Default_Handler
+  .weak  RTCAlarm_IRQHandler
+  .thumb_set RTCAlarm_IRQHandler,Default_Handler
 
-	.weak	USBWakeUp_IRQHandler
-	.thumb_set USBWakeUp_IRQHandler,Default_Handler
+  .weak  USBWakeUp_IRQHandler
+  .thumb_set USBWakeUp_IRQHandler,Default_Handler
 
 

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/iar/startup_stm32f10x_cl.s

@@ -1,8 +1,8 @@
 ;/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
 ;* File Name          : startup_stm32f10x_cl.s
 ;* Author             : MCD Application Team
-;* Version            : V3.1.0
-;* Date               : 06/19/2009
+;* Version            : V3.1.2
+;* Date               : 09/28/2009
 ;* Description        : STM32F10x Connectivity line devices vector table for 
 ;*                      EWARM5.x toolchain.
 ;*                      This module performs:

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/iar/startup_stm32f10x_hd.s

@@ -1,8 +1,8 @@
 ;/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
 ;* File Name          : startup_stm32f10x_hd.s
 ;* Author             : MCD Application Team
-;* Version            : V3.1.0
-;* Date               : 06/19/2009
+;* Version            : V3.1.2
+;* Date               : 09/28/2009
 ;* Description        : STM32F10x High Density Devices vector table for EWARM5.x 
 ;*                      toolchain.
 ;*                      This module performs:

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/iar/startup_stm32f10x_ld.s

@@ -1,8 +1,8 @@
 ;/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
 ;* File Name          : startup_stm32f10x_ld.s
 ;* Author             : MCD Application Team
-;* Version            : V3.1.0
-;* Date               : 06/19/2009
+;* Version            : V3.1.2
+;* Date               : 09/28/2009
 ;* Description        : STM32F10x Low Density Devices vector table for EWARM5.x 
 ;*                      toolchain.
 ;*                      This module performs:

bsp/stm3210/Libraries/CMSIS/Core/CM3/startup/iar/startup_stm32f10x_md.s

@@ -1,8 +1,8 @@
 ;/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
 ;* File Name          : startup_stm32f10x_md.s
 ;* Author             : MCD Application Team
-;* Version            : V3.1.0
-;* Date               : 06/19/2009
+;* Version            : V3.1.2
+;* Date               : 09/28/2009
 ;* Description        : STM32F10x Medium Density Devices vector table for 
 ;*                      EWARM5.x toolchain.
 ;*                      This module performs:

bsp/stm3210/Libraries/CMSIS/Core/CM3/stm32f10x.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer Header File. 
   *          This file contains all the peripheral register's definitions, bits 
   *          definitions and memory mapping for STM32F10x Connectivity line, High
@@ -100,7 +100,7 @@
    */
 #define __STM32F10X_STDPERIPH_VERSION_MAIN   (0x03) /*!< [31:16] STM32F10x Standard Peripheral Library main version */
 #define __STM32F10X_STDPERIPH_VERSION_SUB1   (0x01) /*!< [15:8]  STM32F10x Standard Peripheral Library sub1 version */
-#define __STM32F10X_STDPERIPH_VERSION_SUB2   (0x00) /*!< [7:0]  STM32F10x Standard Peripheral Library sub2 version */
+#define __STM32F10X_STDPERIPH_VERSION_SUB2   (0x02) /*!< [7:0]  STM32F10x Standard Peripheral Library sub2 version */
 #define __STM32F10X_STDPERIPH_VERSION       ((__STM32F10X_STDPERIPH_VERSION_MAIN << 16)\
                                              | (__STM32F10X_STDPERIPH_VERSION_SUB1 << 8)\
                                              | __STM32F10X_STDPERIPH_VERSION_SUB2)

bsp/stm3210/Libraries/CMSIS/Core/CM3/system_stm32f10x.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f10x.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
   ******************************************************************************  
   *
@@ -641,7 +641,7 @@ static void SetSysClockTo48(void)
     /* PCLK2 = HCLK */
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
     
-    /* PCLK1 = HCLK */
+    /* PCLK1 = HCLK/2 */
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
     
 #ifdef STM32F10X_CL
@@ -737,9 +737,9 @@ static void SetSysClockTo56(void)
     /* Enable Prefetch Buffer */
     FLASH->ACR |= FLASH_ACR_PRFTBE;
 
-    /* Flash 1 wait state */
+    /* Flash 2 wait state */
     FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
+    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
  
     /* HCLK = SYSCLK */
     RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
@@ -747,7 +747,7 @@ static void SetSysClockTo56(void)
     /* PCLK2 = HCLK */
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
     
-    /* PCLK1 = HCLK */
+    /* PCLK1 = HCLK/2 */
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
 
 #ifdef STM32F10X_CL
@@ -855,7 +855,7 @@ static void SetSysClockTo72(void)
     /* PCLK2 = HCLK */
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
     
-    /* PCLK1 = HCLK */
+    /* PCLK1 = HCLK/2 */
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
 
 #ifdef STM32F10X_CL

bsp/stm3210/Libraries/CMSIS/Core/CM3/system_stm32f10x.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    system_stm32f10x.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
   ******************************************************************************  
   *

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/misc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    misc.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the miscellaneous
   *          firmware library functions (add-on to CMSIS functions).
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_adc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_adc.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the ADC firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_bkp.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_bkp.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the BKP firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_can.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_can.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the CAN firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_crc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_crc.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the CRC firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dac.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_dac.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the DAC firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dbgmcu.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_dbgmcu.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the DBGMCU 
   *          firmware library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_dma.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_dma.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the DMA firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_exti.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_exti.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the EXTI firmware
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_flash.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_flash.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the FLASH 
   *          firmware library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_fsmc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_fsmc.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the FSMC firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_gpio.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_gpio.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the GPIO 
   *          firmware library.
   ******************************************************************************
@@ -295,8 +295,8 @@ typedef enum
 /** @defgroup Ethernet_Media_Interface 
   * @{
   */ 
-#define GPIO_ETH_MediaInterface_MII    ((u32)0x00000000) 
-#define GPIO_ETH_MediaInterface_RMII   ((u32)0x00000001)                                       
+#define GPIO_ETH_MediaInterface_MII    ((uint32_t)0x00000000) 
+#define GPIO_ETH_MediaInterface_RMII   ((uint32_t)0x00000001)                                       
 
 #define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \
                                                 ((INTERFACE) == GPIO_ETH_MediaInterface_RMII))

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_i2c.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_i2c.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the I2C firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_iwdg.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_iwdg.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the IWDG 
   *          firmware library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_pwr.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_pwr.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the PWR firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rcc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_rcc.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the RCC firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_rtc.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_rtc.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the RTC firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_sdio.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_sdio.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the SDIO firmware
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_spi.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_spi.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the SPI firmware 
   *          library.
   ******************************************************************************
@@ -98,7 +98,7 @@ typedef struct
   uint16_t I2S_MCLKOutput;   /*!< Specifies whether the I2S MCLK output is enabled or not.
                                   This parameter can be any combination of @ref I2S_MCLK_Output */
 
-  uint16_t I2S_AudioFreq;    /*!< Specifies the frequency selected for the I2S communication.
+  uint32_t I2S_AudioFreq;    /*!< Specifies the frequency selected for the I2S communication.
                                   This parameter can be any combination of @ref I2S_Audio_Frequency */
 
   uint16_t I2S_CPOL;         /*!< Specifies the idle state of the I2S clock.
@@ -298,15 +298,15 @@ typedef struct
   * @{
   */
 
-#define I2S_AudioFreq_96k                ((uint16_t)96000)
-#define I2S_AudioFreq_48k                ((uint16_t)48000)
-#define I2S_AudioFreq_44k                ((uint16_t)44100)
-#define I2S_AudioFreq_32k                ((uint16_t)32000)
-#define I2S_AudioFreq_22k                ((uint16_t)22050)
-#define I2S_AudioFreq_16k                ((uint16_t)16000)
-#define I2S_AudioFreq_11k                 ((uint16_t)11025)
-#define I2S_AudioFreq_8k                 ((uint16_t)8000)
-#define I2S_AudioFreq_Default            ((uint16_t)2)
+#define I2S_AudioFreq_96k                ((uint32_t)96000)
+#define I2S_AudioFreq_48k                ((uint32_t)48000)
+#define I2S_AudioFreq_44k                ((uint32_t)44100)
+#define I2S_AudioFreq_32k                ((uint32_t)32000)
+#define I2S_AudioFreq_22k                ((uint32_t)22050)
+#define I2S_AudioFreq_16k                ((uint32_t)16000)
+#define I2S_AudioFreq_11k                ((uint32_t)11025)
+#define I2S_AudioFreq_8k                 ((uint32_t)8000)
+#define I2S_AudioFreq_Default            ((uint32_t)2)
 #define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_96k) || \
                                  ((FREQ) == I2S_AudioFreq_48k) || \
                                  ((FREQ) == I2S_AudioFreq_44k) || \

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_tim.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_tim.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the TIM firmware 
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_usart.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_usart.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the USART 
   *          firmware library.
   ******************************************************************************
@@ -51,7 +51,7 @@ typedef struct
   uint32_t USART_BaudRate;            /*!< This member configures the USART communication baud rate.
                                            The baud rate is computed using the following formula:
                                             - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate)))
-                                            - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */
+                                            - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
 
   uint16_t USART_WordLength;          /*!< Specifies the number of data bits transmitted or received in a frame.
                                            This parameter can be a value of @ref USART_Word_Length */

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/inc/stm32f10x_wwdg.h

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_wwdg.h
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file contains all the functions prototypes for the WWDG firmware
   *          library.
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    misc.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the miscellaneous firmware functions (add-on
   *          to CMSIS functions).
   ******************************************************************************

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_adc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_adc.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the ADC firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_bkp.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_bkp.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the BKP firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_can.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_can.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the CAN firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_crc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_crc.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the CRC firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dac.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_dac.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the DAC firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dbgmcu.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_dbgmcu.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the DBGMCU firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_dma.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_dma.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the DMA firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_exti.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the EXTI firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_flash.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the FLASH firmware functions.
   ******************************************************************************
   * @copy
@@ -264,6 +264,10 @@ FLASH_Status FLASH_EraseAllPages(void)
 
 /**
   * @brief  Erases the FLASH option bytes.
+  * @note   This functions erases all option bytes and then deactivates the Read
+  *         protection. If the user needs to keep the Read protection activated,
+  *         he has to enable it after this function call (using
+  *         FLASH_ReadOutProtection function)
   * @param  None
   * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
   *   FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
@@ -293,7 +297,7 @@ FLASH_Status FLASH_EraseOptionBytes(void)
        
       /* Enable the Option Bytes Programming operation */
       FLASH->CR |= CR_OPTPG_Set;
-      /* Enable the readout access */
+      /* Disable the Read protection */
       OB->RDP= RDP_Key; 
       /* Wait for last operation to be completed */
       status = FLASH_WaitForLastOperation(ProgramTimeout);

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_fsmc.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the FSMC firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_gpio.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the GPIO firmware functions.
   ******************************************************************************
   * @copy
@@ -57,7 +57,7 @@
 /* ---  MAPR Register ---*/ 
 /* Alias word address of MII_RMII_SEL bit */ 
 #define MAPR_OFFSET                 (AFIO_OFFSET + 0x04) 
-#define MII_RMII_SEL_BitNumber      ((u8)0x17) 
+#define MII_RMII_SEL_BitNumber      ((uint8_t)0x17) 
 #define MAPR_MII_RMII_SEL_BB        (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
 
 

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_i2c.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the I2C firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_iwdg.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_iwdg.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the IWDG firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_pwr.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_pwr.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the PWR firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_rcc.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the RCC firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rtc.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_rtc.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the RTC firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_sdio.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the SDIO firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_spi.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the SPI firmware functions.
   ******************************************************************************
   * @copy
@@ -72,10 +72,10 @@
 #define I2S_Mode_Select      ((uint16_t)0x0800) 
 
 /* I2S clock source selection masks */
-#define I2S2_CLOCK_SRC       ((u32)(0x00020000))
-#define I2S3_CLOCK_SRC       ((u32)(0x00040000))
-#define I2S_MUL_MASK         ((u32)(0x0000F000))
-#define I2S_DIV_MASK         ((u32)(0x000000F0))
+#define I2S2_CLOCK_SRC       ((uint32_t)(0x00020000))
+#define I2S3_CLOCK_SRC       ((uint32_t)(0x00040000))
+#define I2S_MUL_MASK         ((uint32_t)(0x0000F000))
+#define I2S_DIV_MASK         ((uint32_t)(0x000000F0))
 
 /**
   * @}
@@ -332,7 +332,7 @@ void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
     tmp = tmp / 10;  
       
     /* Check the parity of the divider */
-    i2sodd = (uint16_t)(tmp & (u16)0x0001);
+    i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
    
     /* Compute the i2sdiv prescaler */
     i2sdiv = (uint16_t)((tmp - i2sodd) / 2);

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_tim.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the TIM firmware functions.
   ******************************************************************************
   * @copy
@@ -297,8 +297,8 @@ void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   /* Get the TIMx CCMR1 register value */
   tmpccmrx = TIMx->CCMR1;
     
-  /* Reset the Output Compare Mode Bits */
-  tmpccmrx &= CCMR_OC13M_Mask;
+  /* Reset the Output Compare mode and Capture/Compare selection Bits */
+  tmpccmrx &= CCMR_OC13M_Mask & CCMR_CC13S_Mask;
   
   /* Select the Output Compare Mode */
   tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;
@@ -310,10 +310,7 @@ void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   
   /* Set the Output State */
   tmpccer |= TIM_OCInitStruct->TIM_OutputState;
-  
-  /* Set the Capture Compare Register value */
-  TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse;
-  
+ 
   if(((uint32_t) TIMx == TIM1_BASE) || ((uint32_t) TIMx == TIM8_BASE))
   {
     assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
@@ -343,6 +340,9 @@ void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   
   /* Write to TIMx CCMR1 */
   TIMx->CCMR1 = tmpccmrx;
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse;
   
   /* Write to TIMx CCER */
   TIMx->CCER = tmpccer;
@@ -375,9 +375,9 @@ void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   
   /* Get the TIMx CCMR1 register value */
   tmpccmrx = TIMx->CCMR1;
-    
-  /* Reset the Output Compare Mode Bits */
-  tmpccmrx &= CCMR_OC24M_Mask;
+
+  /* Reset the Output Compare mode and Capture/Compare selection Bits */
+  tmpccmrx &= CCMR_OC24M_Mask & CCMR_CC24S_Mask;  
   
   /* Select the Output Compare Mode */
   tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
@@ -389,10 +389,7 @@ void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   
   /* Set the Output State */
   tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4);
-  
-  /* Set the Capture Compare Register value */
-  TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse;
-  
+    
   if(((uint32_t) TIMx == TIM1_BASE) || ((uint32_t) TIMx == TIM8_BASE))
   {
     assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
@@ -422,6 +419,9 @@ void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   
   /* Write to TIMx CCMR1 */
   TIMx->CCMR1 = tmpccmrx;
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse;
   
   /* Write to TIMx CCER */
   TIMx->CCER = tmpccer;
@@ -455,8 +455,8 @@ void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   /* Get the TIMx CCMR2 register value */
   tmpccmrx = TIMx->CCMR2;
     
-  /* Reset the Output Compare Mode Bits */
-  tmpccmrx &= CCMR_OC13M_Mask;
+  /* Reset the Output Compare mode and Capture/Compare selection Bits */
+  tmpccmrx &= CCMR_OC13M_Mask & CCMR_CC13S_Mask;  
   
   /* Select the Output Compare Mode */
   tmpccmrx |= TIM_OCInitStruct->TIM_OCMode;
@@ -468,10 +468,7 @@ void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   
   /* Set the Output State */
   tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8);
-  
-  /* Set the Capture Compare Register value */
-  TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse;
-  
+   
   if(((uint32_t) TIMx == TIM1_BASE) || ((uint32_t) TIMx == TIM8_BASE))
   {
     assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
@@ -501,6 +498,9 @@ void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   
   /* Write to TIMx CCMR2 */
   TIMx->CCMR2 = tmpccmrx;
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse;
   
   /* Write to TIMx CCER */
   TIMx->CCER = tmpccer;
@@ -534,9 +534,9 @@ void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   /* Get the TIMx CCMR2 register value */
   tmpccmrx = TIMx->CCMR2;
     
-  /* Reset the Output Compare Mode Bits */
-  tmpccmrx &= CCMR_OC24M_Mask;
-  
+  /* Reset the Output Compare mode and Capture/Compare selection Bits */
+  tmpccmrx &= CCMR_OC24M_Mask & CCMR_CC24S_Mask; 
+   
   /* Select the Output Compare Mode */
   tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
   
@@ -547,10 +547,7 @@ void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   
   /* Set the Output State */
   tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12);
-  
-  /* Set the Capture Compare Register value */
-  TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse;
-  
+    
   if(((uint32_t) TIMx == TIM1_BASE) || ((uint32_t) TIMx == TIM8_BASE))
   {
     assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
@@ -564,6 +561,9 @@ void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
   
   /* Write to TIMx CCMR2 */  
   TIMx->CCMR2 = tmpccmrx;
+
+  /* Set the Capture Compare Register value */
+  TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse;
   
   /* Write to TIMx CCER */
   TIMx->CCER = tmpccer;

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_usart.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the USART firmware functions.
   ******************************************************************************
   * @copy

bsp/stm3210/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_wwdg.c

@@ -2,8 +2,8 @@
   ******************************************************************************
   * @file    stm32f10x_wwdg.c
   * @author  MCD Application Team
-  * @version V3.1.0
-  * @date    06/19/2009
+  * @version V3.1.2
+  * @date    09/28/2009
   * @brief   This file provides all the WWDG firmware functions.
   ******************************************************************************
   * @copy