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+/*
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+ * File : drv_uart.c
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+ * This file is part of RT-Thread RTOS
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+ * COPYRIGHT (C) 2006-2013, RT-Thread Development Team
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+ *
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+ * The license and distribution terms for this file may be
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+ * found in the file LICENSE in this distribution or at
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+ * http://www.rt-thread.org/license/LICENSE
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+ *
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+ * Change Logs:
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+ * Date Author Notes
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+ * 2017-10-10 Tanek the first version
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+ * 2018-03-17 laiyiketang Add other uart.
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+ */
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+#include <rtthread.h>
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+#include "drv_usart.h"
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+
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+#include "fsl_common.h"
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+#include "fsl_lpuart.h"
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+#include "fsl_iomuxc.h"
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+
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+#ifdef RT_USING_SERIAL
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+
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+/* GPIO外设时钟会在LPUART_Init中自动配置, 如果定义了以下宏则不会自动配置 */
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+#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
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+#error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
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+#endif
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+
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+#if !defined(RT_USING_UART1) && !defined(RT_USING_UART2) && \
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+ !defined(RT_USING_UART3) && !defined(RT_USING_UART4) && \
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+ !defined(RT_USING_UART5) && !defined(RT_USING_UART6) && \
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+ !defined(RT_USING_UART7) && !defined(RT_USING_UART8)
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+#error "Please define at least one UARTx"
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+
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+#endif
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+
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+
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+
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+#include <rtdevice.h>
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+
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+/* imxrt uart driver */
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+struct imxrt_uart
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+{
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+ LPUART_Type * uart_base;
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+ IRQn_Type irqn;
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+
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+ struct rt_serial_device * serial;
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+ char *device_name;
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+};
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+
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+static void uart_isr(struct rt_serial_device *serial);
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+
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+#if defined(RT_USING_UART1)
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+struct rt_serial_device serial1;
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+
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+void LPUART1_IRQHandler(void)
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+{
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+ uart_isr(&serial1);
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+}
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+
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+#endif /* RT_USING_UART1 */
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+
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+#if defined(RT_USING_UART2)
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+struct rt_serial_device serial2;
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+
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+void USART2_IRQHandler(void)
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+{
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+ uart_isr(&serial2);
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+}
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+
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+#endif /* RT_USING_UART2 */
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+
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+#if defined(RT_USING_UART3)
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+struct rt_serial_device serial3;
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+
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+void UART3_IRQHandler(void)
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+{
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+ uart_isr(&serial3);
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+}
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+
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+#endif /* RT_USING_UART3 */
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+
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+#if defined(RT_USING_UART4)
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+struct rt_serial_device serial4;
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+
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+void UART4_IRQHandler(void)
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+{
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+ uart_isr(&serial4);
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+}
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+#endif /* RT_USING_UART4 */
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+
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+#if defined(RT_USING_UART5)
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+struct rt_serial_device serial5;
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+
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+void USART5_IRQHandler(void)
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+{
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+ uart_isr(&serial5);
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+}
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+
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+#endif /* RT_USING_UART5 */
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+
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+#if defined(RT_USING_UART6)
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+struct rt_serial_device serial6;
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+
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+void UART6_IRQHandler(void)
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+{
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+ uart_isr(&serial6);
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+}
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+
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+#endif /* RT_USING_UART6 */
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+
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+#if defined(RT_USING_UART7)
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+struct rt_serial_device serial7;
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+
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+void UART7_IRQHandler(void)
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+{
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+ uart_isr(&serial7);
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+}
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+
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+#endif /* RT_USING_UART7 */
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+
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+#if defined(RT_USING_UART8)
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+struct rt_serial_device serial8;
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+
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+void UART8_IRQHandler(void)
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+{
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+ uart_isr(&serial8);
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+}
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+
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+#endif /* RT_USING_UART8 */
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+
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+static const struct imxrt_uart uarts[] = {
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+#ifdef RT_USING_UART1
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+ {
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+ LPUART1,
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+ LPUART1_IRQn,
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+ &serial1,
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+ "uart1",
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+ },
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+#endif
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+#ifdef RT_USING_UART2
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+ {
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+ LPUART2,
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+ LPUART2_IRQn,
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+ &serial2,
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+ "uart2",
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+ },
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+#endif
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+#ifdef RT_USING_UART3
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+ {
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+ LPUART3,
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+ LPUART3_IRQn,
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+ &serial3,
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+ "uart3",
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+ },
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+#endif
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+#ifdef RT_USING_UART4
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+ {
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+ LPUART4,
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+ LPUART4_IRQn,
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+ &serial4,
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+ "uart4",
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+ },
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+#endif
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+#ifdef RT_USING_UART5
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+ {
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+ LPUART5,
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+ LPUART5_IRQn,
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+ &serial5,
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+ "uart5",
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+ },
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+#endif
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+#ifdef RT_USING_UART6
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+ {
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+ LPUART6,
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+ LPUART6_IRQn,
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+ &serial6,
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+ "uart6",
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+ },
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+#endif
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+#ifdef RT_USING_UART7
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+ {
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+ LPUART7,
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+ LPUART7_IRQn,
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+ &serial7,
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+ "uart7",
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+ },
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+#endif
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+#ifdef RT_USING_UART8
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+ {
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+ LPUART8,
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+ LPUART8_IRQn,
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+ &serial8,
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+ "uart8",
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+ },
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+#endif
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+
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+};
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+
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+/* Get debug console frequency. */
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+uint32_t BOARD_DebugConsoleSrcFreq(void)
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+{
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+ uint32_t freq;
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+
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+ /* To make it simple, we assume default PLL and divider settings, and the only variable
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+ from application is use PLL3 source or OSC source */
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+ if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */
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+ {
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+ freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
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+ }
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+ else
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+ {
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+ freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
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+ }
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+
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+ return freq;
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+}
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+
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+
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+/**
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+* @brief UART MSP Initialization
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+* This function configures the hardware resources used in this example:
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+* - Peripheral's clock enable
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+* - Peripheral's GPIO Configuration
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+* - NVIC configuration for UART interrupt request enable
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+* @param huart: UART handle pointer
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+* @retval None
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+*/
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+void imxrt_uart_gpio_init(struct imxrt_uart *uart)
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+{
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+ if (uart->uart_base != RT_NULL)
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+ {
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+#ifdef RT_USING_UART1
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+ CLOCK_EnableClock(kCLOCK_Iomuxc); /* iomuxc clock (iomuxc_clk_enable): 0x03u */
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+
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 is configured as LPUART1_TX */
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+ 0U); /* Software Input On Field: Input Path is determined by functionality */
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 is configured as LPUART1_RX */
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+ 0U); /* Software Input On Field: Input Path is determined by functionality */
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B0_12_LPUART1_TX, /* GPIO_AD_B0_12 PAD functional properties : */
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+ 0x10B0u); /* Slew Rate Field: Slow Slew Rate
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+ Drive Strength Field: R0/6
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+ Speed Field: medium(100MHz)
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+ Open Drain Enable Field: Open Drain Disabled
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+ Pull / Keep Enable Field: Pull/Keeper Enabled
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+ Pull / Keep Select Field: Keeper
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+ Pull Up / Down Config. Field: 100K Ohm Pull Down
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+ Hyst. Enable Field: Hysteresis Disabled */
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B0_13_LPUART1_RX, /* GPIO_AD_B0_13 PAD functional properties : */
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+ 0x10B0u); /* Slew Rate Field: Slow Slew Rate
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+ Drive Strength Field: R0/6
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+ Speed Field: medium(100MHz)
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+ Open Drain Enable Field: Open Drain Disabled
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+ Pull / Keep Enable Field: Pull/Keeper Enabled
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+ Pull / Keep Select Field: Keeper
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+ Pull Up / Down Config. Field: 100K Ohm Pull Down
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+ Hyst. Enable Field: Hysteresis Disabled */
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+#endif
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+#ifdef RT_USING_UART2
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+ CLOCK_EnableClock(kCLOCK_Iomuxc);
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+
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
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+ 0U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
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+ 0U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_02_LPUART2_TX,
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+ 0x10B0u);
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+
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+
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_03_LPUART2_RX,
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+ 0x10B0u);
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+
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+#endif
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+#ifdef RT_USING_UART3
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+ CLOCK_EnableClock(kCLOCK_Iomuxc);
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+
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
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+ 0U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
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+ 0U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_06_LPUART3_TX,
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+ 0x10B0u);
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+
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_07_LPUART3_RX,
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+ 0x10B0u);
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+#endif
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+#ifdef RT_USING_UART4
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+ CLOCK_EnableClock(kCLOCK_Iomuxc);
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+
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_B1_00_LPUART4_TX,
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+ 0U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_B1_01_LPUART4_RX,
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+ 0U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_B1_00_LPUART4_TX,
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+ 0x10B0u);
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+
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_B1_01_LPUART4_RX,
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+ 0x10B0u);
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+#endif
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+#ifdef RT_USING_UART5
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+ CLOCK_EnableClock(kCLOCK_Iomuxc);
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+
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_B1_12_LPUART5_TX,
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+ 0U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_B1_13_LPUART5_RX,
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+ 0U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_B1_12_LPUART5_TX,
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+ 0x10B0u);
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+
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_B1_13_LPUART5_RX,
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+ 0x10B0u);
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+#endif
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+#ifdef RT_USING_UART6
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+ CLOCK_EnableClock(kCLOCK_Iomuxc);
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+
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
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+ 0U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B0_03_LPUART6_RX,
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+ 0U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B0_02_LPUART6_TX,
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+ 0x10B0u);
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+
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B0_03_LPUART6_RX,
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+ 0x10B0u);
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+#endif
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+#ifdef RT_USING_UART7
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+ CLOCK_EnableClock(kCLOCK_Iomuxc);
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+
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_EMC_31_LPUART7_TX,
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+ 0U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_EMC_32_LPUART7_RX,
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+ 0U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_EMC_31_LPUART7_TX,
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+ 0x10B0u);
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+
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_EMC_32_LPUART7_RX,
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+ 0x10B0u);
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+#endif
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+#ifdef RT_USING_UART8
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+ CLOCK_EnableClock(kCLOCK_Iomuxc);
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+
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
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+ 0U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_11_LPUART8_RX,
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+ 0U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_10_LPUART8_TX,
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+ 0x10B0u);
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+
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_11_LPUART8_RX,
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+ 0x10B0u);
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+#endif
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+ }
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+ else
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+ {
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+ RT_ASSERT(RT_NULL);
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+ }
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+}
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+
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+static rt_err_t imxrt_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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+{
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+ struct imxrt_uart *uart;
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+ lpuart_config_t config;
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+
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+ RT_ASSERT(serial != RT_NULL);
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+ RT_ASSERT(cfg != RT_NULL);
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+
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+ uart = (struct imxrt_uart *)serial->parent.user_data;
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+
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+ imxrt_uart_gpio_init(uart);
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+
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+ LPUART_GetDefaultConfig(&config);
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+ config.baudRate_Bps = cfg->baud_rate;
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+
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+ switch (cfg->data_bits)
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+ {
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+ case DATA_BITS_7:
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+ config.dataBitsCount = kLPUART_SevenDataBits;
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+ break;
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+
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+ default:
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+ config.dataBitsCount = kLPUART_EightDataBits;
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+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ switch (cfg->stop_bits)
|
|
|
+ {
|
|
|
+ case STOP_BITS_2:
|
|
|
+ config.stopBitCount = kLPUART_TwoStopBit;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ config.stopBitCount = kLPUART_OneStopBit;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ switch (cfg->parity)
|
|
|
+ {
|
|
|
+ case PARITY_ODD:
|
|
|
+ config.parityMode = kLPUART_ParityOdd;
|
|
|
+ break;
|
|
|
+ case PARITY_EVEN:
|
|
|
+ config.parityMode = kLPUART_ParityEven;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ config.parityMode = kLPUART_ParityDisabled;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ config.enableTx = true;
|
|
|
+ config.enableRx = true;
|
|
|
+
|
|
|
+ LPUART_Init(uart->uart_base, &config, BOARD_DebugConsoleSrcFreq());
|
|
|
+
|
|
|
+
|
|
|
+ return RT_EOK;
|
|
|
+}
|
|
|
+
|
|
|
+static rt_err_t imxrt_control(struct rt_serial_device *serial, int cmd, void *arg)
|
|
|
+{
|
|
|
+ struct imxrt_uart *uart;
|
|
|
+
|
|
|
+ RT_ASSERT(serial != RT_NULL);
|
|
|
+ uart = (struct imxrt_uart *)serial->parent.user_data;
|
|
|
+
|
|
|
+ switch (cmd)
|
|
|
+ {
|
|
|
+ case RT_DEVICE_CTRL_CLR_INT:
|
|
|
+ /* disable interrupt */
|
|
|
+ LPUART_DisableInterrupts(uart->uart_base, kLPUART_RxDataRegFullInterruptEnable);
|
|
|
+ /* disable rx irq */
|
|
|
+ DisableIRQ(uart->irqn);
|
|
|
+
|
|
|
+ break;
|
|
|
+ case RT_DEVICE_CTRL_SET_INT:
|
|
|
+ /* enable interrupt */
|
|
|
+ LPUART_EnableInterrupts(uart->uart_base, kLPUART_RxDataRegFullInterruptEnable);
|
|
|
+ /* enable rx irq */
|
|
|
+ EnableIRQ(uart->irqn);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+
|
|
|
+ return RT_EOK;
|
|
|
+}
|
|
|
+
|
|
|
+static int imxrt_putc(struct rt_serial_device *serial, char ch)
|
|
|
+{
|
|
|
+ struct imxrt_uart *uart;
|
|
|
+
|
|
|
+ RT_ASSERT(serial != RT_NULL);
|
|
|
+ uart = (struct imxrt_uart *)serial->parent.user_data;
|
|
|
+
|
|
|
+ LPUART_WriteByte(uart->uart_base, ch);
|
|
|
+ while(!(LPUART_GetStatusFlags(uart->uart_base) & kLPUART_TxDataRegEmptyFlag));
|
|
|
+
|
|
|
+ return 1;
|
|
|
+}
|
|
|
+
|
|
|
+static int imxrt_getc(struct rt_serial_device *serial)
|
|
|
+{
|
|
|
+ int ch;
|
|
|
+ struct imxrt_uart *uart;
|
|
|
+
|
|
|
+ RT_ASSERT(serial != RT_NULL);
|
|
|
+ uart = (struct imxrt_uart *)serial->parent.user_data;
|
|
|
+
|
|
|
+ ch = -1;
|
|
|
+ if (LPUART_GetStatusFlags(uart->uart_base) & kLPUART_RxDataRegFullFlag)
|
|
|
+ ch = LPUART_ReadByte(uart->uart_base);
|
|
|
+ return ch;
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * Uart common interrupt process. This need add to uart ISR.
|
|
|
+ *
|
|
|
+ * @param serial serial device
|
|
|
+ */
|
|
|
+static void uart_isr(struct rt_serial_device *serial)
|
|
|
+{
|
|
|
+ struct imxrt_uart *uart;
|
|
|
+ LPUART_Type *base;
|
|
|
+
|
|
|
+ RT_ASSERT(serial != RT_NULL);
|
|
|
+
|
|
|
+ uart = (struct imxrt_uart *) serial->parent.user_data;
|
|
|
+ RT_ASSERT(uart != RT_NULL);
|
|
|
+
|
|
|
+ base = uart->uart_base;
|
|
|
+ RT_ASSERT(base != RT_NULL);
|
|
|
+
|
|
|
+ /* enter interrupt */
|
|
|
+ rt_interrupt_enter();
|
|
|
+
|
|
|
+ /* UART in mode Receiver -------------------------------------------------*/
|
|
|
+ if (LPUART_GetStatusFlags(base) & kLPUART_RxDataRegFullFlag)
|
|
|
+ {
|
|
|
+ rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* If RX overrun. */
|
|
|
+ if (LPUART_STAT_OR_MASK & base->STAT)
|
|
|
+ {
|
|
|
+ /* Clear overrun flag, otherwise the RX does not work. */
|
|
|
+ base->STAT = ((base->STAT & 0x3FE00000U) | LPUART_STAT_OR_MASK);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* leave interrupt */
|
|
|
+ rt_interrupt_leave();
|
|
|
+}
|
|
|
+
|
|
|
+static const struct rt_uart_ops imxrt_uart_ops =
|
|
|
+{
|
|
|
+ imxrt_configure,
|
|
|
+ imxrt_control,
|
|
|
+ imxrt_putc,
|
|
|
+ imxrt_getc,
|
|
|
+};
|
|
|
+
|
|
|
+int imxrt_hw_usart_init(void)
|
|
|
+{
|
|
|
+ struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
|
|
+ int i;
|
|
|
+ for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
|
|
|
+ {
|
|
|
+ uarts[i].serial->ops = &imxrt_uart_ops;
|
|
|
+ uarts[i].serial->config = config;
|
|
|
+
|
|
|
+ /* register UART1 device */
|
|
|
+ rt_hw_serial_register(uarts[i].serial,
|
|
|
+ uarts[i].device_name,
|
|
|
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
|
|
+ (void *)&uarts[i]);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+INIT_BOARD_EXPORT(imxrt_hw_usart_init);
|
|
|
+
|
|
|
+#endif /*RT_USING_SERIAL */
|
balanceTWK