Merge pull request #3313 from amyqian379/master

增加Cypress PSoC6系列产品的支持

bsp/cypress/psoc6-pioneerkit_modus/.cproject

@@ -0,0 +1,157 @@
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bsp/cypress/psoc6-pioneerkit_modus/.mtbLaunchConfigs/psoc6-pioneerkit_modus Attach (JLink).launch

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+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="true"/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value="2"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="swd"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="CY8C6xx7_CM4_sect256KB"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="auto"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2334"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
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+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.hex"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2334"/>
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+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.elf"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="true"/>
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="psoc6-pioneerkit_modus"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/psoc6-pioneerkit_modus"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/.mtbLaunchConfigs/psoc6-pioneerkit_modus Attach (KitProg3).launch

@@ -0,0 +1,59 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<booleanAttribute key="com.cypress.studio.launch.hide" value="true"/>
+<stringAttribute key="com.cypress.studio.launch.mode" value="debug"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set remotetimeout 15"/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-s &quot;${openocd_path}/../scripts&quot;&#13;&#10;-c &quot;set ENABLE_ACQUIRE 0&quot;&#13;&#10;-c &quot;source [find interface/kitprog3.cfg]&quot;&#13;&#10;-c &quot;puts stderr {Started by GNU MCU Eclipse}&quot;&#13;&#10;-c &quot;source [find target/psoc6.cfg]&quot;&#13;&#10;-c &quot;psoc6.cpu.cm4 configure -rtos auto -rtos-wipe-on-reset-halt 1&quot;&#13;&#10;-c &quot;gdb_port 3332&quot;&#13;&#10;"/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
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+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.elf"/>
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+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="psoc6-pioneerkit_modus"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/psoc6-pioneerkit_modus"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/.mtbLaunchConfigs/psoc6-pioneerkit_modus Debug (JLink).launch

@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="com.cypress.studio.launch.mode" value="debug"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="false"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value="2"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="swd"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="CY8C6xx7_CM4_sect256KB"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="auto"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2334"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun -strict -timeout 0 -nogui"/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.hex"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
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+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.elf"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="true"/>
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.elf"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="psoc6-pioneerkit_modus"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/psoc6-pioneerkit_modus"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
+<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/.mtbLaunchConfigs/psoc6-pioneerkit_modus Debug (KitProg3).launch

@@ -0,0 +1,63 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<stringAttribute key="com.cypress.studio.launch.mode" value="debug"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set remotetimeout 15"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
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+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
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+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/.mtbLaunchConfigs/psoc6-pioneerkit_modus Erase (JLink).launch

@@ -0,0 +1,78 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
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+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/.mtbLaunchConfigs/psoc6-pioneerkit_modus Erase (KitProg3).launch

@@ -0,0 +1,59 @@
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+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/.mtbLaunchConfigs/psoc6-pioneerkit_modus Program (JLink).launch

@@ -0,0 +1,80 @@
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.hex"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="psoc6-pioneerkit_modus"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/psoc6-pioneerkit_modus"/>
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+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
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+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/.mtbLaunchConfigs/psoc6-pioneerkit_modus Program (KitProg3).launch

@@ -0,0 +1,61 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<stringAttribute key="com.cypress.studio.launch.mode" value="run"/>
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+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-s &quot;${openocd_path}/../scripts&quot;&#13;&#10;-s &quot;./libs/TARGET_CY8CKIT-062-BLE/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource&quot;&#13;&#10;-c &quot;source [find interface/kitprog3.cfg]&quot;&#13;&#10;-c &quot;source [find target/psoc6.cfg]&quot;&#13;&#10;-c &quot;psoc6 sflash_restrictions 1&quot;&#13;&#10;-c &quot;if [catch {program ${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.hex} ] { echo {** Program operation failed **} } else { echo {** Program operation completed successfully **} }&quot;&#13;&#10;-c &quot;reset_config srst_only;reset run;psoc6.dap dpreg 0x04 0x00;shutdown&quot;"/>
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+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${cy_prj_path}/build/CY8CKIT-062-BLE/Debug/mtb-example-psoc6-empty-app.hex"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="psoc6-pioneerkit_modus"/>
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+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/psoc6-pioneerkit_modus"/>
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+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
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+<listEntry value="org.eclipse.debug.ui.launchGroup.run"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/.project

@@ -0,0 +1,28 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>psoc6-pioneerkit_modus</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>com.cypress.studio.app.cymodusnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+</projectDescription>

bsp/cypress/psoc6-pioneerkit_modus/.settings/language.settings.xml

@@ -0,0 +1,27 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<project>
+	<configuration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.1152591654" name="Debug">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1751837989637446275" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gcc ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuildCommandParser" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser" keep-relative-paths="false" name="CDT GCC Build Output Parser" parameter="(g?cc)|([gc]\+\+)|(clang)|Compiling" prefer-non-shared="true" resource-scope="per-file"/>
+		</extension>
+	</configuration>
+	<configuration id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.release.244479375" name="Release">
+		<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
+			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
+			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
+			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1757511312849594505" id="ilg.gnuarmeclipse.managedbuild.cross.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT ARM Cross GCC Built-in Compiler Settings " parameter="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gcc ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+				<language-scope id="org.eclipse.cdt.core.gcc"/>
+				<language-scope id="org.eclipse.cdt.core.g++"/>
+			</provider>
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuildCommandParser" id="org.eclipse.cdt.managedbuilder.core.GCCBuildCommandParser" keep-relative-paths="false" name="CDT GCC Build Output Parser" parameter="(g?cc)|([gc]\+\+)|(clang)|Compiling" prefer-non-shared="true" resource-scope="per-file"/>
+		</extension>
+	</configuration>
+</project>

bsp/cypress/psoc6-pioneerkit_modus/LICENSE

@@ -0,0 +1,210 @@
+CYPRESS END USER LICENSE AGREEMENT
+
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+will be deemed effective when actually received and must be sent to Cypress
+Semiconductor Corporation, ATTN: Chief Legal Officer, 198 Champion Court, San
+Jose, CA 95134 USA.

bsp/cypress/psoc6-pioneerkit_modus/Makefile

@@ -0,0 +1,183 @@
+################################################################################
+# \file Makefile
+# \version 1.0
+#
+# \brief
+# Top-level application make file.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+
+################################################################################
+# Basic Configuration
+################################################################################
+
+# Target board/hardware
+TARGET=CY8CKIT-062-BLE
+# Name of application (used to derive name of final linked file).
+APPNAME=mtb-example-psoc6-empty-app
+
+# Name of toolchain to use. Options include:
+#
+# GCC_ARM -- GCC 7.2.1, provided with ModusToolbox IDE
+# ARM     -- ARM Compiler (must be installed separately)
+# IAR     -- IAR Compiler (must be installed separately)
+#
+# See also: CY_COMPILER_PATH below
+TOOLCHAIN=GCC_ARM
+
+# Default build configuration. Options include:
+#
+# Debug   -- build with minimal optimizations, focus on debugging.
+# Release -- build with full optimizations
+CONFIG=Debug
+
+# If set to "true" or "1", display full command-lines when building.
+VERBOSE=
+
+# RT-Thread root directory
+RTT_ROOT_DIR=../../../
+
+################################################################################
+# Advanced Configuration
+################################################################################
+
+# Enable optional code that is ordinarily disabled by default.
+#
+# Available components depend on the specific targeted hardware and firmware
+# in use. In general, if you have
+#
+#    COMPONENTS=foo bar
+#
+# ... then code in directories named COMPONENT_foo and COMPONENT_bar will be
+# added to the build
+#
+COMPONENTS=
+
+# Like COMPONENTS, but disable optional code that was enabled by default.
+DISABLE_COMPONENTS=
+
+# By default the build system automatically looks in the Makefile's directory
+# tree for source code and builds it. The SOURCES variable can be used to
+# manually add source code to the build process from a location not searched
+# by default, or otherwise not found by the build system.
+SOURCES=$(wildcard $(RTT_ROOT_DIR)/libcpu/arm/cortex-m4/*.c) \
+        $(wildcard $(RTT_ROOT_DIR)/libcpu/arm/common/*.c) \
+        $(wildcard $(RTT_ROOT_DIR)/src/*.c) \
+        $(wildcard $(RTT_ROOT_DIR)/components/drivers/src/*.c) \
+        $(wildcard $(RTT_ROOT_DIR)/components/drivers/serial/*.c) \
+        $(wildcard $(RTT_ROOT_DIR)/components/finsh/*.c)
+ifeq ($(TOOLCHAIN),GCC_ARM)
+ SOURCES+=$(RTT_ROOT_DIR)/libcpu/arm/cortex-m4/context_gcc.S
+else ifeq ($(TOOLCHAIN),ARM)
+ SOURCES+=$(RTT_ROOT_DIR)/libcpu/arm/cortex-m4/context_rvds.S
+else
+ SOURCES+=$(RTT_ROOT_DIR)/libcpu/arm/cortex-m4/context_iar.S
+endif
+
+# Like SOURCES, but for include directories. Value should be paths to
+# directories (without a leading -I).
+INCLUDES=$(RTT_ROOT_DIR)/include/ \
+         $(RTT_ROOT_DIR)/components/finsh/ \
+         $(RTT_ROOT_DIR)/components/drivers/include/
+
+# Add additional defines to the build process (without a leading -D).
+DEFINES=HAVE_SIGVAL HAVE_SIGEVENT HAVE_SIGINFO RT_USING_NEWLIB
+
+# Select softfp or hardfp floating point. Default is softfp.
+VFP_SELECT=hardfp
+
+# Additional / custom C compiler flags.
+#
+# NOTE: Includes and defines should use the INCLUDES and DEFINES variable
+# above.
+CFLAGS=
+
+# Additional / custom C++ compiler flags.
+#
+# NOTE: Includes and defines should use the INCLUDES and DEFINES variable
+# above.
+CXXFLAGS=
+
+# Additional / custom assembler flags.
+#
+# NOTE: Includes and defines should use the INCLUDES and DEFINES variable
+# above.
+ASFLAGS=-mfloat-abi=hard -mfpu=fpv4-sp-d16 -Wa,-mimplicit-it=always
+
+# Additional / custom linker flags.
+LDFLAGS=
+
+# Additional / custom libraries to link in to the application.
+LDLIBS=
+
+# Path to the linker script to use (if empty, use the default linker script).
+LINKER_SCRIPT=
+
+# Custom pre-build commands to run.
+PREBUILD=
+
+# Custom post-build commands to run.
+POSTBUILD=
+
+
+################################################################################
+# Paths
+################################################################################
+
+# Relative path to the project directory (default is the Makefile's directory).
+#
+# This controls where automatic source code discovery looks for code.
+CY_APP_PATH=
+
+# Relative path to the "base" library. It provides the core makefile build
+# infrastructure.
+CY_BASELIB_PATH=libs/psoc6make
+
+# Absolute path to the compiler's "bin" directory.
+#
+# The default depends on the selected TOOLCHAIN (GCC_ARM uses the ModusToolbox
+# IDE provided compiler by default).
+CY_COMPILER_PATH=
+
+
+# Locate ModusToolbox IDE helper tools folders in default installation
+# locations for Windows, Linux, and macOS.
+CY_WIN_HOME=$(subst \,/,$(USERPROFILE))
+CY_TOOLS_PATHS ?= $(wildcard \
+    $(CY_WIN_HOME)/ModusToolbox/tools_* \
+    $(HOME)/ModusToolbox/tools_* \
+    /Applications/ModusToolbox/tools_*)
+
+# If you install ModusToolbox IDE in a custom location, add the path to its
+# "tools_X.Y" folder (where X and Y are the version number of the tools
+# folder).
+CY_TOOLS_PATHS+=
+
+# Default to the newest installed tools folder, or the users override (if it's
+# found).
+CY_TOOLS_DIR=$(lastword $(sort $(wildcard $(CY_TOOLS_PATHS))))
+
+ifeq ($(CY_TOOLS_DIR),)
+$(error Unable to find any of the available CY_TOOLS_PATHS -- $(CY_TOOLS_PATHS))
+endif
+
+$(info Tools Directory: $(CY_TOOLS_DIR))
+
+include $(CY_TOOLS_DIR)/make/start.mk

bsp/cypress/psoc6-pioneerkit_modus/README.md

@@ -0,0 +1,98 @@
+# Cypress CY8CKIT-062-BLE PSoC 6 BLE Pioneer Kit 说明
+
+## 简介
+
+本文档为Cypress为PSoC6 BLE Pioneer Kit开发板提供的 BSP (板级支持包) 说明。
+
+主要内容如下：
+
+- 开发板资源介绍
+- BSP 快速上手
+- 进阶使用方法
+
+通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。
+
+## 开发板介绍
+
+CY8CKIT-062-BLE PSoC6 BLE Pioneer Kit 是赛普拉斯推出的一款32位双核CPU子系统（ ARM Cortex-M4 和 ARM Cortex-M0）的开发板，具有单周期乘法的150-MHz Arm Cortex-M4F CPU (浮点和
+存储器保护单元)，100-MHz Cortex M0+ CPU，带单周期乘法和MPU，可以充分发挥 PSoC6 双核芯片性能。
+
+开发板外观详细信息：https://www.cypress.com/file/390496/download
+
+
+该开发板常用 **板载资源** 如下：
+
+- MCU：CY8C6347BZI-BLD53，Cortex-M4主频 150MHz，Cortex-M0主频 100MHz，1 MB 应用闪存，32 KB EEPROM 区域和32 KB 安全闪存 ，288 KB 集成SRAM
+	    MCU手册更多详细信息请参考文档 https://www.cypress.com/file/457541/download
+		
+- 开发环境：ModusToolbox 2.0
+		PSoC® Creator™ 下载链接 https://www.cypress.com/products/modustoolbox-software-environment
+		
+- 开发板：CY8CKIT-062-BLE PSoC 6 BLE Pioneer Kit
+		开发板更多详细信息请参考文档 https://www.cypress.com/file/390496/download
+		
+
+## 外设支持
+
+本 BSP 目前对外设的支持情况详细信息请参考文档 https://www.cypress.com/file/390496/download
+
+## 使用说明
+
+使用说明分为如下两个章节：
+
+- 快速上手
+
+    本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
+
+- 进阶使用
+
+    本章节是为需要在 RT-Thread 操作系统上使用赛普拉斯开发板资源的开发者准备的。
+
+
+### 快速上手
+
+本 BSP 以 ModusToolbox 2.0开发环境（GCC），介绍如何将系统运行起来。
+
+#### 硬件连接
+
+使用Type-C数据线连接开发板到 PC.
+
+#### 编译下载
+1, 安装ModusToolbox 2.0时请使用默认路径
+ 
+2, 打开ModusToolbox 2.0时workspace选择工程所在目录下（例如workspace: C:\Git\rt-thread\bsp\cypress）
+
+3, 在Project Explorer的空白处右键，点击import，General->Existing Projects into Workspace ->next，点击Browse选择
+   此BSP所在目录加载工程->Finish
+
+4, 下载lib：在左下角Quick Panel的Tools栏，点击library Manager-> BSPs下面勾选CY8CKIT-062-BLE (若已勾选可以不用再选)
+			-> Libraries里PSoC6 Base Libraries下面全部勾选core-lib,psoc6cm0p,psoc6hal,psoc6make,psoc6pdl -> 点击apply 进行下载
+
+5, 编译此工程
+
+6, 下载此工程
+
+
+工程默认配置使用 SWD方式下载程序，Type-C数据线连接开发板，编译之后直接点击下载按钮即可。
+
+#### 运行结果
+
+下载程序成功之后，系统会自动运行。打开终端工具串口小助手，复位设备后，可以看到 RT-Thread 的输出信息:
+
+注：推荐使用串口调试助手如：sscom
+
+```
+ \ | /
+- RT -     Thread Operating System
+ / | \     4.0.3 build Jan  6 2020
+ 2006 - 2019 Copyright by rt-thread team
+hello rt-thread
+msh >hello rt-thread
+hello rt-thread
+```                                  
+
+## 联系人信息
+
+维护人:
+
+- [amyqian379](https://github.com/amyqian379)

bsp/cypress/psoc6-pioneerkit_modus/applications/main.c

@@ -0,0 +1,67 @@
+/******************************************************************************
+* File Name:   main.c
+*
+* Description: This is the source code for the Empty PSoC6 Application
+*              for ModusToolbox.
+*
+* Related Document: See Readme.md
+*
+*
+*******************************************************************************
+* (c) 2019, Cypress Semiconductor Corporation. All rights reserved.
+*******************************************************************************
+* This software, including source code, documentation and related materials
+* ("Software"), is owned by Cypress Semiconductor Corporation or one of its
+* subsidiaries ("Cypress") and is protected by and subject to worldwide patent
+* protection (United States and foreign), United States copyright laws and
+* international treaty provisions. Therefore, you may use this Software only
+* as provided in the license agreement accompanying the software package from
+* which you obtained this Software ("EULA").
+*
+* If no EULA applies, Cypress hereby grants you a personal, non-exclusive,
+* non-transferable license to copy, modify, and compile the Software source
+* code solely for use in connection with Cypress's integrated circuit products.
+* Any reproduction, modification, translation, compilation, or representation
+* of this Software except as specified above is prohibited without the express
+* written permission of Cypress.
+*
+* Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO WARRANTY OF ANY KIND,
+* EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED
+* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress
+* reserves the right to make changes to the Software without notice. Cypress
+* does not assume any liability arising out of the application or use of the
+* Software or any product or circuit described in the Software. Cypress does
+* not authorize its products for use in any products where a malfunction or
+* failure of the Cypress product may reasonably be expected to result in
+* significant property damage, injury or death ("High Risk Product"). By
+* including Cypress's product in a High Risk Product, the manufacturer of such
+* system or application assumes all risk of such use and in doing so agrees to
+* indemnify Cypress against all liability.
+*******************************************************************************/
+
+#include "cy_pdl.h"
+#include "cycfg.h"
+#include "cy_device_headers.h"
+#include "cycfg_peripherals.h"
+#include <rtthread.h>
+#include "board.h"
+#include "cybsp.h"
+
+#ifdef RT_USING_FINSH
+#include <finsh.h>
+#include <shell.h>
+#endif
+
+int main(void)
+{
+
+    for(;;)
+    {
+    	rt_kprintf("hello rt-thread\n");
+    	rt_thread_mdelay(1000);
+
+
+    }
+}
+
+/* [] END OF FILE */

bsp/cypress/psoc6-pioneerkit_modus/drivers/board.c

@@ -0,0 +1,51 @@
+
+#include <stdint.h>
+#include <rthw.h>
+#include <rtthread.h>
+#include "cy_device_headers.h"
+#include "board.h"
+#include "uart.h"
+#include "cy_systick.h"
+#include "cycfg.h"
+
+#define configTOTAL_HEAP_SIZE           (24*1024)
+/* Allocate the memory for the heap. */
+ALIGN(RT_ALIGN_SIZE)
+static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+/**
+ * This is the timer interrupt service routine.
+ *
+ */
+void SysTick_Handler_CB(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+
+void rt_hw_board_init()
+{
+    /* init systick */
+	init_cycfg_all();
+
+	SystemCoreClockUpdate();
+
+    Cy_SysTick_Init(CY_SYSTICK_CLOCK_SOURCE_CLK_CPU, SystemCoreClock/RT_TICK_PER_SECOND);
+    Cy_SysTick_SetCallback(0, SysTick_Handler_CB);
+    Cy_SysTick_EnableInterrupt();
+    
+    rt_system_heap_init((void*)ucHeap, (void*)(ucHeap+configTOTAL_HEAP_SIZE));
+    /* initialize UART device */
+    rt_hw_uart_init();
+
+#ifdef RT_USING_CONSOLE
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+}
+
+/*@}*/

bsp/cypress/psoc6-pioneerkit_modus/drivers/board.h

@@ -0,0 +1,21 @@
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#ifdef __CC_ARM
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="HEAP"
+#define HEAP_BEGIN    (__segment_end("HEAP"))
+#else
+extern unsigned int __end__;
+extern unsigned int __HeapLimit;
+#define HEAP_BEGIN    (void*)&__end__
+#define HEAP_END      (void*)&__HeapLimit
+#endif
+
+void rt_hw_board_init(void);
+
+#endif
+

bsp/cypress/psoc6-pioneerkit_modus/drivers/uart.c

@@ -0,0 +1,350 @@
+#include <rtthread.h>
+#include "uart.h"
+#include "cycfg_peripherals.h"
+/**
+ * @addtogroup
+ */
+/*@{*/
+
+/* RT-Thread Device Interface */
+/**
+ * This function initializes uart
+ */
+static rt_err_t rt_uart_init (rt_device_t dev)
+{
+    struct uart_device* uart = (struct uart_device*) dev->user_data;
+
+    if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
+    {
+        if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+        {
+            rt_memset(uart->int_rx->rx_buffer, 0,
+                      sizeof(uart->int_rx->rx_buffer));
+            uart->int_rx->read_index = uart->int_rx->save_index = 0;
+        }
+        
+        if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+        {
+            rt_memset(uart->int_tx->tx_buffer, 0,
+                      sizeof(uart->int_tx->tx_buffer));
+            uart->int_tx->write_index = uart->int_tx->save_index = 0;
+        }
+
+        dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
+    }
+
+    return RT_EOK;
+}
+
+/* save a char to uart buffer */
+static void rt_uart_savechar(struct uart_device* uart, char ch)
+{
+    rt_base_t level;
+
+    /* disable interrupt */
+    level = rt_hw_interrupt_disable();
+
+    uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
+    uart->int_rx->save_index ++;
+    if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
+        uart->int_rx->save_index = 0;
+
+    /* if the next position is read index, discard this 'read char' */
+    if (uart->int_rx->save_index == uart->int_rx->read_index)
+    {
+        uart->int_rx->read_index ++;
+        if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+            uart->int_rx->read_index = 0;
+    }
+
+    /* enable interrupt */
+    rt_hw_interrupt_enable(level);
+}
+
+static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
+{
+    struct uart_device* uart;
+    oflag = oflag;
+
+    RT_ASSERT(dev != RT_NULL);
+    uart = (struct uart_device*) dev->user_data;
+
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        /* enable interrupt */
+        UART_ENABLE_IRQ(uart->rx_irq);
+    }
+
+    return RT_EOK;
+}
+
+static rt_err_t rt_uart_close(rt_device_t dev)
+{
+    struct uart_device* uart;
+
+    RT_ASSERT(dev != RT_NULL);
+    uart = (struct uart_device*) dev->user_data;
+
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        /* disable interrupt */
+        UART_DISABLE_IRQ(uart->rx_irq);
+    }
+
+    return RT_EOK;
+}
+
+static rt_size_t rt_uart_read (rt_device_t dev, rt_off_t pos, void* buffer,
+                                 rt_size_t size)
+{
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct uart_device* uart;
+    pos = pos;
+
+    ptr = buffer;
+    err_code = RT_EOK;
+    uart = (struct uart_device*)dev->user_data;
+
+    if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+    {
+        rt_base_t level;
+
+        /* interrupt mode Rx */
+        while (size)
+        {
+            if (uart->int_rx->read_index != uart->int_rx->save_index)
+            {
+                *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
+                size --;
+
+                /* disable interrupt */
+                level = rt_hw_interrupt_disable();
+
+                uart->int_rx->read_index ++;
+                if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+                    uart->int_rx->read_index = 0;
+
+                /* enable interrupt */
+                rt_hw_interrupt_enable(level);
+            }
+            else
+            {
+                /* set error code */
+                err_code = -RT_EEMPTY;
+                break;
+            }
+        }
+    }
+    else
+    {
+        /* polling mode */
+        while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
+        {
+            while (0UL != Cy_SCB_UART_GetNumInRxFifo(uart->scb_device))
+            {
+                *ptr = Cy_SCB_UART_Get(uart->scb_device);
+                ptr ++;
+            }
+        }
+    }
+
+    /* set error code */
+    rt_set_errno(err_code);
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+}
+
+static rt_size_t rt_uart_write (rt_device_t dev, rt_off_t pos,
+                                const void* buffer, rt_size_t size)
+{
+    rt_uint8_t* ptr;
+    rt_err_t err_code;
+    struct uart_device* uart;
+    pos = pos;
+
+    err_code = RT_EOK;
+    ptr = (rt_uint8_t*)buffer;
+    uart = (struct uart_device*)dev->user_data;
+
+    if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+    {
+        /* interrupt mode Tx */
+        while (uart->int_tx->save_index != uart->int_tx->write_index)
+        {
+            /* save on tx buffer */
+            uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
+
+            -- size;
+
+            /* move to next position */
+            uart->int_tx->save_index ++;
+
+            /* wrap save index */
+            if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
+                uart->int_tx->save_index = 0;
+        }
+
+        /* set error code */
+        if (size > 0)
+            err_code = -RT_EFULL;
+    }
+    else
+    {
+        /* polling mode */
+        while (size)
+        {
+            /*
+             * to be polite with serial console add a line feed
+             * to the carriage return character
+             */
+            if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM))
+            {
+                while(0 == Cy_SCB_UART_Put(uart->scb_device, '\r'));
+            }
+            while(0 == Cy_SCB_UART_Put(uart->scb_device, (*ptr & 0x1FF)));
+
+            ++ptr;
+            --size;
+        }
+    }
+
+    /* set error code */
+    rt_set_errno(err_code);
+
+    return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+}
+
+static rt_err_t rt_uart_control (rt_device_t dev, int cmd, void *args)
+{
+    RT_ASSERT(dev != RT_NULL);
+    args = args;
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_SUSPEND:
+        /* suspend device */
+        dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+        break;
+
+    case RT_DEVICE_CTRL_RESUME:
+        /* resume device */
+        dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+        break;
+    }
+
+    return RT_EOK;
+}
+
+/*
+ * serial register
+ */
+rt_err_t rt_hw_uart_register(rt_device_t device, const char* name,
+                             rt_uint32_t flag, struct uart_device *serial)
+{
+    RT_ASSERT(device != RT_NULL);
+
+    device->type 		= RT_Device_Class_Char;
+    device->rx_indicate = RT_NULL;
+    device->tx_complete = RT_NULL;
+    device->init 		= rt_uart_init;
+    device->open		= rt_uart_open;
+    device->close		= rt_uart_close;
+    device->read 		= rt_uart_read;
+    device->write 		= rt_uart_write;
+    device->control 	= rt_uart_control;
+    device->user_data	= serial;
+
+    /* register a character device */
+    return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+}
+
+/* ISR for uart interrupt */
+void rt_hw_uart_isr(rt_device_t device)
+{
+    struct uart_device* uart = (struct uart_device*) device->user_data;
+
+    /* interrupt mode receive */
+    RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
+
+    /* Check for "RX fifo not empty interrupt" */
+    if((uart->scb_device->INTR_RX_MASKED & SCB_INTR_RX_MASKED_NOT_EMPTY_Msk ) != 0)
+    {
+        /* Clear UART "RX fifo not empty interrupt" */
+        uart->scb_device->INTR_RX = uart->scb_device->INTR_RX & SCB_INTR_RX_NOT_EMPTY_Msk;
+        /* Get the character from terminal */
+        rt_uart_savechar(uart, Cy_SCB_UART_Get(uart->scb_device));
+    }
+
+    /* invoke callback */
+    if (device->rx_indicate != RT_NULL)
+    {
+        rt_size_t rx_length;
+
+        /* get rx length */
+        rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
+                    UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
+                    uart->int_rx->save_index - uart->int_rx->read_index;
+
+        device->rx_indicate(device, rx_length);
+    }
+}
+
+#ifdef RT_USING_UART0
+/* UART0 device driver structure */
+#define UART0_SCB_IRQ__INTC_NUMBER 46u
+cy_stc_scb_uart_context_t UART0_context;
+const cy_stc_sysint_t UART0_SCB_IRQ_cfg =
+{
+    .intrSrc = scb_5_interrupt_IRQn,
+    .intrPriority = 3u,
+};
+
+/* UART0 device driver structure */
+struct uart_int_rx uart0_int_rx;
+struct uart_device uart0 =
+{
+    UART0_HW,
+    &UART0_config,
+    &UART0_context,
+    &UART0_SCB_IRQ_cfg,
+    (IRQn_Type)UART0_SCB_IRQ__INTC_NUMBER,
+    (IRQn_Type)UART0_SCB_IRQ__INTC_NUMBER,
+    &uart0_int_rx,
+    RT_NULL
+};
+struct rt_device uart0_device;
+/* UART0 Interrupt Hanlder */
+void uart0_isr_callback(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+    rt_hw_uart_isr(&uart0_device);
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+
+void rt_hw_uart_init(void)
+{
+    /* Start UART operation. */
+    if(Cy_SCB_UART_Init(uart0.scb_device, uart0.uart_config, uart0.uart_context) != CY_SCB_UART_SUCCESS)
+    {
+        rt_assert_handler("UART0 init", __FUNCTION__, __LINE__);
+    }
+    Cy_SCB_UART_Enable(uart0.scb_device);
+    /* Unmasking only the RX fifo not empty interrupt bit */
+    uart0.scb_device->INTR_RX_MASK = SCB_INTR_RX_MASK_NOT_EMPTY_Msk;
+    /* Interrupt Settings for UART */
+    Cy_SysInt_Init(uart0.uart_int, uart0_isr_callback);
+    /* Enable the interrupt */
+    NVIC_EnableIRQ(uart0.uart_int->intrSrc);
+    /* register UART0 device */
+    rt_hw_uart_register(&uart0_device,
+                          "uart0",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+                          &uart0);
+
+}
+
+/*@}*/

bsp/cypress/psoc6-pioneerkit_modus/drivers/uart.h

@@ -0,0 +1,50 @@
+
+#ifndef __UART_H__
+#define __UART_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+#include "cy_device_headers.h"
+#include "board.h"
+#include "cy_pdl.h"
+
+#define UART_RX_BUFFER_SIZE         128u
+#define UART_TX_BUFFER_SIZE         128u
+
+#define UART_ENABLE_IRQ(n)          NVIC_EnableIRQ((n))
+#define UART_DISABLE_IRQ(n)         NVIC_DisableIRQ((n))
+
+struct uart_int_rx
+{
+    rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
+    rt_uint32_t read_index, save_index;
+};
+
+struct uart_int_tx
+{
+    rt_uint8_t  tx_buffer[UART_TX_BUFFER_SIZE];
+    rt_uint32_t write_index, save_index;
+};
+
+struct uart_device
+{
+    CySCB_Type* scb_device;
+    /* uart config */
+    cy_stc_scb_uart_config_t const *uart_config;
+    /* uart context */
+    cy_stc_scb_uart_context_t *uart_context;
+    /* uart interrupt */
+    const cy_stc_sysint_t *uart_int;
+    /* irq number */
+    IRQn_Type rx_irq;
+    IRQn_Type tx_irq;
+
+    /* rx structure */
+    struct uart_int_rx* int_rx;
+    /* tx structure */
+    struct uart_int_tx* int_tx;
+};
+
+void rt_hw_uart_init(void);
+
+#endif

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE.lib

@@ -0,0 +1 @@
+https://github.com/cypresssemiconductorco/TARGET_CY8CKIT-062-BLE/#latest-v1.X

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/COMPONENT_BSP_DESIGN_MODUS/cyreservedresources.list

@@ -0,0 +1,4 @@
+[Device=CY8C6347BZI-BLD53]
+ 
+[Blocks]
+# Nothing needs to be reserved for this device

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/COMPONENT_BSP_DESIGN_MODUS/design.cycapsense

@@ -0,0 +1,409 @@
+<?xml version="1.0"?>
+<Configuration major="2" minor="0">
+    <!--
+       File Name: cycfg_capsense.cycapsense 
+
+       Description: 
+       CapSense middleware configuration 
+       This file should not be modified. It was automatically generated by 
+       CapSense Configurator 2.0.0 build 351 
+-->
+    <GeneralProperties>
+        <Property id="REGULAR_RC_IIR_FILTER_EN" value="false"/>
+        <Property id="REGULAR_IIR_RC_N" value="128"/>
+        <Property id="REGULAR_RC_MEDIAN_FILTER_EN" value="false"/>
+        <Property id="REGULAR_RC_AVERAGE_FILTER_EN" value="false"/>
+        <Property id="REGULAR_RC_AVERAGE_SAMPLE_SIZE" value="SAMPLE_4"/>
+        <Property id="PROX_RC_IIR_FILTER_EN" value="false"/>
+        <Property id="PROX_IIR_RC_N" value="128"/>
+        <Property id="PROX_RC_MEDIAN_FILTER_EN" value="false"/>
+        <Property id="PROX_RC_AVERAGE_FILTER_EN" value="false"/>
+        <Property id="PROX_RC_AVERAGE_SAMPLE_SIZE" value="SAMPLE_4"/>
+        <Property id="REGULAR_IIR_BL_N" value="1"/>
+        <Property id="REGULAR_IIR_BL_TYPE" value="PERFORMANCE"/>
+        <Property id="PROX_IIR_BL_N" value="1"/>
+        <Property id="PROX_IIR_BL_TYPE" value="PERFORMANCE"/>
+        <Property id="MULTI_FREQ_SCAN_EN" value="false"/>
+        <Property id="SENSOR_AUTO_RESET_EN" value="false"/>
+        <Property id="SLIDER_MULTIPLIER" value="SNS_NUM_MINUS_1"/>
+        <Property id="TOUCHPAD_MULTIPLIER" value="SNS_NUM_MINUS_1"/>
+        <Property id="BLOCK_ANALOG_WAKEUP_DELAY_US" value="25"/>
+        <Property id="VREF_SOURCE" value="SRSS"/>
+        <Property id="IREF_SOURCE" value="SRSS"/>
+        <Property id="PROX_TOUCH_COEFF" value="300"/>
+        <Property id="NUM_CENTROIDS" value="1"/>
+    </GeneralProperties>
+    <CsdProperties>
+        <Property id="CSD_AUTOTUNE" value="HWTH"/>
+        <Property id="CSD_MOD_CLK_DIVIDER" value="2"/>
+        <Property id="CSD_INACTIVE_SNS_CONNECTION" value="GROUND"/>
+        <Property id="CSD_CHARGE_TRANSFER" value="SOURCING"/>
+        <Property id="CSD_IDAC_ROW_COL_ALIGN_EN" value="true"/>
+        <Property id="CSD_IDAC_AUTOCAL_EN" value="true"/>
+        <Property id="CSD_IDAC_AUTOGAIN_EN" value="true"/>
+        <Property id="CSD_IDAC_GAIN_INIT_INDEX" value="GAIN_2400"/>
+        <Property id="CSD_IDAC_MIN" value="20"/>
+        <Property id="CSD_IDAC_COMP_EN" value="true"/>
+        <Property id="CSD_RAWCOUNT_CAL_LEVEL" value="85"/>
+        <Property id="CSD_VREF_CUSTOM" value="false"/>
+        <Property id="CSD_VREF" value="1219"/>
+        <Property id="CSD_SHIELD_EN" value="false"/>
+        <Property id="CSD_SHIELD_TANK_EN" value="false"/>
+        <Property id="CSD_SHIELD_DELAY" value="DELAY_0NS"/>
+        <Property id="CSD_TOTAL_SHIELD_COUNT" value="1"/>
+        <Property id="CSD_INIT_SWITCH_RES" value="MEDIUM"/>
+        <Property id="CSD_SHIELD_SWITCH_RES" value="MEDIUM"/>
+        <Property id="CSD_FINE_INIT_TIME" value="10"/>
+        <Property id="CSD_CALIBRATION_ERROR" value="10"/>
+        <Property id="CSD_R_CONST" value="1000"/>
+        <Property id="CSD_MFS_DIVIDER_OFFSET_F1" value="1"/>
+        <Property id="CSD_MFS_DIVIDER_OFFSET_F2" value="2"/>
+    </CsdProperties>
+    <CsxProperties>
+        <Property id="CSX_MOD_CLK_DIVIDER" value="2"/>
+        <Property id="CSX_MAX_FINGERS" value="3"/>
+        <Property id="CSX_IDAC_GAIN_INIT_INDEX" value="GAIN_300"/>
+        <Property id="CSX_IDAC_AUTOCAL_EN" value="true"/>
+        <Property id="CSX_RAWCOUNT_CAL_LEVEL" value="40"/>
+        <Property id="CSX_INIT_SWITCH_RES" value="MEDIUM"/>
+        <Property id="CSX_SCAN_SWITCH_RES" value="LOW"/>
+        <Property id="CSX_INIT_SHIELD_SWITCH_RES" value="MEDIUM"/>
+        <Property id="CSX_SCAN_SHIELD_SWITCH_RES" value="LOW"/>
+        <Property id="CSX_FINE_INIT_TIME" value="10"/>
+        <Property id="CSX_CALIBRATION_ERROR" value="20"/>
+        <Property id="CSX_MFS_DIVIDER_OFFSET_F1" value="1"/>
+        <Property id="CSX_MFS_DIVIDER_OFFSET_F2" value="2"/>
+    </CsxProperties>
+    <Widgets>
+        <Widget id="Button0" type="CSX_BUTTON">
+            <WidgetProperties>
+                <Property id="DIPLEXING" value="false"/>
+                <Property id="MAX_POS_X" value="300"/>
+                <Property id="MAX_POS_Y" value="300"/>
+                <Property id="FINGER_CP" value="0.16"/>
+                <Property id="SNS_CLK" value="16"/>
+                <Property id="ROW_SNS_CLK" value="16"/>
+                <Property id="SNS_CLK_SOURCE" value="AUTO"/>
+                <Property id="TX_CLK" value="32"/>
+                <Property id="TX_CLK_SOURCE" value="AUTO"/>
+                <Property id="RESOLUTION" value="RES12BIT"/>
+                <Property id="NUM_CONV" value="100"/>
+                <Property id="IDAC_MOD0" value="32"/>
+                <Property id="IDAC_MOD1" value="32"/>
+                <Property id="IDAC_MOD2" value="32"/>
+                <Property id="ROW_IDAC_MOD0" value="32"/>
+                <Property id="ROW_IDAC_MOD1" value="32"/>
+                <Property id="ROW_IDAC_MOD2" value="32"/>
+                <Property id="IDAC_GAIN_INDEX" value="GAIN_300"/>
+                <Property id="FINGER_TH" value="100"/>
+                <Property id="PROX_TOUCH_TH" value="200"/>
+                <Property id="NOISE_TH" value="40"/>
+                <Property id="NNOISE_TH" value="40"/>
+                <Property id="LOW_BSLN_RST" value="30"/>
+                <Property id="HYSTERESIS" value="10"/>
+                <Property id="ON_DEBOUNCE" value="3"/>
+                <Property id="VELOCITY" value="45000"/>
+                <Property id="IIR_FILTER" value="false"/>
+                <Property id="IIR_FILTER_COEFF" value="128"/>
+                <Property id="MEDIAN_FILTER" value="false"/>
+                <Property id="AVG_FILTER" value="false"/>
+                <Property id="JITTER_FILTER" value="false"/>
+                <Property id="AIIR_FILTER" value="false"/>
+                <Property id="AIIR_NO_MOV_TH" value="3"/>
+                <Property id="AIIR_LITTLE_MOV_TH" value="7"/>
+                <Property id="AIIR_LARGE_MOV_TH" value="12"/>
+                <Property id="AIIR_MAXK" value="60"/>
+                <Property id="AIIR_MINK" value="1"/>
+                <Property id="AIIR_DIV_VAL" value="64"/>
+                <Property id="CENTROID_TYPE" value="CSD3X3"/>
+                <Property id="CROSS_COUPLING_POS_TH" value="5"/>
+                <Property id="EDGE_CORRECTION" value="true"/>
+                <Property id="EDGE_VIRTUAL_SENSOR_TH" value="100"/>
+                <Property id="EDGE_PENULTIMATE_TH" value="100"/>
+                <Property id="TWO_FINGER_DETECTION" value="false"/>
+                <Property id="ACCEL_COEFF" value="9"/>
+                <Property id="SPEED_COEFF" value="2"/>
+                <Property id="DIVISOR" value="4"/>
+                <Property id="SPEED_TH_X" value="3"/>
+                <Property id="SPEED_TH_Y" value="4"/>
+                <Property id="BALLISTIC_MULT" value="false"/>
+                <Property id="GESTURE_ENABLE" value="false"/>
+                <Property id="GESTURE_1F_SINGLE_CLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_DOUBLE_CLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_CLICK_DRAG_ENABLE" value="true"/>
+                <Property id="GESTURE_2F_SINGLE_CLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_SCROLL_ENABLE" value="true"/>
+                <Property id="GESTURE_2F_SCROLL_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_EDGE_SWIPE_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_FLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_ROTATE_ENABLE" value="true"/>
+                <Property id="GESTURE_2F_ZOOM_ENABLE" value="true"/>
+                <Property id="GESTURE_FILTERING_ENABLE" value="false"/>
+                <Property id="CLICK_TIMEOUT_MAX" value="1000"/>
+                <Property id="CLICK_TIMEOUT_MIN" value="0"/>
+                <Property id="CLICK_DISTANCE_MAX" value="100"/>
+                <Property id="SECOND_CLICK_INTERVAL_MAX" value="1000"/>
+                <Property id="SECOND_CLICK_INTERVAL_MIN" value="0"/>
+                <Property id="SECOND_CLICK_DISTANCE_MAX" value="100"/>
+                <Property id="SCROLL_DEBOUNCE" value="3"/>
+                <Property id="SCROLL_DISTANCE_MIN" value="20"/>
+                <Property id="ROTATE_DEBOUNCE" value="10"/>
+                <Property id="ROTATE_DISTANCE_MIN" value="50"/>
+                <Property id="ZOOM_DEBOUNCE" value="3"/>
+                <Property id="ZOOM_DISTANCE_MIN" value="50"/>
+                <Property id="FLICK_TIMEOUT_MAX" value="300"/>
+                <Property id="FLICK_DISTANCE_MIN" value="100"/>
+                <Property id="EDGE_EDGE_SIZE" value="200"/>
+                <Property id="EDGE_DISTANCE_MIN" value="200"/>
+                <Property id="EDGE_TIMEOUT_MAX" value="2000"/>
+                <Property id="EDGE_ANGLE_MAX" value="45"/>
+            </WidgetProperties>
+            <Electrodes>
+                <Electrode id="Rx0" kind="Column">
+                    <ElectrodeProperties>
+                        <Property id="IDAC0" value="32"/>
+                        <Property id="IDAC1" value="32"/>
+                        <Property id="IDAC2" value="32"/>
+                        <Property id="PINS" value="Dedicated pin"/>
+                    </ElectrodeProperties>
+                </Electrode>
+                <Electrode id="Tx" kind="Row">
+                    <ElectrodeProperties>
+                        <Property id="IDAC0" value="32"/>
+                        <Property id="IDAC1" value="32"/>
+                        <Property id="IDAC2" value="32"/>
+                        <Property id="PINS" value="Dedicated pin"/>
+                    </ElectrodeProperties>
+                </Electrode>
+            </Electrodes>
+        </Widget>
+        <Widget id="Button1" type="CSX_BUTTON">
+            <WidgetProperties>
+                <Property id="DIPLEXING" value="false"/>
+                <Property id="MAX_POS_X" value="300"/>
+                <Property id="MAX_POS_Y" value="300"/>
+                <Property id="FINGER_CP" value="0.16"/>
+                <Property id="SNS_CLK" value="16"/>
+                <Property id="ROW_SNS_CLK" value="16"/>
+                <Property id="SNS_CLK_SOURCE" value="AUTO"/>
+                <Property id="TX_CLK" value="32"/>
+                <Property id="TX_CLK_SOURCE" value="AUTO"/>
+                <Property id="RESOLUTION" value="RES12BIT"/>
+                <Property id="NUM_CONV" value="100"/>
+                <Property id="IDAC_MOD0" value="32"/>
+                <Property id="IDAC_MOD1" value="32"/>
+                <Property id="IDAC_MOD2" value="32"/>
+                <Property id="ROW_IDAC_MOD0" value="32"/>
+                <Property id="ROW_IDAC_MOD1" value="32"/>
+                <Property id="ROW_IDAC_MOD2" value="32"/>
+                <Property id="IDAC_GAIN_INDEX" value="GAIN_300"/>
+                <Property id="FINGER_TH" value="100"/>
+                <Property id="PROX_TOUCH_TH" value="200"/>
+                <Property id="NOISE_TH" value="40"/>
+                <Property id="NNOISE_TH" value="40"/>
+                <Property id="LOW_BSLN_RST" value="30"/>
+                <Property id="HYSTERESIS" value="10"/>
+                <Property id="ON_DEBOUNCE" value="3"/>
+                <Property id="VELOCITY" value="45000"/>
+                <Property id="IIR_FILTER" value="false"/>
+                <Property id="IIR_FILTER_COEFF" value="128"/>
+                <Property id="MEDIAN_FILTER" value="false"/>
+                <Property id="AVG_FILTER" value="false"/>
+                <Property id="JITTER_FILTER" value="false"/>
+                <Property id="AIIR_FILTER" value="false"/>
+                <Property id="AIIR_NO_MOV_TH" value="3"/>
+                <Property id="AIIR_LITTLE_MOV_TH" value="7"/>
+                <Property id="AIIR_LARGE_MOV_TH" value="12"/>
+                <Property id="AIIR_MAXK" value="60"/>
+                <Property id="AIIR_MINK" value="1"/>
+                <Property id="AIIR_DIV_VAL" value="64"/>
+                <Property id="CENTROID_TYPE" value="CSD3X3"/>
+                <Property id="CROSS_COUPLING_POS_TH" value="5"/>
+                <Property id="EDGE_CORRECTION" value="true"/>
+                <Property id="EDGE_VIRTUAL_SENSOR_TH" value="100"/>
+                <Property id="EDGE_PENULTIMATE_TH" value="100"/>
+                <Property id="TWO_FINGER_DETECTION" value="false"/>
+                <Property id="ACCEL_COEFF" value="9"/>
+                <Property id="SPEED_COEFF" value="2"/>
+                <Property id="DIVISOR" value="4"/>
+                <Property id="SPEED_TH_X" value="3"/>
+                <Property id="SPEED_TH_Y" value="4"/>
+                <Property id="BALLISTIC_MULT" value="false"/>
+                <Property id="GESTURE_ENABLE" value="false"/>
+                <Property id="GESTURE_1F_SINGLE_CLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_DOUBLE_CLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_CLICK_DRAG_ENABLE" value="true"/>
+                <Property id="GESTURE_2F_SINGLE_CLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_SCROLL_ENABLE" value="true"/>
+                <Property id="GESTURE_2F_SCROLL_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_EDGE_SWIPE_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_FLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_ROTATE_ENABLE" value="true"/>
+                <Property id="GESTURE_2F_ZOOM_ENABLE" value="true"/>
+                <Property id="GESTURE_FILTERING_ENABLE" value="false"/>
+                <Property id="CLICK_TIMEOUT_MAX" value="1000"/>
+                <Property id="CLICK_TIMEOUT_MIN" value="0"/>
+                <Property id="CLICK_DISTANCE_MAX" value="100"/>
+                <Property id="SECOND_CLICK_INTERVAL_MAX" value="1000"/>
+                <Property id="SECOND_CLICK_INTERVAL_MIN" value="0"/>
+                <Property id="SECOND_CLICK_DISTANCE_MAX" value="100"/>
+                <Property id="SCROLL_DEBOUNCE" value="3"/>
+                <Property id="SCROLL_DISTANCE_MIN" value="20"/>
+                <Property id="ROTATE_DEBOUNCE" value="10"/>
+                <Property id="ROTATE_DISTANCE_MIN" value="50"/>
+                <Property id="ZOOM_DEBOUNCE" value="3"/>
+                <Property id="ZOOM_DISTANCE_MIN" value="50"/>
+                <Property id="FLICK_TIMEOUT_MAX" value="300"/>
+                <Property id="FLICK_DISTANCE_MIN" value="100"/>
+                <Property id="EDGE_EDGE_SIZE" value="200"/>
+                <Property id="EDGE_DISTANCE_MIN" value="200"/>
+                <Property id="EDGE_TIMEOUT_MAX" value="2000"/>
+                <Property id="EDGE_ANGLE_MAX" value="45"/>
+            </WidgetProperties>
+            <Electrodes>
+                <Electrode id="Rx0" kind="Column">
+                    <ElectrodeProperties>
+                        <Property id="IDAC0" value="32"/>
+                        <Property id="IDAC1" value="32"/>
+                        <Property id="IDAC2" value="32"/>
+                        <Property id="PINS" value="Dedicated pin"/>
+                    </ElectrodeProperties>
+                </Electrode>
+                <Electrode id="Tx" kind="Row">
+                    <ElectrodeProperties>
+                        <Property id="IDAC0" value="32"/>
+                        <Property id="IDAC1" value="32"/>
+                        <Property id="IDAC2" value="32"/>
+                        <Property id="PINS" value="Dedicated pin"/>
+                    </ElectrodeProperties>
+                </Electrode>
+            </Electrodes>
+        </Widget>
+        <Widget id="LinearSlider0" type="LINEAR_SLIDER">
+            <WidgetProperties>
+                <Property id="DIPLEXING" value="false"/>
+                <Property id="MAX_POS_X" value="300"/>
+                <Property id="MAX_POS_Y" value="300"/>
+                <Property id="FINGER_CP" value="0.16"/>
+                <Property id="SNS_CLK" value="16"/>
+                <Property id="ROW_SNS_CLK" value="16"/>
+                <Property id="SNS_CLK_SOURCE" value="AUTO"/>
+                <Property id="TX_CLK" value="32"/>
+                <Property id="TX_CLK_SOURCE" value="AUTO"/>
+                <Property id="RESOLUTION" value="RES12BIT"/>
+                <Property id="NUM_CONV" value="100"/>
+                <Property id="IDAC_MOD0" value="32"/>
+                <Property id="IDAC_MOD1" value="32"/>
+                <Property id="IDAC_MOD2" value="32"/>
+                <Property id="ROW_IDAC_MOD0" value="32"/>
+                <Property id="ROW_IDAC_MOD1" value="32"/>
+                <Property id="ROW_IDAC_MOD2" value="32"/>
+                <Property id="IDAC_GAIN_INDEX" value="GAIN_2400"/>
+                <Property id="FINGER_TH" value="100"/>
+                <Property id="PROX_TOUCH_TH" value="200"/>
+                <Property id="NOISE_TH" value="40"/>
+                <Property id="NNOISE_TH" value="40"/>
+                <Property id="LOW_BSLN_RST" value="30"/>
+                <Property id="HYSTERESIS" value="10"/>
+                <Property id="ON_DEBOUNCE" value="3"/>
+                <Property id="VELOCITY" value="45000"/>
+                <Property id="IIR_FILTER" value="false"/>
+                <Property id="IIR_FILTER_COEFF" value="128"/>
+                <Property id="MEDIAN_FILTER" value="false"/>
+                <Property id="AVG_FILTER" value="false"/>
+                <Property id="JITTER_FILTER" value="false"/>
+                <Property id="AIIR_FILTER" value="false"/>
+                <Property id="AIIR_NO_MOV_TH" value="3"/>
+                <Property id="AIIR_LITTLE_MOV_TH" value="7"/>
+                <Property id="AIIR_LARGE_MOV_TH" value="12"/>
+                <Property id="AIIR_MAXK" value="60"/>
+                <Property id="AIIR_MINK" value="1"/>
+                <Property id="AIIR_DIV_VAL" value="64"/>
+                <Property id="CENTROID_TYPE" value="CSD3X3"/>
+                <Property id="CROSS_COUPLING_POS_TH" value="5"/>
+                <Property id="EDGE_CORRECTION" value="true"/>
+                <Property id="EDGE_VIRTUAL_SENSOR_TH" value="100"/>
+                <Property id="EDGE_PENULTIMATE_TH" value="100"/>
+                <Property id="TWO_FINGER_DETECTION" value="false"/>
+                <Property id="ACCEL_COEFF" value="9"/>
+                <Property id="SPEED_COEFF" value="2"/>
+                <Property id="DIVISOR" value="4"/>
+                <Property id="SPEED_TH_X" value="3"/>
+                <Property id="SPEED_TH_Y" value="4"/>
+                <Property id="BALLISTIC_MULT" value="false"/>
+                <Property id="GESTURE_ENABLE" value="false"/>
+                <Property id="GESTURE_1F_SINGLE_CLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_DOUBLE_CLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_CLICK_DRAG_ENABLE" value="true"/>
+                <Property id="GESTURE_2F_SINGLE_CLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_SCROLL_ENABLE" value="true"/>
+                <Property id="GESTURE_2F_SCROLL_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_EDGE_SWIPE_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_FLICK_ENABLE" value="true"/>
+                <Property id="GESTURE_1F_ROTATE_ENABLE" value="true"/>
+                <Property id="GESTURE_2F_ZOOM_ENABLE" value="true"/>
+                <Property id="GESTURE_FILTERING_ENABLE" value="false"/>
+                <Property id="CLICK_TIMEOUT_MAX" value="1000"/>
+                <Property id="CLICK_TIMEOUT_MIN" value="0"/>
+                <Property id="CLICK_DISTANCE_MAX" value="100"/>
+                <Property id="SECOND_CLICK_INTERVAL_MAX" value="1000"/>
+                <Property id="SECOND_CLICK_INTERVAL_MIN" value="0"/>
+                <Property id="SECOND_CLICK_DISTANCE_MAX" value="100"/>
+                <Property id="SCROLL_DEBOUNCE" value="3"/>
+                <Property id="SCROLL_DISTANCE_MIN" value="20"/>
+                <Property id="ROTATE_DEBOUNCE" value="10"/>
+                <Property id="ROTATE_DISTANCE_MIN" value="50"/>
+                <Property id="ZOOM_DEBOUNCE" value="3"/>
+                <Property id="ZOOM_DISTANCE_MIN" value="50"/>
+                <Property id="FLICK_TIMEOUT_MAX" value="300"/>
+                <Property id="FLICK_DISTANCE_MIN" value="100"/>
+                <Property id="EDGE_EDGE_SIZE" value="200"/>
+                <Property id="EDGE_DISTANCE_MIN" value="200"/>
+                <Property id="EDGE_TIMEOUT_MAX" value="2000"/>
+                <Property id="EDGE_ANGLE_MAX" value="45"/>
+            </WidgetProperties>
+            <Electrodes>
+                <Electrode id="Sns0" kind="Sensor">
+                    <ElectrodeProperties>
+                        <Property id="IDAC0" value="32"/>
+                        <Property id="IDAC1" value="32"/>
+                        <Property id="IDAC2" value="32"/>
+                        <Property id="PINS" value="Dedicated pin"/>
+                    </ElectrodeProperties>
+                </Electrode>
+                <Electrode id="Sns1" kind="Sensor">
+                    <ElectrodeProperties>
+                        <Property id="IDAC0" value="32"/>
+                        <Property id="IDAC1" value="32"/>
+                        <Property id="IDAC2" value="32"/>
+                        <Property id="PINS" value="Dedicated pin"/>
+                    </ElectrodeProperties>
+                </Electrode>
+                <Electrode id="Sns2" kind="Sensor">
+                    <ElectrodeProperties>
+                        <Property id="IDAC0" value="32"/>
+                        <Property id="IDAC1" value="32"/>
+                        <Property id="IDAC2" value="32"/>
+                        <Property id="PINS" value="Dedicated pin"/>
+                    </ElectrodeProperties>
+                </Electrode>
+                <Electrode id="Sns3" kind="Sensor">
+                    <ElectrodeProperties>
+                        <Property id="IDAC0" value="32"/>
+                        <Property id="IDAC1" value="32"/>
+                        <Property id="IDAC2" value="32"/>
+                        <Property id="PINS" value="Dedicated pin"/>
+                    </ElectrodeProperties>
+                </Electrode>
+                <Electrode id="Sns4" kind="Sensor">
+                    <ElectrodeProperties>
+                        <Property id="IDAC0" value="32"/>
+                        <Property id="IDAC1" value="32"/>
+                        <Property id="IDAC2" value="32"/>
+                        <Property id="PINS" value="Dedicated pin"/>
+                    </ElectrodeProperties>
+                </Electrode>
+            </Electrodes>
+        </Widget>
+    </Widgets>
+</Configuration>

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/COMPONENT_BSP_DESIGN_MODUS/design.cyqspi

@@ -0,0 +1,63 @@
+<?xml version="1.0"?>
+<!--This file should not be modified. It was automatically generated by QSPI Configurator 2.0.0 build 1105-->
+<Configuration app="QSPI" major="2" minor="0">
+    <DevicePath>PSoC 6.xml</DevicePath>
+    <SlotConfigs>
+        <SlotConfig>
+            <SlaveSlot>0</SlaveSlot>
+            <PartNumber>S25FL512S-4byteaddr</PartNumber>
+            <MemoryMapped>true</MemoryMapped>
+            <DualQuad>None</DualQuad>
+            <StartAddress>0x18000000</StartAddress>
+            <Size>0x4000000</Size>
+            <EndAddress>0x1BFFFFFF</EndAddress>
+            <WriteEnable>true</WriteEnable>
+            <Encrypt>false</Encrypt>
+            <DataSelect>QUAD_SPI_DATA_0_3</DataSelect>
+            <MemoryConfigsPath>S25FL512S-4byteaddr</MemoryConfigsPath>
+            <ConfigDataInFlash>true</ConfigDataInFlash>
+        </SlotConfig>
+        <SlotConfig>
+            <SlaveSlot>1</SlaveSlot>
+            <PartNumber>Not used</PartNumber>
+            <MemoryMapped>false</MemoryMapped>
+            <DualQuad>None</DualQuad>
+            <StartAddress>0x18010000</StartAddress>
+            <Size>0x10000</Size>
+            <EndAddress>0x1801FFFF</EndAddress>
+            <WriteEnable>false</WriteEnable>
+            <Encrypt>false</Encrypt>
+            <DataSelect>SPI_MOSI_MISO_DATA_0_1</DataSelect>
+            <MemoryConfigsPath>default_memory.xml</MemoryConfigsPath>
+            <ConfigDataInFlash>true</ConfigDataInFlash>
+        </SlotConfig>
+        <SlotConfig>
+            <SlaveSlot>2</SlaveSlot>
+            <PartNumber>Not used</PartNumber>
+            <MemoryMapped>false</MemoryMapped>
+            <DualQuad>None</DualQuad>
+            <StartAddress>0x18020000</StartAddress>
+            <Size>0x10000</Size>
+            <EndAddress>0x1802FFFF</EndAddress>
+            <WriteEnable>false</WriteEnable>
+            <Encrypt>false</Encrypt>
+            <DataSelect>SPI_MOSI_MISO_DATA_0_1</DataSelect>
+            <MemoryConfigsPath>default_memory.xml</MemoryConfigsPath>
+            <ConfigDataInFlash>true</ConfigDataInFlash>
+        </SlotConfig>
+        <SlotConfig>
+            <SlaveSlot>3</SlaveSlot>
+            <PartNumber>Not used</PartNumber>
+            <MemoryMapped>false</MemoryMapped>
+            <DualQuad>None</DualQuad>
+            <StartAddress>0x18030000</StartAddress>
+            <Size>0x10000</Size>
+            <EndAddress>0x1803FFFF</EndAddress>
+            <WriteEnable>false</WriteEnable>
+            <Encrypt>false</Encrypt>
+            <DataSelect>SPI_MOSI_MISO_DATA_0_1</DataSelect>
+            <MemoryConfigsPath>default_memory.xml</MemoryConfigsPath>
+            <ConfigDataInFlash>true</ConfigDataInFlash>
+        </SlotConfig>
+    </SlotConfigs>
+</Configuration>

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/COMPONENT_BSP_DESIGN_MODUS/design.modus

@@ -0,0 +1,288 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Design version="12" xmlns="http://cypress.com/xsd/cydesignfile_v3">
+    <ToolInfo version="1.0.0"/>
+    <Devices>
+        <Device mpn="CY8C6347BZI-BLD53">
+            <BlockConfig>
+                <Block location="bless[0]"/>
+                <Block location="cpuss[0].dap[0]">
+                    <Personality template="mxs40dap" version="1.0">
+                        <Param id="dbgMode" value="SWD"/>
+                        <Param id="traceEnable" value="false"/>
+                    </Personality>
+                </Block>
+                <Block location="csd[0].csd[0]"/>
+                <Block location="ioss[0].port[0].pin[0]"/>
+                <Block location="ioss[0].port[0].pin[1]"/>
+                <Block location="ioss[0].port[1].pin[0]"/>
+                <Block location="ioss[0].port[5].pin[0]">
+                    <Personality template="mxs40pin" version="1.1">
+                        <Param id="DriveModes" value="CY_GPIO_DM_HIGHZ"/>
+                        <Param id="initialState" value="1"/>
+                        <Param id="vtrip" value="CY_GPIO_VTRIP_CMOS"/>
+                        <Param id="isrTrigger" value="CY_GPIO_INTR_DISABLE"/>
+                        <Param id="slewRate" value="CY_GPIO_SLEW_FAST"/>
+                        <Param id="driveStrength" value="CY_GPIO_DRIVE_1_2"/>
+                        <Param id="sioOutputBuffer" value="true"/>
+                        <Param id="inFlash" value="true"/>
+                    </Personality>
+                </Block>
+                <Block location="ioss[0].port[5].pin[1]">
+                    <Personality template="mxs40pin" version="1.1">
+                        <Param id="DriveModes" value="CY_GPIO_DM_STRONG_IN_OFF"/>
+                        <Param id="initialState" value="1"/>
+                        <Param id="vtrip" value="CY_GPIO_VTRIP_CMOS"/>
+                        <Param id="isrTrigger" value="CY_GPIO_INTR_DISABLE"/>
+                        <Param id="slewRate" value="CY_GPIO_SLEW_FAST"/>
+                        <Param id="driveStrength" value="CY_GPIO_DRIVE_1_2"/>
+                        <Param id="sioOutputBuffer" value="true"/>
+                        <Param id="inFlash" value="true"/>
+                    </Personality>
+                </Block>
+                <Block location="ioss[0].port[6].pin[4]">
+                    <Alias value="CYBSP_SWO"/>
+                    <Personality template="mxs40pin" version="1.1">
+                        <Param id="DriveModes" value="CY_GPIO_DM_STRONG_IN_OFF"/>
+                        <Param id="initialState" value="1"/>
+                        <Param id="vtrip" value="CY_GPIO_VTRIP_CMOS"/>
+                        <Param id="isrTrigger" value="CY_GPIO_INTR_DISABLE"/>
+                        <Param id="slewRate" value="CY_GPIO_SLEW_FAST"/>
+                        <Param id="driveStrength" value="CY_GPIO_DRIVE_1_2"/>
+                        <Param id="sioOutputBuffer" value="true"/>
+                        <Param id="inFlash" value="true"/>
+                    </Personality>
+                </Block>
+                <Block location="ioss[0].port[6].pin[6]">
+                    <Alias value="CYBSP_SWDIO"/>
+                    <Personality template="mxs40pin" version="1.1">
+                        <Param id="DriveModes" value="CY_GPIO_DM_PULLUP"/>
+                        <Param id="initialState" value="1"/>
+                        <Param id="vtrip" value="CY_GPIO_VTRIP_CMOS"/>
+                        <Param id="isrTrigger" value="CY_GPIO_INTR_DISABLE"/>
+                        <Param id="slewRate" value="CY_GPIO_SLEW_FAST"/>
+                        <Param id="driveStrength" value="CY_GPIO_DRIVE_1_2"/>
+                        <Param id="sioOutputBuffer" value="true"/>
+                        <Param id="inFlash" value="true"/>
+                    </Personality>
+                </Block>
+                <Block location="ioss[0].port[6].pin[7]">
+                    <Alias value="CYBSP_SWDCK"/>
+                    <Personality template="mxs40pin" version="1.1">
+                        <Param id="DriveModes" value="CY_GPIO_DM_PULLDOWN"/>
+                        <Param id="initialState" value="1"/>
+                        <Param id="vtrip" value="CY_GPIO_VTRIP_CMOS"/>
+                        <Param id="isrTrigger" value="CY_GPIO_INTR_DISABLE"/>
+                        <Param id="slewRate" value="CY_GPIO_SLEW_FAST"/>
+                        <Param id="driveStrength" value="CY_GPIO_DRIVE_1_2"/>
+                        <Param id="sioOutputBuffer" value="true"/>
+                        <Param id="inFlash" value="true"/>
+                    </Personality>
+                </Block>
+                <Block location="ioss[0].port[7].pin[1]"/>
+                <Block location="ioss[0].port[7].pin[2]"/>
+                <Block location="ioss[0].port[7].pin[7]"/>
+                <Block location="ioss[0].port[8].pin[1]"/>
+                <Block location="ioss[0].port[8].pin[2]"/>
+                <Block location="ioss[0].port[8].pin[3]"/>
+                <Block location="ioss[0].port[8].pin[4]"/>
+                <Block location="ioss[0].port[8].pin[5]"/>
+                <Block location="ioss[0].port[8].pin[6]"/>
+                <Block location="ioss[0].port[8].pin[7]"/>
+                <Block location="peri[0].div_16[0]"/>
+                <Block location="peri[0].div_8[0]">
+                    <Alias value="UART0_SCBCLK"/>
+                    <Personality template="mxs40peripheralclock" version="1.0">
+                        <Param id="intDivider" value="36"/>
+                        <Param id="fracDivider" value="0"/>
+                        <Param id="startOnReset" value="true"/>
+                    </Personality>
+                </Block>
+                <Block location="scb[5]">
+                    <Alias value="UART0"/>
+                    <Personality template="mxs40uart" version="1.0">
+                        <Param id="ComMode" value="CY_SCB_UART_STANDARD"/>
+                        <Param id="IrdaLowPower" value="false"/>
+                        <Param id="BaudRate" value="115200"/>
+                        <Param id="Oversample" value="12"/>
+                        <Param id="BitsOrder" value="CY_SCB_UART_LSB_FIRST"/>
+                        <Param id="DataWidth" value="8"/>
+                        <Param id="ParityType" value="CY_SCB_UART_PARITY_NONE"/>
+                        <Param id="StopBits" value="CY_SCB_UART_STOP_BITS_1"/>
+                        <Param id="EnableInputFilter" value="false"/>
+                        <Param id="EnableTxEn" value="false"/>
+                        <Param id="FlowControl" value="false"/>
+                        <Param id="CtsPolarity" value="CY_SCB_UART_ACTIVE_LOW"/>
+                        <Param id="RtsPolarity" value="CY_SCB_UART_ACTIVE_LOW"/>
+                        <Param id="RtsTriggerLevel" value="63"/>
+                        <Param id="RxTriggerLevel" value="63"/>
+                        <Param id="TxTriggerLevel" value="63"/>
+                        <Param id="MultiProc" value="false"/>
+                        <Param id="MpRxAddress" value="0"/>
+                        <Param id="MpRxAddressMask" value="255"/>
+                        <Param id="MpRxAcceptAddress" value="false"/>
+                        <Param id="DropOnFrameErr" value="false"/>
+                        <Param id="DropOnParityErr" value="false"/>
+                        <Param id="BreakSignalBits" value="11"/>
+                        <Param id="SmCardRetryOnNack" value="false"/>
+                        <Param id="IrdaPolarity" value="NON_INVERTING"/>
+                        <Param id="inFlash" value="true"/>
+                        <Param id="ApiMode" value="HIGH_LEVEL"/>
+                        <Param id="IntrRxNotEmpty" value="false"/>
+                        <Param id="IntrRxFull" value="false"/>
+                        <Param id="IntrRxOverflow" value="false"/>
+                        <Param id="IntrRxUnderflow" value="false"/>
+                        <Param id="IntrRxFrameErr" value="false"/>
+                        <Param id="IntrRxParityErr" value="false"/>
+                        <Param id="IntrRxBreakDetected" value="false"/>
+                        <Param id="IntrRxTrigger" value="false"/>
+                        <Param id="IntrTxUartDone" value="false"/>
+                        <Param id="IntrTxUartLostArb" value="false"/>
+                        <Param id="IntrTxUartNack" value="false"/>
+                        <Param id="IntrTxEmpty" value="false"/>
+                        <Param id="IntrTxNotFull" value="false"/>
+                        <Param id="IntrTxOverflow" value="false"/>
+                        <Param id="IntrTxUnderflow" value="false"/>
+                        <Param id="IntrTxTrigger" value="false"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0]">
+                    <Personality template="mxs40sysclocks" version="1.2"/>
+                </Block>
+                <Block location="srss[0].clock[0].altsystickclk[0]">
+                    <Personality template="mxs40altsystick" version="1.0">
+                        <Param id="sourceClock" value="lfclk"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].bakclk[0]">
+                    <Personality template="mxs40bakclk" version="1.0">
+                        <Param id="sourceClock" value="lfclk"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].fastclk[0]">
+                    <Personality template="mxs40fastclk" version="1.0">
+                        <Param id="divider" value="1"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].fll[0]">
+                    <Personality template="mxs40fll" version="1.0">
+                        <Param id="configuration" value="auto"/>
+                        <Param id="desiredFrequency" value="100.000"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].hfclk[0]">
+                    <Personality template="mxs40hfclk" version="1.1">
+                        <Param id="sourceClockNumber" value="0"/>
+                        <Param id="divider" value="1"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].ilo[0]">
+                    <Personality template="mxs40ilo" version="1.0">
+                        <Param id="hibernate" value="true"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].imo[0]">
+                    <Personality template="mxs40imo" version="1.0">
+                        <Param id="trim" value="1"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].lfclk[0]">
+                    <Personality template="mxs40lfclk" version="1.1">
+                        <Param id="sourceClock" value="ilo"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].pathmux[0]">
+                    <Personality template="mxs40pathmux" version="1.0">
+                        <Param id="sourceClock" value="imo"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].pathmux[1]">
+                    <Personality template="mxs40pathmux" version="1.0">
+                        <Param id="sourceClock" value="imo"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].pathmux[2]">
+                    <Personality template="mxs40pathmux" version="1.0">
+                        <Param id="sourceClock" value="imo"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].pathmux[3]">
+                    <Personality template="mxs40pathmux" version="1.0">
+                        <Param id="sourceClock" value="imo"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].pathmux[4]">
+                    <Personality template="mxs40pathmux" version="1.0">
+                        <Param id="sourceClock" value="imo"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].periclk[0]">
+                    <Personality template="mxs40periclk" version="1.0">
+                        <Param id="divider" value="2"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].pumpclk[0]">
+                    <Personality template="mxs40pumpclk" version="1.0">
+                        <Param id="sourceClockNumber" value="0"/>
+                        <Param id="divider" value="4"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].slowclk[0]">
+                    <Personality template="mxs40slowclk" version="1.0">
+                        <Param id="divider" value="1"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].clock[0].timerclk[0]">
+                    <Personality template="mxs40timerclk" version="1.0">
+                        <Param id="sourceClock" value="imo"/>
+                        <Param id="timerDivider" value="1"/>
+                    </Personality>
+                </Block>
+                <Block location="srss[0].power[0]">
+                    <Personality template="mxs40power" version="1.2">
+                        <Param id="pwrMode" value="LDO_1_1"/>
+                        <Param id="actPwrMode" value="LP"/>
+                        <Param id="coreRegulator" value="CY_SYSPM_LDO_MODE_NORMAL"/>
+                        <Param id="pmicEnable" value="false"/>
+                        <Param id="backupSrc" value="VDDD"/>
+                        <Param id="idlePwrMode" value="CY_CFG_PWR_MODE_DEEPSLEEP"/>
+                        <Param id="deepsleepLatency" value="0"/>
+                        <Param id="vddaMv" value="3300"/>
+                        <Param id="vdddMv" value="3300"/>
+                        <Param id="vBackupMv" value="3300"/>
+                        <Param id="vddNsMv" value="3300"/>
+                        <Param id="vddio0Mv" value="3300"/>
+                        <Param id="vddio1Mv" value="3300"/>
+                    </Personality>
+                </Block>
+            </BlockConfig>
+            <Netlist>
+                <Net>
+                    <Port name="cpuss[0].dap[0].swj_swclk_tclk[0]"/>
+                    <Port name="ioss[0].port[6].pin[7].digital_in[0]"/>
+                </Net>
+                <Net>
+                    <Port name="cpuss[0].dap[0].swj_swdio_tms[0]"/>
+                    <Port name="ioss[0].port[6].pin[6].digital_inout[0]"/>
+                </Net>
+                <Net>
+                    <Port name="cpuss[0].dap[0].swj_swo_tdo[0]"/>
+                    <Port name="ioss[0].port[6].pin[4].digital_out[0]"/>
+                </Net>
+                <Net>
+                    <Port name="ioss[0].port[5].pin[0].digital_inout[0]"/>
+                    <Port name="scb[5].uart_rx[0]"/>
+                </Net>
+                <Net>
+                    <Port name="ioss[0].port[5].pin[1].digital_inout[0]"/>
+                    <Port name="scb[5].uart_tx[0]"/>
+                </Net>
+                <Net>
+                    <Port name="peri[0].div_8[0].clk[0]"/>
+                    <Port name="scb[5].clock[0]"/>
+                </Net>
+            </Netlist>
+        </Device>
+    </Devices>
+    <Libraries/>
+    <ConfiguratorData/>
+</Design>

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/CY8CKIT-062-BLE.mk

@@ -0,0 +1,37 @@
+################################################################################
+# \file CY8CKIT-062-BLE.mk
+# \version 1.0
+#
+# \brief
+# Define the CY8CKIT-062-BLE target.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+# MCU device selection
+DEVICE:=CY8C6347BZI-BLD53
+
+# Additional components supported by the target
+COMPONENTS+=CM0P_SLEEP BSP_DESIGN_MODUS
+
+# Use CyHAL
+DEFINES+=CY_USING_HAL

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/EULA

@@ -0,0 +1,55 @@
+CYPRESS END USER LICENSE AGREEMENT
+
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bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/LICENSE

@@ -0,0 +1,165 @@
+Apache License
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bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/README.md

@@ -0,0 +1,57 @@
+# CY8CKIT-062-BLE BSP
+
+## Overview
+
+The PSoC 6 BLE Pioneer Kit is a low-cost hardware platform that enables design and debug of the PSoC 63 Line (CY8C6347BZI-BLD53).
+![](docs/html/board.png)
+
+To use code from the BSP, simply include a reference to `cybsp.h`.
+
+## Features
+
+### Kit Features:
+
+* BLE v5.0
+* Serial memory interface
+* PDM-PCM digital microphone interface
+* Industry-leading CapSense
+
+### Kit Contents:
+
+* CY8CKIT-062-BLE evaluation board
+* E-Ink display shield with an ultra-low-power 2.7" E-ink display, thermistor, 6-axis motion sensor, and digital microphone
+* USB cable
+
+## BSP Configuration
+
+### Clock Configuration
+
+| Clock    | Source    | Output Frequency |
+|----------|-----------|------------------|
+| CLK_HF0  | CLK_PATH0 | 100 MHz          |
+| CLK_HF1  | CLK_PATH1 | 48 MHz           |
+| CLK_HF2  | CLK_PATH0 | 50 MHz           |
+| CLK_HF3  | CLK_PATH1 | 48 MHz           |
+
+### Power Configuration
+
+* System Active Power Mode: LP
+* System Idle Power Mode: Deep Sleep
+* VDDA Voltage: 3300 mV
+* VDDD Voltage: 3300 mV
+
+## API Reference Manual
+
+The CY8CKIT-062-BLE Board Support Package provides a set of APIs to configure, initialize and use the board resources.
+
+See the [BSP API Reference Manual][api] for the complete list of the provided interfaces.
+
+## More information
+* [CY8CKIT-062-BLE BSP API Reference Manual][api]
+* [CY8CKIT-062-BLE Documentation](http://www.cypress.com/documentation/development-kitsboards/psoc-6-ble-pioneer-kit)
+* [Cypress Semiconductor](http://www.cypress.com)
+
+[api]: https://cypresssemiconductorco.github.io/TARGET_CY8CKIT-062-BLE/html/modules.html
+
+---
+© Cypress Semiconductor Corporation, 2019.

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/RELEASE.md

@@ -0,0 +1,35 @@
+### CY8CKIT-062-BLE BSP
+The PSoC 6 BLE Pioneer Kit is a low-cost hardware platform that enables design and debug of the PSoC 63 Line (CY8C6347BZI-BLD53).
+
+### What's New In This Release?
+* Added pin references for the board's J2 Header
+
+### What's Included?
+The CY8CKIT-062-BLE library includes the following:
+* BSP specific makefile to configure the build process for the board
+* cybsp.c/h files to initialize the board and any system peripherals
+* cybsp_types.h file describing basic board setup
+* Linker script & startup code for GCC, IAR, ARM toolchains
+* Configurator design files (and generated code) to setup board specific peripherals
+* .lib file references for all dependent libraries
+* API documentation
+
+### Supported Software and Tools
+This version of the CY8CKIT-062-BLE BSP was validated for compatibility with the following Software and Tools:
+
+| Software and Tools                        | Version |
+| :---                                      | :----:  |
+| ModusToolbox Software Environment         | 2.0     |
+| GCC Compiler                              | 7.4     |
+| IAR Compiler                              | 8.32    |
+| ARM Compiler                              | 6.11    |
+
+### More information
+* [CY8CKIT-062-BLE BSP API Reference Manual][api]
+* [CY8CKIT-062-BLE Documentation](http://www.cypress.com/documentation/development-kitsboards/psoc-6-ble-pioneer-kit)
+* [Cypress Semiconductor](http://www.cypress.com)
+
+[api]: modules.html
+
+---
+© Cypress Semiconductor Corporation, 2019.

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/cybsp.c

@@ -0,0 +1,124 @@
+/***************************************************************************//**
+* \file cybsp.c
+*
+* Description:
+* Provides initialization code for starting up the hardware contained on the 
+* Cypress board.
+*
+********************************************************************************
+* \copyright
+* Copyright 2018-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#include <stdlib.h>
+#include "cybsp.h"
+#if defined(CY_USING_HAL)
+#include "cyhal_hwmgr.h"
+#endif
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* The sysclk deep sleep callback is recommended to be the last callback that
+* is executed before entry into deep sleep mode and the first one upon 
+* exit the deep sleep mode.
+* Doing so minimizes the time spent on low power mode entry and exit.
+*/
+#ifndef CYBSP_SYSCLK_PM_CALLBACK_ORDER
+    #define CYBSP_SYSCLK_PM_CALLBACK_ORDER  (255u)
+#endif
+
+#if defined(CYBSP_WIFI_CAPABLE) && defined(CY_USING_HAL)
+static cyhal_sdio_t sdio_obj;
+
+cyhal_sdio_t* cybsp_get_wifi_sdio_obj(void)
+{
+    return &sdio_obj;
+}
+#endif
+
+/**
+ * Registers a power management callback that prepares the clock system
+ * for entering deep sleep mode and restore the clocks upon wakeup from deep sleep.
+ * NOTE: This is called automatically as part of \ref cybsp_init
+ */
+static cy_rslt_t cybsp_register_sysclk_pm_callback(void)
+{
+    cy_rslt_t result = CY_RSLT_SUCCESS;
+    static cy_stc_syspm_callback_params_t cybsp_sysclk_pm_callback_param = {NULL, NULL};
+    static cy_stc_syspm_callback_t cybsp_sysclk_pm_callback = {
+        .callback = &Cy_SysClk_DeepSleepCallback,
+        .type = CY_SYSPM_DEEPSLEEP,
+        .callbackParams = &cybsp_sysclk_pm_callback_param,
+        .order = CYBSP_SYSCLK_PM_CALLBACK_ORDER
+    };
+
+    if (!Cy_SysPm_RegisterCallback(&cybsp_sysclk_pm_callback))
+    {
+        result = CYBSP_RSLT_ERR_SYSCLK_PM_CALLBACK;
+    }
+    return result;
+}
+
+cy_rslt_t cybsp_init(void)
+{
+    /* Setup hardware manager to track resource usage then initialize all system (clock/power) board configuration */
+#if defined(CY_USING_HAL)
+    cy_rslt_t result = cyhal_hwmgr_init();
+#else
+    cy_rslt_t result = CY_RSLT_SUCCESS;
+#endif
+
+    init_cycfg_all();
+
+    if (CY_RSLT_SUCCESS == result)
+    {
+        result = cybsp_register_sysclk_pm_callback();
+    }
+
+#if defined(CYBSP_WIFI_CAPABLE) && defined(CY_USING_HAL)
+    /* Initialize SDIO interface. This must be done before other HAL API calls as some SDIO implementations require
+     * specific peripheral instances.
+     * NOTE: The full WiFi interface still needs to be initialized via cybsp_wifi_init_primary(). This is typically 
+     * done when starting up WiFi. 
+     */
+    if (CY_RSLT_SUCCESS == result)
+    {
+        /* Reserves: CYBSP_WIFI_SDIO, CYBSP_WIFI_SDIO_D0, CYBSP_WIFI_SDIO_D1, CYBSP_WIFI_SDIO_D2, CYBSP_WIFI_SDIO_D3
+         * CYBSP_WIFI_SDIO_CMD and CYBSP_WIFI_SDIO_CLK.
+         */
+        result = cyhal_sdio_init(
+                &sdio_obj,
+                CYBSP_WIFI_SDIO_CMD,
+                CYBSP_WIFI_SDIO_CLK,
+                CYBSP_WIFI_SDIO_D0,
+                CYBSP_WIFI_SDIO_D1,
+                CYBSP_WIFI_SDIO_D2,
+                CYBSP_WIFI_SDIO_D3);
+    }
+#endif /* defined(CYBSP_WIFI_CAPABLE) */
+
+    /* CYHAL_HWMGR_RSLT_ERR_INUSE error code could be returned if any needed for BSP resource was reserved by
+     * user previously. Please review the Device Configurator (design.modus) and the BSP reservation list
+     * (cyreservedresources.list) to make sure no resources are reserved by both.
+     */
+    return result;
+}
+
+#if defined(__cplusplus)
+}
+#endif

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/cybsp.h

@@ -0,0 +1,74 @@
+/***************************************************************************//**
+* \file cybsp.h
+*
+* \brief
+* Basic API for setting up boards containing a Cypress MCU.
+*
+********************************************************************************
+* \copyright
+* Copyright 2018-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#pragma once
+
+#include "cy_result.h"
+#include "cybsp_types.h"
+#include "cycfg.h"
+#if defined(CYBSP_WIFI_CAPABLE) && defined(CY_USING_HAL)
+#include "cyhal_sdio.h"
+#endif
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/**
+* \addtogroup group_bsp_macros Macros
+* \{
+*/
+
+/** Failed to configure sysclk power management callback */
+#define CYBSP_RSLT_ERR_SYSCLK_PM_CALLBACK  (CY_RSLT_CREATE(CY_RSLT_TYPE_ERROR, CY_RSLT_MODULE_ABSTRACTION_BSP, 0))
+
+/** \} group_bsp_macros */
+
+/**
+* \addtogroup group_bsp_functions Functions
+* \{
+*/
+
+/**
+ * \brief Initialize all hardware on the board
+ * \returns CY_RSLT_SUCCESS if the board is sucessfully initialized, if there is
+ *          a problem initializing any hardware it returns an error code specific
+ *          to the hardware module that had a problem.
+ */
+cy_rslt_t cybsp_init(void);
+
+#if defined(CYBSP_WIFI_CAPABLE) && defined(CY_USING_HAL)
+/**
+ * \brief Get the initialized sdio object used for communicating with the WiFi Chip. 
+ * \note This function should only be called after cybsp_init();
+ * \returns The initialized sdio object.
+ */
+cyhal_sdio_t* cybsp_get_wifi_sdio_obj(void);
+#endif /* defined(CYBSP_WIFI_CAPABLE) */
+
+/** \} group_bsp_functions */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/cybsp_types.h

@@ -0,0 +1,279 @@
+/***************************************************************************//**
+* \file CY8CKIT-062-BLE/cybsp_types.h
+*
+* Description:
+* Provides APIs for interacting with the hardware contained on the Cypress
+* CY8CKIT-062-BLE pioneer kit.
+*
+********************************************************************************
+* \copyright
+* Copyright 2018-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#pragma once
+
+#if defined(CY_USING_HAL)
+#include "cyhal_pin_package.h"
+#endif
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/**
+* \addtogroup group_bsp_settings BSP Settings
+* \{
+*
+* <div class="category">Peripheral Default HAL Settings:</div>
+* | Resource | Parameter | Value | Remarks |
+* | :------: | :-------: | :---: | :------ |
+* | ADC      | VREF      | 1.2 V | |
+* | ^        | Measurement type | Single Ended | |
+* | ^        | Input voltage range | 0 to 2.4 V (0 to 2*VREF) | |
+* | ^        | Output range | 0x000 to 0x7FF | |
+* | DAC      | Reference source | VDDA | |
+* | ^        | Input range | 0x000 to 0xFFF | |
+* | ^        | Output range | 0 to VDDA | |
+* | ^        | Output type | Unbuffered output | |
+* | I2C      | Role | Master | Configurable to slave mode through HAL function |
+* | ^        | Data rate | 100 kbps | Configurable through HAL function |
+* | ^        | Drive mode of SCL & SDA pins | Open Drain (drives low) | External pull-up resistors are required |
+* | LpTimer  | Uses WCO (32.768 kHz) as clock source & MCWDT as counter. 1 count = 1/32768 second or 32768 counts = 1 second. |||
+* | SPI      | Data rate | 100 kpbs | Configurable through HAL function |
+* | ^        | Slave select polarity | Active low | |
+* | UART     | Flow control | No flow control | Configurable through HAL function |
+* | ^        | Data format | 8N1 | Configurable through HAL function |
+* | ^        | Baud rate | 115200 | Configurable through HAL function |
+*/
+/** \} group_bsp_settings */
+
+/**
+* \addtogroup group_bsp_pin_state Pin States
+* \{
+*/
+
+/** Pin state for the LED on. */
+#define CYBSP_LED_STATE_ON          (0U)
+/** Pin state for the LED off. */
+#define CYBSP_LED_STATE_OFF         (1U)
+
+/** Pin state for when a button is pressed. */
+#define CYBSP_BTN_PRESSED           (0U)
+/** Pin state for when a button is released. */
+#define CYBSP_BTN_OFF               (1U)
+
+/** \} group_bsp_pin_state */
+
+#if defined(CY_USING_HAL)
+
+/**
+* \addtogroup group_bsp_pins Pin Mappings
+* \{
+*/
+
+/**
+* \addtogroup group_bsp_pins_led LED Pins
+* \{
+*/
+
+/** LED 8; User LED1 */
+#define CYBSP_LED8                  (P1_5)
+/** LED 9; User LED2 */
+#define CYBSP_LED9                  (P13_7)
+/** LED 5: RGB LED - Red; User LED3 */
+#define CYBSP_LED_RGB_RED           (P0_3)
+/** LED 5: RGB LED - Green; User LED4 */
+#define CYBSP_LED_RGB_GREEN         (P1_1)
+/** LED 5: RGB LED - Blue; User LED5 */
+#define CYBSP_LED_RGB_BLUE          (P11_1)
+
+/** LED 8; User LED1 */
+#define CYBSP_USER_LED1             (CYBSP_LED8)
+/** LED 9; User LED2 */
+#define CYBSP_USER_LED2             (CYBSP_LED9)
+/** LED 5: RGB LED - Red; User LED3 */
+#define CYBSP_USER_LED3             (CYBSP_LED_RGB_RED)
+/** LED 5: RGB LED - Green; User LED4 */
+#define CYBSP_USER_LED4             (CYBSP_LED_RGB_GREEN)
+/** LED 5: RGB LED - Blue; User LED5 */
+#define CYBSP_USER_LED5             (CYBSP_LED_RGB_BLUE)
+/** LED 8; User LED1 */
+#define CYBSP_USER_LED              (CYBSP_USER_LED1)
+
+/** \} group_bsp_pins_led */
+
+/**
+* \addtogroup group_bsp_pins_btn Button Pins
+* \{
+*/
+
+/** Switch 2; User Button 1 */
+#define CYBSP_SW2                   (P0_4)
+
+/** Switch 2; User Button 1 */
+#define CYBSP_USER_BTN1             (CYBSP_SW2)
+/** Switch 2; User Button 1 */
+#define CYBSP_USER_BTN              (CYBSP_USER_BTN1)
+
+/** \} group_bsp_pins_btn */
+
+
+/**
+* \addtogroup group_bsp_pins_comm Communication Pins
+* \{
+*/
+
+/** Pin: UART RX */
+#define CYBSP_DEBUG_UART_RX         (P5_0)
+/** Pin: UART TX */
+#define CYBSP_DEBUG_UART_TX         (P5_1)
+
+/** Pin: I2C SCL */
+#define CYBSP_I2C_SCL               (P6_0)
+/** Pin: I2C SDA */
+#define CYBSP_I2C_SDA               (P6_1)
+
+/** Pin: SWO */
+#define CYBSP_SWO                   (P6_4)
+/** Pin: SWDIO */
+#define CYBSP_SWDIO                 (P6_6)
+/** Pin: SWDCK */
+#define CYBSP_SWDCK                 (P6_7)
+
+/** Pin: QUAD SPI SS */
+#define CYBSP_QSPI_SS               (P11_2)
+/** Pin: QUAD SPI D3 */
+#define CYBSP_QSPI_D3               (P11_3)
+/** Pin: QUAD SPI D2 */
+#define CYBSP_QSPI_D2               (P11_4)
+/** Pin: QUAD SPI D1 */
+#define CYBSP_QSPI_D1               (P11_5)
+/** Pin: QUAD SPI D0 */
+#define CYBSP_QSPI_D0               (P11_6)
+/** Pin: QUAD SPI SCK */
+#define CYBSP_QSPI_SCK              (P11_7)
+
+/** \} group_bsp_pins_comm */
+
+
+/**
+* \addtogroup group_bsp_pins_arduino Arduino Header Pins
+* \{
+*/
+
+/** Arduino A0 */
+#define CYBSP_A0                    (P10_0)
+/** Arduino A1 */
+#define CYBSP_A1                    (P10_1)
+/** Arduino A2 */
+#define CYBSP_A2                    (P10_2)
+/** Arduino A3 */
+#define CYBSP_A3                    (P10_3)
+/** Arduino A4 */
+#define CYBSP_A4                    (P10_4)
+/** Arduino A5 */
+#define CYBSP_A5                    (P10_5)
+/** Arduino D0 */
+#define CYBSP_D0                    (P5_0)
+/** Arduino D1 */
+#define CYBSP_D1                    (P5_1)
+/** Arduino D2 */
+#define CYBSP_D2                    (P5_2)
+/** Arduino D3 */
+#define CYBSP_D3                    (P5_3)
+/** Arduino D4 */
+#define CYBSP_D4                    (P5_4)
+/** Arduino D5 */
+#define CYBSP_D5                    (P5_5)
+/** Arduino D6 */
+#define CYBSP_D6                    (P5_6)
+/** Arduino D7 */
+#define CYBSP_D7                    (P0_2)
+/** Arduino D8 */
+#define CYBSP_D8                    (P13_0)
+/** Arduino D9 */
+#define CYBSP_D9                    (P13_1)
+/** Arduino D10 */
+#define CYBSP_D10                   (P12_3)
+/** Arduino D11 */
+#define CYBSP_D11                   (P12_0)
+/** Arduino D12 */
+#define CYBSP_D12                   (P12_1)
+/** Arduino D13 */
+#define CYBSP_D13                   (P12_2)
+/** Arduino D14 */
+#define CYBSP_D14                   (P6_1)
+/** Arduino D15 */
+#define CYBSP_D15                   (P6_0)
+
+/** \} group_bsp_pins_arduino */
+
+
+/**
+* \addtogroup group_bsp_pins_j2 J2 Header Pins
+* \{
+*/
+
+/** Cypress J2 Header pin 1 */
+#define CYBSP_J2_1                  (CYBSP_A0)
+/** Cypress J2 Header pin 2 */
+#define CYBSP_J2_2                  (P9_0)
+/** Cypress J2 Header pin 3 */
+#define CYBSP_J2_3                  (CYBSP_A1)
+/** Cypress J2 Header pin 4 */
+#define CYBSP_J2_4                  (P9_1)
+/** Cypress J2 Header pin 5 */
+#define CYBSP_J2_5                  (CYBSP_A2)
+/** Cypress J2 Header pin 6 */
+#define CYBSP_J2_6                  (P9_2)
+/** Cypress J2 Header pin 7 */
+#define CYBSP_J2_7                  (CYBSP_A3)
+/** Cypress J2 Header pin 8 */
+#define CYBSP_J2_8                  (P9_3)
+/** Cypress J2 Header pin 9 */
+#define CYBSP_J2_9                  (CYBSP_A4)
+/** Cypress J2 Header pin 10 */
+#define CYBSP_J2_10                 (P9_4)
+/** Cypress J2 Header pin 11 */
+#define CYBSP_J2_11                 (CYBSP_A5)
+/** Cypress J2 Header pin 12 */
+#define CYBSP_J2_12                 (P9_5)
+/** Cypress J2 Header pin 13 */
+#define CYBSP_J2_13                 (P10_6)
+/** Cypress J2 Header pin 14 */
+#define CYBSP_J2_14                 (NC)
+/** Cypress J2 Header pin 15 */
+#define CYBSP_J2_15                 (P6_2)
+/** Cypress J2 Header pin 16 */
+#define CYBSP_J2_16                 (P9_6)
+/** Cypress J2 Header pin 17 */
+#define CYBSP_J2_17                 (P6_3)
+/** Cypress J2 Header pin 18 */
+#define CYBSP_J2_18                 (P9_7)
+/** Cypress J2 Header pin 19 */
+#define CYBSP_J2_19                 (P13_6)
+/** Cypress J2 Header pin 20 */
+#define CYBSP_J2_20                 (P13_7)
+
+/** \} group_bsp_pins_j2 */
+
+/** \} group_bsp_pins */
+
+#endif /* defined(CY_USING_HAL) */
+
+#if defined(__cplusplus)
+}
+#endif

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/linker/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct

@@ -0,0 +1,274 @@
+#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4
+; The first line specifies a preprocessor command that the linker invokes
+; to pass a scatter file through a C preprocessor.
+
+;*******************************************************************************
+;* \file cy8c6xx7_cm4_dual.sct
+;* \version 2.60
+;*
+;* Linker file for the ARMCC.
+;*
+;* The main purpose of the linker script is to describe how the sections in the
+;* input files should be mapped into the output file, and to control the memory
+;* layout of the output file.
+;*
+;* \note The entry point location is fixed and starts at 0x10000000. The valid
+;* application image should be placed there.
+;*
+;* \note The linker files included with the PDL template projects must be
+;* generic and handle all common use cases. Your project may not use every
+;* section defined in the linker files. In that case you may see the warnings
+;* during the build process: L6314W (no section matches pattern) and/or L6329W
+;* (pattern only matches removed unused sections). In your project, you can
+;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
+;* the linker, simply comment out or remove the relevant code in the linker
+;* file.
+;*
+;*******************************************************************************
+;* \copyright
+;* Copyright 2016-2019 Cypress Semiconductor Corporation
+;* SPDX-License-Identifier: Apache-2.0
+;*
+;* Licensed under the Apache License, Version 2.0 (the "License");
+;* you may not use this file except in compliance with the License.
+;* You may obtain a copy of the License at
+;*
+;*     http://www.apache.org/licenses/LICENSE-2.0
+;*
+;* Unless required by applicable law or agreed to in writing, software
+;* distributed under the License is distributed on an "AS IS" BASIS,
+;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+;* See the License for the specific language governing permissions and
+;* limitations under the License.
+;******************************************************************************/
+
+; The defines below describe the location and size of blocks of memory in the target.
+; Use these defines to specify the memory regions available for allocation.
+
+; The following defines control RAM and flash memory allocation for the CM4 core.
+; You can change the memory allocation by editing RAM and Flash defines.
+; Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
+; Using this memory region for other purposes will lead to unexpected behavior.
+; Your changes must be aligned with the corresponding defines for CM0+ core in 'xx_cm0plus.scat',
+; where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.scat'.
+; RAM
+#define RAM_START               0x08002000
+#define RAM_SIZE                0x00045800
+; Flash
+#define FLASH_START             0x10000000
+#define FLASH_SIZE              0x00100000
+
+; Size of the stack section at the end of CM4 SRAM
+#define STACK_SIZE              0x00001000
+
+; Size of the Cortex-M0+ application flash image
+#define FLASH_CM0P_SIZE         0x2000
+
+; The following defines describe a 32K flash region used for EEPROM emulation.
+; This region can also be used as the general purpose flash.
+; You can assign sections to this memory region for only one of the cores.
+; Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
+; Therefore, repurposing this memory region will prevent such middleware from operation.
+#define EM_EEPROM_START         0x14000000
+#define EM_EEPROM_SIZE          0x8000
+
+; The following defines describe device specific memory regions and must not be changed.
+; Supervisory flash: User data
+#define SFLASH_USER_DATA_START  0x16000800
+#define SFLASH_USER_DATA_SIZE   0x00000800
+
+; Supervisory flash: Normal Access Restrictions (NAR)
+#define SFLASH_NAR_START        0x16001A00
+#define SFLASH_NAR_SIZE         0x00000200
+
+; Supervisory flash: Public Key
+#define SFLASH_PUBLIC_KEY_START 0x16005A00
+#define SFLASH_PUBLIC_KEY_SIZE  0x00000C00
+
+; Supervisory flash: Table of Content # 2
+#define SFLASH_TOC_2_START      0x16007C00
+#define SFLASH_TOC_2_SIZE       0x00000200
+
+; Supervisory flash: Table of Content # 2 Copy
+#define SFLASH_RTOC_2_START     0x16007E00
+#define SFLASH_RTOC_2_SIZE      0x00000200
+
+; External memory
+#define XIP_START               0x18000000
+#define XIP_SIZE                0x08000000
+
+; eFuse
+#define EFUSE_START             0x90700000
+#define EFUSE_SIZE              0x100000
+
+
+; Cortex-M0+ application flash image area
+LR_IROM FLASH_START FLASH_CM0P_SIZE
+{
+    .cy_m0p_image +0 FLASH_CM0P_SIZE
+    {
+        * (.cy_m0p_image)
+    }
+}
+
+; Cortex-M4 application flash area
+LR_IROM1 (FLASH_START + FLASH_CM0P_SIZE) (FLASH_SIZE - FLASH_CM0P_SIZE)
+{
+    ER_FLASH_VECTORS +0
+    {
+        * (RESET, +FIRST)
+    }
+
+    ER_FLASH_CODE +0 FIXED
+    {
+        * (InRoot$$Sections)
+        * (+RO)
+    }
+
+    ER_RAM_VECTORS RAM_START UNINIT
+    {
+        * (RESET_RAM, +FIRST)
+    }
+
+    RW_RAM_DATA +0
+    {
+        * (.cy_ramfunc)
+        * (+RW, +ZI)
+    }
+
+    ; Place variables in the section that should not be initialized during the
+    ; device startup.
+    RW_IRAM1 +0 UNINIT
+    {
+        * (.noinit)
+    }
+
+    ; Application heap area (HEAP)
+    ARM_LIB_HEAP  +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE)
+    { 
+    }
+    
+    ; Stack region growing down
+    ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE
+    {
+    }
+
+    ; Used for the digital signature of the secure application and the
+    ; Bootloader SDK application. The size of the section depends on the required
+    ; data size.
+    .cy_app_signature (FLASH_START + FLASH_SIZE - 256) 256
+    {
+        * (.cy_app_signature)
+    }
+}
+
+
+; Emulated EEPROM Flash area
+LR_EM_EEPROM EM_EEPROM_START EM_EEPROM_SIZE
+{
+    .cy_em_eeprom +0
+    {
+        * (.cy_em_eeprom)
+    }
+}
+
+; Supervisory flash: User data
+LR_SFLASH_USER_DATA SFLASH_USER_DATA_START SFLASH_USER_DATA_SIZE
+{
+    .cy_sflash_user_data +0
+    {
+        * (.cy_sflash_user_data)
+    }
+}
+
+; Supervisory flash: Normal Access Restrictions (NAR)
+LR_SFLASH_NAR SFLASH_NAR_START SFLASH_NAR_SIZE
+{
+    .cy_sflash_nar +0
+    {
+        * (.cy_sflash_nar)
+    }
+}
+
+; Supervisory flash: Public Key
+LR_SFLASH_PUBLIC_KEY SFLASH_PUBLIC_KEY_START SFLASH_PUBLIC_KEY_SIZE
+{
+    .cy_sflash_public_key +0
+    {
+        * (.cy_sflash_public_key)
+    }
+}
+
+; Supervisory flash: Table of Content # 2
+LR_SFLASH_TOC_2 SFLASH_TOC_2_START SFLASH_TOC_2_SIZE
+{
+    .cy_toc_part2 +0
+    {
+        * (.cy_toc_part2)
+    }
+}
+
+; Supervisory flash: Table of Content # 2 Copy
+LR_SFLASH_RTOC_2 SFLASH_RTOC_2_START SFLASH_RTOC_2_SIZE
+{
+    .cy_rtoc_part2 +0
+    {
+        * (.cy_rtoc_part2)
+    }
+}
+
+
+; Places the code in the Execute in Place (XIP) section. See the smif driver documentation for details.
+LR_EROM XIP_START XIP_SIZE
+{
+    .cy_xip +0
+    {
+        * (.cy_xip)
+    }
+}
+
+
+; eFuse
+LR_EFUSE EFUSE_START EFUSE_SIZE
+{
+    .cy_efuse +0
+    {
+        * (.cy_efuse)
+    }
+}
+
+
+; The section is used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage.
+CYMETA 0x90500000
+{
+    .cymeta +0 { * (.cymeta) }
+}
+
+/* The following symbols used by the cymcuelftool. */
+/* Flash */
+#define __cy_memory_0_start 0x10000000
+#define __cy_memory_0_length  0x00100000
+#define __cy_memory_0_row_size 0x200
+
+/* Emulated EEPROM Flash area */
+#define __cy_memory_1_start    0x14000000
+#define __cy_memory_1_length   0x8000
+#define __cy_memory_1_row_size 0x200
+
+/* Supervisory Flash */
+#define __cy_memory_2_start    0x16000000
+#define __cy_memory_2_length   0x8000
+#define __cy_memory_2_row_size 0x200
+
+/* XIP */
+#define __cy_memory_3_start    0x18000000
+#define __cy_memory_3_length   0x08000000
+#define __cy_memory_3_row_size 0x200
+
+/* eFuse */
+#define __cy_memory_4_start    0x90700000
+#define __cy_memory_4_length   0x100000
+#define __cy_memory_4_row_size 1
+
+
+/* [] END OF FILE */

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/linker/TOOLCHAIN_A_Clang/cy8c6xx7_cm4_dual.mk

@@ -0,0 +1,85 @@
+################################################################################
+# \file cy8c6xx7_cm4_dual.mk
+# \version 2.60
+#
+# \brief
+# Specifies the starting address and the size of the segments in the output
+# file.
+#
+# \note The section definitions in this file are generic and handle all common
+# use cases.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+### CM0P ###
+export HEAP_SIZE_CM0P     := 0x400
+export VECT_BASE_CM0P     := 0x10000000
+export RAM_VECT_BASE_CM0P := 0x08000000
+export VECT_SIZE_CM0P     := 0x000000C0
+export TEXT_BASE_CM0P     := 0x100000C0
+export TEXT_SIZE_CM0P     := 0x00002000
+export RAM_BASE_CM0P      := 0x080000C0
+export RAM_SIZE_CM0P      := 0x00002000
+export CYMETA_BASE_CM0P   := 0x90500000
+export STACK_SIZE_CM0P    := 0x2000
+
+STACK_ADDRESS_TOP_CM0P    := $(shell printf "0x%x" $$(($(RAM_VECT_BASE_CM0P) + $(RAM_SIZE_CM0P))))
+STACK_ADDRESS_BOTTOM_CM0P := $(shell printf "0x%x" $$(($(STACK_ADDRESS_TOP_CM0P) - $(STACK_SIZE_CM0P))))
+TOOLCHAIN_VECT_BASE_CM0   := $(VECT_BASE_CM0P)
+
+SECTIONS_CM0P := \
+    -segaddr __VECT $(VECT_BASE_CM0P) \
+    -segaddr __TEXT $(TEXT_BASE_CM0P) \
+    -segaddr __DATA $(RAM_BASE_CM0P) \
+    -segaddr __RAMVECTORS $(RAM_VECT_BASE_CM0P) \
+    -segaddr __CYMETA $(CYMETA_BASE_CM0P) \
+    -segaddr __STACK $(STACK_ADDRESS_TOP_CM0P)
+
+### CM4 ###
+export HEAP_SIZE_CM4     := 0x400
+export VECT_BASE_CM4     := 0x10002000
+export RAM_VECT_BASE_CM4 := 0x08002000
+export VECT_SIZE_CM4     := 0x0000028C
+export TEXT_BASE_CM4     := 0x1000228C
+export TEXT_SIZE_CM4     := 0x000FE000
+export RAM_BASE_CM4      := 0x0800228C
+export RAM_SIZE_CM4      := 0x00045800
+export CYMETA_BASE_CM4   := 0x90500000
+export STACK_SIZE_CM4    := 0x2000
+STACK_ADDRESS_TOP_CM4    := $(shell printf "0x%x" $$(($(RAM_VECT_BASE_CM4) + $(RAM_SIZE_CM4))))
+STACK_ADDRESS_BOTTOM_CM4 := $(shell printf "0x%x" $$(($(STACK_ADDRESS_TOP_CM4) - $(STACK_SIZE_CM4))))
+TOOLCHAIN_VECT_BASE_CM4  := $(VECT_BASE_CM4)
+
+SECTIONS_CM4 := \
+    -segaddr __CY_M0P_IMAGE $(VECT_BASE_CM0P) \
+    -segaddr __VECT $(VECT_BASE_CM4) \
+    -segaddr __TEXT $(TEXT_BASE_CM4) \
+    -segaddr __DATA $(RAM_BASE_CM4) \
+    -segaddr __RAMVECTORS $(RAM_VECT_BASE_CM4) \
+    -segaddr __CYMETA $(CYMETA_BASE_CM4) \
+    -segaddr __STACK $(STACK_ADDRESS_TOP_CM4)
+
+# Pass section addresses to the linker
+ifeq ($(CORE),CM4)
+LDFLAGS += $(SECTIONS_CM4)
+else ifeq ($(CORE),CM0P)
+LDFLAGS += $(SECTIONS_CM0P)
+endif
+
+# EOF

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/linker/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld

@@ -0,0 +1,459 @@
+/***************************************************************************//**
+* \file cy8c6xx7_cm4_dual.ld
+* \version 2.60
+*
+* Linker file for the GNU C compiler.
+*
+* The main purpose of the linker script is to describe how the sections in the
+* input files should be mapped into the output file, and to control the memory
+* layout of the output file.
+*
+* \note The entry point location is fixed and starts at 0x10000000. The valid
+* application image should be placed there.
+*
+* \note The linker files included with the PDL template projects must be generic
+* and handle all common use cases. Your project may not use every section
+* defined in the linker files. In that case you may see warnings during the
+* build process. In your project, you can simply comment out or remove the
+* relevant code in the linker file.
+*
+********************************************************************************
+* \copyright
+* Copyright 2016-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+ENTRY(Reset_Handler)
+
+/* Size of the stack section at the end of CM4 SRAM */
+STACK_SIZE = 0x1000;
+
+/* Size of the Cortex-M0+ application image at the start of FLASH */
+FLASH_CM0P_SIZE  = 0x2000;
+
+/* Force symbol to be entered in the output file as an undefined symbol. Doing
+* this may, for example, trigger linking of additional modules from standard
+* libraries. You may list several symbols for each EXTERN, and you may use
+* EXTERN multiple times. This command has the same effect as the -u command-line
+* option.
+*/
+EXTERN(Reset_Handler)
+
+/* The MEMORY section below describes the location and size of blocks of memory in the target.
+* Use this section to specify the memory regions available for allocation.
+*/
+MEMORY
+{
+    /* The ram and flash regions control RAM and flash memory allocation for the CM4 core.
+     * You can change the memory allocation by editing the 'ram' and 'flash' regions.
+     * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
+     * Using this memory region for other purposes will lead to unexpected behavior.
+     * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld',
+     * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'.
+     */
+    ram               (rwx)   : ORIGIN = 0x08002000, LENGTH = 0x45800
+    flash             (rx)    : ORIGIN = 0x10000000, LENGTH = 0x100000
+
+    /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash.
+     * You can assign sections to this memory region for only one of the cores.
+     * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
+     * Therefore, repurposing this memory region will prevent such middleware from operation.
+     */
+    em_eeprom         (rx)    : ORIGIN = 0x14000000, LENGTH = 0x8000       /*  32 KB */
+
+    /* The following regions define device specific memory regions and must not be changed. */
+    sflash_user_data  (rx)    : ORIGIN = 0x16000800, LENGTH = 0x800        /* Supervisory flash: User data */
+    sflash_nar        (rx)    : ORIGIN = 0x16001A00, LENGTH = 0x200        /* Supervisory flash: Normal Access Restrictions (NAR) */
+    sflash_public_key (rx)    : ORIGIN = 0x16005A00, LENGTH = 0xC00        /* Supervisory flash: Public Key */
+    sflash_toc_2      (rx)    : ORIGIN = 0x16007C00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 */
+    sflash_rtoc_2     (rx)    : ORIGIN = 0x16007E00, LENGTH = 0x200        /* Supervisory flash: Table of Content # 2 Copy */
+    xip               (rx)    : ORIGIN = 0x18000000, LENGTH = 0x8000000    /* 128 MB */
+    efuse             (r)     : ORIGIN = 0x90700000, LENGTH = 0x100000     /*   1 MB */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+
+
+SECTIONS
+{
+     /* Cortex-M0+ application flash image area */
+    .cy_m0p_image ORIGIN(flash) :
+    {
+        . = ALIGN(4);
+        __cy_m0p_code_start = . ;
+        KEEP(*(.cy_m0p_image))
+        __cy_m0p_code_end = . ;
+    } > flash
+
+    /* Check if .cy_m0p_image size exceeds FLASH_CM0P_SIZE */
+    ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4, increase FLASH_CM0P_SIZE")
+
+    /* Cortex-M4 application flash area */
+    .text ORIGIN(flash) + FLASH_CM0P_SIZE :
+    {
+        . = ALIGN(4);
+        __Vectors = . ;
+        KEEP(*(.vectors))
+        . = ALIGN(4);
+        __Vectors_End = .;
+        __Vectors_Size = __Vectors_End - __Vectors;
+        __end__ = .;
+
+        . = ALIGN(4);
+        *(.text*)
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        /* .ctors */
+        *crtbegin.o(.ctors)
+        *crtbegin?.o(.ctors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+        *(SORT(.ctors.*))
+        *(.ctors)
+
+        /* .dtors */
+        *crtbegin.o(.dtors)
+        *crtbegin?.o(.dtors)
+        *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+        *(SORT(.dtors.*))
+        *(.dtors)
+
+        /* Read-only code (constants). */
+        *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*)
+
+        KEEP(*(.eh_frame*))
+    } > flash
+
+
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } > flash
+
+    __exidx_start = .;
+
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > flash
+    __exidx_end = .;
+
+
+    /* To copy multiple ROM to RAM sections,
+     * uncomment .copy.table section and,
+     * define __STARTUP_COPY_MULTIPLE in startup_psoc6_01_cm4.S */
+    .copy.table :
+    {
+        . = ALIGN(4);
+        __copy_table_start__ = .;
+
+        /* Copy interrupt vectors from flash to RAM */
+        LONG (__Vectors)                                    /* From */
+        LONG (__ram_vectors_start__)                        /* To   */
+        LONG (__Vectors_End - __Vectors)                    /* Size */
+
+        /* Copy data section to RAM */
+        LONG (__etext)                                      /* From */
+        LONG (__data_start__)                               /* To   */
+        LONG (__data_end__ - __data_start__)                /* Size */
+
+        __copy_table_end__ = .;
+    } > flash
+
+	/* setction information for finsh shell begin */
+    FSymTab : 
+    {
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+    } > flash
+    VSymTab : 
+    {
+        . = ALIGN(4);
+         __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+    } > flash
+    rti_fn : 
+    {
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+    } > flash
+    /* setction information for finsh shell end */
+	
+    /* To clear multiple BSS sections,
+     * uncomment .zero.table section and,
+     * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_01_cm4.S */
+    .zero.table :
+    {
+        . = ALIGN(4);
+        __zero_table_start__ = .;
+        LONG (__bss_start__)
+        LONG (__bss_end__ - __bss_start__)
+        __zero_table_end__ = .;
+    } > flash
+
+    __etext =  . ;
+
+
+    .ramVectors (NOLOAD) : ALIGN(8)
+    {
+        __ram_vectors_start__ = .;
+        KEEP(*(.ram_vectors))
+        __ram_vectors_end__   = .;
+    } > ram
+
+
+    .data __ram_vectors_end__ : AT (__etext)
+    {
+        __data_start__ = .;
+
+        *(vtable)
+        *(.data*)
+
+        . = ALIGN(4);
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
+
+        . = ALIGN(4);
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
+
+        . = ALIGN(4);
+        /* finit data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
+
+        KEEP(*(.jcr*))
+        . = ALIGN(4);
+
+        KEEP(*(.cy_ramfunc*))
+        . = ALIGN(4);
+
+        __data_end__ = .;
+
+    } > ram
+
+
+    /* Place variables in the section that should not be initialized during the
+    *  device startup.
+    */
+    .noinit (NOLOAD) : ALIGN(8)
+    {
+      KEEP(*(.noinit))
+    } > ram
+
+
+    /* The uninitialized global or static variables are placed in this section.
+    *
+    * The NOLOAD attribute tells linker that .bss section does not consume
+    * any space in the image. The NOLOAD attribute changes the .bss type to
+    * NOBITS, and that  makes linker to A) not allocate section in memory, and
+    * A) put information to clear the section with all zeros during application
+    * loading.
+    *
+    * Without the NOLOAD attribute, the .bss section might get PROGBITS type.
+    * This  makes linker to A) allocate zeroed section in memory, and B) copy
+    * this section to RAM during application loading.
+    */
+    .bss (NOLOAD):
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        *(.bss*)
+        *(COMMON)
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > ram
+
+
+    .heap (NOLOAD):
+    {
+        __HeapBase = .;
+        __end__ = .;
+        end = __end__;
+        KEEP(*(.heap*))
+        . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE;
+        __HeapLimit = .;
+    } > ram
+
+
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (NOLOAD):
+    {
+        KEEP(*(.stack*))
+    } > ram
+
+
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(ram) + LENGTH(ram);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    PROVIDE(__stack = __StackTop);
+
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+
+
+    /* Used for the digital signature of the secure application and the Bootloader SDK application.
+    * The size of the section depends on the required data size. */
+    .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 :
+    {
+        KEEP(*(.cy_app_signature))
+    } > flash
+
+
+    /* Emulated EEPROM Flash area */
+    .cy_em_eeprom :
+    {
+        KEEP(*(.cy_em_eeprom))
+    } > em_eeprom
+
+
+    /* Supervisory Flash: User data */
+    .cy_sflash_user_data :
+    {
+        KEEP(*(.cy_sflash_user_data))
+    } > sflash_user_data
+
+
+    /* Supervisory Flash: Normal Access Restrictions (NAR) */
+    .cy_sflash_nar :
+    {
+        KEEP(*(.cy_sflash_nar))
+    } > sflash_nar
+
+
+    /* Supervisory Flash: Public Key */
+    .cy_sflash_public_key :
+    {
+        KEEP(*(.cy_sflash_public_key))
+    } > sflash_public_key
+
+
+    /* Supervisory Flash: Table of Content # 2 */
+    .cy_toc_part2 :
+    {
+        KEEP(*(.cy_toc_part2))
+    } > sflash_toc_2
+
+
+    /* Supervisory Flash: Table of Content # 2 Copy */
+    .cy_rtoc_part2 :
+    {
+        KEEP(*(.cy_rtoc_part2))
+    } > sflash_rtoc_2
+
+
+    /* Places the code in the Execute in Place (XIP) section. See the smif driver
+    *  documentation for details.
+    */
+    .cy_xip :
+    {
+        KEEP(*(.cy_xip))
+    } > xip
+
+
+    /* eFuse */
+    .cy_efuse :
+    {
+        KEEP(*(.cy_efuse))
+    } > efuse
+
+
+    /* These sections are used for additional metadata (silicon revision,
+    *  Silicon/JTAG ID, etc.) storage.
+    */
+    .cymeta         0x90500000 : { KEEP(*(.cymeta)) } :NONE
+}
+
+
+/* The following symbols used by the cymcuelftool. */
+/* Flash */
+__cy_memory_0_start    = 0x10000000;
+__cy_memory_0_length   = 0x00100000;
+__cy_memory_0_row_size = 0x200;
+
+/* Emulated EEPROM Flash area */
+__cy_memory_1_start    = 0x14000000;
+__cy_memory_1_length   = 0x8000;
+__cy_memory_1_row_size = 0x200;
+
+/* Supervisory Flash */
+__cy_memory_2_start    = 0x16000000;
+__cy_memory_2_length   = 0x8000;
+__cy_memory_2_row_size = 0x200;
+
+/* XIP */
+__cy_memory_3_start    = 0x18000000;
+__cy_memory_3_length   = 0x08000000;
+__cy_memory_3_row_size = 0x200;
+
+/* eFuse */
+__cy_memory_4_start    = 0x90700000;
+__cy_memory_4_length   = 0x100000;
+__cy_memory_4_row_size = 1;
+
+/* EOF */

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/linker/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf

@@ -0,0 +1,240 @@
+/***************************************************************************//**
+* \file cy8c6xx7_cm4_dual.icf
+* \version 2.60
+*
+* Linker file for the IAR compiler.
+*
+* The main purpose of the linker script is to describe how the sections in the
+* input files should be mapped into the output file, and to control the memory
+* layout of the output file.
+*
+* \note The entry point is fixed and starts at 0x10000000. The valid application
+* image should be placed there.
+*
+* \note The linker files included with the PDL template projects must be generic
+* and handle all common use cases. Your project may not use every section
+* defined in the linker files. In that case you may see warnings during the
+* build process. In your project, you can simply comment out or remove the
+* relevant code in the linker file.
+*
+********************************************************************************
+* \copyright
+* Copyright 2016-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x00000000;
+
+/* The symbols below define the location and size of blocks of memory in the target.
+ * Use these symbols to specify the memory regions available for allocation.
+ */
+
+/* The following symbols control RAM and flash memory allocation for the CM4 core.
+ * You can change the memory allocation by editing RAM and Flash symbols.
+ * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use.
+ * Using this memory region for other purposes will lead to unexpected behavior.
+ * Your changes must be aligned with the corresponding symbols for CM0+ core in 'xx_cm0plus.icf',
+ * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.icf'.
+ */
+/* RAM */
+define symbol __ICFEDIT_region_IRAM1_start__ = 0x08002000;
+define symbol __ICFEDIT_region_IRAM1_end__   = 0x08047800;
+/* Flash */
+define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
+define symbol __ICFEDIT_region_IROM1_end__   = 0x10100000;
+
+/* The following symbols define a 32K flash region used for EEPROM emulation.
+ * This region can also be used as the general purpose flash.
+ * You can assign sections to this memory region for only one of the cores.
+ * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region.
+ * Therefore, repurposing this memory region will prevent such middleware from operation.
+ */
+define symbol __ICFEDIT_region_IROM2_start__ = 0x14000000;
+define symbol __ICFEDIT_region_IROM2_end__   = 0x14007FFF;
+
+/* The following symbols define device specific memory regions and must not be changed. */
+/* Supervisory FLASH - User Data */
+define symbol __ICFEDIT_region_IROM3_start__ = 0x16000800;
+define symbol __ICFEDIT_region_IROM3_end__   = 0x160007FF;
+
+/* Supervisory FLASH - Normal Access Restrictions (NAR) */
+define symbol __ICFEDIT_region_IROM4_start__ = 0x16001A00;
+define symbol __ICFEDIT_region_IROM4_end__   = 0x16001BFF;
+
+/* Supervisory FLASH - Public Key */
+define symbol __ICFEDIT_region_IROM5_start__ = 0x16005A00;
+define symbol __ICFEDIT_region_IROM5_end__   = 0x160065FF;
+
+/* Supervisory FLASH - Table of Content # 2 */
+define symbol __ICFEDIT_region_IROM6_start__ = 0x16007C00;
+define symbol __ICFEDIT_region_IROM6_end__   = 0x16007DFF;
+
+/* Supervisory FLASH - Table of Content # 2 Copy */
+define symbol __ICFEDIT_region_IROM7_start__ = 0x16007E00;
+define symbol __ICFEDIT_region_IROM7_end__   = 0x16007FFF;
+
+/* eFuse */
+define symbol __ICFEDIT_region_IROM8_start__ = 0x90700000;
+define symbol __ICFEDIT_region_IROM8_end__   = 0x907FFFFF;
+
+/* XIP */
+define symbol __ICFEDIT_region_EROM1_start__ = 0x18000000;
+define symbol __ICFEDIT_region_EROM1_end__   = 0x1FFFFFFF;
+
+define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
+define symbol __ICFEDIT_region_EROM2_end__   = 0x0;
+define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
+define symbol __ICFEDIT_region_EROM3_end__   = 0x0;
+
+
+define symbol __ICFEDIT_region_IRAM2_start__ = 0x0;
+define symbol __ICFEDIT_region_IRAM2_end__   = 0x0;
+define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
+define symbol __ICFEDIT_region_ERAM1_end__   = 0x0;
+define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
+define symbol __ICFEDIT_region_ERAM2_end__   = 0x0;
+define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
+define symbol __ICFEDIT_region_ERAM3_end__   = 0x0;
+/*-Sizes-*/
+if (!isdefinedsymbol(__STACK_SIZE)) {
+  define symbol __ICFEDIT_size_cstack__ = 0x1000;
+} else {
+  define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE;
+}
+define symbol __ICFEDIT_size_proc_stack__ = 0x0;
+
+/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */
+if (!isdefinedsymbol(__HEAP_SIZE)) {
+    define symbol __ICFEDIT_size_heap__ = 0x0400;
+} else {
+  define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE;
+}
+/**** End of ICF editor section. ###ICF###*/
+
+/* Size of the Cortex-M0+ application image */
+define symbol FLASH_CM0P_SIZE  = 0x2000;
+
+define memory mem with size = 4G;
+define region IROM1_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__];
+define region IROM2_region = mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
+define region IROM3_region = mem:[from __ICFEDIT_region_IROM3_start__ to __ICFEDIT_region_IROM3_end__];
+define region IROM4_region = mem:[from __ICFEDIT_region_IROM4_start__ to __ICFEDIT_region_IROM4_end__];
+define region IROM5_region = mem:[from __ICFEDIT_region_IROM5_start__ to __ICFEDIT_region_IROM5_end__];
+define region IROM6_region = mem:[from __ICFEDIT_region_IROM6_start__ to __ICFEDIT_region_IROM6_end__];
+define region IROM7_region = mem:[from __ICFEDIT_region_IROM7_start__ to __ICFEDIT_region_IROM7_end__];
+define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFEDIT_region_IROM8_end__];
+define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__];
+define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__];
+
+define block CSTACK     with alignment = 8, size = __ICFEDIT_size_cstack__     { };
+define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
+define block HEAP       with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
+define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
+define block CM0P_RO with size = FLASH_CM0P_SIZE  { readonly section .cy_m0p_image };
+define block RO     {first section .intvec, readonly};
+
+/*-Initializations-*/
+initialize by copy { readwrite };
+do not initialize  { section .noinit, section .intvec_ram };
+
+/*-Placement-*/
+
+/* Flash - Cortex-M0+ application image */
+place at start of IROM1_region  { block CM0P_RO };
+
+/* Flash - Cortex-M4 application */
+place in          IROM1_region  { block RO };
+
+/* Used for the digital signature of the secure application and the Bootloader SDK application. */
+".cy_app_signature" : place at address (__ICFEDIT_region_IROM1_end__ - 0x200) { section .cy_app_signature };
+
+/* Emulated EEPROM Flash area */
+".cy_em_eeprom" : place at start of IROM2_region  { section .cy_em_eeprom };
+
+/* Supervisory Flash - User Data */
+".cy_sflash_user_data" : place at start of IROM3_region  { section .cy_sflash_user_data };
+
+/* Supervisory Flash - NAR */
+".cy_sflash_nar" : place at start of IROM4_region  { section .cy_sflash_nar };
+
+/* Supervisory Flash - Public Key */
+".cy_sflash_public_key" : place at start of IROM5_region  { section .cy_sflash_public_key };
+
+/* Supervisory Flash - TOC2 */
+".cy_toc_part2" : place at start of IROM6_region  { section .cy_toc_part2 };
+
+/* Supervisory Flash - RTOC2 */
+".cy_rtoc_part2" : place at start of IROM7_region  { section .cy_rtoc_part2 };
+
+/* eFuse */
+".cy_efuse" : place at start of IROM8_region  { section .cy_efuse };
+
+/* Execute in Place (XIP). See the smif driver documentation for details. */
+".cy_xip" : place at start of EROM1_region  { section .cy_xip };
+
+/* RAM */
+place at start of IRAM1_region  { readwrite section .intvec_ram};
+place in          IRAM1_region  { readwrite };
+place at end   of IRAM1_region  { block HSTACK };
+
+/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */
+".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta };
+
+
+keep {  section .cy_m0p_image,
+        section .cy_app_signature,
+        section .cy_em_eeprom,
+        section .cy_sflash_user_data,
+        section .cy_sflash_nar,
+        section .cy_sflash_public_key,
+        section .cy_toc_part2,
+        section .cy_rtoc_part2,
+        section .cy_efuse,
+        section .cy_xip,
+        section .cymeta,
+         };
+
+
+/* The following symbols used by the cymcuelftool. */
+/* Flash */
+define exported symbol __cy_memory_0_start    = 0x10000000;
+define exported symbol __cy_memory_0_length   = 0x00100000;
+define exported symbol __cy_memory_0_row_size = 0x200;
+
+/* Emulated EEPROM Flash area */
+define exported symbol __cy_memory_1_start    = 0x14000000;
+define exported symbol __cy_memory_1_length   = 0x8000;
+define exported symbol __cy_memory_1_row_size = 0x200;
+
+/* Supervisory Flash */
+define exported symbol __cy_memory_2_start    = 0x16000000;
+define exported symbol __cy_memory_2_length   = 0x8000;
+define exported symbol __cy_memory_2_row_size = 0x200;
+
+/* XIP */
+define exported symbol __cy_memory_3_start    = 0x18000000;
+define exported symbol __cy_memory_3_length   = 0x08000000;
+define exported symbol __cy_memory_3_row_size = 0x200;
+
+/* eFuse */
+define exported symbol __cy_memory_4_start    = 0x90700000;
+define exported symbol __cy_memory_4_length   = 0x100000;
+define exported symbol __cy_memory_4_row_size = 1;
+
+/* EOF */

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/startup/TOOLCHAIN_ARM/startup_psoc6_01_cm4.s

@@ -0,0 +1,645 @@
+;/**************************************************************************//**
+; * @file     startup_psoc6_01_cm4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device Series
+; * @version  V5.00
+; * @date     02. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+                PRESERVE8
+                THUMB
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+                IMPORT |Image$$ARM_LIB_STACK$$ZI$$Base|
+                IMPORT |Image$$ARM_LIB_STACK$$ZI$$Length|
+                
+__Vectors       DCD    |Image$$ARM_LIB_STACK$$ZI$$Base| + |Image$$ARM_LIB_STACK$$ZI$$Length| ; Top of Stack
+
+                DCD     Reset_Handler             ; Reset Handler
+
+                DCD     0x0000000D                            ; NMI Handler located at ROM code
+                DCD     HardFault_Handler                     ; Hard Fault Handler
+                DCD     MemManage_Handler                     ; MPU Fault Handler
+                DCD     BusFault_Handler                      ; Bus Fault Handler
+                DCD     UsageFault_Handler                    ; Usage Fault Handler
+                DCD     0                                     ; Reserved
+                DCD     0                                     ; Reserved
+                DCD     0                                     ; Reserved
+                DCD     0                                     ; Reserved
+                DCD     SVC_Handler                           ; SVCall Handler
+                DCD     DebugMon_Handler                      ; Debug Monitor Handler
+                DCD     0                                     ; Reserved
+                DCD     PendSV_Handler                        ; PendSV Handler
+                DCD     SysTick_Handler                       ; SysTick Handler
+
+                ; External interrupts                           Description
+                DCD     ioss_interrupts_gpio_0_IRQHandler     ; GPIO Port Interrupt #0 
+                DCD     ioss_interrupts_gpio_1_IRQHandler     ; GPIO Port Interrupt #1 
+                DCD     ioss_interrupts_gpio_2_IRQHandler     ; GPIO Port Interrupt #2 
+                DCD     ioss_interrupts_gpio_3_IRQHandler     ; GPIO Port Interrupt #3 
+                DCD     ioss_interrupts_gpio_4_IRQHandler     ; GPIO Port Interrupt #4 
+                DCD     ioss_interrupts_gpio_5_IRQHandler     ; GPIO Port Interrupt #5 
+                DCD     ioss_interrupts_gpio_6_IRQHandler     ; GPIO Port Interrupt #6 
+                DCD     ioss_interrupts_gpio_7_IRQHandler     ; GPIO Port Interrupt #7 
+                DCD     ioss_interrupts_gpio_8_IRQHandler     ; GPIO Port Interrupt #8 
+                DCD     ioss_interrupts_gpio_9_IRQHandler     ; GPIO Port Interrupt #9 
+                DCD     ioss_interrupts_gpio_10_IRQHandler    ; GPIO Port Interrupt #10 
+                DCD     ioss_interrupts_gpio_11_IRQHandler    ; GPIO Port Interrupt #11 
+                DCD     ioss_interrupts_gpio_12_IRQHandler    ; GPIO Port Interrupt #12 
+                DCD     ioss_interrupts_gpio_13_IRQHandler    ; GPIO Port Interrupt #13 
+                DCD     ioss_interrupts_gpio_14_IRQHandler    ; GPIO Port Interrupt #14 
+                DCD     ioss_interrupt_gpio_IRQHandler        ; GPIO All Ports 
+                DCD     ioss_interrupt_vdd_IRQHandler         ; GPIO Supply Detect Interrupt 
+                DCD     lpcomp_interrupt_IRQHandler           ; Low Power Comparator Interrupt 
+                DCD     scb_8_interrupt_IRQHandler            ; Serial Communication Block #8 (DeepSleep capable) 
+                DCD     srss_interrupt_mcwdt_0_IRQHandler     ; Multi Counter Watchdog Timer interrupt 
+                DCD     srss_interrupt_mcwdt_1_IRQHandler     ; Multi Counter Watchdog Timer interrupt 
+                DCD     srss_interrupt_backup_IRQHandler      ; Backup domain interrupt 
+                DCD     srss_interrupt_IRQHandler             ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) 
+                DCD     pass_interrupt_ctbs_IRQHandler        ; CTBm Interrupt (all CTBms) 
+                DCD     bless_interrupt_IRQHandler            ; Bluetooth Radio interrupt 
+                DCD     cpuss_interrupts_ipc_0_IRQHandler     ; CPUSS Inter Process Communication Interrupt #0 
+                DCD     cpuss_interrupts_ipc_1_IRQHandler     ; CPUSS Inter Process Communication Interrupt #1 
+                DCD     cpuss_interrupts_ipc_2_IRQHandler     ; CPUSS Inter Process Communication Interrupt #2 
+                DCD     cpuss_interrupts_ipc_3_IRQHandler     ; CPUSS Inter Process Communication Interrupt #3 
+                DCD     cpuss_interrupts_ipc_4_IRQHandler     ; CPUSS Inter Process Communication Interrupt #4 
+                DCD     cpuss_interrupts_ipc_5_IRQHandler     ; CPUSS Inter Process Communication Interrupt #5 
+                DCD     cpuss_interrupts_ipc_6_IRQHandler     ; CPUSS Inter Process Communication Interrupt #6 
+                DCD     cpuss_interrupts_ipc_7_IRQHandler     ; CPUSS Inter Process Communication Interrupt #7 
+                DCD     cpuss_interrupts_ipc_8_IRQHandler     ; CPUSS Inter Process Communication Interrupt #8 
+                DCD     cpuss_interrupts_ipc_9_IRQHandler     ; CPUSS Inter Process Communication Interrupt #9 
+                DCD     cpuss_interrupts_ipc_10_IRQHandler    ; CPUSS Inter Process Communication Interrupt #10 
+                DCD     cpuss_interrupts_ipc_11_IRQHandler    ; CPUSS Inter Process Communication Interrupt #11 
+                DCD     cpuss_interrupts_ipc_12_IRQHandler    ; CPUSS Inter Process Communication Interrupt #12 
+                DCD     cpuss_interrupts_ipc_13_IRQHandler    ; CPUSS Inter Process Communication Interrupt #13 
+                DCD     cpuss_interrupts_ipc_14_IRQHandler    ; CPUSS Inter Process Communication Interrupt #14 
+                DCD     cpuss_interrupts_ipc_15_IRQHandler    ; CPUSS Inter Process Communication Interrupt #15 
+                DCD     scb_0_interrupt_IRQHandler            ; Serial Communication Block #0 
+                DCD     scb_1_interrupt_IRQHandler            ; Serial Communication Block #1 
+                DCD     scb_2_interrupt_IRQHandler            ; Serial Communication Block #2 
+                DCD     scb_3_interrupt_IRQHandler            ; Serial Communication Block #3 
+                DCD     scb_4_interrupt_IRQHandler            ; Serial Communication Block #4 
+                DCD     scb_5_interrupt_IRQHandler            ; Serial Communication Block #5 
+                DCD     scb_6_interrupt_IRQHandler            ; Serial Communication Block #6 
+                DCD     scb_7_interrupt_IRQHandler            ; Serial Communication Block #7 
+                DCD     csd_interrupt_IRQHandler              ; CSD (Capsense) interrupt 
+                DCD     cpuss_interrupts_dw0_0_IRQHandler     ; CPUSS DataWire #0, Channel #0 
+                DCD     cpuss_interrupts_dw0_1_IRQHandler     ; CPUSS DataWire #0, Channel #1 
+                DCD     cpuss_interrupts_dw0_2_IRQHandler     ; CPUSS DataWire #0, Channel #2 
+                DCD     cpuss_interrupts_dw0_3_IRQHandler     ; CPUSS DataWire #0, Channel #3 
+                DCD     cpuss_interrupts_dw0_4_IRQHandler     ; CPUSS DataWire #0, Channel #4 
+                DCD     cpuss_interrupts_dw0_5_IRQHandler     ; CPUSS DataWire #0, Channel #5 
+                DCD     cpuss_interrupts_dw0_6_IRQHandler     ; CPUSS DataWire #0, Channel #6 
+                DCD     cpuss_interrupts_dw0_7_IRQHandler     ; CPUSS DataWire #0, Channel #7 
+                DCD     cpuss_interrupts_dw0_8_IRQHandler     ; CPUSS DataWire #0, Channel #8 
+                DCD     cpuss_interrupts_dw0_9_IRQHandler     ; CPUSS DataWire #0, Channel #9 
+                DCD     cpuss_interrupts_dw0_10_IRQHandler    ; CPUSS DataWire #0, Channel #10 
+                DCD     cpuss_interrupts_dw0_11_IRQHandler    ; CPUSS DataWire #0, Channel #11 
+                DCD     cpuss_interrupts_dw0_12_IRQHandler    ; CPUSS DataWire #0, Channel #12 
+                DCD     cpuss_interrupts_dw0_13_IRQHandler    ; CPUSS DataWire #0, Channel #13 
+                DCD     cpuss_interrupts_dw0_14_IRQHandler    ; CPUSS DataWire #0, Channel #14 
+                DCD     cpuss_interrupts_dw0_15_IRQHandler    ; CPUSS DataWire #0, Channel #15 
+                DCD     cpuss_interrupts_dw1_0_IRQHandler     ; CPUSS DataWire #1, Channel #0 
+                DCD     cpuss_interrupts_dw1_1_IRQHandler     ; CPUSS DataWire #1, Channel #1 
+                DCD     cpuss_interrupts_dw1_2_IRQHandler     ; CPUSS DataWire #1, Channel #2 
+                DCD     cpuss_interrupts_dw1_3_IRQHandler     ; CPUSS DataWire #1, Channel #3 
+                DCD     cpuss_interrupts_dw1_4_IRQHandler     ; CPUSS DataWire #1, Channel #4 
+                DCD     cpuss_interrupts_dw1_5_IRQHandler     ; CPUSS DataWire #1, Channel #5 
+                DCD     cpuss_interrupts_dw1_6_IRQHandler     ; CPUSS DataWire #1, Channel #6 
+                DCD     cpuss_interrupts_dw1_7_IRQHandler     ; CPUSS DataWire #1, Channel #7 
+                DCD     cpuss_interrupts_dw1_8_IRQHandler     ; CPUSS DataWire #1, Channel #8 
+                DCD     cpuss_interrupts_dw1_9_IRQHandler     ; CPUSS DataWire #1, Channel #9 
+                DCD     cpuss_interrupts_dw1_10_IRQHandler    ; CPUSS DataWire #1, Channel #10 
+                DCD     cpuss_interrupts_dw1_11_IRQHandler    ; CPUSS DataWire #1, Channel #11 
+                DCD     cpuss_interrupts_dw1_12_IRQHandler    ; CPUSS DataWire #1, Channel #12 
+                DCD     cpuss_interrupts_dw1_13_IRQHandler    ; CPUSS DataWire #1, Channel #13 
+                DCD     cpuss_interrupts_dw1_14_IRQHandler    ; CPUSS DataWire #1, Channel #14 
+                DCD     cpuss_interrupts_dw1_15_IRQHandler    ; CPUSS DataWire #1, Channel #15 
+                DCD     cpuss_interrupts_fault_0_IRQHandler   ; CPUSS Fault Structure Interrupt #0 
+                DCD     cpuss_interrupts_fault_1_IRQHandler   ; CPUSS Fault Structure Interrupt #1 
+                DCD     cpuss_interrupt_crypto_IRQHandler     ; CRYPTO Accelerator Interrupt 
+                DCD     cpuss_interrupt_fm_IRQHandler         ; FLASH Macro Interrupt 
+                DCD     cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0 
+                DCD     cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1 
+                DCD     cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0 
+                DCD     cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1 
+                DCD     tcpwm_0_interrupts_0_IRQHandler       ; TCPWM #0, Counter #0 
+                DCD     tcpwm_0_interrupts_1_IRQHandler       ; TCPWM #0, Counter #1 
+                DCD     tcpwm_0_interrupts_2_IRQHandler       ; TCPWM #0, Counter #2 
+                DCD     tcpwm_0_interrupts_3_IRQHandler       ; TCPWM #0, Counter #3 
+                DCD     tcpwm_0_interrupts_4_IRQHandler       ; TCPWM #0, Counter #4 
+                DCD     tcpwm_0_interrupts_5_IRQHandler       ; TCPWM #0, Counter #5 
+                DCD     tcpwm_0_interrupts_6_IRQHandler       ; TCPWM #0, Counter #6 
+                DCD     tcpwm_0_interrupts_7_IRQHandler       ; TCPWM #0, Counter #7 
+                DCD     tcpwm_1_interrupts_0_IRQHandler       ; TCPWM #1, Counter #0 
+                DCD     tcpwm_1_interrupts_1_IRQHandler       ; TCPWM #1, Counter #1 
+                DCD     tcpwm_1_interrupts_2_IRQHandler       ; TCPWM #1, Counter #2 
+                DCD     tcpwm_1_interrupts_3_IRQHandler       ; TCPWM #1, Counter #3 
+                DCD     tcpwm_1_interrupts_4_IRQHandler       ; TCPWM #1, Counter #4 
+                DCD     tcpwm_1_interrupts_5_IRQHandler       ; TCPWM #1, Counter #5 
+                DCD     tcpwm_1_interrupts_6_IRQHandler       ; TCPWM #1, Counter #6 
+                DCD     tcpwm_1_interrupts_7_IRQHandler       ; TCPWM #1, Counter #7 
+                DCD     tcpwm_1_interrupts_8_IRQHandler       ; TCPWM #1, Counter #8 
+                DCD     tcpwm_1_interrupts_9_IRQHandler       ; TCPWM #1, Counter #9 
+                DCD     tcpwm_1_interrupts_10_IRQHandler      ; TCPWM #1, Counter #10 
+                DCD     tcpwm_1_interrupts_11_IRQHandler      ; TCPWM #1, Counter #11 
+                DCD     tcpwm_1_interrupts_12_IRQHandler      ; TCPWM #1, Counter #12 
+                DCD     tcpwm_1_interrupts_13_IRQHandler      ; TCPWM #1, Counter #13 
+                DCD     tcpwm_1_interrupts_14_IRQHandler      ; TCPWM #1, Counter #14 
+                DCD     tcpwm_1_interrupts_15_IRQHandler      ; TCPWM #1, Counter #15 
+                DCD     tcpwm_1_interrupts_16_IRQHandler      ; TCPWM #1, Counter #16 
+                DCD     tcpwm_1_interrupts_17_IRQHandler      ; TCPWM #1, Counter #17 
+                DCD     tcpwm_1_interrupts_18_IRQHandler      ; TCPWM #1, Counter #18 
+                DCD     tcpwm_1_interrupts_19_IRQHandler      ; TCPWM #1, Counter #19 
+                DCD     tcpwm_1_interrupts_20_IRQHandler      ; TCPWM #1, Counter #20 
+                DCD     tcpwm_1_interrupts_21_IRQHandler      ; TCPWM #1, Counter #21 
+                DCD     tcpwm_1_interrupts_22_IRQHandler      ; TCPWM #1, Counter #22 
+                DCD     tcpwm_1_interrupts_23_IRQHandler      ; TCPWM #1, Counter #23 
+                DCD     udb_interrupts_0_IRQHandler           ; UDB Interrupt #0 
+                DCD     udb_interrupts_1_IRQHandler           ; UDB Interrupt #1 
+                DCD     udb_interrupts_2_IRQHandler           ; UDB Interrupt #2 
+                DCD     udb_interrupts_3_IRQHandler           ; UDB Interrupt #3 
+                DCD     udb_interrupts_4_IRQHandler           ; UDB Interrupt #4 
+                DCD     udb_interrupts_5_IRQHandler           ; UDB Interrupt #5 
+                DCD     udb_interrupts_6_IRQHandler           ; UDB Interrupt #6 
+                DCD     udb_interrupts_7_IRQHandler           ; UDB Interrupt #7 
+                DCD     udb_interrupts_8_IRQHandler           ; UDB Interrupt #8 
+                DCD     udb_interrupts_9_IRQHandler           ; UDB Interrupt #9 
+                DCD     udb_interrupts_10_IRQHandler          ; UDB Interrupt #10 
+                DCD     udb_interrupts_11_IRQHandler          ; UDB Interrupt #11 
+                DCD     udb_interrupts_12_IRQHandler          ; UDB Interrupt #12 
+                DCD     udb_interrupts_13_IRQHandler          ; UDB Interrupt #13 
+                DCD     udb_interrupts_14_IRQHandler          ; UDB Interrupt #14 
+                DCD     udb_interrupts_15_IRQHandler          ; UDB Interrupt #15 
+                DCD     pass_interrupt_sar_IRQHandler         ; SAR ADC interrupt 
+                DCD     audioss_interrupt_i2s_IRQHandler      ; I2S Audio interrupt 
+                DCD     audioss_interrupt_pdm_IRQHandler      ; PDM/PCM Audio interrupt 
+                DCD     profile_interrupt_IRQHandler          ; Energy Profiler interrupt 
+                DCD     smif_interrupt_IRQHandler             ; Serial Memory Interface interrupt 
+                DCD     usb_interrupt_hi_IRQHandler           ; USB Interrupt 
+                DCD     usb_interrupt_med_IRQHandler          ; USB Interrupt 
+                DCD     usb_interrupt_lo_IRQHandler           ; USB Interrupt 
+                DCD     pass_interrupt_dacs_IRQHandler        ; Consolidated interrrupt for all DACs 
+
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+                EXPORT __ramVectors
+                AREA    RESET_RAM, READWRITE, NOINIT
+__ramVectors    SPACE   __Vectors_Size
+
+
+                AREA    |.text|, CODE, READONLY
+
+
+; Weak function for startup customization
+;
+; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) 
+; because this function is executed as the first instruction in the ResetHandler.
+; The PDL is also not initialized to use the proper register offsets.
+; The user of this function is responsible for initializing the PDL and resources before using them.
+;
+Cy_OnResetUser  PROC
+                EXPORT  Cy_OnResetUser            [WEAK]
+                BX      LR
+                ENDP
+
+; Reset Handler
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  Cy_SystemInitFpuEnable
+                IMPORT  __main
+
+                ; Define strong function for startup customization
+                BL      Cy_OnResetUser
+
+                ; Disable global interrupts
+                CPSID I
+
+                ; Copy vectors from ROM to RAM
+                LDR r1, =__Vectors
+                LDR r0, =__ramVectors
+                LDR r2, =__Vectors_Size
+Vectors_Copy
+                LDR r3, [r1]
+                STR r3, [r0]
+                ADDS r0, r0, #4
+                ADDS r1, r1, #4
+                SUBS r2, r2, #1
+                CMP r2, #0
+                BNE Vectors_Copy
+
+                ; Update Vector Table Offset Register. */
+                LDR r0, =__ramVectors
+                LDR r1, =0xE000ED08
+                STR r0, [r1]
+                dsb 0xF
+
+                ; Enable the FPU if used
+                LDR     R0, =Cy_SystemInitFpuEnable
+                BLX     R0
+                
+                LDR     R0, =__main
+                BLX     R0
+
+                ; Should never get here
+                B       .
+
+                ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+NMI_Handler         PROC
+                    EXPORT  NMI_Handler               [WEAK]
+                    B       .
+                    ENDP
+
+Cy_SysLib_FaultHandler PROC
+                    EXPORT  Cy_SysLib_FaultHandler   [WEAK]
+                    B       .
+                    ENDP
+HardFault_Wrapper\
+                    PROC
+                    EXPORT HardFault_Wrapper         [WEAK]
+                    movs r0, #4
+                    mov r1, LR
+                    tst r0, r1
+                    beq L_MSP
+                    mrs r0, PSP
+                    bl L_API_call
+L_MSP
+                    mrs r0, MSP
+L_API_call
+                    bl Cy_SysLib_FaultHandler
+                    ENDP
+HardFault_Handler\
+                    PROC
+                    EXPORT  HardFault_Handler         [WEAK]
+                    B       HardFault_Wrapper
+                    ENDP
+MemManage_Handler\
+                    PROC
+                    EXPORT  MemManage_Handler         [WEAK]
+                    B       HardFault_Wrapper
+                    ENDP
+BusFault_Handler\
+                    PROC
+                    EXPORT  BusFault_Handler          [WEAK]
+                    B       HardFault_Wrapper
+                    ENDP
+UsageFault_Handler\
+                    PROC
+                    EXPORT  UsageFault_Handler        [WEAK]
+                    B       HardFault_Wrapper
+                    ENDP
+SVC_Handler         PROC
+                    EXPORT  SVC_Handler               [WEAK]
+                    B       .
+                    ENDP
+DebugMon_Handler\
+                    PROC
+                    EXPORT  DebugMon_Handler          [WEAK]
+                    B       .
+                    ENDP
+PendSV_Handler      PROC
+                    EXPORT  PendSV_Handler            [WEAK]
+                    B       .
+                    ENDP
+SysTick_Handler     PROC
+                    EXPORT  SysTick_Handler           [WEAK]
+                    B       .
+                    ENDP
+
+Default_Handler     PROC
+                    EXPORT  Default_Handler                       [WEAK]
+                    EXPORT  ioss_interrupts_gpio_0_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_1_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_2_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_3_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_4_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_5_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_6_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_7_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_8_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_9_IRQHandler     [WEAK]
+                    EXPORT  ioss_interrupts_gpio_10_IRQHandler    [WEAK]
+                    EXPORT  ioss_interrupts_gpio_11_IRQHandler    [WEAK]
+                    EXPORT  ioss_interrupts_gpio_12_IRQHandler    [WEAK]
+                    EXPORT  ioss_interrupts_gpio_13_IRQHandler    [WEAK]
+                    EXPORT  ioss_interrupts_gpio_14_IRQHandler    [WEAK]
+                    EXPORT  ioss_interrupt_gpio_IRQHandler        [WEAK]
+                    EXPORT  ioss_interrupt_vdd_IRQHandler         [WEAK]
+                    EXPORT  lpcomp_interrupt_IRQHandler           [WEAK]
+                    EXPORT  scb_8_interrupt_IRQHandler            [WEAK]
+                    EXPORT  srss_interrupt_mcwdt_0_IRQHandler     [WEAK]
+                    EXPORT  srss_interrupt_mcwdt_1_IRQHandler     [WEAK]
+                    EXPORT  srss_interrupt_backup_IRQHandler      [WEAK]
+                    EXPORT  srss_interrupt_IRQHandler             [WEAK]
+                    EXPORT  pass_interrupt_ctbs_IRQHandler        [WEAK]
+                    EXPORT  bless_interrupt_IRQHandler            [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_0_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_1_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_2_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_3_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_4_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_5_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_6_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_7_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_8_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_9_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_10_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_11_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_12_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_13_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_14_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_ipc_15_IRQHandler    [WEAK]
+                    EXPORT  scb_0_interrupt_IRQHandler            [WEAK]
+                    EXPORT  scb_1_interrupt_IRQHandler            [WEAK]
+                    EXPORT  scb_2_interrupt_IRQHandler            [WEAK]
+                    EXPORT  scb_3_interrupt_IRQHandler            [WEAK]
+                    EXPORT  scb_4_interrupt_IRQHandler            [WEAK]
+                    EXPORT  scb_5_interrupt_IRQHandler            [WEAK]
+                    EXPORT  scb_6_interrupt_IRQHandler            [WEAK]
+                    EXPORT  scb_7_interrupt_IRQHandler            [WEAK]
+                    EXPORT  csd_interrupt_IRQHandler              [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_0_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_1_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_2_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_3_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_4_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_5_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_6_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_7_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_8_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_9_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_10_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_11_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_12_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_13_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_14_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw0_15_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_0_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_1_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_2_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_3_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_4_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_5_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_6_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_7_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_8_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_9_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_10_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_11_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_12_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_13_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_14_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_dw1_15_IRQHandler    [WEAK]
+                    EXPORT  cpuss_interrupts_fault_0_IRQHandler   [WEAK]
+                    EXPORT  cpuss_interrupts_fault_1_IRQHandler   [WEAK]
+                    EXPORT  cpuss_interrupt_crypto_IRQHandler     [WEAK]
+                    EXPORT  cpuss_interrupt_fm_IRQHandler         [WEAK]
+                    EXPORT  cpuss_interrupts_cm0_cti_0_IRQHandler [WEAK]
+                    EXPORT  cpuss_interrupts_cm0_cti_1_IRQHandler [WEAK]
+                    EXPORT  cpuss_interrupts_cm4_cti_0_IRQHandler [WEAK]
+                    EXPORT  cpuss_interrupts_cm4_cti_1_IRQHandler [WEAK]
+                    EXPORT  tcpwm_0_interrupts_0_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_0_interrupts_1_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_0_interrupts_2_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_0_interrupts_3_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_0_interrupts_4_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_0_interrupts_5_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_0_interrupts_6_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_0_interrupts_7_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_0_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_1_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_2_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_3_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_4_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_5_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_6_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_7_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_8_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_9_IRQHandler       [WEAK]
+                    EXPORT  tcpwm_1_interrupts_10_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_11_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_12_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_13_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_14_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_15_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_16_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_17_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_18_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_19_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_20_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_21_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_22_IRQHandler      [WEAK]
+                    EXPORT  tcpwm_1_interrupts_23_IRQHandler      [WEAK]
+                    EXPORT  udb_interrupts_0_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_1_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_2_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_3_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_4_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_5_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_6_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_7_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_8_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_9_IRQHandler           [WEAK]
+                    EXPORT  udb_interrupts_10_IRQHandler          [WEAK]
+                    EXPORT  udb_interrupts_11_IRQHandler          [WEAK]
+                    EXPORT  udb_interrupts_12_IRQHandler          [WEAK]
+                    EXPORT  udb_interrupts_13_IRQHandler          [WEAK]
+                    EXPORT  udb_interrupts_14_IRQHandler          [WEAK]
+                    EXPORT  udb_interrupts_15_IRQHandler          [WEAK]
+                    EXPORT  pass_interrupt_sar_IRQHandler         [WEAK]
+                    EXPORT  audioss_interrupt_i2s_IRQHandler      [WEAK]
+                    EXPORT  audioss_interrupt_pdm_IRQHandler      [WEAK]
+                    EXPORT  profile_interrupt_IRQHandler          [WEAK]
+                    EXPORT  smif_interrupt_IRQHandler             [WEAK]
+                    EXPORT  usb_interrupt_hi_IRQHandler           [WEAK]
+                    EXPORT  usb_interrupt_med_IRQHandler          [WEAK]
+                    EXPORT  usb_interrupt_lo_IRQHandler           [WEAK]
+                    EXPORT  pass_interrupt_dacs_IRQHandler        [WEAK]
+
+ioss_interrupts_gpio_0_IRQHandler
+ioss_interrupts_gpio_1_IRQHandler
+ioss_interrupts_gpio_2_IRQHandler
+ioss_interrupts_gpio_3_IRQHandler
+ioss_interrupts_gpio_4_IRQHandler
+ioss_interrupts_gpio_5_IRQHandler
+ioss_interrupts_gpio_6_IRQHandler
+ioss_interrupts_gpio_7_IRQHandler
+ioss_interrupts_gpio_8_IRQHandler
+ioss_interrupts_gpio_9_IRQHandler
+ioss_interrupts_gpio_10_IRQHandler
+ioss_interrupts_gpio_11_IRQHandler
+ioss_interrupts_gpio_12_IRQHandler
+ioss_interrupts_gpio_13_IRQHandler
+ioss_interrupts_gpio_14_IRQHandler
+ioss_interrupt_gpio_IRQHandler
+ioss_interrupt_vdd_IRQHandler
+lpcomp_interrupt_IRQHandler
+scb_8_interrupt_IRQHandler
+srss_interrupt_mcwdt_0_IRQHandler
+srss_interrupt_mcwdt_1_IRQHandler
+srss_interrupt_backup_IRQHandler
+srss_interrupt_IRQHandler
+pass_interrupt_ctbs_IRQHandler
+bless_interrupt_IRQHandler
+cpuss_interrupts_ipc_0_IRQHandler
+cpuss_interrupts_ipc_1_IRQHandler
+cpuss_interrupts_ipc_2_IRQHandler
+cpuss_interrupts_ipc_3_IRQHandler
+cpuss_interrupts_ipc_4_IRQHandler
+cpuss_interrupts_ipc_5_IRQHandler
+cpuss_interrupts_ipc_6_IRQHandler
+cpuss_interrupts_ipc_7_IRQHandler
+cpuss_interrupts_ipc_8_IRQHandler
+cpuss_interrupts_ipc_9_IRQHandler
+cpuss_interrupts_ipc_10_IRQHandler
+cpuss_interrupts_ipc_11_IRQHandler
+cpuss_interrupts_ipc_12_IRQHandler
+cpuss_interrupts_ipc_13_IRQHandler
+cpuss_interrupts_ipc_14_IRQHandler
+cpuss_interrupts_ipc_15_IRQHandler
+scb_0_interrupt_IRQHandler
+scb_1_interrupt_IRQHandler
+scb_2_interrupt_IRQHandler
+scb_3_interrupt_IRQHandler
+scb_4_interrupt_IRQHandler
+scb_5_interrupt_IRQHandler
+scb_6_interrupt_IRQHandler
+scb_7_interrupt_IRQHandler
+csd_interrupt_IRQHandler
+cpuss_interrupts_dw0_0_IRQHandler
+cpuss_interrupts_dw0_1_IRQHandler
+cpuss_interrupts_dw0_2_IRQHandler
+cpuss_interrupts_dw0_3_IRQHandler
+cpuss_interrupts_dw0_4_IRQHandler
+cpuss_interrupts_dw0_5_IRQHandler
+cpuss_interrupts_dw0_6_IRQHandler
+cpuss_interrupts_dw0_7_IRQHandler
+cpuss_interrupts_dw0_8_IRQHandler
+cpuss_interrupts_dw0_9_IRQHandler
+cpuss_interrupts_dw0_10_IRQHandler
+cpuss_interrupts_dw0_11_IRQHandler
+cpuss_interrupts_dw0_12_IRQHandler
+cpuss_interrupts_dw0_13_IRQHandler
+cpuss_interrupts_dw0_14_IRQHandler
+cpuss_interrupts_dw0_15_IRQHandler
+cpuss_interrupts_dw1_0_IRQHandler
+cpuss_interrupts_dw1_1_IRQHandler
+cpuss_interrupts_dw1_2_IRQHandler
+cpuss_interrupts_dw1_3_IRQHandler
+cpuss_interrupts_dw1_4_IRQHandler
+cpuss_interrupts_dw1_5_IRQHandler
+cpuss_interrupts_dw1_6_IRQHandler
+cpuss_interrupts_dw1_7_IRQHandler
+cpuss_interrupts_dw1_8_IRQHandler
+cpuss_interrupts_dw1_9_IRQHandler
+cpuss_interrupts_dw1_10_IRQHandler
+cpuss_interrupts_dw1_11_IRQHandler
+cpuss_interrupts_dw1_12_IRQHandler
+cpuss_interrupts_dw1_13_IRQHandler
+cpuss_interrupts_dw1_14_IRQHandler
+cpuss_interrupts_dw1_15_IRQHandler
+cpuss_interrupts_fault_0_IRQHandler
+cpuss_interrupts_fault_1_IRQHandler
+cpuss_interrupt_crypto_IRQHandler
+cpuss_interrupt_fm_IRQHandler
+cpuss_interrupts_cm0_cti_0_IRQHandler
+cpuss_interrupts_cm0_cti_1_IRQHandler
+cpuss_interrupts_cm4_cti_0_IRQHandler
+cpuss_interrupts_cm4_cti_1_IRQHandler
+tcpwm_0_interrupts_0_IRQHandler
+tcpwm_0_interrupts_1_IRQHandler
+tcpwm_0_interrupts_2_IRQHandler
+tcpwm_0_interrupts_3_IRQHandler
+tcpwm_0_interrupts_4_IRQHandler
+tcpwm_0_interrupts_5_IRQHandler
+tcpwm_0_interrupts_6_IRQHandler
+tcpwm_0_interrupts_7_IRQHandler
+tcpwm_1_interrupts_0_IRQHandler
+tcpwm_1_interrupts_1_IRQHandler
+tcpwm_1_interrupts_2_IRQHandler
+tcpwm_1_interrupts_3_IRQHandler
+tcpwm_1_interrupts_4_IRQHandler
+tcpwm_1_interrupts_5_IRQHandler
+tcpwm_1_interrupts_6_IRQHandler
+tcpwm_1_interrupts_7_IRQHandler
+tcpwm_1_interrupts_8_IRQHandler
+tcpwm_1_interrupts_9_IRQHandler
+tcpwm_1_interrupts_10_IRQHandler
+tcpwm_1_interrupts_11_IRQHandler
+tcpwm_1_interrupts_12_IRQHandler
+tcpwm_1_interrupts_13_IRQHandler
+tcpwm_1_interrupts_14_IRQHandler
+tcpwm_1_interrupts_15_IRQHandler
+tcpwm_1_interrupts_16_IRQHandler
+tcpwm_1_interrupts_17_IRQHandler
+tcpwm_1_interrupts_18_IRQHandler
+tcpwm_1_interrupts_19_IRQHandler
+tcpwm_1_interrupts_20_IRQHandler
+tcpwm_1_interrupts_21_IRQHandler
+tcpwm_1_interrupts_22_IRQHandler
+tcpwm_1_interrupts_23_IRQHandler
+udb_interrupts_0_IRQHandler
+udb_interrupts_1_IRQHandler
+udb_interrupts_2_IRQHandler
+udb_interrupts_3_IRQHandler
+udb_interrupts_4_IRQHandler
+udb_interrupts_5_IRQHandler
+udb_interrupts_6_IRQHandler
+udb_interrupts_7_IRQHandler
+udb_interrupts_8_IRQHandler
+udb_interrupts_9_IRQHandler
+udb_interrupts_10_IRQHandler
+udb_interrupts_11_IRQHandler
+udb_interrupts_12_IRQHandler
+udb_interrupts_13_IRQHandler
+udb_interrupts_14_IRQHandler
+udb_interrupts_15_IRQHandler
+pass_interrupt_sar_IRQHandler
+audioss_interrupt_i2s_IRQHandler
+audioss_interrupt_pdm_IRQHandler
+profile_interrupt_IRQHandler
+smif_interrupt_IRQHandler
+usb_interrupt_hi_IRQHandler
+usb_interrupt_med_IRQHandler
+usb_interrupt_lo_IRQHandler
+pass_interrupt_dacs_IRQHandler
+
+                B       .
+                ENDP
+
+                ALIGN
+
+
+; User Initial Stack & Heap
+                IMPORT   __use_two_region_memory
+
+                END
+
+
+; [] END OF FILE

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/startup/TOOLCHAIN_A_Clang/startup_psoc6_01_cm4.S

@@ -0,0 +1,554 @@
+/**************************************************************************//**
+ * @file     startup_psoc6_01_cm4.S
+ * @brief    CMSIS Core Device Startup File for
+ *           ARMCM4 Device Series
+ * @version  V5.00
+ * @date     02. March 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+    /* Address of the NMI handler */
+    #define CY_NMI_HANLDER_ADDR         0x0000000D
+
+    /* The CPU VTOR register */
+    #define CY_CPU_VTOR_ADDR            0xE000ED08
+
+    .syntax    unified
+    .section  __STACK , __stack
+    .align 3
+
+#ifdef __STACK_SIZE
+    .equ    Stack_Size, __STACK_SIZE
+#else
+    .equ    Stack_Size, 0x00001000
+#endif
+    .globl    __StackTop
+    .globl    __StackLimit
+    __StackLimit:
+    .space    Stack_Size
+    .equ    __StackTop, . - Stack_Size
+
+    .section __HEAP, __heap
+    .align    3
+#ifdef __HEAP_SIZE
+    .equ    Heap_Size, __HEAP_SIZE
+#else
+    .equ    Heap_Size, 0x00000400
+#endif
+    .globl    __HeapBase
+__HeapBase:
+    .if    Heap_Size
+        .space    Heap_Size
+    .endif
+
+    .section __VECT, ___Vectors
+    .align 2
+    .globl    ___Vectors
+___Vectors:
+    .long    __StackTop            /* Top of Stack */
+    .long    Reset_Handler+1       /* Reset Handler. Added +1, clang doesn't make lsb to 1 for thumb */
+    .long    CY_NMI_HANLDER_ADDR   /* NMI Handler */
+    .long    HardFault_Handler     /* Hard Fault Handler */
+    .long    MemManage_Handler     /* MPU Fault Handler */
+    .long    BusFault_Handler      /* Bus Fault Handler */
+    .long    UsageFault_Handler    /* Usage Fault Handler */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    SVC_Handler           /* SVCall Handler */
+    .long    DebugMon_Handler      /* Debug Monitor Handler */
+    .long    0                     /* Reserved */
+    .long    PendSV_Handler        /* PendSV Handler */
+    .long    SysTick_Handler       /* SysTick Handler */
+
+     /* External interrupts                             Description */
+    .long    ioss_interrupts_gpio_0_IRQHandler       /* GPIO Port Interrupt #0 */
+    .long    ioss_interrupts_gpio_1_IRQHandler       /* GPIO Port Interrupt #1 */
+    .long    ioss_interrupts_gpio_2_IRQHandler       /* GPIO Port Interrupt #2 */
+    .long    ioss_interrupts_gpio_3_IRQHandler       /* GPIO Port Interrupt #3 */
+    .long    ioss_interrupts_gpio_4_IRQHandler       /* GPIO Port Interrupt #4 */
+    .long    ioss_interrupts_gpio_5_IRQHandler       /* GPIO Port Interrupt #5 */
+    .long    ioss_interrupts_gpio_6_IRQHandler       /* GPIO Port Interrupt #6 */
+    .long    ioss_interrupts_gpio_7_IRQHandler       /* GPIO Port Interrupt #7 */
+    .long    ioss_interrupts_gpio_8_IRQHandler       /* GPIO Port Interrupt #8 */
+    .long    ioss_interrupts_gpio_9_IRQHandler       /* GPIO Port Interrupt #9 */
+    .long    ioss_interrupts_gpio_10_IRQHandler      /* GPIO Port Interrupt #10 */
+    .long    ioss_interrupts_gpio_11_IRQHandler      /* GPIO Port Interrupt #11 */
+    .long    ioss_interrupts_gpio_12_IRQHandler      /* GPIO Port Interrupt #12 */
+    .long    ioss_interrupts_gpio_13_IRQHandler      /* GPIO Port Interrupt #13 */
+    .long    ioss_interrupts_gpio_14_IRQHandler      /* GPIO Port Interrupt #14 */
+    .long    ioss_interrupt_gpio_IRQHandler          /* GPIO All Ports */
+    .long    ioss_interrupt_vdd_IRQHandler           /* GPIO Supply Detect Interrupt */
+    .long    lpcomp_interrupt_IRQHandler             /* Low Power Comparator Interrupt */
+    .long    scb_8_interrupt_IRQHandler              /* Serial Communication Block #8 (DeepSleep capable) */
+    .long    srss_interrupt_mcwdt_0_IRQHandler       /* Multi Counter Watchdog Timer interrupt */
+    .long    srss_interrupt_mcwdt_1_IRQHandler       /* Multi Counter Watchdog Timer interrupt */
+    .long    srss_interrupt_backup_IRQHandler        /* Backup domain interrupt */
+    .long    srss_interrupt_IRQHandler               /* Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) */
+    .long    pass_interrupt_ctbs_IRQHandler          /* CTBm Interrupt (all CTBms) */
+    .long    bless_interrupt_IRQHandler              /* Bluetooth Radio interrupt */
+    .long    cpuss_interrupts_ipc_0_IRQHandler       /* CPUSS Inter Process Communication Interrupt #0 */
+    .long    cpuss_interrupts_ipc_1_IRQHandler       /* CPUSS Inter Process Communication Interrupt #1 */
+    .long    cpuss_interrupts_ipc_2_IRQHandler       /* CPUSS Inter Process Communication Interrupt #2 */
+    .long    cpuss_interrupts_ipc_3_IRQHandler       /* CPUSS Inter Process Communication Interrupt #3 */
+    .long    cpuss_interrupts_ipc_4_IRQHandler       /* CPUSS Inter Process Communication Interrupt #4 */
+    .long    cpuss_interrupts_ipc_5_IRQHandler       /* CPUSS Inter Process Communication Interrupt #5 */
+    .long    cpuss_interrupts_ipc_6_IRQHandler       /* CPUSS Inter Process Communication Interrupt #6 */
+    .long    cpuss_interrupts_ipc_7_IRQHandler       /* CPUSS Inter Process Communication Interrupt #7 */
+    .long    cpuss_interrupts_ipc_8_IRQHandler       /* CPUSS Inter Process Communication Interrupt #8 */
+    .long    cpuss_interrupts_ipc_9_IRQHandler       /* CPUSS Inter Process Communication Interrupt #9 */
+    .long    cpuss_interrupts_ipc_10_IRQHandler      /* CPUSS Inter Process Communication Interrupt #10 */
+    .long    cpuss_interrupts_ipc_11_IRQHandler      /* CPUSS Inter Process Communication Interrupt #11 */
+    .long    cpuss_interrupts_ipc_12_IRQHandler      /* CPUSS Inter Process Communication Interrupt #12 */
+    .long    cpuss_interrupts_ipc_13_IRQHandler      /* CPUSS Inter Process Communication Interrupt #13 */
+    .long    cpuss_interrupts_ipc_14_IRQHandler      /* CPUSS Inter Process Communication Interrupt #14 */
+    .long    cpuss_interrupts_ipc_15_IRQHandler      /* CPUSS Inter Process Communication Interrupt #15 */
+    .long    scb_0_interrupt_IRQHandler              /* Serial Communication Block #0 */
+    .long    scb_1_interrupt_IRQHandler              /* Serial Communication Block #1 */
+    .long    scb_2_interrupt_IRQHandler              /* Serial Communication Block #2 */
+    .long    scb_3_interrupt_IRQHandler              /* Serial Communication Block #3 */
+    .long    scb_4_interrupt_IRQHandler              /* Serial Communication Block #4 */
+    .long    scb_5_interrupt_IRQHandler              /* Serial Communication Block #5 */
+    .long    scb_6_interrupt_IRQHandler              /* Serial Communication Block #6 */
+    .long    scb_7_interrupt_IRQHandler              /* Serial Communication Block #7 */
+    .long    csd_interrupt_IRQHandler                /* CSD (Capsense) interrupt */
+    .long    cpuss_interrupts_dw0_0_IRQHandler       /* CPUSS DataWire #0, Channel #0 */
+    .long    cpuss_interrupts_dw0_1_IRQHandler       /* CPUSS DataWire #0, Channel #1 */
+    .long    cpuss_interrupts_dw0_2_IRQHandler       /* CPUSS DataWire #0, Channel #2 */
+    .long    cpuss_interrupts_dw0_3_IRQHandler       /* CPUSS DataWire #0, Channel #3 */
+    .long    cpuss_interrupts_dw0_4_IRQHandler       /* CPUSS DataWire #0, Channel #4 */
+    .long    cpuss_interrupts_dw0_5_IRQHandler       /* CPUSS DataWire #0, Channel #5 */
+    .long    cpuss_interrupts_dw0_6_IRQHandler       /* CPUSS DataWire #0, Channel #6 */
+    .long    cpuss_interrupts_dw0_7_IRQHandler       /* CPUSS DataWire #0, Channel #7 */
+    .long    cpuss_interrupts_dw0_8_IRQHandler       /* CPUSS DataWire #0, Channel #8 */
+    .long    cpuss_interrupts_dw0_9_IRQHandler       /* CPUSS DataWire #0, Channel #9 */
+    .long    cpuss_interrupts_dw0_10_IRQHandler      /* CPUSS DataWire #0, Channel #10 */
+    .long    cpuss_interrupts_dw0_11_IRQHandler      /* CPUSS DataWire #0, Channel #11 */
+    .long    cpuss_interrupts_dw0_12_IRQHandler      /* CPUSS DataWire #0, Channel #12 */
+    .long    cpuss_interrupts_dw0_13_IRQHandler      /* CPUSS DataWire #0, Channel #13 */
+    .long    cpuss_interrupts_dw0_14_IRQHandler      /* CPUSS DataWire #0, Channel #14 */
+    .long    cpuss_interrupts_dw0_15_IRQHandler      /* CPUSS DataWire #0, Channel #15 */
+    .long    cpuss_interrupts_dw1_0_IRQHandler       /* CPUSS DataWire #1, Channel #0 */
+    .long    cpuss_interrupts_dw1_1_IRQHandler       /* CPUSS DataWire #1, Channel #1 */
+    .long    cpuss_interrupts_dw1_2_IRQHandler       /* CPUSS DataWire #1, Channel #2 */
+    .long    cpuss_interrupts_dw1_3_IRQHandler       /* CPUSS DataWire #1, Channel #3 */
+    .long    cpuss_interrupts_dw1_4_IRQHandler       /* CPUSS DataWire #1, Channel #4 */
+    .long    cpuss_interrupts_dw1_5_IRQHandler       /* CPUSS DataWire #1, Channel #5 */
+    .long    cpuss_interrupts_dw1_6_IRQHandler       /* CPUSS DataWire #1, Channel #6 */
+    .long    cpuss_interrupts_dw1_7_IRQHandler       /* CPUSS DataWire #1, Channel #7 */
+    .long    cpuss_interrupts_dw1_8_IRQHandler       /* CPUSS DataWire #1, Channel #8 */
+    .long    cpuss_interrupts_dw1_9_IRQHandler       /* CPUSS DataWire #1, Channel #9 */
+    .long    cpuss_interrupts_dw1_10_IRQHandler      /* CPUSS DataWire #1, Channel #10 */
+    .long    cpuss_interrupts_dw1_11_IRQHandler      /* CPUSS DataWire #1, Channel #11 */
+    .long    cpuss_interrupts_dw1_12_IRQHandler      /* CPUSS DataWire #1, Channel #12 */
+    .long    cpuss_interrupts_dw1_13_IRQHandler      /* CPUSS DataWire #1, Channel #13 */
+    .long    cpuss_interrupts_dw1_14_IRQHandler      /* CPUSS DataWire #1, Channel #14 */
+    .long    cpuss_interrupts_dw1_15_IRQHandler      /* CPUSS DataWire #1, Channel #15 */
+    .long    cpuss_interrupts_fault_0_IRQHandler     /* CPUSS Fault Structure Interrupt #0 */
+    .long    cpuss_interrupts_fault_1_IRQHandler     /* CPUSS Fault Structure Interrupt #1 */
+    .long    cpuss_interrupt_crypto_IRQHandler       /* CRYPTO Accelerator Interrupt */
+    .long    cpuss_interrupt_fm_IRQHandler           /* FLASH Macro Interrupt */
+    .long    cpuss_interrupts_cm0_cti_0_IRQHandler   /* CM0+ CTI #0 */
+    .long    cpuss_interrupts_cm0_cti_1_IRQHandler   /* CM0+ CTI #1 */
+    .long    cpuss_interrupts_cm4_cti_0_IRQHandler   /* CM4 CTI #0 */
+    .long    cpuss_interrupts_cm4_cti_1_IRQHandler   /* CM4 CTI #1 */
+    .long    tcpwm_0_interrupts_0_IRQHandler         /* TCPWM #0, Counter #0 */
+    .long    tcpwm_0_interrupts_1_IRQHandler         /* TCPWM #0, Counter #1 */
+    .long    tcpwm_0_interrupts_2_IRQHandler         /* TCPWM #0, Counter #2 */
+    .long    tcpwm_0_interrupts_3_IRQHandler         /* TCPWM #0, Counter #3 */
+    .long    tcpwm_0_interrupts_4_IRQHandler         /* TCPWM #0, Counter #4 */
+    .long    tcpwm_0_interrupts_5_IRQHandler         /* TCPWM #0, Counter #5 */
+    .long    tcpwm_0_interrupts_6_IRQHandler         /* TCPWM #0, Counter #6 */
+    .long    tcpwm_0_interrupts_7_IRQHandler         /* TCPWM #0, Counter #7 */
+    .long    tcpwm_1_interrupts_0_IRQHandler         /* TCPWM #1, Counter #0 */
+    .long    tcpwm_1_interrupts_1_IRQHandler         /* TCPWM #1, Counter #1 */
+    .long    tcpwm_1_interrupts_2_IRQHandler         /* TCPWM #1, Counter #2 */
+    .long    tcpwm_1_interrupts_3_IRQHandler         /* TCPWM #1, Counter #3 */
+    .long    tcpwm_1_interrupts_4_IRQHandler         /* TCPWM #1, Counter #4 */
+    .long    tcpwm_1_interrupts_5_IRQHandler         /* TCPWM #1, Counter #5 */
+    .long    tcpwm_1_interrupts_6_IRQHandler         /* TCPWM #1, Counter #6 */
+    .long    tcpwm_1_interrupts_7_IRQHandler         /* TCPWM #1, Counter #7 */
+    .long    tcpwm_1_interrupts_8_IRQHandler         /* TCPWM #1, Counter #8 */
+    .long    tcpwm_1_interrupts_9_IRQHandler         /* TCPWM #1, Counter #9 */
+    .long    tcpwm_1_interrupts_10_IRQHandler        /* TCPWM #1, Counter #10 */
+    .long    tcpwm_1_interrupts_11_IRQHandler        /* TCPWM #1, Counter #11 */
+    .long    tcpwm_1_interrupts_12_IRQHandler        /* TCPWM #1, Counter #12 */
+    .long    tcpwm_1_interrupts_13_IRQHandler        /* TCPWM #1, Counter #13 */
+    .long    tcpwm_1_interrupts_14_IRQHandler        /* TCPWM #1, Counter #14 */
+    .long    tcpwm_1_interrupts_15_IRQHandler        /* TCPWM #1, Counter #15 */
+    .long    tcpwm_1_interrupts_16_IRQHandler        /* TCPWM #1, Counter #16 */
+    .long    tcpwm_1_interrupts_17_IRQHandler        /* TCPWM #1, Counter #17 */
+    .long    tcpwm_1_interrupts_18_IRQHandler        /* TCPWM #1, Counter #18 */
+    .long    tcpwm_1_interrupts_19_IRQHandler        /* TCPWM #1, Counter #19 */
+    .long    tcpwm_1_interrupts_20_IRQHandler        /* TCPWM #1, Counter #20 */
+    .long    tcpwm_1_interrupts_21_IRQHandler        /* TCPWM #1, Counter #21 */
+    .long    tcpwm_1_interrupts_22_IRQHandler        /* TCPWM #1, Counter #22 */
+    .long    tcpwm_1_interrupts_23_IRQHandler        /* TCPWM #1, Counter #23 */
+    .long    udb_interrupts_0_IRQHandler             /* UDB Interrupt #0 */
+    .long    udb_interrupts_1_IRQHandler             /* UDB Interrupt #1 */
+    .long    udb_interrupts_2_IRQHandler             /* UDB Interrupt #2 */
+    .long    udb_interrupts_3_IRQHandler             /* UDB Interrupt #3 */
+    .long    udb_interrupts_4_IRQHandler             /* UDB Interrupt #4 */
+    .long    udb_interrupts_5_IRQHandler             /* UDB Interrupt #5 */
+    .long    udb_interrupts_6_IRQHandler             /* UDB Interrupt #6 */
+    .long    udb_interrupts_7_IRQHandler             /* UDB Interrupt #7 */
+    .long    udb_interrupts_8_IRQHandler             /* UDB Interrupt #8 */
+    .long    udb_interrupts_9_IRQHandler             /* UDB Interrupt #9 */
+    .long    udb_interrupts_10_IRQHandler            /* UDB Interrupt #10 */
+    .long    udb_interrupts_11_IRQHandler            /* UDB Interrupt #11 */
+    .long    udb_interrupts_12_IRQHandler            /* UDB Interrupt #12 */
+    .long    udb_interrupts_13_IRQHandler            /* UDB Interrupt #13 */
+    .long    udb_interrupts_14_IRQHandler            /* UDB Interrupt #14 */
+    .long    udb_interrupts_15_IRQHandler            /* UDB Interrupt #15 */
+    .long    pass_interrupt_sar_IRQHandler           /* SAR ADC interrupt */
+    .long    audioss_interrupt_i2s_IRQHandler        /* I2S Audio interrupt */
+    .long    audioss_interrupt_pdm_IRQHandler        /* PDM/PCM Audio interrupt */
+    .long    profile_interrupt_IRQHandler            /* Energy Profiler interrupt */
+    .long    smif_interrupt_IRQHandler               /* Serial Memory Interface interrupt */
+    .long    usb_interrupt_hi_IRQHandler             /* USB Interrupt */
+    .long    usb_interrupt_med_IRQHandler            /* USB Interrupt */
+    .long    usb_interrupt_lo_IRQHandler             /* USB Interrupt */
+    .long    pass_interrupt_dacs_IRQHandler          /* Consolidated interrrupt for all DACs */
+
+    .equ    __VectorsSize, . - ___Vectors
+
+    .section __RAMVECTORS, ___ramVectors
+    .align 2
+    .globl ___ramVectors
+___ramVectors:
+    .space  __VectorsSize
+
+
+    /* Only .text, otherwise the linker is smart enough to treat .thumb_func as 2 byte aligned and the
+    * Reset handler vector + 1 in the vector table ends up at +2 and boot fails. Clang/LLVM issue.
+    */
+    .text
+    /* Reset handler */
+    .globl Reset_Handler
+
+Reset_Handler:
+    bl Cy_OnResetUser
+    cpsid i
+
+/*  Single section scheme.
+ *
+ *  The ranges of copy from/to are specified by following symbols
+ *    __etext: LMA of start of the section to copy from. Usually end of text
+ *    __data_start__: VMA of start of the section to copy to
+ *    __data_end__: VMA of end of the section to copy to
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+    .equ    __copy_table_start__, ___Vectors
+    .equ    __data_start__, ___ramVectors
+    .equ    __data_end__, __data_start__ + __VectorsSize
+    ldr    r1, =__copy_table_start__
+    ldr    r2, =__data_start__
+    ldr    r3, =__data_end__
+.L_loop_copy_table:
+    subs   r4, r3, r2
+    ble    .L_loop_copy_table_done
+    ldr    r0, [r1,r4]
+    str    r0, [r2,r4]
+    subs   r3, #4
+    bgt    .L_loop_copy_table
+.L_loop_copy_table_done:
+    ldr    r1, =segment$end$__TEXT
+    ldr    r2, =section$start$__DATA$__data
+    ldr    r3, =section$end$__DATA$__data
+    mov    r4, #3
+    adds   r1, #3
+    mvn    r4, r4
+    and    r1, r4
+.L_loop_copy_data:
+    subs   r4, r3, r2
+    ble    .L_loop_copy_data_done
+    ldr    r0, [r1,r4]
+    str    r0, [r2,r4]
+    subs   r3, #4
+    bgt    .L_loop_copy_data
+.L_loop_copy_data_done:
+    ldr    r2, =section$start$__DATA$__bss
+    ldr    r3, =section$end$__DATA$__bss
+.L_loop_bss:
+    subs   r1, r3, r2
+    ble    .L_loop_bss_done
+    movs   r0, #0
+    str    r0, [r2,r1]
+    subs   r3, #4
+    bgt    .L_loop_bss
+.L_loop_bss_done:
+    ldr    r2, =section$start$__DATA$__zerofill
+    ldr    r3, =section$end$__DATA$__zerofill
+.L_loop_zerofill:
+    subs   r1, r3, r2
+    ble    .L_loop_zerofill_done
+    movs   r0, #0
+    str    r0, [r2,r1]
+    subs   r3, #4
+    bgt    .L_loop_zerofill
+.L_loop_zerofill_done:
+
+    /* Update Vector Table Offset Register. */
+    ldr r0, =___ramVectors
+    ldr r1, =CY_CPU_VTOR_ADDR
+    str r0, [r1]
+    dsb 0xF
+
+    /* Enable the FPU if used */
+    bl _Cy_SystemInitFpuEnable
+
+    bl _HeapInit
+#ifndef __NO_SYSTEM_INIT
+    bl  _SystemInit
+#endif
+
+    bl  _main
+
+    /* Should never get here */
+    b   .
+
+    .pool
+
+    .text
+    .thumb
+    .thumb_func
+    .align  2
+
+    /* Device startup customization */
+    .weak_definition   Cy_OnResetUser
+    .global   Cy_OnResetUser, Cy_OnResetUser
+Cy_OnResetUser:
+    bx lr
+
+    .text
+    .align    1
+    .thumb_func
+    .weak_reference    Default_Handler
+
+Default_Handler:
+    b    .
+
+    .text
+    .thumb_func
+    .align  2
+    .weak_definition    Cy_SysLib_FaultHandler
+
+Cy_SysLib_FaultHandler:
+    b    .
+
+    .text
+    .thumb_func
+    .align  2
+
+Fault_Handler:
+    /* Storing LR content for Creator call stack trace */
+    push {LR}
+    movs r0, #4
+    mov r1, LR
+    tst r0, r1
+    beq .L_MSP
+    mrs r0, PSP
+    b .L_API_call
+.L_MSP:
+    mrs r0, MSP
+.L_API_call:
+    /* Compensation of stack pointer address due to pushing 4 bytes of LR */
+    adds r0, r0, #4
+    bl Cy_SysLib_FaultHandler
+    b   .
+
+.macro    def_fault_Handler    fault_handler_name
+    .weak_definition    \fault_handler_name
+    .set    \fault_handler_name, Fault_Handler
+    .endm
+
+/*    Macro to define default handlers. Default handler
+ *    will be weak symbol and just dead loops. They can be
+ *    overwritten by other handlers */
+    .macro    def_irq_handler    handler_name
+    .weak_definition    \handler_name
+    .set    \handler_name, Default_Handler
+    .endm
+
+    def_irq_handler    NMI_Handler
+
+    def_fault_Handler HardFault_Handler
+    def_fault_Handler MemManage_Handler
+    def_fault_Handler BusFault_Handler
+    def_fault_Handler UsageFault_Handler
+
+    def_irq_handler    SVC_Handler
+    def_irq_handler    DebugMon_Handler
+    def_irq_handler    PendSV_Handler
+    def_irq_handler    SysTick_Handler
+
+    def_irq_handler  ioss_interrupts_gpio_0_IRQHandler       /* GPIO Port Interrupt #0 */
+    def_irq_handler  ioss_interrupts_gpio_1_IRQHandler       /* GPIO Port Interrupt #1 */
+    def_irq_handler  ioss_interrupts_gpio_2_IRQHandler       /* GPIO Port Interrupt #2 */
+    def_irq_handler  ioss_interrupts_gpio_3_IRQHandler       /* GPIO Port Interrupt #3 */
+    def_irq_handler  ioss_interrupts_gpio_4_IRQHandler       /* GPIO Port Interrupt #4 */
+    def_irq_handler  ioss_interrupts_gpio_5_IRQHandler       /* GPIO Port Interrupt #5 */
+    def_irq_handler  ioss_interrupts_gpio_6_IRQHandler       /* GPIO Port Interrupt #6 */
+    def_irq_handler  ioss_interrupts_gpio_7_IRQHandler       /* GPIO Port Interrupt #7 */
+    def_irq_handler  ioss_interrupts_gpio_8_IRQHandler       /* GPIO Port Interrupt #8 */
+    def_irq_handler  ioss_interrupts_gpio_9_IRQHandler       /* GPIO Port Interrupt #9 */
+    def_irq_handler  ioss_interrupts_gpio_10_IRQHandler      /* GPIO Port Interrupt #10 */
+    def_irq_handler  ioss_interrupts_gpio_11_IRQHandler      /* GPIO Port Interrupt #11 */
+    def_irq_handler  ioss_interrupts_gpio_12_IRQHandler      /* GPIO Port Interrupt #12 */
+    def_irq_handler  ioss_interrupts_gpio_13_IRQHandler      /* GPIO Port Interrupt #13 */
+    def_irq_handler  ioss_interrupts_gpio_14_IRQHandler      /* GPIO Port Interrupt #14 */
+    def_irq_handler  ioss_interrupt_gpio_IRQHandler          /* GPIO All Ports */
+    def_irq_handler  ioss_interrupt_vdd_IRQHandler           /* GPIO Supply Detect Interrupt */
+    def_irq_handler  lpcomp_interrupt_IRQHandler             /* Low Power Comparator Interrupt */
+    def_irq_handler  scb_8_interrupt_IRQHandler              /* Serial Communication Block #8 (DeepSleep capable) */
+    def_irq_handler  srss_interrupt_mcwdt_0_IRQHandler       /* Multi Counter Watchdog Timer interrupt */
+    def_irq_handler  srss_interrupt_mcwdt_1_IRQHandler       /* Multi Counter Watchdog Timer interrupt */
+    def_irq_handler  srss_interrupt_backup_IRQHandler        /* Backup domain interrupt */
+    def_irq_handler  srss_interrupt_IRQHandler               /* Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) */
+    def_irq_handler  pass_interrupt_ctbs_IRQHandler          /* CTBm Interrupt (all CTBms) */
+    def_irq_handler  bless_interrupt_IRQHandler              /* Bluetooth Radio interrupt */
+    def_irq_handler  cpuss_interrupts_ipc_0_IRQHandler       /* CPUSS Inter Process Communication Interrupt #0 */
+    def_irq_handler  cpuss_interrupts_ipc_1_IRQHandler       /* CPUSS Inter Process Communication Interrupt #1 */
+    def_irq_handler  cpuss_interrupts_ipc_2_IRQHandler       /* CPUSS Inter Process Communication Interrupt #2 */
+    def_irq_handler  cpuss_interrupts_ipc_3_IRQHandler       /* CPUSS Inter Process Communication Interrupt #3 */
+    def_irq_handler  cpuss_interrupts_ipc_4_IRQHandler       /* CPUSS Inter Process Communication Interrupt #4 */
+    def_irq_handler  cpuss_interrupts_ipc_5_IRQHandler       /* CPUSS Inter Process Communication Interrupt #5 */
+    def_irq_handler  cpuss_interrupts_ipc_6_IRQHandler       /* CPUSS Inter Process Communication Interrupt #6 */
+    def_irq_handler  cpuss_interrupts_ipc_7_IRQHandler       /* CPUSS Inter Process Communication Interrupt #7 */
+    def_irq_handler  cpuss_interrupts_ipc_8_IRQHandler       /* CPUSS Inter Process Communication Interrupt #8 */
+    def_irq_handler  cpuss_interrupts_ipc_9_IRQHandler       /* CPUSS Inter Process Communication Interrupt #9 */
+    def_irq_handler  cpuss_interrupts_ipc_10_IRQHandler      /* CPUSS Inter Process Communication Interrupt #10 */
+    def_irq_handler  cpuss_interrupts_ipc_11_IRQHandler      /* CPUSS Inter Process Communication Interrupt #11 */
+    def_irq_handler  cpuss_interrupts_ipc_12_IRQHandler      /* CPUSS Inter Process Communication Interrupt #12 */
+    def_irq_handler  cpuss_interrupts_ipc_13_IRQHandler      /* CPUSS Inter Process Communication Interrupt #13 */
+    def_irq_handler  cpuss_interrupts_ipc_14_IRQHandler      /* CPUSS Inter Process Communication Interrupt #14 */
+    def_irq_handler  cpuss_interrupts_ipc_15_IRQHandler      /* CPUSS Inter Process Communication Interrupt #15 */
+    def_irq_handler  scb_0_interrupt_IRQHandler              /* Serial Communication Block #0 */
+    def_irq_handler  scb_1_interrupt_IRQHandler              /* Serial Communication Block #1 */
+    def_irq_handler  scb_2_interrupt_IRQHandler              /* Serial Communication Block #2 */
+    def_irq_handler  scb_3_interrupt_IRQHandler              /* Serial Communication Block #3 */
+    def_irq_handler  scb_4_interrupt_IRQHandler              /* Serial Communication Block #4 */
+    def_irq_handler  scb_5_interrupt_IRQHandler              /* Serial Communication Block #5 */
+    def_irq_handler  scb_6_interrupt_IRQHandler              /* Serial Communication Block #6 */
+    def_irq_handler  scb_7_interrupt_IRQHandler              /* Serial Communication Block #7 */
+    def_irq_handler  csd_interrupt_IRQHandler                /* CSD (Capsense) interrupt */
+    def_irq_handler  cpuss_interrupts_dw0_0_IRQHandler       /* CPUSS DataWire #0, Channel #0 */
+    def_irq_handler  cpuss_interrupts_dw0_1_IRQHandler       /* CPUSS DataWire #0, Channel #1 */
+    def_irq_handler  cpuss_interrupts_dw0_2_IRQHandler       /* CPUSS DataWire #0, Channel #2 */
+    def_irq_handler  cpuss_interrupts_dw0_3_IRQHandler       /* CPUSS DataWire #0, Channel #3 */
+    def_irq_handler  cpuss_interrupts_dw0_4_IRQHandler       /* CPUSS DataWire #0, Channel #4 */
+    def_irq_handler  cpuss_interrupts_dw0_5_IRQHandler       /* CPUSS DataWire #0, Channel #5 */
+    def_irq_handler  cpuss_interrupts_dw0_6_IRQHandler       /* CPUSS DataWire #0, Channel #6 */
+    def_irq_handler  cpuss_interrupts_dw0_7_IRQHandler       /* CPUSS DataWire #0, Channel #7 */
+    def_irq_handler  cpuss_interrupts_dw0_8_IRQHandler       /* CPUSS DataWire #0, Channel #8 */
+    def_irq_handler  cpuss_interrupts_dw0_9_IRQHandler       /* CPUSS DataWire #0, Channel #9 */
+    def_irq_handler  cpuss_interrupts_dw0_10_IRQHandler      /* CPUSS DataWire #0, Channel #10 */
+    def_irq_handler  cpuss_interrupts_dw0_11_IRQHandler      /* CPUSS DataWire #0, Channel #11 */
+    def_irq_handler  cpuss_interrupts_dw0_12_IRQHandler      /* CPUSS DataWire #0, Channel #12 */
+    def_irq_handler  cpuss_interrupts_dw0_13_IRQHandler      /* CPUSS DataWire #0, Channel #13 */
+    def_irq_handler  cpuss_interrupts_dw0_14_IRQHandler      /* CPUSS DataWire #0, Channel #14 */
+    def_irq_handler  cpuss_interrupts_dw0_15_IRQHandler      /* CPUSS DataWire #0, Channel #15 */
+    def_irq_handler  cpuss_interrupts_dw1_0_IRQHandler       /* CPUSS DataWire #1, Channel #0 */
+    def_irq_handler  cpuss_interrupts_dw1_1_IRQHandler       /* CPUSS DataWire #1, Channel #1 */
+    def_irq_handler  cpuss_interrupts_dw1_2_IRQHandler       /* CPUSS DataWire #1, Channel #2 */
+    def_irq_handler  cpuss_interrupts_dw1_3_IRQHandler       /* CPUSS DataWire #1, Channel #3 */
+    def_irq_handler  cpuss_interrupts_dw1_4_IRQHandler       /* CPUSS DataWire #1, Channel #4 */
+    def_irq_handler  cpuss_interrupts_dw1_5_IRQHandler       /* CPUSS DataWire #1, Channel #5 */
+    def_irq_handler  cpuss_interrupts_dw1_6_IRQHandler       /* CPUSS DataWire #1, Channel #6 */
+    def_irq_handler  cpuss_interrupts_dw1_7_IRQHandler       /* CPUSS DataWire #1, Channel #7 */
+    def_irq_handler  cpuss_interrupts_dw1_8_IRQHandler       /* CPUSS DataWire #1, Channel #8 */
+    def_irq_handler  cpuss_interrupts_dw1_9_IRQHandler       /* CPUSS DataWire #1, Channel #9 */
+    def_irq_handler  cpuss_interrupts_dw1_10_IRQHandler      /* CPUSS DataWire #1, Channel #10 */
+    def_irq_handler  cpuss_interrupts_dw1_11_IRQHandler      /* CPUSS DataWire #1, Channel #11 */
+    def_irq_handler  cpuss_interrupts_dw1_12_IRQHandler      /* CPUSS DataWire #1, Channel #12 */
+    def_irq_handler  cpuss_interrupts_dw1_13_IRQHandler      /* CPUSS DataWire #1, Channel #13 */
+    def_irq_handler  cpuss_interrupts_dw1_14_IRQHandler      /* CPUSS DataWire #1, Channel #14 */
+    def_irq_handler  cpuss_interrupts_dw1_15_IRQHandler      /* CPUSS DataWire #1, Channel #15 */
+    def_irq_handler  cpuss_interrupts_fault_0_IRQHandler     /* CPUSS Fault Structure Interrupt #0 */
+    def_irq_handler  cpuss_interrupts_fault_1_IRQHandler     /* CPUSS Fault Structure Interrupt #1 */
+    def_irq_handler  cpuss_interrupt_crypto_IRQHandler       /* CRYPTO Accelerator Interrupt */
+    def_irq_handler  cpuss_interrupt_fm_IRQHandler           /* FLASH Macro Interrupt */
+    def_irq_handler  cpuss_interrupts_cm0_cti_0_IRQHandler   /* CM0+ CTI #0 */
+    def_irq_handler  cpuss_interrupts_cm0_cti_1_IRQHandler   /* CM0+ CTI #1 */
+    def_irq_handler  cpuss_interrupts_cm4_cti_0_IRQHandler   /* CM4 CTI #0 */
+    def_irq_handler  cpuss_interrupts_cm4_cti_1_IRQHandler   /* CM4 CTI #1 */
+    def_irq_handler  tcpwm_0_interrupts_0_IRQHandler         /* TCPWM #0, Counter #0 */
+    def_irq_handler  tcpwm_0_interrupts_1_IRQHandler         /* TCPWM #0, Counter #1 */
+    def_irq_handler  tcpwm_0_interrupts_2_IRQHandler         /* TCPWM #0, Counter #2 */
+    def_irq_handler  tcpwm_0_interrupts_3_IRQHandler         /* TCPWM #0, Counter #3 */
+    def_irq_handler  tcpwm_0_interrupts_4_IRQHandler         /* TCPWM #0, Counter #4 */
+    def_irq_handler  tcpwm_0_interrupts_5_IRQHandler         /* TCPWM #0, Counter #5 */
+    def_irq_handler  tcpwm_0_interrupts_6_IRQHandler         /* TCPWM #0, Counter #6 */
+    def_irq_handler  tcpwm_0_interrupts_7_IRQHandler         /* TCPWM #0, Counter #7 */
+    def_irq_handler  tcpwm_1_interrupts_0_IRQHandler         /* TCPWM #1, Counter #0 */
+    def_irq_handler  tcpwm_1_interrupts_1_IRQHandler         /* TCPWM #1, Counter #1 */
+    def_irq_handler  tcpwm_1_interrupts_2_IRQHandler         /* TCPWM #1, Counter #2 */
+    def_irq_handler  tcpwm_1_interrupts_3_IRQHandler         /* TCPWM #1, Counter #3 */
+    def_irq_handler  tcpwm_1_interrupts_4_IRQHandler         /* TCPWM #1, Counter #4 */
+    def_irq_handler  tcpwm_1_interrupts_5_IRQHandler         /* TCPWM #1, Counter #5 */
+    def_irq_handler  tcpwm_1_interrupts_6_IRQHandler         /* TCPWM #1, Counter #6 */
+    def_irq_handler  tcpwm_1_interrupts_7_IRQHandler         /* TCPWM #1, Counter #7 */
+    def_irq_handler  tcpwm_1_interrupts_8_IRQHandler         /* TCPWM #1, Counter #8 */
+    def_irq_handler  tcpwm_1_interrupts_9_IRQHandler         /* TCPWM #1, Counter #9 */
+    def_irq_handler  tcpwm_1_interrupts_10_IRQHandler        /* TCPWM #1, Counter #10 */
+    def_irq_handler  tcpwm_1_interrupts_11_IRQHandler        /* TCPWM #1, Counter #11 */
+    def_irq_handler  tcpwm_1_interrupts_12_IRQHandler        /* TCPWM #1, Counter #12 */
+    def_irq_handler  tcpwm_1_interrupts_13_IRQHandler        /* TCPWM #1, Counter #13 */
+    def_irq_handler  tcpwm_1_interrupts_14_IRQHandler        /* TCPWM #1, Counter #14 */
+    def_irq_handler  tcpwm_1_interrupts_15_IRQHandler        /* TCPWM #1, Counter #15 */
+    def_irq_handler  tcpwm_1_interrupts_16_IRQHandler        /* TCPWM #1, Counter #16 */
+    def_irq_handler  tcpwm_1_interrupts_17_IRQHandler        /* TCPWM #1, Counter #17 */
+    def_irq_handler  tcpwm_1_interrupts_18_IRQHandler        /* TCPWM #1, Counter #18 */
+    def_irq_handler  tcpwm_1_interrupts_19_IRQHandler        /* TCPWM #1, Counter #19 */
+    def_irq_handler  tcpwm_1_interrupts_20_IRQHandler        /* TCPWM #1, Counter #20 */
+    def_irq_handler  tcpwm_1_interrupts_21_IRQHandler        /* TCPWM #1, Counter #21 */
+    def_irq_handler  tcpwm_1_interrupts_22_IRQHandler        /* TCPWM #1, Counter #22 */
+    def_irq_handler  tcpwm_1_interrupts_23_IRQHandler        /* TCPWM #1, Counter #23 */
+    def_irq_handler  udb_interrupts_0_IRQHandler             /* UDB Interrupt #0 */
+    def_irq_handler  udb_interrupts_1_IRQHandler             /* UDB Interrupt #1 */
+    def_irq_handler  udb_interrupts_2_IRQHandler             /* UDB Interrupt #2 */
+    def_irq_handler  udb_interrupts_3_IRQHandler             /* UDB Interrupt #3 */
+    def_irq_handler  udb_interrupts_4_IRQHandler             /* UDB Interrupt #4 */
+    def_irq_handler  udb_interrupts_5_IRQHandler             /* UDB Interrupt #5 */
+    def_irq_handler  udb_interrupts_6_IRQHandler             /* UDB Interrupt #6 */
+    def_irq_handler  udb_interrupts_7_IRQHandler             /* UDB Interrupt #7 */
+    def_irq_handler  udb_interrupts_8_IRQHandler             /* UDB Interrupt #8 */
+    def_irq_handler  udb_interrupts_9_IRQHandler             /* UDB Interrupt #9 */
+    def_irq_handler  udb_interrupts_10_IRQHandler            /* UDB Interrupt #10 */
+    def_irq_handler  udb_interrupts_11_IRQHandler            /* UDB Interrupt #11 */
+    def_irq_handler  udb_interrupts_12_IRQHandler            /* UDB Interrupt #12 */
+    def_irq_handler  udb_interrupts_13_IRQHandler            /* UDB Interrupt #13 */
+    def_irq_handler  udb_interrupts_14_IRQHandler            /* UDB Interrupt #14 */
+    def_irq_handler  udb_interrupts_15_IRQHandler            /* UDB Interrupt #15 */
+    def_irq_handler  pass_interrupt_sar_IRQHandler           /* SAR ADC interrupt */
+    def_irq_handler  audioss_interrupt_i2s_IRQHandler        /* I2S Audio interrupt */
+    def_irq_handler  audioss_interrupt_pdm_IRQHandler        /* PDM/PCM Audio interrupt */
+    def_irq_handler  profile_interrupt_IRQHandler            /* Energy Profiler interrupt */
+    def_irq_handler  smif_interrupt_IRQHandler               /* Serial Memory Interface interrupt */
+    def_irq_handler  usb_interrupt_hi_IRQHandler             /* USB Interrupt */
+    def_irq_handler  usb_interrupt_med_IRQHandler            /* USB Interrupt */
+    def_irq_handler  usb_interrupt_lo_IRQHandler             /* USB Interrupt */
+    def_irq_handler  pass_interrupt_dacs_IRQHandler          /* Consolidated interrrupt for all DACs */
+
+    .end
+
+
+/* [] END OF FILE */

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/startup/TOOLCHAIN_GCC_ARM/startup_psoc6_01_cm4.S

@@ -0,0 +1,656 @@
+/**************************************************************************//**
+ * @file     startup_psoc6_01_cm4.S
+ * @brief    CMSIS Core Device Startup File for
+ *           ARMCM4 Device Series
+ * @version  V5.00
+ * @date     02. March 2016
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+    /* Address of the NMI handler */
+    #define CY_NMI_HANLDER_ADDR         0x0000000D
+
+    /* The CPU VTOR register */
+    #define CY_CPU_VTOR_ADDR            0xE000ED08
+
+    /* Copy flash vectors and data section to RAM */
+    #define __STARTUP_COPY_MULTIPLE
+
+    /* Clear single BSS section */
+    #define __STARTUP_CLEAR_BSS
+
+    .syntax    unified
+    .arch    armv7-m
+
+    .section .stack
+    .align    3
+#ifdef __STACK_SIZE
+    .equ    Stack_Size, __STACK_SIZE
+#else
+    .equ    Stack_Size, 0x00001000
+#endif
+    .globl    __StackTop
+    .globl    __StackLimit
+__StackLimit:
+    .space    Stack_Size
+    .size    __StackLimit, . - __StackLimit
+__StackTop:
+    .size    __StackTop, . - __StackTop
+
+    .section .heap
+    .align    3
+#ifdef __HEAP_SIZE
+    .equ    Heap_Size, __HEAP_SIZE
+#else
+    .equ    Heap_Size, 0x00000400
+#endif
+    .globl    __HeapBase
+    .globl    __HeapLimit
+__HeapBase:
+    .if    Heap_Size
+    .space    Heap_Size
+    .endif
+    .size    __HeapBase, . - __HeapBase
+__HeapLimit:
+    .size    __HeapLimit, . - __HeapLimit
+
+    .section .vectors
+    .align 2
+    .globl    __Vectors
+__Vectors:
+    .long    __StackTop            /* Top of Stack */
+    .long    Reset_Handler         /* Reset Handler */
+    .long    CY_NMI_HANLDER_ADDR   /* NMI Handler */
+    .long    HardFault_Handler     /* Hard Fault Handler */
+    .long    MemManage_Handler     /* MPU Fault Handler */
+    .long    BusFault_Handler      /* Bus Fault Handler */
+    .long    UsageFault_Handler    /* Usage Fault Handler */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    0                     /* Reserved */
+    .long    SVC_Handler           /* SVCall Handler */
+    .long    DebugMon_Handler      /* Debug Monitor Handler */
+    .long    0                     /* Reserved */
+    .long    PendSV_Handler        /* PendSV Handler */
+    .long    SysTick_Handler       /* SysTick Handler */
+
+     /* External interrupts                             Description */
+    .long    ioss_interrupts_gpio_0_IRQHandler       /* GPIO Port Interrupt #0 */
+    .long    ioss_interrupts_gpio_1_IRQHandler       /* GPIO Port Interrupt #1 */
+    .long    ioss_interrupts_gpio_2_IRQHandler       /* GPIO Port Interrupt #2 */
+    .long    ioss_interrupts_gpio_3_IRQHandler       /* GPIO Port Interrupt #3 */
+    .long    ioss_interrupts_gpio_4_IRQHandler       /* GPIO Port Interrupt #4 */
+    .long    ioss_interrupts_gpio_5_IRQHandler       /* GPIO Port Interrupt #5 */
+    .long    ioss_interrupts_gpio_6_IRQHandler       /* GPIO Port Interrupt #6 */
+    .long    ioss_interrupts_gpio_7_IRQHandler       /* GPIO Port Interrupt #7 */
+    .long    ioss_interrupts_gpio_8_IRQHandler       /* GPIO Port Interrupt #8 */
+    .long    ioss_interrupts_gpio_9_IRQHandler       /* GPIO Port Interrupt #9 */
+    .long    ioss_interrupts_gpio_10_IRQHandler      /* GPIO Port Interrupt #10 */
+    .long    ioss_interrupts_gpio_11_IRQHandler      /* GPIO Port Interrupt #11 */
+    .long    ioss_interrupts_gpio_12_IRQHandler      /* GPIO Port Interrupt #12 */
+    .long    ioss_interrupts_gpio_13_IRQHandler      /* GPIO Port Interrupt #13 */
+    .long    ioss_interrupts_gpio_14_IRQHandler      /* GPIO Port Interrupt #14 */
+    .long    ioss_interrupt_gpio_IRQHandler          /* GPIO All Ports */
+    .long    ioss_interrupt_vdd_IRQHandler           /* GPIO Supply Detect Interrupt */
+    .long    lpcomp_interrupt_IRQHandler             /* Low Power Comparator Interrupt */
+    .long    scb_8_interrupt_IRQHandler              /* Serial Communication Block #8 (DeepSleep capable) */
+    .long    srss_interrupt_mcwdt_0_IRQHandler       /* Multi Counter Watchdog Timer interrupt */
+    .long    srss_interrupt_mcwdt_1_IRQHandler       /* Multi Counter Watchdog Timer interrupt */
+    .long    srss_interrupt_backup_IRQHandler        /* Backup domain interrupt */
+    .long    srss_interrupt_IRQHandler               /* Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) */
+    .long    pass_interrupt_ctbs_IRQHandler          /* CTBm Interrupt (all CTBms) */
+    .long    bless_interrupt_IRQHandler              /* Bluetooth Radio interrupt */
+    .long    cpuss_interrupts_ipc_0_IRQHandler       /* CPUSS Inter Process Communication Interrupt #0 */
+    .long    cpuss_interrupts_ipc_1_IRQHandler       /* CPUSS Inter Process Communication Interrupt #1 */
+    .long    cpuss_interrupts_ipc_2_IRQHandler       /* CPUSS Inter Process Communication Interrupt #2 */
+    .long    cpuss_interrupts_ipc_3_IRQHandler       /* CPUSS Inter Process Communication Interrupt #3 */
+    .long    cpuss_interrupts_ipc_4_IRQHandler       /* CPUSS Inter Process Communication Interrupt #4 */
+    .long    cpuss_interrupts_ipc_5_IRQHandler       /* CPUSS Inter Process Communication Interrupt #5 */
+    .long    cpuss_interrupts_ipc_6_IRQHandler       /* CPUSS Inter Process Communication Interrupt #6 */
+    .long    cpuss_interrupts_ipc_7_IRQHandler       /* CPUSS Inter Process Communication Interrupt #7 */
+    .long    cpuss_interrupts_ipc_8_IRQHandler       /* CPUSS Inter Process Communication Interrupt #8 */
+    .long    cpuss_interrupts_ipc_9_IRQHandler       /* CPUSS Inter Process Communication Interrupt #9 */
+    .long    cpuss_interrupts_ipc_10_IRQHandler      /* CPUSS Inter Process Communication Interrupt #10 */
+    .long    cpuss_interrupts_ipc_11_IRQHandler      /* CPUSS Inter Process Communication Interrupt #11 */
+    .long    cpuss_interrupts_ipc_12_IRQHandler      /* CPUSS Inter Process Communication Interrupt #12 */
+    .long    cpuss_interrupts_ipc_13_IRQHandler      /* CPUSS Inter Process Communication Interrupt #13 */
+    .long    cpuss_interrupts_ipc_14_IRQHandler      /* CPUSS Inter Process Communication Interrupt #14 */
+    .long    cpuss_interrupts_ipc_15_IRQHandler      /* CPUSS Inter Process Communication Interrupt #15 */
+    .long    scb_0_interrupt_IRQHandler              /* Serial Communication Block #0 */
+    .long    scb_1_interrupt_IRQHandler              /* Serial Communication Block #1 */
+    .long    scb_2_interrupt_IRQHandler              /* Serial Communication Block #2 */
+    .long    scb_3_interrupt_IRQHandler              /* Serial Communication Block #3 */
+    .long    scb_4_interrupt_IRQHandler              /* Serial Communication Block #4 */
+    .long    scb_5_interrupt_IRQHandler              /* Serial Communication Block #5 */
+    .long    scb_6_interrupt_IRQHandler              /* Serial Communication Block #6 */
+    .long    scb_7_interrupt_IRQHandler              /* Serial Communication Block #7 */
+    .long    csd_interrupt_IRQHandler                /* CSD (Capsense) interrupt */
+    .long    cpuss_interrupts_dw0_0_IRQHandler       /* CPUSS DataWire #0, Channel #0 */
+    .long    cpuss_interrupts_dw0_1_IRQHandler       /* CPUSS DataWire #0, Channel #1 */
+    .long    cpuss_interrupts_dw0_2_IRQHandler       /* CPUSS DataWire #0, Channel #2 */
+    .long    cpuss_interrupts_dw0_3_IRQHandler       /* CPUSS DataWire #0, Channel #3 */
+    .long    cpuss_interrupts_dw0_4_IRQHandler       /* CPUSS DataWire #0, Channel #4 */
+    .long    cpuss_interrupts_dw0_5_IRQHandler       /* CPUSS DataWire #0, Channel #5 */
+    .long    cpuss_interrupts_dw0_6_IRQHandler       /* CPUSS DataWire #0, Channel #6 */
+    .long    cpuss_interrupts_dw0_7_IRQHandler       /* CPUSS DataWire #0, Channel #7 */
+    .long    cpuss_interrupts_dw0_8_IRQHandler       /* CPUSS DataWire #0, Channel #8 */
+    .long    cpuss_interrupts_dw0_9_IRQHandler       /* CPUSS DataWire #0, Channel #9 */
+    .long    cpuss_interrupts_dw0_10_IRQHandler      /* CPUSS DataWire #0, Channel #10 */
+    .long    cpuss_interrupts_dw0_11_IRQHandler      /* CPUSS DataWire #0, Channel #11 */
+    .long    cpuss_interrupts_dw0_12_IRQHandler      /* CPUSS DataWire #0, Channel #12 */
+    .long    cpuss_interrupts_dw0_13_IRQHandler      /* CPUSS DataWire #0, Channel #13 */
+    .long    cpuss_interrupts_dw0_14_IRQHandler      /* CPUSS DataWire #0, Channel #14 */
+    .long    cpuss_interrupts_dw0_15_IRQHandler      /* CPUSS DataWire #0, Channel #15 */
+    .long    cpuss_interrupts_dw1_0_IRQHandler       /* CPUSS DataWire #1, Channel #0 */
+    .long    cpuss_interrupts_dw1_1_IRQHandler       /* CPUSS DataWire #1, Channel #1 */
+    .long    cpuss_interrupts_dw1_2_IRQHandler       /* CPUSS DataWire #1, Channel #2 */
+    .long    cpuss_interrupts_dw1_3_IRQHandler       /* CPUSS DataWire #1, Channel #3 */
+    .long    cpuss_interrupts_dw1_4_IRQHandler       /* CPUSS DataWire #1, Channel #4 */
+    .long    cpuss_interrupts_dw1_5_IRQHandler       /* CPUSS DataWire #1, Channel #5 */
+    .long    cpuss_interrupts_dw1_6_IRQHandler       /* CPUSS DataWire #1, Channel #6 */
+    .long    cpuss_interrupts_dw1_7_IRQHandler       /* CPUSS DataWire #1, Channel #7 */
+    .long    cpuss_interrupts_dw1_8_IRQHandler       /* CPUSS DataWire #1, Channel #8 */
+    .long    cpuss_interrupts_dw1_9_IRQHandler       /* CPUSS DataWire #1, Channel #9 */
+    .long    cpuss_interrupts_dw1_10_IRQHandler      /* CPUSS DataWire #1, Channel #10 */
+    .long    cpuss_interrupts_dw1_11_IRQHandler      /* CPUSS DataWire #1, Channel #11 */
+    .long    cpuss_interrupts_dw1_12_IRQHandler      /* CPUSS DataWire #1, Channel #12 */
+    .long    cpuss_interrupts_dw1_13_IRQHandler      /* CPUSS DataWire #1, Channel #13 */
+    .long    cpuss_interrupts_dw1_14_IRQHandler      /* CPUSS DataWire #1, Channel #14 */
+    .long    cpuss_interrupts_dw1_15_IRQHandler      /* CPUSS DataWire #1, Channel #15 */
+    .long    cpuss_interrupts_fault_0_IRQHandler     /* CPUSS Fault Structure Interrupt #0 */
+    .long    cpuss_interrupts_fault_1_IRQHandler     /* CPUSS Fault Structure Interrupt #1 */
+    .long    cpuss_interrupt_crypto_IRQHandler       /* CRYPTO Accelerator Interrupt */
+    .long    cpuss_interrupt_fm_IRQHandler           /* FLASH Macro Interrupt */
+    .long    cpuss_interrupts_cm0_cti_0_IRQHandler   /* CM0+ CTI #0 */
+    .long    cpuss_interrupts_cm0_cti_1_IRQHandler   /* CM0+ CTI #1 */
+    .long    cpuss_interrupts_cm4_cti_0_IRQHandler   /* CM4 CTI #0 */
+    .long    cpuss_interrupts_cm4_cti_1_IRQHandler   /* CM4 CTI #1 */
+    .long    tcpwm_0_interrupts_0_IRQHandler         /* TCPWM #0, Counter #0 */
+    .long    tcpwm_0_interrupts_1_IRQHandler         /* TCPWM #0, Counter #1 */
+    .long    tcpwm_0_interrupts_2_IRQHandler         /* TCPWM #0, Counter #2 */
+    .long    tcpwm_0_interrupts_3_IRQHandler         /* TCPWM #0, Counter #3 */
+    .long    tcpwm_0_interrupts_4_IRQHandler         /* TCPWM #0, Counter #4 */
+    .long    tcpwm_0_interrupts_5_IRQHandler         /* TCPWM #0, Counter #5 */
+    .long    tcpwm_0_interrupts_6_IRQHandler         /* TCPWM #0, Counter #6 */
+    .long    tcpwm_0_interrupts_7_IRQHandler         /* TCPWM #0, Counter #7 */
+    .long    tcpwm_1_interrupts_0_IRQHandler         /* TCPWM #1, Counter #0 */
+    .long    tcpwm_1_interrupts_1_IRQHandler         /* TCPWM #1, Counter #1 */
+    .long    tcpwm_1_interrupts_2_IRQHandler         /* TCPWM #1, Counter #2 */
+    .long    tcpwm_1_interrupts_3_IRQHandler         /* TCPWM #1, Counter #3 */
+    .long    tcpwm_1_interrupts_4_IRQHandler         /* TCPWM #1, Counter #4 */
+    .long    tcpwm_1_interrupts_5_IRQHandler         /* TCPWM #1, Counter #5 */
+    .long    tcpwm_1_interrupts_6_IRQHandler         /* TCPWM #1, Counter #6 */
+    .long    tcpwm_1_interrupts_7_IRQHandler         /* TCPWM #1, Counter #7 */
+    .long    tcpwm_1_interrupts_8_IRQHandler         /* TCPWM #1, Counter #8 */
+    .long    tcpwm_1_interrupts_9_IRQHandler         /* TCPWM #1, Counter #9 */
+    .long    tcpwm_1_interrupts_10_IRQHandler        /* TCPWM #1, Counter #10 */
+    .long    tcpwm_1_interrupts_11_IRQHandler        /* TCPWM #1, Counter #11 */
+    .long    tcpwm_1_interrupts_12_IRQHandler        /* TCPWM #1, Counter #12 */
+    .long    tcpwm_1_interrupts_13_IRQHandler        /* TCPWM #1, Counter #13 */
+    .long    tcpwm_1_interrupts_14_IRQHandler        /* TCPWM #1, Counter #14 */
+    .long    tcpwm_1_interrupts_15_IRQHandler        /* TCPWM #1, Counter #15 */
+    .long    tcpwm_1_interrupts_16_IRQHandler        /* TCPWM #1, Counter #16 */
+    .long    tcpwm_1_interrupts_17_IRQHandler        /* TCPWM #1, Counter #17 */
+    .long    tcpwm_1_interrupts_18_IRQHandler        /* TCPWM #1, Counter #18 */
+    .long    tcpwm_1_interrupts_19_IRQHandler        /* TCPWM #1, Counter #19 */
+    .long    tcpwm_1_interrupts_20_IRQHandler        /* TCPWM #1, Counter #20 */
+    .long    tcpwm_1_interrupts_21_IRQHandler        /* TCPWM #1, Counter #21 */
+    .long    tcpwm_1_interrupts_22_IRQHandler        /* TCPWM #1, Counter #22 */
+    .long    tcpwm_1_interrupts_23_IRQHandler        /* TCPWM #1, Counter #23 */
+    .long    udb_interrupts_0_IRQHandler             /* UDB Interrupt #0 */
+    .long    udb_interrupts_1_IRQHandler             /* UDB Interrupt #1 */
+    .long    udb_interrupts_2_IRQHandler             /* UDB Interrupt #2 */
+    .long    udb_interrupts_3_IRQHandler             /* UDB Interrupt #3 */
+    .long    udb_interrupts_4_IRQHandler             /* UDB Interrupt #4 */
+    .long    udb_interrupts_5_IRQHandler             /* UDB Interrupt #5 */
+    .long    udb_interrupts_6_IRQHandler             /* UDB Interrupt #6 */
+    .long    udb_interrupts_7_IRQHandler             /* UDB Interrupt #7 */
+    .long    udb_interrupts_8_IRQHandler             /* UDB Interrupt #8 */
+    .long    udb_interrupts_9_IRQHandler             /* UDB Interrupt #9 */
+    .long    udb_interrupts_10_IRQHandler            /* UDB Interrupt #10 */
+    .long    udb_interrupts_11_IRQHandler            /* UDB Interrupt #11 */
+    .long    udb_interrupts_12_IRQHandler            /* UDB Interrupt #12 */
+    .long    udb_interrupts_13_IRQHandler            /* UDB Interrupt #13 */
+    .long    udb_interrupts_14_IRQHandler            /* UDB Interrupt #14 */
+    .long    udb_interrupts_15_IRQHandler            /* UDB Interrupt #15 */
+    .long    pass_interrupt_sar_IRQHandler           /* SAR ADC interrupt */
+    .long    audioss_interrupt_i2s_IRQHandler        /* I2S Audio interrupt */
+    .long    audioss_interrupt_pdm_IRQHandler        /* PDM/PCM Audio interrupt */
+    .long    profile_interrupt_IRQHandler            /* Energy Profiler interrupt */
+    .long    smif_interrupt_IRQHandler               /* Serial Memory Interface interrupt */
+    .long    usb_interrupt_hi_IRQHandler             /* USB Interrupt */
+    .long    usb_interrupt_med_IRQHandler            /* USB Interrupt */
+    .long    usb_interrupt_lo_IRQHandler             /* USB Interrupt */
+    .long    pass_interrupt_dacs_IRQHandler          /* Consolidated interrrupt for all DACs */
+
+
+    .size    __Vectors, . - __Vectors
+    .equ    __VectorsSize, . - __Vectors
+
+    .section .ram_vectors
+    .align 2
+    .globl __ramVectors
+__ramVectors:
+    .space  __VectorsSize
+    .size   __ramVectors, . - __ramVectors
+
+
+    .text
+    .thumb
+    .thumb_func
+    .align  2
+
+    /* 
+     * Device startup customization 
+     *
+     * Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) 
+     * because this function is executed as the first instruction in the ResetHandler.
+     * The PDL is also not initialized to use the proper register offsets.
+     * The user of this function is responsible for initializing the PDL and resources before using them.
+     */
+    .weak   Cy_OnResetUser
+    .func   Cy_OnResetUser, Cy_OnResetUser
+    .type   Cy_OnResetUser, %function
+
+Cy_OnResetUser:
+    bx lr
+    .size   Cy_OnResetUser, . - Cy_OnResetUser
+    .endfunc
+
+    /* OS-specific low-level initialization */
+    .weak   cy_toolchain_init
+    .func   cy_toolchain_init, cy_toolchain_init
+    .type   cy_toolchain_init, %function
+
+cy_toolchain_init:
+    bx lr
+    .size   cy_toolchain_init, . - cy_toolchain_init
+    .endfunc
+
+    /* Reset handler */
+    .weak    Reset_Handler
+    .type    Reset_Handler, %function
+
+Reset_Handler:
+    bl Cy_OnResetUser
+    cpsid i
+
+/*  Firstly it copies data from read only memory to RAM. There are two schemes
+ *  to copy. One can copy more than one sections. Another can only copy
+ *  one section.  The former scheme needs more instructions and read-only
+ *  data to implement than the latter.
+ *  Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes.  */
+
+#ifdef __STARTUP_COPY_MULTIPLE
+/*  Multiple sections scheme.
+ *
+ *  Between symbol address __copy_table_start__ and __copy_table_end__,
+ *  there are array of triplets, each of which specify:
+ *    offset 0: LMA of start of a section to copy from
+ *    offset 4: VMA of start of a section to copy to
+ *    offset 8: size of the section to copy. Must be multiply of 4
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+    ldr    r4, =__copy_table_start__
+    ldr    r5, =__copy_table_end__
+
+.L_loop0:
+    cmp    r4, r5
+    bge    .L_loop0_done
+    ldr    r1, [r4]
+    ldr    r2, [r4, #4]
+    ldr    r3, [r4, #8]
+
+.L_loop0_0:
+    subs    r3, #4
+    ittt    ge
+    ldrge    r0, [r1, r3]
+    strge    r0, [r2, r3]
+    bge    .L_loop0_0
+
+    adds    r4, #12
+    b    .L_loop0
+
+.L_loop0_done:
+#else
+/*  Single section scheme.
+ *
+ *  The ranges of copy from/to are specified by following symbols
+ *    __etext: LMA of start of the section to copy from. Usually end of text
+ *    __data_start__: VMA of start of the section to copy to
+ *    __data_end__: VMA of end of the section to copy to
+ *
+ *  All addresses must be aligned to 4 bytes boundary.
+ */
+    ldr    r1, =__etext
+    ldr    r2, =__data_start__
+    ldr    r3, =__data_end__
+
+.L_loop1:
+    cmp    r2, r3
+    ittt    lt
+    ldrlt    r0, [r1], #4
+    strlt    r0, [r2], #4
+    blt    .L_loop1
+#endif /*__STARTUP_COPY_MULTIPLE */
+
+/*  This part of work usually is done in C library startup code. Otherwise,
+ *  define this macro to enable it in this startup.
+ *
+ *  There are two schemes too. One can clear multiple BSS sections. Another
+ *  can only clear one section. The former is more size expensive than the
+ *  latter.
+ *
+ *  Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
+ *  Otherwise define macro __STARTUP_CLEAR_BSS to choose the later.
+ */
+#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
+/*  Multiple sections scheme.
+ *
+ *  Between symbol address __copy_table_start__ and __copy_table_end__,
+ *  there are array of tuples specifying:
+ *    offset 0: Start of a BSS section
+ *    offset 4: Size of this BSS section. Must be multiply of 4
+ */
+    ldr    r3, =__zero_table_start__
+    ldr    r4, =__zero_table_end__
+
+.L_loop2:
+    cmp    r3, r4
+    bge    .L_loop2_done
+    ldr    r1, [r3]
+    ldr    r2, [r3, #4]
+    movs    r0, 0
+
+.L_loop2_0:
+    subs    r2, #4
+    itt    ge
+    strge    r0, [r1, r2]
+    bge    .L_loop2_0
+
+    adds    r3, #8
+    b    .L_loop2
+.L_loop2_done:
+#elif defined (__STARTUP_CLEAR_BSS)
+/*  Single BSS section scheme.
+ *
+ *  The BSS section is specified by following symbols
+ *    __bss_start__: start of the BSS section.
+ *    __bss_end__: end of the BSS section.
+ *
+ *  Both addresses must be aligned to 4 bytes boundary.
+ */
+    ldr    r1, =__bss_start__
+    ldr    r2, =__bss_end__
+
+    movs    r0, 0
+.L_loop3:
+    cmp    r1, r2
+    itt    lt
+    strlt    r0, [r1], #4
+    blt    .L_loop3
+#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
+
+    /* Update Vector Table Offset Register. */
+    ldr r0, =__ramVectors
+    ldr r1, =CY_CPU_VTOR_ADDR
+    str r0, [r1]
+    dsb 0xF
+
+    /* Enable the FPU if used */
+    bl Cy_SystemInitFpuEnable
+
+#ifndef __NO_SYSTEM_INIT
+    bl    SystemInit
+#endif
+
+    /* OS-specific low-level initialization */
+    bl    cy_toolchain_init
+
+    /* Call C/C++ static constructors */
+    bl    __libc_init_array
+
+    /* Execute main application */
+    /*bl    main */
+    bl	  entry
+
+    /* Call C/C++ static destructors */
+    bl    __libc_fini_array
+
+    /* Should never get here */
+    b   .
+
+    .pool
+    .size    Reset_Handler, . - Reset_Handler
+
+    .align    1
+    .thumb_func
+    .weak    Default_Handler
+    .type    Default_Handler, %function
+
+Default_Handler:
+    b    .
+    .size    Default_Handler, . - Default_Handler
+
+
+    .weak    Cy_SysLib_FaultHandler
+    .type    Cy_SysLib_FaultHandler, %function
+    
+Cy_SysLib_FaultHandler:
+    b    .
+    .size    Cy_SysLib_FaultHandler, . - Cy_SysLib_FaultHandler
+    .type Fault_Handler, %function
+
+Fault_Handler:
+    /* Storing LR content for Creator call stack trace */
+    push {LR}
+    movs r0, #4
+    mov r1, LR
+    tst r0, r1
+    beq .L_MSP
+    mrs r0, PSP
+    b .L_API_call
+.L_MSP:
+    mrs r0, MSP
+.L_API_call:
+    /* Compensation of stack pointer address due to pushing 4 bytes of LR */
+    adds r0, r0, #4
+    bl Cy_SysLib_FaultHandler
+    b   .
+    .size    Fault_Handler, . - Fault_Handler
+
+.macro    def_fault_Handler    fault_handler_name
+    .weak    \fault_handler_name
+    .set    \fault_handler_name, Fault_Handler
+    .endm
+
+/*    Macro to define default handlers. Default handler
+ *    will be weak symbol and just dead loops. They can be
+ *    overwritten by other handlers */
+    .macro    def_irq_handler    handler_name
+    .weak    \handler_name
+    .set    \handler_name, Default_Handler
+    .endm
+
+    def_irq_handler    NMI_Handler
+
+    def_fault_Handler HardFault_Handler
+    def_fault_Handler MemManage_Handler
+    def_fault_Handler BusFault_Handler
+    def_fault_Handler UsageFault_Handler
+
+    def_irq_handler    SVC_Handler
+    def_irq_handler    DebugMon_Handler
+    def_irq_handler    PendSV_Handler
+    def_irq_handler    SysTick_Handler
+
+    def_irq_handler  ioss_interrupts_gpio_0_IRQHandler       /* GPIO Port Interrupt #0 */
+    def_irq_handler  ioss_interrupts_gpio_1_IRQHandler       /* GPIO Port Interrupt #1 */
+    def_irq_handler  ioss_interrupts_gpio_2_IRQHandler       /* GPIO Port Interrupt #2 */
+    def_irq_handler  ioss_interrupts_gpio_3_IRQHandler       /* GPIO Port Interrupt #3 */
+    def_irq_handler  ioss_interrupts_gpio_4_IRQHandler       /* GPIO Port Interrupt #4 */
+    def_irq_handler  ioss_interrupts_gpio_5_IRQHandler       /* GPIO Port Interrupt #5 */
+    def_irq_handler  ioss_interrupts_gpio_6_IRQHandler       /* GPIO Port Interrupt #6 */
+    def_irq_handler  ioss_interrupts_gpio_7_IRQHandler       /* GPIO Port Interrupt #7 */
+    def_irq_handler  ioss_interrupts_gpio_8_IRQHandler       /* GPIO Port Interrupt #8 */
+    def_irq_handler  ioss_interrupts_gpio_9_IRQHandler       /* GPIO Port Interrupt #9 */
+    def_irq_handler  ioss_interrupts_gpio_10_IRQHandler      /* GPIO Port Interrupt #10 */
+    def_irq_handler  ioss_interrupts_gpio_11_IRQHandler      /* GPIO Port Interrupt #11 */
+    def_irq_handler  ioss_interrupts_gpio_12_IRQHandler      /* GPIO Port Interrupt #12 */
+    def_irq_handler  ioss_interrupts_gpio_13_IRQHandler      /* GPIO Port Interrupt #13 */
+    def_irq_handler  ioss_interrupts_gpio_14_IRQHandler      /* GPIO Port Interrupt #14 */
+    def_irq_handler  ioss_interrupt_gpio_IRQHandler          /* GPIO All Ports */
+    def_irq_handler  ioss_interrupt_vdd_IRQHandler           /* GPIO Supply Detect Interrupt */
+    def_irq_handler  lpcomp_interrupt_IRQHandler             /* Low Power Comparator Interrupt */
+    def_irq_handler  scb_8_interrupt_IRQHandler              /* Serial Communication Block #8 (DeepSleep capable) */
+    def_irq_handler  srss_interrupt_mcwdt_0_IRQHandler       /* Multi Counter Watchdog Timer interrupt */
+    def_irq_handler  srss_interrupt_mcwdt_1_IRQHandler       /* Multi Counter Watchdog Timer interrupt */
+    def_irq_handler  srss_interrupt_backup_IRQHandler        /* Backup domain interrupt */
+    def_irq_handler  srss_interrupt_IRQHandler               /* Other combined Interrupts for SRSS (LVD, WDT, CLKCAL) */
+    def_irq_handler  pass_interrupt_ctbs_IRQHandler          /* CTBm Interrupt (all CTBms) */
+    def_irq_handler  bless_interrupt_IRQHandler              /* Bluetooth Radio interrupt */
+    def_irq_handler  cpuss_interrupts_ipc_0_IRQHandler       /* CPUSS Inter Process Communication Interrupt #0 */
+    def_irq_handler  cpuss_interrupts_ipc_1_IRQHandler       /* CPUSS Inter Process Communication Interrupt #1 */
+    def_irq_handler  cpuss_interrupts_ipc_2_IRQHandler       /* CPUSS Inter Process Communication Interrupt #2 */
+    def_irq_handler  cpuss_interrupts_ipc_3_IRQHandler       /* CPUSS Inter Process Communication Interrupt #3 */
+    def_irq_handler  cpuss_interrupts_ipc_4_IRQHandler       /* CPUSS Inter Process Communication Interrupt #4 */
+    def_irq_handler  cpuss_interrupts_ipc_5_IRQHandler       /* CPUSS Inter Process Communication Interrupt #5 */
+    def_irq_handler  cpuss_interrupts_ipc_6_IRQHandler       /* CPUSS Inter Process Communication Interrupt #6 */
+    def_irq_handler  cpuss_interrupts_ipc_7_IRQHandler       /* CPUSS Inter Process Communication Interrupt #7 */
+    def_irq_handler  cpuss_interrupts_ipc_8_IRQHandler       /* CPUSS Inter Process Communication Interrupt #8 */
+    def_irq_handler  cpuss_interrupts_ipc_9_IRQHandler       /* CPUSS Inter Process Communication Interrupt #9 */
+    def_irq_handler  cpuss_interrupts_ipc_10_IRQHandler      /* CPUSS Inter Process Communication Interrupt #10 */
+    def_irq_handler  cpuss_interrupts_ipc_11_IRQHandler      /* CPUSS Inter Process Communication Interrupt #11 */
+    def_irq_handler  cpuss_interrupts_ipc_12_IRQHandler      /* CPUSS Inter Process Communication Interrupt #12 */
+    def_irq_handler  cpuss_interrupts_ipc_13_IRQHandler      /* CPUSS Inter Process Communication Interrupt #13 */
+    def_irq_handler  cpuss_interrupts_ipc_14_IRQHandler      /* CPUSS Inter Process Communication Interrupt #14 */
+    def_irq_handler  cpuss_interrupts_ipc_15_IRQHandler      /* CPUSS Inter Process Communication Interrupt #15 */
+    def_irq_handler  scb_0_interrupt_IRQHandler              /* Serial Communication Block #0 */
+    def_irq_handler  scb_1_interrupt_IRQHandler              /* Serial Communication Block #1 */
+    def_irq_handler  scb_2_interrupt_IRQHandler              /* Serial Communication Block #2 */
+    def_irq_handler  scb_3_interrupt_IRQHandler              /* Serial Communication Block #3 */
+    def_irq_handler  scb_4_interrupt_IRQHandler              /* Serial Communication Block #4 */
+    def_irq_handler  scb_5_interrupt_IRQHandler              /* Serial Communication Block #5 */
+    def_irq_handler  scb_6_interrupt_IRQHandler              /* Serial Communication Block #6 */
+    def_irq_handler  scb_7_interrupt_IRQHandler              /* Serial Communication Block #7 */
+    def_irq_handler  csd_interrupt_IRQHandler                /* CSD (Capsense) interrupt */
+    def_irq_handler  cpuss_interrupts_dw0_0_IRQHandler       /* CPUSS DataWire #0, Channel #0 */
+    def_irq_handler  cpuss_interrupts_dw0_1_IRQHandler       /* CPUSS DataWire #0, Channel #1 */
+    def_irq_handler  cpuss_interrupts_dw0_2_IRQHandler       /* CPUSS DataWire #0, Channel #2 */
+    def_irq_handler  cpuss_interrupts_dw0_3_IRQHandler       /* CPUSS DataWire #0, Channel #3 */
+    def_irq_handler  cpuss_interrupts_dw0_4_IRQHandler       /* CPUSS DataWire #0, Channel #4 */
+    def_irq_handler  cpuss_interrupts_dw0_5_IRQHandler       /* CPUSS DataWire #0, Channel #5 */
+    def_irq_handler  cpuss_interrupts_dw0_6_IRQHandler       /* CPUSS DataWire #0, Channel #6 */
+    def_irq_handler  cpuss_interrupts_dw0_7_IRQHandler       /* CPUSS DataWire #0, Channel #7 */
+    def_irq_handler  cpuss_interrupts_dw0_8_IRQHandler       /* CPUSS DataWire #0, Channel #8 */
+    def_irq_handler  cpuss_interrupts_dw0_9_IRQHandler       /* CPUSS DataWire #0, Channel #9 */
+    def_irq_handler  cpuss_interrupts_dw0_10_IRQHandler      /* CPUSS DataWire #0, Channel #10 */
+    def_irq_handler  cpuss_interrupts_dw0_11_IRQHandler      /* CPUSS DataWire #0, Channel #11 */
+    def_irq_handler  cpuss_interrupts_dw0_12_IRQHandler      /* CPUSS DataWire #0, Channel #12 */
+    def_irq_handler  cpuss_interrupts_dw0_13_IRQHandler      /* CPUSS DataWire #0, Channel #13 */
+    def_irq_handler  cpuss_interrupts_dw0_14_IRQHandler      /* CPUSS DataWire #0, Channel #14 */
+    def_irq_handler  cpuss_interrupts_dw0_15_IRQHandler      /* CPUSS DataWire #0, Channel #15 */
+    def_irq_handler  cpuss_interrupts_dw1_0_IRQHandler       /* CPUSS DataWire #1, Channel #0 */
+    def_irq_handler  cpuss_interrupts_dw1_1_IRQHandler       /* CPUSS DataWire #1, Channel #1 */
+    def_irq_handler  cpuss_interrupts_dw1_2_IRQHandler       /* CPUSS DataWire #1, Channel #2 */
+    def_irq_handler  cpuss_interrupts_dw1_3_IRQHandler       /* CPUSS DataWire #1, Channel #3 */
+    def_irq_handler  cpuss_interrupts_dw1_4_IRQHandler       /* CPUSS DataWire #1, Channel #4 */
+    def_irq_handler  cpuss_interrupts_dw1_5_IRQHandler       /* CPUSS DataWire #1, Channel #5 */
+    def_irq_handler  cpuss_interrupts_dw1_6_IRQHandler       /* CPUSS DataWire #1, Channel #6 */
+    def_irq_handler  cpuss_interrupts_dw1_7_IRQHandler       /* CPUSS DataWire #1, Channel #7 */
+    def_irq_handler  cpuss_interrupts_dw1_8_IRQHandler       /* CPUSS DataWire #1, Channel #8 */
+    def_irq_handler  cpuss_interrupts_dw1_9_IRQHandler       /* CPUSS DataWire #1, Channel #9 */
+    def_irq_handler  cpuss_interrupts_dw1_10_IRQHandler      /* CPUSS DataWire #1, Channel #10 */
+    def_irq_handler  cpuss_interrupts_dw1_11_IRQHandler      /* CPUSS DataWire #1, Channel #11 */
+    def_irq_handler  cpuss_interrupts_dw1_12_IRQHandler      /* CPUSS DataWire #1, Channel #12 */
+    def_irq_handler  cpuss_interrupts_dw1_13_IRQHandler      /* CPUSS DataWire #1, Channel #13 */
+    def_irq_handler  cpuss_interrupts_dw1_14_IRQHandler      /* CPUSS DataWire #1, Channel #14 */
+    def_irq_handler  cpuss_interrupts_dw1_15_IRQHandler      /* CPUSS DataWire #1, Channel #15 */
+    def_irq_handler  cpuss_interrupts_fault_0_IRQHandler     /* CPUSS Fault Structure Interrupt #0 */
+    def_irq_handler  cpuss_interrupts_fault_1_IRQHandler     /* CPUSS Fault Structure Interrupt #1 */
+    def_irq_handler  cpuss_interrupt_crypto_IRQHandler       /* CRYPTO Accelerator Interrupt */
+    def_irq_handler  cpuss_interrupt_fm_IRQHandler           /* FLASH Macro Interrupt */
+    def_irq_handler  cpuss_interrupts_cm0_cti_0_IRQHandler   /* CM0+ CTI #0 */
+    def_irq_handler  cpuss_interrupts_cm0_cti_1_IRQHandler   /* CM0+ CTI #1 */
+    def_irq_handler  cpuss_interrupts_cm4_cti_0_IRQHandler   /* CM4 CTI #0 */
+    def_irq_handler  cpuss_interrupts_cm4_cti_1_IRQHandler   /* CM4 CTI #1 */
+    def_irq_handler  tcpwm_0_interrupts_0_IRQHandler         /* TCPWM #0, Counter #0 */
+    def_irq_handler  tcpwm_0_interrupts_1_IRQHandler         /* TCPWM #0, Counter #1 */
+    def_irq_handler  tcpwm_0_interrupts_2_IRQHandler         /* TCPWM #0, Counter #2 */
+    def_irq_handler  tcpwm_0_interrupts_3_IRQHandler         /* TCPWM #0, Counter #3 */
+    def_irq_handler  tcpwm_0_interrupts_4_IRQHandler         /* TCPWM #0, Counter #4 */
+    def_irq_handler  tcpwm_0_interrupts_5_IRQHandler         /* TCPWM #0, Counter #5 */
+    def_irq_handler  tcpwm_0_interrupts_6_IRQHandler         /* TCPWM #0, Counter #6 */
+    def_irq_handler  tcpwm_0_interrupts_7_IRQHandler         /* TCPWM #0, Counter #7 */
+    def_irq_handler  tcpwm_1_interrupts_0_IRQHandler         /* TCPWM #1, Counter #0 */
+    def_irq_handler  tcpwm_1_interrupts_1_IRQHandler         /* TCPWM #1, Counter #1 */
+    def_irq_handler  tcpwm_1_interrupts_2_IRQHandler         /* TCPWM #1, Counter #2 */
+    def_irq_handler  tcpwm_1_interrupts_3_IRQHandler         /* TCPWM #1, Counter #3 */
+    def_irq_handler  tcpwm_1_interrupts_4_IRQHandler         /* TCPWM #1, Counter #4 */
+    def_irq_handler  tcpwm_1_interrupts_5_IRQHandler         /* TCPWM #1, Counter #5 */
+    def_irq_handler  tcpwm_1_interrupts_6_IRQHandler         /* TCPWM #1, Counter #6 */
+    def_irq_handler  tcpwm_1_interrupts_7_IRQHandler         /* TCPWM #1, Counter #7 */
+    def_irq_handler  tcpwm_1_interrupts_8_IRQHandler         /* TCPWM #1, Counter #8 */
+    def_irq_handler  tcpwm_1_interrupts_9_IRQHandler         /* TCPWM #1, Counter #9 */
+    def_irq_handler  tcpwm_1_interrupts_10_IRQHandler        /* TCPWM #1, Counter #10 */
+    def_irq_handler  tcpwm_1_interrupts_11_IRQHandler        /* TCPWM #1, Counter #11 */
+    def_irq_handler  tcpwm_1_interrupts_12_IRQHandler        /* TCPWM #1, Counter #12 */
+    def_irq_handler  tcpwm_1_interrupts_13_IRQHandler        /* TCPWM #1, Counter #13 */
+    def_irq_handler  tcpwm_1_interrupts_14_IRQHandler        /* TCPWM #1, Counter #14 */
+    def_irq_handler  tcpwm_1_interrupts_15_IRQHandler        /* TCPWM #1, Counter #15 */
+    def_irq_handler  tcpwm_1_interrupts_16_IRQHandler        /* TCPWM #1, Counter #16 */
+    def_irq_handler  tcpwm_1_interrupts_17_IRQHandler        /* TCPWM #1, Counter #17 */
+    def_irq_handler  tcpwm_1_interrupts_18_IRQHandler        /* TCPWM #1, Counter #18 */
+    def_irq_handler  tcpwm_1_interrupts_19_IRQHandler        /* TCPWM #1, Counter #19 */
+    def_irq_handler  tcpwm_1_interrupts_20_IRQHandler        /* TCPWM #1, Counter #20 */
+    def_irq_handler  tcpwm_1_interrupts_21_IRQHandler        /* TCPWM #1, Counter #21 */
+    def_irq_handler  tcpwm_1_interrupts_22_IRQHandler        /* TCPWM #1, Counter #22 */
+    def_irq_handler  tcpwm_1_interrupts_23_IRQHandler        /* TCPWM #1, Counter #23 */
+    def_irq_handler  udb_interrupts_0_IRQHandler             /* UDB Interrupt #0 */
+    def_irq_handler  udb_interrupts_1_IRQHandler             /* UDB Interrupt #1 */
+    def_irq_handler  udb_interrupts_2_IRQHandler             /* UDB Interrupt #2 */
+    def_irq_handler  udb_interrupts_3_IRQHandler             /* UDB Interrupt #3 */
+    def_irq_handler  udb_interrupts_4_IRQHandler             /* UDB Interrupt #4 */
+    def_irq_handler  udb_interrupts_5_IRQHandler             /* UDB Interrupt #5 */
+    def_irq_handler  udb_interrupts_6_IRQHandler             /* UDB Interrupt #6 */
+    def_irq_handler  udb_interrupts_7_IRQHandler             /* UDB Interrupt #7 */
+    def_irq_handler  udb_interrupts_8_IRQHandler             /* UDB Interrupt #8 */
+    def_irq_handler  udb_interrupts_9_IRQHandler             /* UDB Interrupt #9 */
+    def_irq_handler  udb_interrupts_10_IRQHandler            /* UDB Interrupt #10 */
+    def_irq_handler  udb_interrupts_11_IRQHandler            /* UDB Interrupt #11 */
+    def_irq_handler  udb_interrupts_12_IRQHandler            /* UDB Interrupt #12 */
+    def_irq_handler  udb_interrupts_13_IRQHandler            /* UDB Interrupt #13 */
+    def_irq_handler  udb_interrupts_14_IRQHandler            /* UDB Interrupt #14 */
+    def_irq_handler  udb_interrupts_15_IRQHandler            /* UDB Interrupt #15 */
+    def_irq_handler  pass_interrupt_sar_IRQHandler           /* SAR ADC interrupt */
+    def_irq_handler  audioss_interrupt_i2s_IRQHandler        /* I2S Audio interrupt */
+    def_irq_handler  audioss_interrupt_pdm_IRQHandler        /* PDM/PCM Audio interrupt */
+    def_irq_handler  profile_interrupt_IRQHandler            /* Energy Profiler interrupt */
+    def_irq_handler  smif_interrupt_IRQHandler               /* Serial Memory Interface interrupt */
+    def_irq_handler  usb_interrupt_hi_IRQHandler             /* USB Interrupt */
+    def_irq_handler  usb_interrupt_med_IRQHandler            /* USB Interrupt */
+    def_irq_handler  usb_interrupt_lo_IRQHandler             /* USB Interrupt */
+    def_irq_handler  pass_interrupt_dacs_IRQHandler          /* Consolidated interrrupt for all DACs */
+
+    .end
+
+
+/* [] END OF FILE */

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/startup/TOOLCHAIN_IAR/startup_psoc6_01_cm4.s

@@ -0,0 +1,1150 @@
+;/**************************************************************************//**
+; * @file     startup_psoc6_01_cm4.s
+; * @brief    CMSIS Core Device Startup File for
+; *           ARMCM4 Device Series
+; * @version  V5.00
+; * @date     08. March 2016
+; ******************************************************************************/
+;/*
+; * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+        SECTION .intvec_ram:DATA:NOROOT(2)
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        EXTERN  Cy_SystemInitFpuEnable
+        EXTERN __iar_data_init3
+        PUBLIC  __vector_table
+        PUBLIC  __vector_table_0x1c
+        PUBLIC  __Vectors
+        PUBLIC  __Vectors_End
+        PUBLIC  __Vectors_Size
+        PUBLIC  __ramVectors
+
+        DATA
+
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler
+
+        DCD     0x0000000D              ; NMI_Handler is defined in ROM code
+        DCD     HardFault_Handler
+        DCD     MemManage_Handler
+        DCD     BusFault_Handler
+        DCD     UsageFault_Handler
+__vector_table_0x1c
+        DCD     0
+        DCD     0
+        DCD     0
+        DCD     0
+        DCD     SVC_Handler
+        DCD     DebugMon_Handler
+        DCD     0
+        DCD     PendSV_Handler
+        DCD     SysTick_Handler
+
+        ; External interrupts                           Description
+        DCD     ioss_interrupts_gpio_0_IRQHandler     ; GPIO Port Interrupt #0
+        DCD     ioss_interrupts_gpio_1_IRQHandler     ; GPIO Port Interrupt #1
+        DCD     ioss_interrupts_gpio_2_IRQHandler     ; GPIO Port Interrupt #2
+        DCD     ioss_interrupts_gpio_3_IRQHandler     ; GPIO Port Interrupt #3
+        DCD     ioss_interrupts_gpio_4_IRQHandler     ; GPIO Port Interrupt #4
+        DCD     ioss_interrupts_gpio_5_IRQHandler     ; GPIO Port Interrupt #5
+        DCD     ioss_interrupts_gpio_6_IRQHandler     ; GPIO Port Interrupt #6
+        DCD     ioss_interrupts_gpio_7_IRQHandler     ; GPIO Port Interrupt #7
+        DCD     ioss_interrupts_gpio_8_IRQHandler     ; GPIO Port Interrupt #8
+        DCD     ioss_interrupts_gpio_9_IRQHandler     ; GPIO Port Interrupt #9
+        DCD     ioss_interrupts_gpio_10_IRQHandler    ; GPIO Port Interrupt #10
+        DCD     ioss_interrupts_gpio_11_IRQHandler    ; GPIO Port Interrupt #11
+        DCD     ioss_interrupts_gpio_12_IRQHandler    ; GPIO Port Interrupt #12
+        DCD     ioss_interrupts_gpio_13_IRQHandler    ; GPIO Port Interrupt #13
+        DCD     ioss_interrupts_gpio_14_IRQHandler    ; GPIO Port Interrupt #14
+        DCD     ioss_interrupt_gpio_IRQHandler        ; GPIO All Ports
+        DCD     ioss_interrupt_vdd_IRQHandler         ; GPIO Supply Detect Interrupt
+        DCD     lpcomp_interrupt_IRQHandler           ; Low Power Comparator Interrupt
+        DCD     scb_8_interrupt_IRQHandler            ; Serial Communication Block #8 (DeepSleep capable)
+        DCD     srss_interrupt_mcwdt_0_IRQHandler     ; Multi Counter Watchdog Timer interrupt
+        DCD     srss_interrupt_mcwdt_1_IRQHandler     ; Multi Counter Watchdog Timer interrupt
+        DCD     srss_interrupt_backup_IRQHandler      ; Backup domain interrupt
+        DCD     srss_interrupt_IRQHandler             ; Other combined Interrupts for SRSS (LVD, WDT, CLKCAL)
+        DCD     pass_interrupt_ctbs_IRQHandler        ; CTBm Interrupt (all CTBms)
+        DCD     bless_interrupt_IRQHandler            ; Bluetooth Radio interrupt
+        DCD     cpuss_interrupts_ipc_0_IRQHandler     ; CPUSS Inter Process Communication Interrupt #0
+        DCD     cpuss_interrupts_ipc_1_IRQHandler     ; CPUSS Inter Process Communication Interrupt #1
+        DCD     cpuss_interrupts_ipc_2_IRQHandler     ; CPUSS Inter Process Communication Interrupt #2
+        DCD     cpuss_interrupts_ipc_3_IRQHandler     ; CPUSS Inter Process Communication Interrupt #3
+        DCD     cpuss_interrupts_ipc_4_IRQHandler     ; CPUSS Inter Process Communication Interrupt #4
+        DCD     cpuss_interrupts_ipc_5_IRQHandler     ; CPUSS Inter Process Communication Interrupt #5
+        DCD     cpuss_interrupts_ipc_6_IRQHandler     ; CPUSS Inter Process Communication Interrupt #6
+        DCD     cpuss_interrupts_ipc_7_IRQHandler     ; CPUSS Inter Process Communication Interrupt #7
+        DCD     cpuss_interrupts_ipc_8_IRQHandler     ; CPUSS Inter Process Communication Interrupt #8
+        DCD     cpuss_interrupts_ipc_9_IRQHandler     ; CPUSS Inter Process Communication Interrupt #9
+        DCD     cpuss_interrupts_ipc_10_IRQHandler    ; CPUSS Inter Process Communication Interrupt #10
+        DCD     cpuss_interrupts_ipc_11_IRQHandler    ; CPUSS Inter Process Communication Interrupt #11
+        DCD     cpuss_interrupts_ipc_12_IRQHandler    ; CPUSS Inter Process Communication Interrupt #12
+        DCD     cpuss_interrupts_ipc_13_IRQHandler    ; CPUSS Inter Process Communication Interrupt #13
+        DCD     cpuss_interrupts_ipc_14_IRQHandler    ; CPUSS Inter Process Communication Interrupt #14
+        DCD     cpuss_interrupts_ipc_15_IRQHandler    ; CPUSS Inter Process Communication Interrupt #15
+        DCD     scb_0_interrupt_IRQHandler            ; Serial Communication Block #0
+        DCD     scb_1_interrupt_IRQHandler            ; Serial Communication Block #1
+        DCD     scb_2_interrupt_IRQHandler            ; Serial Communication Block #2
+        DCD     scb_3_interrupt_IRQHandler            ; Serial Communication Block #3
+        DCD     scb_4_interrupt_IRQHandler            ; Serial Communication Block #4
+        DCD     scb_5_interrupt_IRQHandler            ; Serial Communication Block #5
+        DCD     scb_6_interrupt_IRQHandler            ; Serial Communication Block #6
+        DCD     scb_7_interrupt_IRQHandler            ; Serial Communication Block #7
+        DCD     csd_interrupt_IRQHandler              ; CSD (Capsense) interrupt
+        DCD     cpuss_interrupts_dw0_0_IRQHandler     ; CPUSS DataWire #0, Channel #0
+        DCD     cpuss_interrupts_dw0_1_IRQHandler     ; CPUSS DataWire #0, Channel #1
+        DCD     cpuss_interrupts_dw0_2_IRQHandler     ; CPUSS DataWire #0, Channel #2
+        DCD     cpuss_interrupts_dw0_3_IRQHandler     ; CPUSS DataWire #0, Channel #3
+        DCD     cpuss_interrupts_dw0_4_IRQHandler     ; CPUSS DataWire #0, Channel #4
+        DCD     cpuss_interrupts_dw0_5_IRQHandler     ; CPUSS DataWire #0, Channel #5
+        DCD     cpuss_interrupts_dw0_6_IRQHandler     ; CPUSS DataWire #0, Channel #6
+        DCD     cpuss_interrupts_dw0_7_IRQHandler     ; CPUSS DataWire #0, Channel #7
+        DCD     cpuss_interrupts_dw0_8_IRQHandler     ; CPUSS DataWire #0, Channel #8
+        DCD     cpuss_interrupts_dw0_9_IRQHandler     ; CPUSS DataWire #0, Channel #9
+        DCD     cpuss_interrupts_dw0_10_IRQHandler    ; CPUSS DataWire #0, Channel #10
+        DCD     cpuss_interrupts_dw0_11_IRQHandler    ; CPUSS DataWire #0, Channel #11
+        DCD     cpuss_interrupts_dw0_12_IRQHandler    ; CPUSS DataWire #0, Channel #12
+        DCD     cpuss_interrupts_dw0_13_IRQHandler    ; CPUSS DataWire #0, Channel #13
+        DCD     cpuss_interrupts_dw0_14_IRQHandler    ; CPUSS DataWire #0, Channel #14
+        DCD     cpuss_interrupts_dw0_15_IRQHandler    ; CPUSS DataWire #0, Channel #15
+        DCD     cpuss_interrupts_dw1_0_IRQHandler     ; CPUSS DataWire #1, Channel #0
+        DCD     cpuss_interrupts_dw1_1_IRQHandler     ; CPUSS DataWire #1, Channel #1
+        DCD     cpuss_interrupts_dw1_2_IRQHandler     ; CPUSS DataWire #1, Channel #2
+        DCD     cpuss_interrupts_dw1_3_IRQHandler     ; CPUSS DataWire #1, Channel #3
+        DCD     cpuss_interrupts_dw1_4_IRQHandler     ; CPUSS DataWire #1, Channel #4
+        DCD     cpuss_interrupts_dw1_5_IRQHandler     ; CPUSS DataWire #1, Channel #5
+        DCD     cpuss_interrupts_dw1_6_IRQHandler     ; CPUSS DataWire #1, Channel #6
+        DCD     cpuss_interrupts_dw1_7_IRQHandler     ; CPUSS DataWire #1, Channel #7
+        DCD     cpuss_interrupts_dw1_8_IRQHandler     ; CPUSS DataWire #1, Channel #8
+        DCD     cpuss_interrupts_dw1_9_IRQHandler     ; CPUSS DataWire #1, Channel #9
+        DCD     cpuss_interrupts_dw1_10_IRQHandler    ; CPUSS DataWire #1, Channel #10
+        DCD     cpuss_interrupts_dw1_11_IRQHandler    ; CPUSS DataWire #1, Channel #11
+        DCD     cpuss_interrupts_dw1_12_IRQHandler    ; CPUSS DataWire #1, Channel #12
+        DCD     cpuss_interrupts_dw1_13_IRQHandler    ; CPUSS DataWire #1, Channel #13
+        DCD     cpuss_interrupts_dw1_14_IRQHandler    ; CPUSS DataWire #1, Channel #14
+        DCD     cpuss_interrupts_dw1_15_IRQHandler    ; CPUSS DataWire #1, Channel #15
+        DCD     cpuss_interrupts_fault_0_IRQHandler   ; CPUSS Fault Structure Interrupt #0
+        DCD     cpuss_interrupts_fault_1_IRQHandler   ; CPUSS Fault Structure Interrupt #1
+        DCD     cpuss_interrupt_crypto_IRQHandler     ; CRYPTO Accelerator Interrupt
+        DCD     cpuss_interrupt_fm_IRQHandler         ; FLASH Macro Interrupt
+        DCD     cpuss_interrupts_cm0_cti_0_IRQHandler ; CM0+ CTI #0
+        DCD     cpuss_interrupts_cm0_cti_1_IRQHandler ; CM0+ CTI #1
+        DCD     cpuss_interrupts_cm4_cti_0_IRQHandler ; CM4 CTI #0
+        DCD     cpuss_interrupts_cm4_cti_1_IRQHandler ; CM4 CTI #1
+        DCD     tcpwm_0_interrupts_0_IRQHandler       ; TCPWM #0, Counter #0
+        DCD     tcpwm_0_interrupts_1_IRQHandler       ; TCPWM #0, Counter #1
+        DCD     tcpwm_0_interrupts_2_IRQHandler       ; TCPWM #0, Counter #2
+        DCD     tcpwm_0_interrupts_3_IRQHandler       ; TCPWM #0, Counter #3
+        DCD     tcpwm_0_interrupts_4_IRQHandler       ; TCPWM #0, Counter #4
+        DCD     tcpwm_0_interrupts_5_IRQHandler       ; TCPWM #0, Counter #5
+        DCD     tcpwm_0_interrupts_6_IRQHandler       ; TCPWM #0, Counter #6
+        DCD     tcpwm_0_interrupts_7_IRQHandler       ; TCPWM #0, Counter #7
+        DCD     tcpwm_1_interrupts_0_IRQHandler       ; TCPWM #1, Counter #0
+        DCD     tcpwm_1_interrupts_1_IRQHandler       ; TCPWM #1, Counter #1
+        DCD     tcpwm_1_interrupts_2_IRQHandler       ; TCPWM #1, Counter #2
+        DCD     tcpwm_1_interrupts_3_IRQHandler       ; TCPWM #1, Counter #3
+        DCD     tcpwm_1_interrupts_4_IRQHandler       ; TCPWM #1, Counter #4
+        DCD     tcpwm_1_interrupts_5_IRQHandler       ; TCPWM #1, Counter #5
+        DCD     tcpwm_1_interrupts_6_IRQHandler       ; TCPWM #1, Counter #6
+        DCD     tcpwm_1_interrupts_7_IRQHandler       ; TCPWM #1, Counter #7
+        DCD     tcpwm_1_interrupts_8_IRQHandler       ; TCPWM #1, Counter #8
+        DCD     tcpwm_1_interrupts_9_IRQHandler       ; TCPWM #1, Counter #9
+        DCD     tcpwm_1_interrupts_10_IRQHandler      ; TCPWM #1, Counter #10
+        DCD     tcpwm_1_interrupts_11_IRQHandler      ; TCPWM #1, Counter #11
+        DCD     tcpwm_1_interrupts_12_IRQHandler      ; TCPWM #1, Counter #12
+        DCD     tcpwm_1_interrupts_13_IRQHandler      ; TCPWM #1, Counter #13
+        DCD     tcpwm_1_interrupts_14_IRQHandler      ; TCPWM #1, Counter #14
+        DCD     tcpwm_1_interrupts_15_IRQHandler      ; TCPWM #1, Counter #15
+        DCD     tcpwm_1_interrupts_16_IRQHandler      ; TCPWM #1, Counter #16
+        DCD     tcpwm_1_interrupts_17_IRQHandler      ; TCPWM #1, Counter #17
+        DCD     tcpwm_1_interrupts_18_IRQHandler      ; TCPWM #1, Counter #18
+        DCD     tcpwm_1_interrupts_19_IRQHandler      ; TCPWM #1, Counter #19
+        DCD     tcpwm_1_interrupts_20_IRQHandler      ; TCPWM #1, Counter #20
+        DCD     tcpwm_1_interrupts_21_IRQHandler      ; TCPWM #1, Counter #21
+        DCD     tcpwm_1_interrupts_22_IRQHandler      ; TCPWM #1, Counter #22
+        DCD     tcpwm_1_interrupts_23_IRQHandler      ; TCPWM #1, Counter #23
+        DCD     udb_interrupts_0_IRQHandler           ; UDB Interrupt #0
+        DCD     udb_interrupts_1_IRQHandler           ; UDB Interrupt #1
+        DCD     udb_interrupts_2_IRQHandler           ; UDB Interrupt #2
+        DCD     udb_interrupts_3_IRQHandler           ; UDB Interrupt #3
+        DCD     udb_interrupts_4_IRQHandler           ; UDB Interrupt #4
+        DCD     udb_interrupts_5_IRQHandler           ; UDB Interrupt #5
+        DCD     udb_interrupts_6_IRQHandler           ; UDB Interrupt #6
+        DCD     udb_interrupts_7_IRQHandler           ; UDB Interrupt #7
+        DCD     udb_interrupts_8_IRQHandler           ; UDB Interrupt #8
+        DCD     udb_interrupts_9_IRQHandler           ; UDB Interrupt #9
+        DCD     udb_interrupts_10_IRQHandler          ; UDB Interrupt #10
+        DCD     udb_interrupts_11_IRQHandler          ; UDB Interrupt #11
+        DCD     udb_interrupts_12_IRQHandler          ; UDB Interrupt #12
+        DCD     udb_interrupts_13_IRQHandler          ; UDB Interrupt #13
+        DCD     udb_interrupts_14_IRQHandler          ; UDB Interrupt #14
+        DCD     udb_interrupts_15_IRQHandler          ; UDB Interrupt #15
+        DCD     pass_interrupt_sar_IRQHandler         ; SAR ADC interrupt
+        DCD     audioss_interrupt_i2s_IRQHandler      ; I2S Audio interrupt
+        DCD     audioss_interrupt_pdm_IRQHandler      ; PDM/PCM Audio interrupt
+        DCD     profile_interrupt_IRQHandler          ; Energy Profiler interrupt
+        DCD     smif_interrupt_IRQHandler             ; Serial Memory Interface interrupt
+        DCD     usb_interrupt_hi_IRQHandler           ; USB Interrupt
+        DCD     usb_interrupt_med_IRQHandler          ; USB Interrupt
+        DCD     usb_interrupt_lo_IRQHandler           ; USB Interrupt
+        DCD     pass_interrupt_dacs_IRQHandler        ; Consolidated interrrupt for all DACs
+
+__Vectors_End
+
+__Vectors       EQU   __vector_table
+__Vectors_Size  EQU   __Vectors_End - __Vectors
+
+        SECTION .intvec_ram:DATA:REORDER:NOROOT(2)
+__ramVectors
+        DS32     __Vectors_Size
+
+
+        THUMB
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default handlers
+;;
+        PUBWEAK Default_Handler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Default_Handler
+        B Default_Handler
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Weak function for startup customization
+;;
+;; Note. The global resources are not yet initialized (for example global variables, peripherals, clocks) 
+;; because this function is executed as the first instruction in the ResetHandler.
+;; The PDL is also not initialized to use the proper register offsets.
+;; The user of this function is responsible for initializing the PDL and resources before using them.
+;;
+        PUBWEAK Cy_OnResetUser
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Cy_OnResetUser
+        BX LR
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Weak function for OS-specific customization
+;;
+        PUBWEAK cy_toolchain_init
+        SECTION .text:CODE:REORDER:NOROOT(2)
+cy_toolchain_init
+        BX LR
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Define strong version to return zero for
+;; __iar_program_start to skip data sections
+;; initialization.
+;;
+        PUBLIC __low_level_init
+        SECTION .text:CODE:REORDER:NOROOT(2)
+__low_level_init
+        MOVS R0, #0
+        BX LR
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Reset_Handler
+
+        ; Define strong function for startup customization
+        LDR     R0, =Cy_OnResetUser
+        BLX     R0
+
+        ; Disable global interrupts
+        CPSID I
+
+        ; Copy vectors from ROM to RAM
+        LDR r1, =__vector_table
+        LDR r0, =__ramVectors
+        LDR r2, =__Vectors_Size
+intvec_copy
+        LDR r3, [r1]
+        STR r3, [r0]
+        ADDS r0, r0, #4
+        ADDS r1, r1, #4
+        SUBS r2, r2, #1
+        CMP r2, #0
+        BNE intvec_copy
+
+        ; Update Vector Table Offset Register
+        LDR r0, =__ramVectors
+        LDR r1, =0xE000ED08
+        STR r0, [r1]
+        dsb
+
+        ; OS-specific low-level initialization
+        LDR     R0, =cy_toolchain_init
+        BLX     R0
+
+        ; Initialize data sections
+        LDR     R0, =__iar_data_init3
+        BLX     R0
+
+        LDR     R0, =SystemInit
+        BLX     R0
+
+        LDR     R0, =__iar_program_start
+        BLX     R0
+
+; Should never get here
+Cy_Main_Exited
+        B Cy_Main_Exited
+
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+NMI_Handler
+        B NMI_Handler
+
+
+        PUBWEAK Cy_SysLib_FaultHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+Cy_SysLib_FaultHandler
+        B Cy_SysLib_FaultHandler
+
+        PUBWEAK HardFault_Wrapper
+        SECTION .text:CODE:REORDER:NOROOT(1)
+HardFault_Wrapper
+        IMPORT Cy_SysLib_FaultHandler
+        movs r0, #4
+        mov r1, LR
+        tst r0, r1
+        beq L_MSP
+        mrs r0, PSP
+        b L_API_call
+L_MSP
+        mrs r0, MSP
+L_API_call
+        ; Storing LR content for Creator call stack trace
+        push {LR}
+        bl Cy_SysLib_FaultHandler
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+HardFault_Handler
+        B HardFault_Wrapper
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+MemManage_Handler
+        B HardFault_Wrapper
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+BusFault_Handler
+        B HardFault_Wrapper
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+UsageFault_Handler
+        B HardFault_Wrapper
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SVC_Handler
+        B SVC_Handler
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DebugMon_Handler
+        B DebugMon_Handler
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+PendSV_Handler
+        B PendSV_Handler
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SysTick_Handler
+        B SysTick_Handler
+
+
+        ; External interrupts
+        PUBWEAK ioss_interrupts_gpio_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_0_IRQHandler
+        B       ioss_interrupts_gpio_0_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_1_IRQHandler
+        B       ioss_interrupts_gpio_1_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_2_IRQHandler
+        B       ioss_interrupts_gpio_2_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_3_IRQHandler
+        B       ioss_interrupts_gpio_3_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_4_IRQHandler
+        B       ioss_interrupts_gpio_4_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_5_IRQHandler
+        B       ioss_interrupts_gpio_5_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_6_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_6_IRQHandler
+        B       ioss_interrupts_gpio_6_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_7_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_7_IRQHandler
+        B       ioss_interrupts_gpio_7_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_8_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_8_IRQHandler
+        B       ioss_interrupts_gpio_8_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_9_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_9_IRQHandler
+        B       ioss_interrupts_gpio_9_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_10_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_10_IRQHandler
+        B       ioss_interrupts_gpio_10_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_11_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_11_IRQHandler
+        B       ioss_interrupts_gpio_11_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_12_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_12_IRQHandler
+        B       ioss_interrupts_gpio_12_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_13_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_13_IRQHandler
+        B       ioss_interrupts_gpio_13_IRQHandler
+
+        PUBWEAK ioss_interrupts_gpio_14_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupts_gpio_14_IRQHandler
+        B       ioss_interrupts_gpio_14_IRQHandler
+
+        PUBWEAK ioss_interrupt_gpio_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupt_gpio_IRQHandler
+        B       ioss_interrupt_gpio_IRQHandler
+
+        PUBWEAK ioss_interrupt_vdd_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+ioss_interrupt_vdd_IRQHandler
+        B       ioss_interrupt_vdd_IRQHandler
+
+        PUBWEAK lpcomp_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+lpcomp_interrupt_IRQHandler
+        B       lpcomp_interrupt_IRQHandler
+
+        PUBWEAK scb_8_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+scb_8_interrupt_IRQHandler
+        B       scb_8_interrupt_IRQHandler
+
+        PUBWEAK srss_interrupt_mcwdt_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+srss_interrupt_mcwdt_0_IRQHandler
+        B       srss_interrupt_mcwdt_0_IRQHandler
+
+        PUBWEAK srss_interrupt_mcwdt_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+srss_interrupt_mcwdt_1_IRQHandler
+        B       srss_interrupt_mcwdt_1_IRQHandler
+
+        PUBWEAK srss_interrupt_backup_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+srss_interrupt_backup_IRQHandler
+        B       srss_interrupt_backup_IRQHandler
+
+        PUBWEAK srss_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+srss_interrupt_IRQHandler
+        B       srss_interrupt_IRQHandler
+
+        PUBWEAK pass_interrupt_ctbs_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+pass_interrupt_ctbs_IRQHandler
+        B       pass_interrupt_ctbs_IRQHandler
+
+        PUBWEAK bless_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+bless_interrupt_IRQHandler
+        B       bless_interrupt_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_0_IRQHandler
+        B       cpuss_interrupts_ipc_0_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_1_IRQHandler
+        B       cpuss_interrupts_ipc_1_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_2_IRQHandler
+        B       cpuss_interrupts_ipc_2_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_3_IRQHandler
+        B       cpuss_interrupts_ipc_3_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_4_IRQHandler
+        B       cpuss_interrupts_ipc_4_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_5_IRQHandler
+        B       cpuss_interrupts_ipc_5_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_6_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_6_IRQHandler
+        B       cpuss_interrupts_ipc_6_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_7_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_7_IRQHandler
+        B       cpuss_interrupts_ipc_7_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_8_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_8_IRQHandler
+        B       cpuss_interrupts_ipc_8_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_9_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_9_IRQHandler
+        B       cpuss_interrupts_ipc_9_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_10_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_10_IRQHandler
+        B       cpuss_interrupts_ipc_10_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_11_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_11_IRQHandler
+        B       cpuss_interrupts_ipc_11_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_12_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_12_IRQHandler
+        B       cpuss_interrupts_ipc_12_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_13_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_13_IRQHandler
+        B       cpuss_interrupts_ipc_13_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_14_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_14_IRQHandler
+        B       cpuss_interrupts_ipc_14_IRQHandler
+
+        PUBWEAK cpuss_interrupts_ipc_15_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_ipc_15_IRQHandler
+        B       cpuss_interrupts_ipc_15_IRQHandler
+
+        PUBWEAK scb_0_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+scb_0_interrupt_IRQHandler
+        B       scb_0_interrupt_IRQHandler
+
+        PUBWEAK scb_1_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+scb_1_interrupt_IRQHandler
+        B       scb_1_interrupt_IRQHandler
+
+        PUBWEAK scb_2_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+scb_2_interrupt_IRQHandler
+        B       scb_2_interrupt_IRQHandler
+
+        PUBWEAK scb_3_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+scb_3_interrupt_IRQHandler
+        B       scb_3_interrupt_IRQHandler
+
+        PUBWEAK scb_4_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+scb_4_interrupt_IRQHandler
+        B       scb_4_interrupt_IRQHandler
+
+        PUBWEAK scb_5_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+scb_5_interrupt_IRQHandler
+        B       scb_5_interrupt_IRQHandler
+
+        PUBWEAK scb_6_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+scb_6_interrupt_IRQHandler
+        B       scb_6_interrupt_IRQHandler
+
+        PUBWEAK scb_7_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+scb_7_interrupt_IRQHandler
+        B       scb_7_interrupt_IRQHandler
+
+        PUBWEAK csd_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+csd_interrupt_IRQHandler
+        B       csd_interrupt_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_0_IRQHandler
+        B       cpuss_interrupts_dw0_0_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_1_IRQHandler
+        B       cpuss_interrupts_dw0_1_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_2_IRQHandler
+        B       cpuss_interrupts_dw0_2_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_3_IRQHandler
+        B       cpuss_interrupts_dw0_3_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_4_IRQHandler
+        B       cpuss_interrupts_dw0_4_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_5_IRQHandler
+        B       cpuss_interrupts_dw0_5_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_6_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_6_IRQHandler
+        B       cpuss_interrupts_dw0_6_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_7_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_7_IRQHandler
+        B       cpuss_interrupts_dw0_7_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_8_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_8_IRQHandler
+        B       cpuss_interrupts_dw0_8_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_9_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_9_IRQHandler
+        B       cpuss_interrupts_dw0_9_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_10_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_10_IRQHandler
+        B       cpuss_interrupts_dw0_10_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_11_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_11_IRQHandler
+        B       cpuss_interrupts_dw0_11_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_12_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_12_IRQHandler
+        B       cpuss_interrupts_dw0_12_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_13_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_13_IRQHandler
+        B       cpuss_interrupts_dw0_13_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_14_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_14_IRQHandler
+        B       cpuss_interrupts_dw0_14_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw0_15_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw0_15_IRQHandler
+        B       cpuss_interrupts_dw0_15_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_0_IRQHandler
+        B       cpuss_interrupts_dw1_0_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_1_IRQHandler
+        B       cpuss_interrupts_dw1_1_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_2_IRQHandler
+        B       cpuss_interrupts_dw1_2_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_3_IRQHandler
+        B       cpuss_interrupts_dw1_3_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_4_IRQHandler
+        B       cpuss_interrupts_dw1_4_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_5_IRQHandler
+        B       cpuss_interrupts_dw1_5_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_6_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_6_IRQHandler
+        B       cpuss_interrupts_dw1_6_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_7_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_7_IRQHandler
+        B       cpuss_interrupts_dw1_7_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_8_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_8_IRQHandler
+        B       cpuss_interrupts_dw1_8_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_9_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_9_IRQHandler
+        B       cpuss_interrupts_dw1_9_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_10_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_10_IRQHandler
+        B       cpuss_interrupts_dw1_10_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_11_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_11_IRQHandler
+        B       cpuss_interrupts_dw1_11_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_12_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_12_IRQHandler
+        B       cpuss_interrupts_dw1_12_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_13_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_13_IRQHandler
+        B       cpuss_interrupts_dw1_13_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_14_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_14_IRQHandler
+        B       cpuss_interrupts_dw1_14_IRQHandler
+
+        PUBWEAK cpuss_interrupts_dw1_15_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_dw1_15_IRQHandler
+        B       cpuss_interrupts_dw1_15_IRQHandler
+
+        PUBWEAK cpuss_interrupts_fault_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_fault_0_IRQHandler
+        B       cpuss_interrupts_fault_0_IRQHandler
+
+        PUBWEAK cpuss_interrupts_fault_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_fault_1_IRQHandler
+        B       cpuss_interrupts_fault_1_IRQHandler
+
+        PUBWEAK cpuss_interrupt_crypto_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupt_crypto_IRQHandler
+        B       cpuss_interrupt_crypto_IRQHandler
+
+        PUBWEAK cpuss_interrupt_fm_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupt_fm_IRQHandler
+        B       cpuss_interrupt_fm_IRQHandler
+
+        PUBWEAK cpuss_interrupts_cm0_cti_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_cm0_cti_0_IRQHandler
+        B       cpuss_interrupts_cm0_cti_0_IRQHandler
+
+        PUBWEAK cpuss_interrupts_cm0_cti_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_cm0_cti_1_IRQHandler
+        B       cpuss_interrupts_cm0_cti_1_IRQHandler
+
+        PUBWEAK cpuss_interrupts_cm4_cti_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_cm4_cti_0_IRQHandler
+        B       cpuss_interrupts_cm4_cti_0_IRQHandler
+
+        PUBWEAK cpuss_interrupts_cm4_cti_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+cpuss_interrupts_cm4_cti_1_IRQHandler
+        B       cpuss_interrupts_cm4_cti_1_IRQHandler
+
+        PUBWEAK tcpwm_0_interrupts_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_0_interrupts_0_IRQHandler
+        B       tcpwm_0_interrupts_0_IRQHandler
+
+        PUBWEAK tcpwm_0_interrupts_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_0_interrupts_1_IRQHandler
+        B       tcpwm_0_interrupts_1_IRQHandler
+
+        PUBWEAK tcpwm_0_interrupts_2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_0_interrupts_2_IRQHandler
+        B       tcpwm_0_interrupts_2_IRQHandler
+
+        PUBWEAK tcpwm_0_interrupts_3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_0_interrupts_3_IRQHandler
+        B       tcpwm_0_interrupts_3_IRQHandler
+
+        PUBWEAK tcpwm_0_interrupts_4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_0_interrupts_4_IRQHandler
+        B       tcpwm_0_interrupts_4_IRQHandler
+
+        PUBWEAK tcpwm_0_interrupts_5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_0_interrupts_5_IRQHandler
+        B       tcpwm_0_interrupts_5_IRQHandler
+
+        PUBWEAK tcpwm_0_interrupts_6_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_0_interrupts_6_IRQHandler
+        B       tcpwm_0_interrupts_6_IRQHandler
+
+        PUBWEAK tcpwm_0_interrupts_7_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_0_interrupts_7_IRQHandler
+        B       tcpwm_0_interrupts_7_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_0_IRQHandler
+        B       tcpwm_1_interrupts_0_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_1_IRQHandler
+        B       tcpwm_1_interrupts_1_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_2_IRQHandler
+        B       tcpwm_1_interrupts_2_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_3_IRQHandler
+        B       tcpwm_1_interrupts_3_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_4_IRQHandler
+        B       tcpwm_1_interrupts_4_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_5_IRQHandler
+        B       tcpwm_1_interrupts_5_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_6_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_6_IRQHandler
+        B       tcpwm_1_interrupts_6_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_7_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_7_IRQHandler
+        B       tcpwm_1_interrupts_7_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_8_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_8_IRQHandler
+        B       tcpwm_1_interrupts_8_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_9_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_9_IRQHandler
+        B       tcpwm_1_interrupts_9_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_10_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_10_IRQHandler
+        B       tcpwm_1_interrupts_10_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_11_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_11_IRQHandler
+        B       tcpwm_1_interrupts_11_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_12_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_12_IRQHandler
+        B       tcpwm_1_interrupts_12_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_13_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_13_IRQHandler
+        B       tcpwm_1_interrupts_13_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_14_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_14_IRQHandler
+        B       tcpwm_1_interrupts_14_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_15_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_15_IRQHandler
+        B       tcpwm_1_interrupts_15_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_16_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_16_IRQHandler
+        B       tcpwm_1_interrupts_16_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_17_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_17_IRQHandler
+        B       tcpwm_1_interrupts_17_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_18_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_18_IRQHandler
+        B       tcpwm_1_interrupts_18_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_19_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_19_IRQHandler
+        B       tcpwm_1_interrupts_19_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_20_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_20_IRQHandler
+        B       tcpwm_1_interrupts_20_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_21_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_21_IRQHandler
+        B       tcpwm_1_interrupts_21_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_22_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_22_IRQHandler
+        B       tcpwm_1_interrupts_22_IRQHandler
+
+        PUBWEAK tcpwm_1_interrupts_23_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+tcpwm_1_interrupts_23_IRQHandler
+        B       tcpwm_1_interrupts_23_IRQHandler
+
+        PUBWEAK udb_interrupts_0_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_0_IRQHandler
+        B       udb_interrupts_0_IRQHandler
+
+        PUBWEAK udb_interrupts_1_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_1_IRQHandler
+        B       udb_interrupts_1_IRQHandler
+
+        PUBWEAK udb_interrupts_2_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_2_IRQHandler
+        B       udb_interrupts_2_IRQHandler
+
+        PUBWEAK udb_interrupts_3_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_3_IRQHandler
+        B       udb_interrupts_3_IRQHandler
+
+        PUBWEAK udb_interrupts_4_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_4_IRQHandler
+        B       udb_interrupts_4_IRQHandler
+
+        PUBWEAK udb_interrupts_5_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_5_IRQHandler
+        B       udb_interrupts_5_IRQHandler
+
+        PUBWEAK udb_interrupts_6_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_6_IRQHandler
+        B       udb_interrupts_6_IRQHandler
+
+        PUBWEAK udb_interrupts_7_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_7_IRQHandler
+        B       udb_interrupts_7_IRQHandler
+
+        PUBWEAK udb_interrupts_8_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_8_IRQHandler
+        B       udb_interrupts_8_IRQHandler
+
+        PUBWEAK udb_interrupts_9_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_9_IRQHandler
+        B       udb_interrupts_9_IRQHandler
+
+        PUBWEAK udb_interrupts_10_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_10_IRQHandler
+        B       udb_interrupts_10_IRQHandler
+
+        PUBWEAK udb_interrupts_11_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_11_IRQHandler
+        B       udb_interrupts_11_IRQHandler
+
+        PUBWEAK udb_interrupts_12_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_12_IRQHandler
+        B       udb_interrupts_12_IRQHandler
+
+        PUBWEAK udb_interrupts_13_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_13_IRQHandler
+        B       udb_interrupts_13_IRQHandler
+
+        PUBWEAK udb_interrupts_14_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_14_IRQHandler
+        B       udb_interrupts_14_IRQHandler
+
+        PUBWEAK udb_interrupts_15_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+udb_interrupts_15_IRQHandler
+        B       udb_interrupts_15_IRQHandler
+
+        PUBWEAK pass_interrupt_sar_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+pass_interrupt_sar_IRQHandler
+        B       pass_interrupt_sar_IRQHandler
+
+        PUBWEAK audioss_interrupt_i2s_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+audioss_interrupt_i2s_IRQHandler
+        B       audioss_interrupt_i2s_IRQHandler
+
+        PUBWEAK audioss_interrupt_pdm_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+audioss_interrupt_pdm_IRQHandler
+        B       audioss_interrupt_pdm_IRQHandler
+
+        PUBWEAK profile_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+profile_interrupt_IRQHandler
+        B       profile_interrupt_IRQHandler
+
+        PUBWEAK smif_interrupt_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+smif_interrupt_IRQHandler
+        B       smif_interrupt_IRQHandler
+
+        PUBWEAK usb_interrupt_hi_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+usb_interrupt_hi_IRQHandler
+        B       usb_interrupt_hi_IRQHandler
+
+        PUBWEAK usb_interrupt_med_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+usb_interrupt_med_IRQHandler
+        B       usb_interrupt_med_IRQHandler
+
+        PUBWEAK usb_interrupt_lo_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+usb_interrupt_lo_IRQHandler
+        B       usb_interrupt_lo_IRQHandler
+
+        PUBWEAK pass_interrupt_dacs_IRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+pass_interrupt_dacs_IRQHandler
+        B       pass_interrupt_dacs_IRQHandler
+
+
+        END
+
+
+; [] END OF FILE

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/startup/system_psoc6.h

@@ -0,0 +1,684 @@
+/***************************************************************************//**
+* \file system_psoc6.h
+* \version 2.60
+*
+* \brief Device system header file.
+*
+********************************************************************************
+* \copyright
+* Copyright 2016-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+
+#ifndef _SYSTEM_PSOC6_H_
+#define _SYSTEM_PSOC6_H_
+
+/**
+* \addtogroup group_system_config
+* \{
+* Provides device startup, system configuration, and linker script files.
+* The system startup provides the followings features:
+* - See \ref group_system_config_device_initialization for the:
+*   * \ref group_system_config_dual_core_device_initialization
+*   * \ref group_system_config_single_core_device_initialization
+* - \ref group_system_config_device_memory_definition
+* - \ref group_system_config_heap_stack_config
+* - \ref group_system_config_merge_apps
+* - \ref group_system_config_default_handlers
+* - \ref group_system_config_device_vector_table
+* - \ref group_system_config_cm4_functions
+*
+* \section group_system_config_configuration Configuration Considerations
+*
+* \subsection group_system_config_device_memory_definition Device Memory Definition
+* The flash and RAM allocation for each CPU is defined by the linker scripts.
+* For dual-core devices, the physical flash and RAM memory is shared between the CPU cores.
+* 2 KB of RAM (allocated at the end of RAM) are reserved for system use.
+* For Single-Core devices the system reserves additional 80 bytes of RAM.
+* Using the reserved memory area for other purposes will lead to unexpected behavior.
+*
+* \note The linker files provided with the PDL are generic and handle all common
+* use cases. Your project may not use every section defined in the linker files.
+* In that case you may see warnings during the build process. To eliminate build
+* warnings in your project, you can simply comment out or remove the relevant
+* code in the linker file.
+*
+* <b>ARM GCC</b>\n
+* The flash and RAM sections for the CPU are defined in the linker files:
+* 'xx_yy.ld', where 'xx' is the device group, and 'yy' is the target CPU; for example,
+* 'cy8c6xx7_cm0plus.ld' and 'cy8c6xx7_cm4_dual.ld'.
+* \note If the start of the Cortex-M4 application image is changed, the value
+* of the of the \ref CY_CORTEX_M4_APPL_ADDR should also be changed. The
+* \ref CY_CORTEX_M4_APPL_ADDR macro should be used as the parameter for the
+* Cy_SysEnableCM4() function call.
+*
+* Change the flash and RAM sizes by editing the macros value in the
+* linker files for both CPUs:
+* - 'xx_cm0plus.ld', where 'xx' is the device group:
+* \code
+* flash       (rx)  : ORIGIN = 0x10000000, LENGTH = 0x00080000
+* ram         (rwx) : ORIGIN = 0x08000000, LENGTH = 0x00024000
+* \endcode
+* - 'xx_cm4_dual.ld', where 'xx' is the device group:
+* \code
+* flash       (rx)  : ORIGIN = 0x10080000, LENGTH = 0x00080000
+* ram         (rwx) : ORIGIN = 0x08024000, LENGTH = 0x00023800
+* \endcode
+*
+* Change the value of the \ref CY_CORTEX_M4_APPL_ADDR macro to the rom ORIGIN's
+* value in the 'xx_cm4_dual.ld' file, where 'xx' is the device group. Do this
+* by either:
+* - Passing the following commands to the compiler:\n
+* \code -D CY_CORTEX_M4_APPL_ADDR=0x10080000 \endcode
+* - Editing the \ref CY_CORTEX_M4_APPL_ADDR value in the 'system_xx.h', where 'xx' is device family:\n
+* \code #define CY_CORTEX_M4_APPL_ADDR (0x10080000u) \endcode
+*
+* <b>ARM MDK</b>\n
+* The flash and RAM sections for the CPU are defined in the linker files:
+* 'xx_yy.scat', where 'xx' is the device group, and 'yy' is the target CPU; for example,
+* 'cy8c6xx7_cm0plus.scat' and 'cy8c6xx7_cm4_dual.scat'.
+* \note If the start of the Cortex-M4 application image is changed, the value
+* of the of the \ref CY_CORTEX_M4_APPL_ADDR should also be changed. The
+* \ref CY_CORTEX_M4_APPL_ADDR macro should be used as the parameter for the \ref
+* Cy_SysEnableCM4() function call.
+*
+* \note The linker files provided with the PDL are generic and handle all common
+* use cases. Your project may not use every section defined in the linker files.
+* In that case you may see the warnings during the build process:
+* L6314W (no section matches pattern) and/or L6329W
+* (pattern only matches removed unused sections). In your project, you can
+* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to
+* the linker. You can also comment out or remove the relevant code in the linker
+* file.
+*
+* Change the flash and RAM sizes by editing the macros value in the
+* linker files for both CPUs:
+* - 'xx_cm0plus.scat', where 'xx' is the device group:
+* \code
+* #define FLASH_START 0x10000000
+* #define FLASH_SIZE  0x00080000
+* #define RAM_START   0x08000000
+* #define RAM_SIZE    0x00024000
+* \endcode
+* - 'xx_cm4_dual.scat', where 'xx' is the device group:
+* \code
+* #define FLASH_START 0x10080000
+* #define FLASH_SIZE  0x00080000
+* #define RAM_START   0x08024000
+* #define RAM_SIZE    0x00023800
+* \endcode
+*
+* Change the value of the \ref CY_CORTEX_M4_APPL_ADDR macro to the FLASH_START
+* value in the 'xx_cm4_dual.scat' file,
+* where 'xx' is the device group. Do this by either:
+* - Passing the following commands to the compiler:\n
+* \code -D CY_CORTEX_M4_APPL_ADDR=0x10080000 \endcode
+* - Editing the \ref CY_CORTEX_M4_APPL_ADDR value in the 'system_xx.h', where
+* 'xx' is device family:\n
+* \code #define CY_CORTEX_M4_APPL_ADDR (0x10080000u) \endcode
+*
+* <b>IAR</b>\n
+* The flash and RAM sections for the CPU are defined in the linker files:
+* 'xx_yy.icf', where 'xx' is the device group, and 'yy' is the target CPU; for example,
+* 'cy8c6xx7_cm0plus.icf' and 'cy8c6xx7_cm4_dual.icf'.
+* \note If the start of the Cortex-M4 application image is changed, the value
+* of the of the \ref CY_CORTEX_M4_APPL_ADDR should also be changed. The
+* \ref CY_CORTEX_M4_APPL_ADDR macro should be used as the parameter for the \ref
+* Cy_SysEnableCM4() function call.
+*
+* Change the flash and RAM sizes by editing the macros value in the
+* linker files for both CPUs:
+* - 'xx_cm0plus.icf', where 'xx' is the device group:
+* \code
+* define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000;
+* define symbol __ICFEDIT_region_IROM1_end__   = 0x10080000;
+* define symbol __ICFEDIT_region_IRAM1_start__ = 0x08000000;
+* define symbol __ICFEDIT_region_IRAM1_end__   = 0x08024000;
+* \endcode
+* - 'xx_cm4_dual.icf', where 'xx' is the device group:
+* \code
+* define symbol __ICFEDIT_region_IROM1_start__ = 0x10080000;
+* define symbol __ICFEDIT_region_IROM1_end__   = 0x10100000;
+* define symbol __ICFEDIT_region_IRAM1_start__ = 0x08024000;
+* define symbol __ICFEDIT_region_IRAM1_end__   = 0x08047800;
+* \endcode
+*
+* Change the value of the \ref CY_CORTEX_M4_APPL_ADDR macro to the
+* __ICFEDIT_region_IROM1_start__ value in the 'xx_cm4_dual.icf' file, where 'xx'
+* is the device group. Do this by either:
+* - Passing the following commands to the compiler:\n
+* \code -D CY_CORTEX_M4_APPL_ADDR=0x10080000 \endcode
+* - Editing the \ref CY_CORTEX_M4_APPL_ADDR value in the 'system_xx.h', where
+* 'xx' is device family:\n
+* \code #define CY_CORTEX_M4_APPL_ADDR (0x10080000u) \endcode
+*
+* \subsection group_system_config_device_initialization Device Initialization
+* After a power-on-reset (POR), the boot process is handled by the boot code
+* from the on-chip ROM that is always executed by the Cortex-M0+ core. The boot
+* code passes the control to the Cortex-M0+ startup code located in flash.
+*
+* \subsubsection group_system_config_dual_core_device_initialization Dual-Core Devices
+* The Cortex-M0+ startup code performs the device initialization by a call to
+* SystemInit() and then calls the main() function. The Cortex-M4 core is disabled
+* by default. Enable the core using the \ref Cy_SysEnableCM4() function.
+* See \ref group_system_config_cm4_functions for more details.
+* \note Startup code executes SystemInit() function for the both Cortex-M0+ and Cortex-M4 cores.
+* The function has a separate implementation on each core.
+* Both function implementations unlock and disable the WDT.
+* Therefore enable the WDT after both cores have been initialized.
+*
+* \subsubsection group_system_config_single_core_device_initialization Single-Core Devices
+* The Cortex-M0+ core is not user-accessible on these devices. In this case the
+* Flash Boot handles setup of the CM0+ core and starts the Cortex-M4 core.
+*
+* \subsection group_system_config_heap_stack_config Heap and Stack Configuration
+* There are two ways to adjust heap and stack configurations:
+* -# Editing source code files
+* -# Specifying via command line
+*
+* By default, the stack size is set to 0x00001000 and the heap size is set to 0x00000400.
+*
+* \subsubsection group_system_config_heap_stack_config_gcc ARM GCC
+* - <b>Editing source code files</b>\n
+* The heap and stack sizes are defined in the assembler startup files
+* (e.g. startup_psoc6_01_cm0plus.S and startup_psoc6_01_cm4.S).
+* Change the heap and stack sizes by modifying the following lines:\n
+* \code .equ  Stack_Size, 0x00001000 \endcode
+* \code .equ  Heap_Size,  0x00000400 \endcode
+*
+* - <b>Specifying via command line</b>\n
+* Change the heap and stack sizes passing the following commands to the compiler:\n
+* \code -D __STACK_SIZE=0x000000400 \endcode
+* \code -D __HEAP_SIZE=0x000000100 \endcode
+*
+* \subsubsection group_system_config_heap_stack_config_mdk ARM MDK
+* - <b>Editing source code files</b>\n
+* The heap and stack sizes are defined in the assembler startup files
+* (e.g. startup_psoc6_01_cm0plus.s and startup_psoc6_01_cm4.s).
+* Change the heap and stack sizes by modifying the following lines:\n
+* \code Stack_Size      EQU     0x00001000 \endcode
+* \code Heap_Size       EQU     0x00000400 \endcode
+*
+* - <b>Specifying via command line</b>\n
+* Change the heap and stack sizes passing the following commands to the assembler:\n
+* \code "--predefine=___STACK_SIZE SETA 0x000000400" \endcode
+* \code "--predefine=__HEAP_SIZE SETA 0x000000100" \endcode
+*
+* \subsubsection group_system_config_heap_stack_config_iar IAR
+* - <b>Editing source code files</b>\n
+* The heap and stack sizes are defined in the linker scatter files: 'xx_yy.icf',
+* where 'xx' is the device family, and 'yy' is the target CPU; for example,
+* cy8c6xx7_cm0plus.icf and cy8c6xx7_cm4_dual.icf.
+* Change the heap and stack sizes by modifying the following lines:\n
+* \code Stack_Size      EQU     0x00001000 \endcode
+* \code Heap_Size       EQU     0x00000400 \endcode
+*
+* - <b>Specifying via command line</b>\n
+* Change the heap and stack sizes passing the following commands to the
+* linker (including quotation marks):\n
+* \code --define_symbol __STACK_SIZE=0x000000400 \endcode
+* \code --define_symbol __HEAP_SIZE=0x000000100 \endcode
+*
+* \subsection group_system_config_merge_apps Merging CM0+ and CM4 Executables
+* The CM0+ project and linker script build the CM0+ application image. Similarly,
+* the CM4 linker script builds the CM4 application image. Each specifies
+* locations, sizes, and contents of sections in memory. See
+* \ref group_system_config_device_memory_definition for the symbols and default
+* values.
+*
+* The cymcuelftool is invoked by a post-build command. The precise project
+* setting is IDE-specific.
+*
+* The cymcuelftool combines the two executables. The tool examines the
+* executables to ensure that memory regions either do not overlap, or contain
+* identical bytes (shared). If there are no problems, it creates a new ELF file
+* with the merged image, without changing any of the addresses or data.
+*
+* \subsection group_system_config_default_handlers Default Interrupt Handlers Definition
+* The default interrupt handler functions are defined as weak functions to a dummy
+* handler in the startup file. The naming convention for the interrupt handler names
+* is \<interrupt_name\>_IRQHandler. A default interrupt handler can be overwritten in
+* user code by defining the handler function using the same name. For example:
+* \code
+* void scb_0_interrupt_IRQHandler(void)
+*{
+*    ...
+*}
+* \endcode
+*
+* \subsection group_system_config_device_vector_table Vectors Table Copy from Flash to RAM
+* This process uses memory sections defined in the linker script. The startup
+* code actually defines the contents of the vector table and performs the copy.
+* \subsubsection group_system_config_device_vector_table_gcc ARM GCC
+* The linker script file is 'xx_yy.ld', where 'xx' is the device family, and
+* 'yy' is the target CPU; for example, cy8c6xx7_cm0plus.ld and cy8c6xx7_cm4_dual.ld.
+* It defines sections and locations in memory.\n
+*       Copy interrupt vectors from flash to RAM: \n
+*       From: \code LONG (__Vectors) \endcode
+*       To:   \code LONG (__ram_vectors_start__) \endcode
+*       Size: \code LONG (__Vectors_End - __Vectors) \endcode
+* The vector table address (and the vector table itself) are defined in the
+* assembler startup files (e.g. startup_psoc6_01_cm0plus.S and startup_psoc6_01_cm4.S).
+* The code in these files copies the vector table from Flash to RAM.
+* \subsubsection group_system_config_device_vector_table_mdk ARM MDK
+* The linker script file is 'xx_yy.scat', where 'xx' is the device family,
+* and 'yy' is the target CPU; for example, cy8c6xx7_cm0plus.scat and
+* cy8c6xx7_cm4_dual.scat. The linker script specifies that the vector table
+* (RESET_RAM) shall be first in the RAM section.\n
+* RESET_RAM represents the vector table. It is defined in the assembler startup
+* files (e.g. startup_psoc6_01_cm0plus.s and startup_psoc6_01_cm4.s).
+* The code in these files copies the vector table from Flash to RAM.
+*
+* \subsubsection group_system_config_device_vector_table_iar IAR
+* The linker script file is 'xx_yy.icf', where 'xx' is the device family, and
+* 'yy' is the target CPU; for example, cy8c6xx7_cm0plus.icf and cy8c6xx7_cm4_dual.icf.
+* This file defines the .intvec_ram section and its location.
+* \code place at start of IRAM1_region  { readwrite section .intvec_ram}; \endcode
+* The vector table address (and the vector table itself) are defined in the
+* assembler startup files (e.g. startup_psoc6_01_cm0plus.s and startup_psoc6_01_cm4.s).
+* The code in these files copies the vector table from Flash to RAM.
+*
+* \section group_system_config_more_information More Information
+* Refer to the <a href="..\..\pdl_user_guide.pdf">PDL User Guide</a> for the
+* more details.
+*
+* \section group_system_config_MISRA MISRA Compliance
+*
+* <table class="doxtable">
+*   <tr>
+*     <th>MISRA Rule</th>
+*     <th>Rule Class (Required/Advisory)</th>
+*     <th>Rule Description</th>
+*     <th>Description of Deviation(s)</th>
+*   </tr>
+*   <tr>
+*     <td>2.3</td>
+*     <td>R</td>
+*     <td>The character sequence // shall not be used within a comment.</td>
+*     <td>The comments provide a useful WEB link to the documentation.</td>
+*   </tr>
+* </table>
+*
+* \section group_system_config_changelog Changelog
+*   <table class="doxtable">
+*   <tr>
+*       <th>Version</th>
+*       <th>Changes</th>
+*       <th>Reason for Change</th>
+*   </tr>
+*   <tr>
+*       <td>2.60</td>
+*       <td>Updated linker scripts.</td>
+*       <td>Provided support for new devices, updated usage of CM0p prebuilt image.</td>
+*   </tr>
+*   <tr>
+*       <td>2.50</td>
+*       <td>Updated assembler files, C files, linker scripts.</td>
+*       <td>Dynamic allocated HEAP size for Arm Compiler 6, IAR 8.</td>
+*   </tr>
+*   <tr>
+*       <td>2.40</td>
+*       <td>Updated assembler files, C files, linker scripts.</td>
+*       <td>Added Arm Compiler 6 support.</td>
+*   </tr>
+*   <tr>
+*       <td rowspan="2">2.30</td>
+*       <td>Added assembler files, linker scripts for Mbed OS.</td>
+*       <td>Added Arm Mbed OS embedded operating system support.</td>
+*   </tr>
+*   <tr>
+*       <td>Updated linker scripts to extend the Flash and Ram memories size available for the CM4 core.</td>
+*       <td>Enhanced PDL usability.</td>
+*   </tr>
+*   <tr>
+*       <td>2.20</td>
+*       <td>Moved the Cy_IPC_SystemSemaInit(), Cy_IPC_SystemPipeInit() functions implementation from IPC to Startup.</td>
+*       <td>Changed the IPC driver configuration method from compile time to run time.</td>
+*   </tr>
+*   <tr>
+*     <td rowspan="2"> 2.10</td>
+*     <td>Added constructor attribute to SystemInit() function declaration for ARM MDK compiler. \n
+*         Removed $Sub$$main symbol for ARM MDK compiler.
+*     </td>
+*     <td>uVision Debugger support.</td>
+*   </tr>
+*   <tr>
+*     <td>Updated description of the Startup behavior for Single-Core Devices. \n
+*         Added note about WDT disabling by SystemInit() function.
+*     </td>
+*     <td>Documentation improvement.</td>
+*   </tr>
+*   <tr>
+*     <td rowspan="4"> 2.0</td>
+*     <td>Added restoring of FLL registers to the default state in SystemInit() API for single core devices.
+*         Single core device support.
+*     </td>
+*     <td></td>
+*   </tr>
+*   <tr>
+*     <td>Added Normal Access Restrictions, Public Key, TOC part2 and TOC part2 copy to Supervisory flash linker memory regions. \n
+*         Renamed 'wflash' memory region to 'em_eeprom'.
+*     </td>
+*     <td>Linker scripts usability improvement.</td>
+*   </tr>
+*   <tr>
+*     <td>Added Cy_IPC_SystemSemaInit(), Cy_IPC_SystemPipeInit(), Cy_Flash_Init() functions call to SystemInit() API.</td>
+*     <td>Reserved system resources for internal operations.</td>
+*   </tr>
+*   <tr>
+*     <td>Added clearing and releasing of IPC structure #7 (reserved for the Deep-Sleep operations) to SystemInit() API.</td>
+*     <td>To avoid deadlocks in case of SW or WDT reset during Deep-Sleep entering.</td>
+*   </tr>
+*   <tr>
+*       <td>1.0</td>
+*       <td>Initial version</td>
+*       <td></td>
+*   </tr>
+* </table>
+*
+*
+* \defgroup group_system_config_macro Macro
+* \{
+*   \defgroup group_system_config_system_macro            System
+*   \defgroup group_system_config_cm4_status_macro        Cortex-M4 Status
+*   \defgroup group_system_config_user_settings_macro     User Settings
+* \}
+* \defgroup group_system_config_functions Functions
+* \{
+*   \defgroup group_system_config_system_functions        System
+*   \defgroup group_system_config_cm4_functions           Cortex-M4 Control
+* \}
+* \defgroup group_system_config_globals Global Variables
+*
+* \}
+*/
+
+/**
+* \addtogroup group_system_config_system_functions
+* \{
+*   \details
+*   The following system functions implement CMSIS Core functions.
+*   Refer to the [CMSIS documentation]
+*   (http://www.keil.com/pack/doc/CMSIS/Core/html/group__system__init__gr.html "System and Clock Configuration")
+*   for more details.
+* \}
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/*******************************************************************************
+* Include files
+*******************************************************************************/
+#include <stdint.h>
+
+
+/*******************************************************************************
+* Global preprocessor symbols/macros ('define')
+*******************************************************************************/
+#if ((defined(__GNUC__)        &&  (__ARM_ARCH == 6) && (__ARM_ARCH_6M__ == 1)) || \
+     (defined (__ICCARM__)     &&  (__CORE__ == __ARM6M__))  || \
+     (defined(__ARMCC_VERSION) &&  (__TARGET_ARCH_THUMB == 3)))
+    #define CY_SYSTEM_CPU_CM0P          1UL
+#else
+    #define CY_SYSTEM_CPU_CM0P          0UL
+#endif
+
+#if defined (CY_PSOC_CREATOR_USED) && (CY_PSOC_CREATOR_USED == 1U)
+    #include "cyfitter.h"
+#endif /* (CY_PSOC_CREATOR_USED) && (CY_PSOC_CREATOR_USED == 1U) */
+
+
+
+
+/*******************************************************************************
+*
+*                      START OF USER SETTINGS HERE
+*                      ===========================
+*
+*                 All lines with '<<<' can be set by user.
+*
+*******************************************************************************/
+
+/**
+* \addtogroup group_system_config_user_settings_macro
+* \{
+*/
+
+#if defined (CYDEV_CLK_EXTCLK__HZ)
+    #define CY_CLK_EXT_FREQ_HZ          (CYDEV_CLK_EXTCLK__HZ)
+#else
+    /***************************************************************************//**
+    * External Clock Frequency (in Hz, [value]UL). If compiled within
+    * PSoC Creator and the clock is enabled in the DWR, the value from DWR used.
+    * Otherwise, edit the value below.
+    *        <i>(USER SETTING)</i>
+    *******************************************************************************/
+    #define CY_CLK_EXT_FREQ_HZ          (24000000UL)    /* <<< 24 MHz */
+#endif /* (CYDEV_CLK_EXTCLK__HZ) */
+
+
+#if defined (CYDEV_CLK_ECO__HZ)
+    #define CY_CLK_ECO_FREQ_HZ          (CYDEV_CLK_ECO__HZ)
+#else
+    /***************************************************************************//**
+    * \brief External crystal oscillator frequency (in Hz, [value]UL). If compiled
+    * within PSoC Creator and the clock is enabled in the DWR, the value from DWR
+    * used.
+    *       <i>(USER SETTING)</i>
+    *******************************************************************************/
+    #define CY_CLK_ECO_FREQ_HZ          (24000000UL)    /* <<< 24 MHz */
+#endif /* (CYDEV_CLK_ECO__HZ) */
+
+
+#if defined (CYDEV_CLK_ALTHF__HZ)
+    #define CY_CLK_ALTHF_FREQ_HZ        (CYDEV_CLK_ALTHF__HZ)
+#else
+    /***************************************************************************//**
+    * \brief Alternate high frequency (in Hz, [value]UL). If compiled within
+    * PSoC Creator and the clock is enabled in the DWR, the value from DWR used.
+    * Otherwise, edit the value below.
+    *        <i>(USER SETTING)</i>
+    *******************************************************************************/
+    #define CY_CLK_ALTHF_FREQ_HZ        (32000000UL)    /* <<< 32 MHz */
+#endif /* (CYDEV_CLK_ALTHF__HZ) */
+
+
+/***************************************************************************//**
+* \brief Start address of the Cortex-M4 application ([address]UL)
+*        <i>(USER SETTING)</i>
+*******************************************************************************/
+#if !defined (CY_CORTEX_M4_APPL_ADDR)
+    #define CY_CORTEX_M4_APPL_ADDR          (CY_FLASH_BASE + 0x2000U)   /* <<< 8 kB of flash is reserved for the Cortex-M0+ application */
+#endif /* (CY_CORTEX_M4_APPL_ADDR) */
+
+
+/***************************************************************************//**
+* \brief IPC Semaphores allocation ([value]UL).
+*        <i>(USER SETTING)</i>
+*******************************************************************************/
+#define CY_IPC_SEMA_COUNT               (128UL)  /* <<< This will allow 128 (4*32) semaphores */
+
+
+/***************************************************************************//**
+* \brief IPC Pipe definitions ([value]UL).
+*        <i>(USER SETTING)</i>
+*******************************************************************************/
+#define CY_IPC_MAX_ENDPOINTS            (8UL) /* <<< 8 endpoints */
+
+
+/*******************************************************************************
+*
+*                         END OF USER SETTINGS HERE
+*                         =========================
+*
+*******************************************************************************/
+
+/** \} group_system_config_user_settings_macro */
+
+
+/**
+* \addtogroup group_system_config_system_macro
+* \{
+*/
+
+#if (CY_SYSTEM_CPU_CM0P == 1UL) || defined(CY_DOXYGEN)
+    /** The Cortex-M0+ startup driver identifier */
+    #define CY_STARTUP_M0P_ID               ((uint32_t)((uint32_t)((0x0EU) & 0x3FFFU) << 18U))
+#endif /* (CY_SYSTEM_CPU_CM0P == 1UL) */
+
+#if (CY_SYSTEM_CPU_CM0P != 1UL) || defined(CY_DOXYGEN)
+    /** The Cortex-M4 startup driver identifier */
+    #define CY_STARTUP_M4_ID        ((uint32_t)((uint32_t)((0x0FU) & 0x3FFFU) << 18U))
+#endif /* (CY_SYSTEM_CPU_CM0P != 1UL) */
+
+/** \} group_system_config_system_macro */
+
+
+/**
+* \addtogroup group_system_config_system_functions
+* \{
+*/
+#if defined(__ARMCC_VERSION)
+    extern void SystemInit(void) __attribute__((constructor));
+#else
+    extern void SystemInit(void);
+#endif /* (__ARMCC_VERSION) */
+
+extern void SystemCoreClockUpdate(void);
+/** \} group_system_config_system_functions */
+
+
+/**
+* \addtogroup group_system_config_cm4_functions
+* \{
+*/
+extern uint32_t Cy_SysGetCM4Status(void);
+extern void     Cy_SysEnableCM4(uint32_t vectorTableOffset);
+extern void     Cy_SysDisableCM4(void);
+extern void     Cy_SysRetainCM4(void);
+extern void     Cy_SysResetCM4(void);
+/** \} group_system_config_cm4_functions */
+
+
+/** \cond */
+extern void     Default_Handler (void);
+
+void Cy_SysIpcPipeIsrCm0(void);
+void Cy_SysIpcPipeIsrCm4(void);
+
+extern void     Cy_SystemInit(void);
+extern void     Cy_SystemInitFpuEnable(void);
+
+extern uint32_t cy_delayFreqHz;
+extern uint32_t cy_delayFreqKhz;
+extern uint8_t  cy_delayFreqMhz;
+extern uint32_t cy_delay32kMs;
+/** \endcond */
+
+
+#if (CY_SYSTEM_CPU_CM0P == 1UL) || defined(CY_DOXYGEN)
+/**
+* \addtogroup group_system_config_cm4_status_macro
+* \{
+*/
+#define CY_SYS_CM4_STATUS_ENABLED   (3U)    /**< The Cortex-M4 core is enabled: power on, clock on, no isolate, no reset and no retain. */
+#define CY_SYS_CM4_STATUS_DISABLED  (0U)    /**< The Cortex-M4 core is disabled: power off, clock off, isolate, reset and no retain. */
+#define CY_SYS_CM4_STATUS_RETAINED  (2U)    /**< The Cortex-M4 core is retained. power off, clock off, isolate, no reset and retain. */
+#define CY_SYS_CM4_STATUS_RESET     (1U)    /**< The Cortex-M4 core is in the Reset mode: clock off, no isolated, no retain and reset. */
+/** \} group_system_config_cm4_status_macro */
+
+#endif /* (CY_SYSTEM_CPU_CM0P == 1UL) */
+
+
+/*******************************************************************************
+*                             IPC Configuration
+*                         =========================
+*******************************************************************************/
+/* IPC CY_PIPE default configuration */
+#define CY_SYS_CYPIPE_CLIENT_CNT        (8UL)
+
+#define CY_SYS_INTR_CYPIPE_MUX_EP0      (1UL)   /* IPC CYPRESS PIPE */
+#define CY_SYS_INTR_CYPIPE_PRIOR_EP0    (1UL)   /* Notifier Priority */
+#define CY_SYS_INTR_CYPIPE_PRIOR_EP1    (1UL)   /* Notifier Priority */
+
+#define CY_SYS_CYPIPE_CHAN_MASK_EP0     (0x0001UL << CY_IPC_CHAN_CYPIPE_EP0)
+#define CY_SYS_CYPIPE_CHAN_MASK_EP1     (0x0001UL << CY_IPC_CHAN_CYPIPE_EP1)
+
+
+/******************************************************************************/
+/*
+ * The System pipe configuration defines the IPC channel number, interrupt
+ * number, and the pipe interrupt mask for the endpoint.
+ *
+ * The format of the endPoint configuration
+ *    Bits[31:16] Interrupt Mask
+ *    Bits[15:8 ] IPC interrupt
+ *    Bits[ 7:0 ] IPC channel
+ */
+
+/* System Pipe addresses */
+/* CyPipe defines */
+
+#define CY_SYS_CYPIPE_INTR_MASK   ( CY_SYS_CYPIPE_CHAN_MASK_EP0 | CY_SYS_CYPIPE_CHAN_MASK_EP1 )
+
+#define CY_SYS_CYPIPE_CONFIG_EP0  ( (CY_SYS_CYPIPE_INTR_MASK << CY_IPC_PIPE_CFG_IMASK_Pos) \
+                                            | (CY_IPC_INTR_CYPIPE_EP0 << CY_IPC_PIPE_CFG_INTR_Pos) \
+                                            | CY_IPC_CHAN_CYPIPE_EP0)
+#define CY_SYS_CYPIPE_CONFIG_EP1  ( (CY_SYS_CYPIPE_INTR_MASK << CY_IPC_PIPE_CFG_IMASK_Pos) \
+                                            | (CY_IPC_INTR_CYPIPE_EP1 << CY_IPC_PIPE_CFG_INTR_Pos) \
+                                            | CY_IPC_CHAN_CYPIPE_EP1)
+
+/******************************************************************************/
+
+
+/** \addtogroup group_system_config_globals
+* \{
+*/
+
+extern uint32_t SystemCoreClock;
+extern uint32_t cy_BleEcoClockFreqHz;
+extern uint32_t cy_Hfclk0FreqHz;
+extern uint32_t cy_PeriClkFreqHz;
+
+/** \} group_system_config_globals */
+
+
+
+/** \cond INTERNAL */
+/*******************************************************************************
+* Backward compatibility macro. The following code is DEPRECATED and must
+* not be used in new projects
+*******************************************************************************/
+
+/* BWC defines for functions related to enter/exit critical section */
+#define Cy_SaveIRQ      Cy_SysLib_EnterCriticalSection
+#define Cy_RestoreIRQ   Cy_SysLib_ExitCriticalSection
+#define CY_SYS_INTR_CYPIPE_EP0          (CY_IPC_INTR_CYPIPE_EP0)
+#define CY_SYS_INTR_CYPIPE_EP1          (CY_IPC_INTR_CYPIPE_EP1)
+
+/** \endcond */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SYSTEM_PSOC6_H_ */
+
+
+/* [] END OF FILE */

bsp/cypress/psoc6-pioneerkit_modus/libs/TARGET_CY8CKIT-062-BLE/startup/system_psoc6_cm4.c

@@ -0,0 +1,552 @@
+/***************************************************************************//**
+* \file system_psoc6_cm4.c
+* \version 2.60
+*
+* The device system-source file.
+*
+********************************************************************************
+* \copyright
+* Copyright 2016-2019 Cypress Semiconductor Corporation
+* SPDX-License-Identifier: Apache-2.0
+*
+* Licensed under the Apache License, Version 2.0 (the "License");
+* you may not use this file except in compliance with the License.
+* You may obtain a copy of the License at
+*
+*     http://www.apache.org/licenses/LICENSE-2.0
+*
+* Unless required by applicable law or agreed to in writing, software
+* distributed under the License is distributed on an "AS IS" BASIS,
+* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+* See the License for the specific language governing permissions and
+* limitations under the License.
+*******************************************************************************/
+
+#include <stdbool.h>
+#include "system_psoc6.h"
+#include "cy_device.h"
+#include "cy_device_headers.h"
+#include "cy_syslib.h"
+#include "cy_wdt.h"
+
+#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
+    #include "cy_ipc_sema.h"
+    #include "cy_ipc_pipe.h"
+    #include "cy_ipc_drv.h"
+
+    #if defined(CY_DEVICE_PSOC6ABLE2)
+        #include "cy_flash.h"
+    #endif /* defined(CY_DEVICE_PSOC6ABLE2) */
+#endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+
+
+/*******************************************************************************
+* SystemCoreClockUpdate()
+*******************************************************************************/
+
+/** Default HFClk frequency in Hz */
+#define CY_CLK_HFCLK0_FREQ_HZ_DEFAULT       (8000000UL)
+
+/** Default PeriClk frequency in Hz */
+#define CY_CLK_PERICLK_FREQ_HZ_DEFAULT      (4000000UL)
+
+/** Default SlowClk system core frequency in Hz */
+#define CY_CLK_SYSTEM_FREQ_HZ_DEFAULT       (8000000UL)
+
+/** IMO frequency in Hz */
+#define CY_CLK_IMO_FREQ_HZ                  (8000000UL)
+
+/** HVILO frequency in Hz */
+#define CY_CLK_HVILO_FREQ_HZ                (32000UL)
+
+/** PILO frequency in Hz */
+#define CY_CLK_PILO_FREQ_HZ                 (32768UL)
+
+/** WCO frequency in Hz */
+#define CY_CLK_WCO_FREQ_HZ                  (32768UL)
+
+/** ALTLF frequency in Hz */
+#define CY_CLK_ALTLF_FREQ_HZ                (32768UL)
+
+
+/**
+* Holds the SlowClk (Cortex-M0+) or FastClk (Cortex-M4) system core clock,
+* which is the system clock frequency supplied to the SysTick timer and the
+* processor core clock.
+* This variable implements CMSIS Core global variable.
+* Refer to the [CMSIS documentation]
+* (http://www.keil.com/pack/doc/CMSIS/Core/html/group__system__init__gr.html "System and Clock Configuration")
+* for more details.
+* This variable can be used by debuggers to query the frequency
+* of the debug timer or to configure the trace clock speed.
+*
+* \attention Compilers must be configured to avoid removing this variable in case
+* the application program is not using it. Debugging systems require the variable
+* to be physically present in memory so that it can be examined to configure the debugger. */
+uint32_t SystemCoreClock = CY_CLK_SYSTEM_FREQ_HZ_DEFAULT;
+
+/** Holds the HFClk0 clock frequency. Updated by \ref SystemCoreClockUpdate(). */
+uint32_t cy_Hfclk0FreqHz  = CY_CLK_HFCLK0_FREQ_HZ_DEFAULT;
+
+/** Holds the PeriClk clock frequency. Updated by \ref SystemCoreClockUpdate(). */
+uint32_t cy_PeriClkFreqHz = CY_CLK_PERICLK_FREQ_HZ_DEFAULT;
+
+/** Holds the Alternate high frequency clock in Hz. Updated by \ref SystemCoreClockUpdate(). */
+#if (defined (CY_IP_MXBLESS) && (CY_IP_MXBLESS == 1UL)) || defined (CY_DOXYGEN)
+    uint32_t cy_BleEcoClockFreqHz = CY_CLK_ALTHF_FREQ_HZ;
+#endif /* (defined (CY_IP_MXBLESS) && (CY_IP_MXBLESS == 1UL)) || defined (CY_DOXYGEN) */
+
+/* SCB->CPACR */
+#define SCB_CPACR_CP10_CP11_ENABLE      (0xFUL << 20u)
+
+
+/*******************************************************************************
+* SystemInit()
+*******************************************************************************/
+
+/* CLK_FLL_CONFIG default values */
+#define CY_FB_CLK_FLL_CONFIG_VALUE      (0x01000000u)
+#define CY_FB_CLK_FLL_CONFIG2_VALUE     (0x00020001u)
+#define CY_FB_CLK_FLL_CONFIG3_VALUE     (0x00002800u)
+#define CY_FB_CLK_FLL_CONFIG4_VALUE     (0x000000FFu)
+
+
+/*******************************************************************************
+* SystemCoreClockUpdate (void)
+*******************************************************************************/
+
+/* Do not use these definitions directly in your application */
+#define CY_DELAY_MS_OVERFLOW_THRESHOLD  (0x8000u)
+#define CY_DELAY_1K_THRESHOLD           (1000u)
+#define CY_DELAY_1K_MINUS_1_THRESHOLD   (CY_DELAY_1K_THRESHOLD - 1u)
+#define CY_DELAY_1M_THRESHOLD           (1000000u)
+#define CY_DELAY_1M_MINUS_1_THRESHOLD   (CY_DELAY_1M_THRESHOLD - 1u)
+uint32_t cy_delayFreqHz   = CY_CLK_SYSTEM_FREQ_HZ_DEFAULT;
+
+uint32_t cy_delayFreqKhz  = (CY_CLK_SYSTEM_FREQ_HZ_DEFAULT + CY_DELAY_1K_MINUS_1_THRESHOLD) /
+                            CY_DELAY_1K_THRESHOLD;
+
+uint8_t cy_delayFreqMhz  = (uint8_t)((CY_CLK_SYSTEM_FREQ_HZ_DEFAULT + CY_DELAY_1M_MINUS_1_THRESHOLD) /
+                            CY_DELAY_1M_THRESHOLD);
+
+uint32_t cy_delay32kMs    = CY_DELAY_MS_OVERFLOW_THRESHOLD *
+                            ((CY_CLK_SYSTEM_FREQ_HZ_DEFAULT + CY_DELAY_1K_MINUS_1_THRESHOLD) / CY_DELAY_1K_THRESHOLD);
+
+#define CY_ROOT_PATH_SRC_IMO                (0UL)
+#define CY_ROOT_PATH_SRC_EXT                (1UL)
+#if (SRSS_ECO_PRESENT == 1U)
+    #define CY_ROOT_PATH_SRC_ECO            (2UL)
+#endif /* (SRSS_ECO_PRESENT == 1U) */
+#if (SRSS_ALTHF_PRESENT == 1U)
+    #define CY_ROOT_PATH_SRC_ALTHF          (3UL)
+#endif /* (SRSS_ALTHF_PRESENT == 1U) */
+#define CY_ROOT_PATH_SRC_DSI_MUX            (4UL)
+#define CY_ROOT_PATH_SRC_DSI_MUX_HVILO      (16UL)
+#define CY_ROOT_PATH_SRC_DSI_MUX_WCO        (17UL)
+#if (SRSS_ALTLF_PRESENT == 1U)
+    #define CY_ROOT_PATH_SRC_DSI_MUX_ALTLF  (18UL)
+#endif /* (SRSS_ALTLF_PRESENT == 1U) */
+#if (SRSS_PILO_PRESENT == 1U)
+    #define CY_ROOT_PATH_SRC_DSI_MUX_PILO   (19UL)
+#endif /* (SRSS_PILO_PRESENT == 1U) */
+
+
+/*******************************************************************************
+* Function Name: SystemInit
+****************************************************************************//**
+* \cond
+* Initializes the system:
+* - Restores FLL registers to the default state for single core devices.
+* - Unlocks and disables WDT.
+* - Calls Cy_PDL_Init() function to define the driver library.
+* - Calls the Cy_SystemInit() function, if compiled from PSoC Creator.
+* - Calls \ref SystemCoreClockUpdate().
+* \endcond
+*******************************************************************************/
+void SystemInit(void)
+{
+    Cy_PDL_Init(CY_DEVICE_CFG);
+
+#ifdef __CM0P_PRESENT
+    #if (__CM0P_PRESENT == 0)
+        /* Restore FLL registers to the default state as they are not restored by the ROM code */
+        uint32_t copy = SRSS->CLK_FLL_CONFIG;
+        copy &= ~SRSS_CLK_FLL_CONFIG_FLL_ENABLE_Msk;
+        SRSS->CLK_FLL_CONFIG = copy;
+
+        copy = SRSS->CLK_ROOT_SELECT[0u];
+        copy &= ~SRSS_CLK_ROOT_SELECT_ROOT_DIV_Msk; /* Set ROOT_DIV = 0*/
+        SRSS->CLK_ROOT_SELECT[0u] = copy;
+
+        SRSS->CLK_FLL_CONFIG  = CY_FB_CLK_FLL_CONFIG_VALUE;
+        SRSS->CLK_FLL_CONFIG2 = CY_FB_CLK_FLL_CONFIG2_VALUE;
+        SRSS->CLK_FLL_CONFIG3 = CY_FB_CLK_FLL_CONFIG3_VALUE;
+        SRSS->CLK_FLL_CONFIG4 = CY_FB_CLK_FLL_CONFIG4_VALUE;
+
+        /* Unlock and disable WDT */
+        Cy_WDT_Unlock();
+        Cy_WDT_Disable();
+    #endif /* (__CM0P_PRESENT == 0) */
+#endif /* __CM0P_PRESENT */
+
+    Cy_SystemInit();
+    SystemCoreClockUpdate();
+
+#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
+
+#ifdef __CM0P_PRESENT
+    #if (__CM0P_PRESENT == 0)
+        /* Allocate and initialize semaphores for the system operations. */
+        static uint32_t ipcSemaArray[CY_IPC_SEMA_COUNT / CY_IPC_SEMA_PER_WORD];
+        (void) Cy_IPC_Sema_Init(CY_IPC_CHAN_SEMA, CY_IPC_SEMA_COUNT, ipcSemaArray);
+    #else
+        (void) Cy_IPC_Sema_Init(CY_IPC_CHAN_SEMA, 0ul, NULL);
+    #endif /* (__CM0P_PRESENT) */
+#else
+    (void) Cy_IPC_Sema_Init(CY_IPC_CHAN_SEMA, 0ul, NULL);
+#endif /* __CM0P_PRESENT */
+
+
+    /********************************************************************************
+    *
+    * Initializes the system pipes. The system pipes are used by BLE and Flash.
+    *
+    * If the default startup file is not used, or SystemInit() is not called in your
+    * project, call the following three functions prior to executing any flash or
+    * EmEEPROM write or erase operation:
+    *  -# Cy_IPC_Sema_Init()
+    *  -# Cy_IPC_Pipe_Config()
+    *  -# Cy_IPC_Pipe_Init()
+    *  -# Cy_Flash_Init()
+    *
+    *******************************************************************************/
+    /* Create an array of endpoint structures */
+    static cy_stc_ipc_pipe_ep_t systemIpcPipeEpArray[CY_IPC_MAX_ENDPOINTS];
+
+    Cy_IPC_Pipe_Config(systemIpcPipeEpArray);
+
+    static cy_ipc_pipe_callback_ptr_t systemIpcPipeSysCbArray[CY_SYS_CYPIPE_CLIENT_CNT];
+
+    static const cy_stc_ipc_pipe_config_t systemIpcPipeConfigCm4 =
+    {
+    /* .ep0ConfigData */
+        {
+            /* .ipcNotifierNumber    */  CY_IPC_INTR_CYPIPE_EP0,
+            /* .ipcNotifierPriority  */  CY_SYS_INTR_CYPIPE_PRIOR_EP0,
+            /* .ipcNotifierMuxNumber */  CY_SYS_INTR_CYPIPE_MUX_EP0,
+            /* .epAddress            */  CY_IPC_EP_CYPIPE_CM0_ADDR,
+            /* .epConfig             */  CY_SYS_CYPIPE_CONFIG_EP0
+        },
+    /* .ep1ConfigData */
+        {
+            /* .ipcNotifierNumber    */  CY_IPC_INTR_CYPIPE_EP1,
+            /* .ipcNotifierPriority  */  CY_SYS_INTR_CYPIPE_PRIOR_EP1,
+            /* .ipcNotifierMuxNumber */  0u,
+            /* .epAddress            */  CY_IPC_EP_CYPIPE_CM4_ADDR,
+            /* .epConfig             */  CY_SYS_CYPIPE_CONFIG_EP1
+        },
+    /* .endpointClientsCount     */  CY_SYS_CYPIPE_CLIENT_CNT,
+    /* .endpointsCallbacksArray  */  systemIpcPipeSysCbArray,
+    /* .userPipeIsrHandler       */  &Cy_SysIpcPipeIsrCm4
+    };
+
+    if (cy_device->flashPipeRequired != 0u)
+    {
+        Cy_IPC_Pipe_Init(&systemIpcPipeConfigCm4);
+    }
+
+#if defined(CY_DEVICE_PSOC6ABLE2)
+    Cy_Flash_Init();
+#endif /* defined(CY_DEVICE_PSOC6ABLE2) */
+
+#endif /* !defined(CY_IPC_DEFAULT_CFG_DISABLE) */
+}
+
+
+/*******************************************************************************
+* Function Name: Cy_SystemInit
+****************************************************************************//**
+*
+* The function is called during device startup. Once project compiled as part of
+* the PSoC Creator project, the Cy_SystemInit() function is generated by the
+* PSoC Creator.
+*
+* The function generated by PSoC Creator performs all of the necessary device
+* configuration based on the design settings.  This includes settings from the
+* Design Wide Resources (DWR) such as Clocks and Pins as well as any component
+* configuration that is necessary.
+*
+*******************************************************************************/
+__WEAK void Cy_SystemInit(void)
+{
+     /* Empty weak function. The actual implementation to be in the PSoC Creator
+      * generated strong function.
+     */
+}
+
+
+/*******************************************************************************
+* Function Name: SystemCoreClockUpdate
+****************************************************************************//**
+*
+* Gets core clock frequency and updates \ref SystemCoreClock, \ref
+* cy_Hfclk0FreqHz, and \ref cy_PeriClkFreqHz.
+*
+* Updates global variables used by the \ref Cy_SysLib_Delay(), \ref
+* Cy_SysLib_DelayUs(), and \ref Cy_SysLib_DelayCycles().
+*
+*******************************************************************************/
+void SystemCoreClockUpdate (void)
+{
+    uint32_t srcFreqHz;
+    uint32_t pathFreqHz;
+    uint32_t fastClkDiv;
+    uint32_t periClkDiv;
+    uint32_t rootPath;
+    uint32_t srcClk;
+
+    /* Get root path clock for the high-frequency clock # 0 */
+    rootPath = _FLD2VAL(SRSS_CLK_ROOT_SELECT_ROOT_MUX, SRSS->CLK_ROOT_SELECT[0u]);
+
+    /* Get source of the root path clock */
+    srcClk = _FLD2VAL(SRSS_CLK_PATH_SELECT_PATH_MUX, SRSS->CLK_PATH_SELECT[rootPath]);
+
+    /* Get frequency of the source */
+    switch (srcClk)
+    {
+    case CY_ROOT_PATH_SRC_IMO:
+        srcFreqHz = CY_CLK_IMO_FREQ_HZ;
+    break;
+
+    case CY_ROOT_PATH_SRC_EXT:
+        srcFreqHz = CY_CLK_EXT_FREQ_HZ;
+    break;
+
+    #if (SRSS_ECO_PRESENT == 1U)
+        case CY_ROOT_PATH_SRC_ECO:
+            srcFreqHz = CY_CLK_ECO_FREQ_HZ;
+        break;
+    #endif /* (SRSS_ECO_PRESENT == 1U) */
+
+#if defined (CY_IP_MXBLESS) && (CY_IP_MXBLESS == 1UL) && (SRSS_ALTHF_PRESENT == 1U)
+    case CY_ROOT_PATH_SRC_ALTHF:
+        srcFreqHz = cy_BleEcoClockFreqHz;
+    break;
+#endif /* defined (CY_IP_MXBLESS) && (CY_IP_MXBLESS == 1UL) && (SRSS_ALTHF_PRESENT == 1U) */
+
+    case CY_ROOT_PATH_SRC_DSI_MUX:
+    {
+        uint32_t dsi_src;
+        dsi_src = _FLD2VAL(SRSS_CLK_DSI_SELECT_DSI_MUX,  SRSS->CLK_DSI_SELECT[rootPath]);
+        switch (dsi_src)
+        {
+        case CY_ROOT_PATH_SRC_DSI_MUX_HVILO:
+            srcFreqHz = CY_CLK_HVILO_FREQ_HZ;
+        break;
+
+        case CY_ROOT_PATH_SRC_DSI_MUX_WCO:
+            srcFreqHz = CY_CLK_WCO_FREQ_HZ;
+        break;
+
+        #if (SRSS_ALTLF_PRESENT == 1U)
+            case CY_ROOT_PATH_SRC_DSI_MUX_ALTLF:
+                srcFreqHz = CY_CLK_ALTLF_FREQ_HZ;
+            break;
+        #endif /* (SRSS_ALTLF_PRESENT == 1U) */
+
+        #if (SRSS_PILO_PRESENT == 1U)
+            case CY_ROOT_PATH_SRC_DSI_MUX_PILO:
+                srcFreqHz = CY_CLK_PILO_FREQ_HZ;
+            break;
+        #endif /* (SRSS_PILO_PRESENT == 1U) */
+
+        default:
+            srcFreqHz = CY_CLK_HVILO_FREQ_HZ;
+        break;
+        }
+    }
+    break;
+
+    default:
+        srcFreqHz = CY_CLK_EXT_FREQ_HZ;
+    break;
+    }
+
+    if (rootPath == 0UL)
+    {
+        /* FLL */
+        bool fllLocked       = ( 0UL != _FLD2VAL(SRSS_CLK_FLL_STATUS_LOCKED, SRSS->CLK_FLL_STATUS));
+        bool fllOutputOutput = ( 3UL == _FLD2VAL(SRSS_CLK_FLL_CONFIG3_BYPASS_SEL, SRSS->CLK_FLL_CONFIG3));
+        bool fllOutputAuto   = ((0UL == _FLD2VAL(SRSS_CLK_FLL_CONFIG3_BYPASS_SEL, SRSS->CLK_FLL_CONFIG3)) ||
+                                (1UL == _FLD2VAL(SRSS_CLK_FLL_CONFIG3_BYPASS_SEL, SRSS->CLK_FLL_CONFIG3)));
+        if ((fllOutputAuto && fllLocked) || fllOutputOutput)
+        {
+            uint32_t fllMult;
+            uint32_t refDiv;
+            uint32_t outputDiv;
+
+            fllMult = _FLD2VAL(SRSS_CLK_FLL_CONFIG_FLL_MULT, SRSS->CLK_FLL_CONFIG);
+            refDiv  = _FLD2VAL(SRSS_CLK_FLL_CONFIG2_FLL_REF_DIV, SRSS->CLK_FLL_CONFIG2);
+            outputDiv = _FLD2VAL(SRSS_CLK_FLL_CONFIG_FLL_OUTPUT_DIV, SRSS->CLK_FLL_CONFIG) + 1UL;
+
+            pathFreqHz = ((srcFreqHz / refDiv) * fllMult) / outputDiv;
+        }
+        else
+        {
+            pathFreqHz = srcFreqHz;
+        }
+    }
+    else if ((rootPath == 1UL) || (rootPath == 2UL))
+    {
+        /* PLL */
+        bool pllLocked       = ( 0UL != _FLD2VAL(SRSS_CLK_PLL_STATUS_LOCKED,     SRSS->CLK_PLL_STATUS[rootPath - 1UL]));
+        bool pllOutputOutput = ( 3UL == _FLD2VAL(SRSS_CLK_PLL_CONFIG_BYPASS_SEL, SRSS->CLK_PLL_CONFIG[rootPath - 1UL]));
+        bool pllOutputAuto   = ((0UL == _FLD2VAL(SRSS_CLK_PLL_CONFIG_BYPASS_SEL, SRSS->CLK_PLL_CONFIG[rootPath - 1UL])) ||
+                                (1UL == _FLD2VAL(SRSS_CLK_PLL_CONFIG_BYPASS_SEL, SRSS->CLK_PLL_CONFIG[rootPath - 1UL])));
+        if ((pllOutputAuto && pllLocked) || pllOutputOutput)
+        {
+            uint32_t feedbackDiv;
+            uint32_t referenceDiv;
+            uint32_t outputDiv;
+
+            feedbackDiv  = _FLD2VAL(SRSS_CLK_PLL_CONFIG_FEEDBACK_DIV,  SRSS->CLK_PLL_CONFIG[rootPath - 1UL]);
+            referenceDiv = _FLD2VAL(SRSS_CLK_PLL_CONFIG_REFERENCE_DIV, SRSS->CLK_PLL_CONFIG[rootPath - 1UL]);
+            outputDiv    = _FLD2VAL(SRSS_CLK_PLL_CONFIG_OUTPUT_DIV,    SRSS->CLK_PLL_CONFIG[rootPath - 1UL]);
+
+            pathFreqHz = ((srcFreqHz * feedbackDiv) / referenceDiv) / outputDiv;
+
+        }
+        else
+        {
+            pathFreqHz = srcFreqHz;
+        }
+    }
+    else
+    {
+        /* Direct */
+        pathFreqHz = srcFreqHz;
+    }
+
+    /* Get frequency after hf_clk pre-divider */
+    pathFreqHz = pathFreqHz >> _FLD2VAL(SRSS_CLK_ROOT_SELECT_ROOT_DIV, SRSS->CLK_ROOT_SELECT[0u]);
+    cy_Hfclk0FreqHz = pathFreqHz;
+
+    /* Fast Clock Divider */
+    fastClkDiv = 1u + _FLD2VAL(CPUSS_CM4_CLOCK_CTL_FAST_INT_DIV, CPUSS->CM4_CLOCK_CTL);
+
+    /* Peripheral Clock Divider */
+    periClkDiv = 1u + _FLD2VAL(CPUSS_CM0_CLOCK_CTL_PERI_INT_DIV, CPUSS->CM0_CLOCK_CTL);
+    cy_PeriClkFreqHz = pathFreqHz / periClkDiv;
+
+    pathFreqHz = pathFreqHz / fastClkDiv;
+    SystemCoreClock = pathFreqHz;
+
+    /* Sets clock frequency for Delay API */
+    cy_delayFreqHz = SystemCoreClock;
+    cy_delayFreqMhz = (uint8_t)((cy_delayFreqHz + CY_DELAY_1M_MINUS_1_THRESHOLD) / CY_DELAY_1M_THRESHOLD);
+    cy_delayFreqKhz = (cy_delayFreqHz + CY_DELAY_1K_MINUS_1_THRESHOLD) / CY_DELAY_1K_THRESHOLD;
+    cy_delay32kMs   = CY_DELAY_MS_OVERFLOW_THRESHOLD * cy_delayFreqKhz;
+}
+
+
+/*******************************************************************************
+* Function Name: Cy_SystemInitFpuEnable
+****************************************************************************//**
+*
+* Enables the FPU if it is used. The function is called from the startup file.
+*
+*******************************************************************************/
+void Cy_SystemInitFpuEnable(void)
+{
+    #if defined (__FPU_USED) && (__FPU_USED == 1U)
+        uint32_t  interruptState;
+        interruptState = Cy_SysLib_EnterCriticalSection();
+        SCB->CPACR |= SCB_CPACR_CP10_CP11_ENABLE;
+        __DSB();
+        __ISB();
+        Cy_SysLib_ExitCriticalSection(interruptState);
+    #endif /* (__FPU_USED) && (__FPU_USED == 1U) */
+}
+
+
+#if !defined(CY_IPC_DEFAULT_CFG_DISABLE)
+/*******************************************************************************
+* Function Name: Cy_SysIpcPipeIsrCm4
+****************************************************************************//**
+*
+* This is the interrupt service routine for the system pipe.
+*
+*******************************************************************************/
+void Cy_SysIpcPipeIsrCm4(void)
+{
+    Cy_IPC_Pipe_ExecuteCallback(CY_IPC_EP_CYPIPE_CM4_ADDR);
+}
+#endif
+
+
+/*******************************************************************************
+* Function Name: Cy_MemorySymbols
+****************************************************************************//**
+*
+* The intention of the function is to declare boundaries of the memories for the
+* MDK compilers. For the rest of the supported compilers, this is done using
+* linker configuration files. The following symbols used by the cymcuelftool.
+*
+*******************************************************************************/
+#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
+__asm void Cy_MemorySymbols(void)
+{
+    /* Flash */
+    EXPORT __cy_memory_0_start
+    EXPORT __cy_memory_0_length
+    EXPORT __cy_memory_0_row_size
+
+    /* Working Flash */
+    EXPORT __cy_memory_1_start
+    EXPORT __cy_memory_1_length
+    EXPORT __cy_memory_1_row_size
+
+    /* Supervisory Flash */
+    EXPORT __cy_memory_2_start
+    EXPORT __cy_memory_2_length
+    EXPORT __cy_memory_2_row_size
+
+    /* XIP */
+    EXPORT __cy_memory_3_start
+    EXPORT __cy_memory_3_length
+    EXPORT __cy_memory_3_row_size
+
+    /* eFuse */
+    EXPORT __cy_memory_4_start
+    EXPORT __cy_memory_4_length
+    EXPORT __cy_memory_4_row_size
+
+    /* Flash */
+__cy_memory_0_start     EQU __cpp(CY_FLASH_BASE)
+__cy_memory_0_length    EQU __cpp(CY_FLASH_SIZE)
+__cy_memory_0_row_size  EQU 0x200
+
+    /* Flash region for EEPROM emulation */
+__cy_memory_1_start     EQU __cpp(CY_EM_EEPROM_BASE)
+__cy_memory_1_length    EQU __cpp(CY_EM_EEPROM_SIZE)
+__cy_memory_1_row_size  EQU 0x200
+
+    /* Supervisory Flash */
+__cy_memory_2_start     EQU __cpp(CY_SFLASH_BASE)
+__cy_memory_2_length    EQU __cpp(CY_SFLASH_SIZE)
+__cy_memory_2_row_size  EQU 0x200
+
+    /* XIP */
+__cy_memory_3_start     EQU __cpp(CY_XIP_BASE)
+__cy_memory_3_length    EQU __cpp(CY_XIP_SIZE)
+__cy_memory_3_row_size  EQU 0x200
+
+    /* eFuse */
+__cy_memory_4_start     EQU __cpp(0x90700000)
+__cy_memory_4_length    EQU __cpp(0x100000)
+__cy_memory_4_row_size  EQU __cpp(1)
+}
+#endif /* defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050) */
+
+
+/* [] END OF FILE */

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/EULA

@@ -0,0 +1,55 @@
+CYPRESS END USER LICENSE AGREEMENT
+
+PLEASE READ THIS END USER LICENSE AGREEMENT ("Agreement") CAREFULLY BEFORE DOWNLOADING, INSTALLING, COPYING, OR USING THIS SOFTWARE AND ACCOMPANYING DOCUMENTATION.  BY DOWNLOADING, INSTALLING, COPYING OR USING THE SOFTWARE, YOU ARE AGREEING TO BE BOUND BY THIS AGREEMENT.  IF YOU DO NOT AGREE TO ALL OF THE TERMS OF THIS AGREEMENT, PROMPTLY RETURN AND DO NOT USE THE SOFTWARE.  IF YOU HAVE PURCHASED THIS LICENSE TO THE SOFTWARE, YOUR RIGHT TO RETURN THE SOFTWARE EXPIRES 30 DAYS AFTER YOUR PURCHASE AND APPLIES ONLY TO THE ORIGINAL PURCHASER.
+
+1. Definitions.
+
+     "Software" means this software and any accompanying documentation, including any upgrades, updates, bug fixes or modified versions provided to you by Cypress.
+     
+     "Source Code" means software in human-readable form.
+     
+     "Binary Code" means the software in binary code form such as object code or an executable.
+     
+     "Development Tools" means software that is intended to be installed on a personal computer and used to create programming code for Firmware, Drivers, or Host Applications.  Examples of Development Tools are Cypress's PSoC Creator software, Cypress's WICED SDKs, and Cypress's ModusToolbox software.
+     
+     "Firmware" means software that executes on a Cypress hardware product.
+     
+     "Driver" means software that enables the use of a Cypress hardware product on a particular host operating system such as GNU/Linux, Windows, MacOS, Android, and iOS.
+     
+     "Host Application" means software that executes on a device other than a Cypress hardware product in order to program, control, or communicate with a Cypress hardware product.
+     
+     "inf File" means a hardware setup information file (.inf file) created by the Software to allow a Microsoft Windows operating system to install the driver for a Cypress hardware product.
+
+2. License.  Subject to the terms and conditions of this Agreement, Cypress Semiconductor Corporation ("Cypress") and its suppliers grant to you a non-exclusive, non-transferable license under their copyright rights:
+
+     a. to use the Development Tools in object code form solely for the purpose of creating Firmware, Drivers, Host Applications, and inf Files for Cypress hardware products; and
+     
+     b. (i) if provided in Source Code form, to copy, modify, and compile the Firmware Source Code to create Firmware for execution on a Cypress hardware product, and (ii) to distribute Firmware in binary code form only, only when installed onto a Cypress hardware product; and
+     
+     c. (i) if provided in Source Code form, to copy, modify, and compile the Driver Source Code to create one or more Drivers to enable the use of a Cypress hardware product on a particular host operating system, and (ii) to distribute the Driver, in binary code form only, only when installed on a device that includes the Cypress hardware product that the Driver is intended to enable; and
+     
+     d. (i) if provided in Source Code form, to copy, modify, and compile the Host Application Source Code to create one or more Host Applications to program, control, or communicate with a Cypress hardware product, and (ii) to distribute Host Applications, in binary code form only, only when installed on a device that includes a Cypress hardware product that the Host Application is intended to program, control, or communicate with; and
+     
+     e. to freely distribute any inf File.
+
+Any distribution of Software permitted under this Agreement must be made pursuant to your standard end user license agreement used for your proprietary (closed source) software products, such end user license agreement to include, at a minimum, provisions limiting your licensors' liability and prohibiting reverse engineering of the Software, consistent with such provisions in this Agreement.
+
+3. Free and Open Source Software.  Portions of the Software may be licensed under free and/or open source licenses such as the GNU General Public License or other licenses from third parties ("Third Party Software").  Third Party Software is subject to the applicable license agreement and not this Agreement.  If you are entitled to receive the source code from Cypress for any Third Party Software included with the Software, either the source code will  be included with the Software or you may obtain the source code at no charge from <http://www.cypress.com/go/opensource>.  The applicable license terms will accompany each source code package.  To review the license terms applicable to any Third Party Software for which Cypress is not required to provide you with source code, please see the Software's installation directory on your computer.
+
+4. Proprietary Rights; Ownership.  The Software, including all intellectual property rights therein, is and will remain the sole and exclusive property of Cypress or its suppliers.  Cypress retains ownership of the Source Code and any compiled version thereof.  Subject to Cypress' ownership of the underlying Software (including Source Code), you retain ownership of any modifications you make to the Source Code.  You agree not to remove any Cypress copyright or other notices from the Source Code and any modifications thereof.  You agree to keep the Source Code confidential.  Any reproduction, modification, translation, compilation, or representation of the Source Code except as permitted in Section 2 ("License") is prohibited without the express written permission of Cypress.  Except as otherwise expressly provided in this Agreement, you may not: (i) modify, adapt, or create derivative works based upon the Software; (ii) copy the Software; (iii) except and only to the extent explicitly permitted by applicable law despite this limitation, decompile, translate, reverse engineer, disassemble or otherwise reduce the Software to human-readable form; or (iv) use the Software or any sample code other than for the Purpose.  You hereby covenant that you will not assert any claim that the Software, or derivative works thereof created by or for Cypress, infringe any intellectual property right owned or controlled by you
+
+5. No Support.  Cypress may, but is not required to, provide technical support for the Software.
+
+6. Term and Termination.  This Agreement is effective until terminated, and either party may terminate this Agreement at any time with or without cause.  This Agreement and your license rights under this Agreement will terminate immediately without notice from Cypress if you fail to comply with any provision of this Agreement.  Upon termination, you must destroy all copies of Software in your possession or control.  The following paragraphs shall survive any termination of this Agreement: "Free and Open Source Software," "Proprietary Rights; Ownership," "Compliance With Law," "Disclaimer," "Limitation of Liability," and "General."
+
+7. Compliance With Law.  Each party agrees to comply with all applicable laws, rules and regulations in connection with its activities under this Agreement.  Without limiting the foregoing, the Software may be subject to export control laws and regulations of the United States and other countries.  You agree to comply strictly with all such laws and regulations and acknowledge that you have the responsibility to obtain licenses to export, re-export, or import the Software.
+
+8. Disclaimer.  TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THE SOFTWARE, INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes to the Software without notice. Cypress does not assume any liability arising out of the application or use of Software or any product or circuit described in the Software.  It is the responsibility of the user of the Software to properly design, program, and test the functionality and safety of any application made of the Software and any resulting product.  Cypress does not authorize its Software or products for use in any products where a malfunction or failure of the Software or Cypress product may reasonably be expected to result in significant property damage, injury or death ("High Risk Product").  If you include any Software or Cypress product in a High Risk Product, you assume all risk of such use and agree to indemnify Cypress and its suppliers against all liability.  No computing device can be absolutely secure.  Therefore, despite security measures implemented in Cypress hardware or software products, Cypress does not assume any liability arising out of any security breach, such as unauthorized access to or use of a Cypress product.
+
+9. Limitation of Liability.  TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT WILL CYPRESS OR ITS SUPPLIERS, RESELLERS, OR DISTRIBUTORS BE LIABLE FOR ANY LOST REVENUE, PROFIT, OR DATA, OR FOR SPECIAL, INDIRECT, CONSEQUENTIAL, INCIDENTAL, OR PUNITIVE DAMAGES HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, ARISING OUT OF OR RELATED TO THE USE OF OR INABILITY TO USE THE SOFTWARE EVEN IF CYPRESS OR ITS SUPPLIERS, RESELLERS, OR DISTRIBUTORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.  IN NO EVENT SHALL CYPRESS' OR ITS SUPPLIERS', RESELLERS', OR DISTRIBUTORS' TOTAL LIABILITY TO YOU, WHETHER IN CONTRACT, TORT (INCLUDING NEGLIGENCE), OR OTHERWISE, EXCEED THE GREATER OF US$500 OR THE PRICE PAID BY YOU FOR THE SOFTWARE.  THE FOREGOING LIMITATIONS SHALL APPLY EVEN IF THE ABOVE-STATED WARRANTY FAILS OF ITS ESSENTIAL PURPOSE.  BECAUSE SOME STATES OR JURISDICTIONS DO NOT ALLOW LIMITATION OR EXCLUSION OF CONSEQUENTIAL OR INCIDENTAL DAMAGES, ALL OR PORTIONS OF THE ABOVE LIMITATION MAY NOT APPLY TO YOU.
+
+10. Restricted Rights.  The Software is commercial computer software as that term is described in 48 C.F.R. 252.227-7014(a)(1).  If the Software is being acquired by or on behalf of the U.S. Government or by a U.S. Government prime contractor or subcontractor (at any tier), then the Government's rights in Software shall be only those set forth in this Agreement.
+
+11. Personal Information.  You agree that information you provide through your registration on Cypress IoT Community Forum or other Cypress websites, including contact information or other personal information, may be collected and used by Cypress consistent with its Data Privacy Policy (www.cypress.com/privacy-policy), as updated or revised from time to time, and may be provided to its third party sales representatives, distributors and other entities conducting sales activities for Cypress for sales-related and other business purposes.
+
+12. General.  This Agreement will bind and inure to the benefit of each party's successors and assigns, provided that you may not assign or transfer this Agreement, in whole or in part, without Cypress' written consent.  This Agreement shall be governed by and construed in accordance with the laws of the State of California, United States of America, as if performed wholly within the state and without giving effect to the principles of conflict of law.  The parties consent to personal and exclusive jurisdiction of and venue in, the state and federal courts within Santa Clara County, California; provided however, that nothing in this Agreement will limit Cypress' right to bring legal action in any venue in order to protect or enforce its intellectual property rights.  No failure of either party to exercise or enforce any of its rights under this Agreement will act as a waiver of such rights.  If any portion of this Agreement is found to be void or unenforceable, the remaining provisions of this Agreement shall remain in full force and effect.  This Agreement is the complete and exclusive agreement between the parties with respect to the subject matter hereof, superseding and replacing any and all prior agreements, communications, and understandings (both written and oral) regarding such subject matter.  Any notice to Cypress will be deemed effective when actually received and must be sent to Cypress Semiconductor Corporation, ATTN: Chief Legal Officer, 198 Champion Court, San Jose, CA 95134 USA.

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/LICENSE

@@ -0,0 +1,165 @@
+Apache License
+Version 2.0, January 2004
+http://www.apache.org/licenses/
+
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+1. Definitions.
+
+"License" shall mean the terms and conditions for use, reproduction, and
+distribution as defined by Sections 1 through 9 of this document.
+
+"Licensor" shall mean the copyright owner or entity authorized by the copyright
+owner that is granting the License.
+
+"Legal Entity" shall mean the union of the acting entity and all other entities
+that control, are controlled by, or are under common control with that entity.
+For the purposes of this definition, "control" means (i) the power, direct or
+indirect, to cause the direction or management of such entity, whether by
+contract or otherwise, or (ii) ownership of fifty percent (50%) or more of the
+outstanding shares, or (iii) beneficial ownership of such entity.
+
+"You" (or "Your") shall mean an individual or Legal Entity exercising
+permissions granted by this License.
+
+"Source" form shall mean the preferred form for making modifications, including
+but not limited to software source code, documentation source, and configuration
+files.
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+"Object" form shall mean any form resulting from mechanical transformation or
+translation of a Source form, including but not limited to compiled object code,
+generated documentation, and conversions to other media types.
+
+"Work" shall mean the work of authorship, whether in Source or Object form, made
+available under the License, as indicated by a copyright notice that is included
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+"Derivative Works" shall mean any work, whether in Source or Object form, that
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+"Contribution" shall mean any work of authorship, including the original version
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+grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free,
+irrevocable copyright license to reproduce, prepare Derivative Works of,
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+grants to You a perpetual, worldwide, non-exclusive, no-charge, royalty-free,
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+
+4. Redistribution.
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+You may reproduce and distribute copies of the Work or Derivative Works thereof
+in any medium, with or without modifications, and in Source or Object form,
+provided that You meet the following conditions:
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+You must give any other recipients of the Work or Derivative Works a copy of
+this License; and
+You must cause any modified files to carry prominent notices stating that You
+changed the files; and
+You must retain, in the Source form of any Derivative Works that You distribute,
+all copyright, patent, trademark, and attribution notices from the Source form
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+If the Work includes a "NOTICE" text file as part of its distribution, then any
+Derivative Works that You distribute must include a readable copy of the
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+that do not pertain to any part of the Derivative Works, in at least one of the
+following places: within a NOTICE text file distributed as part of the
+Derivative Works; within the Source form or documentation, if provided along
+with the Derivative Works; or, within a display generated by the Derivative
+Works, if and wherever such third-party notices normally appear. The contents of
+the NOTICE file are for informational purposes only and do not modify the
+License. You may add Your own attribution notices within Derivative Works that
+You distribute, alongside or as an addendum to the NOTICE text from the Work,
+provided that such additional attribution notices cannot be construed as
+modifying the License.
+You may add Your own copyright statement to Your modifications and may provide
+additional or different license terms and conditions for use, reproduction, or
+distribution of Your modifications, or for any such Derivative Works as a whole,
+provided Your use, reproduction, and distribution of the Work otherwise complies
+with the conditions stated in this License.
+
+5. Submission of Contributions.
+
+Unless You explicitly state otherwise, any Contribution intentionally submitted
+for inclusion in the Work by You to the Licensor shall be under the terms and
+conditions of this License, without any additional terms or conditions.
+Notwithstanding the above, nothing herein shall supersede or modify the terms of
+any separate license agreement you may have executed with Licensor regarding
+such Contributions.
+
+6. Trademarks.
+
+This License does not grant permission to use the trade names, trademarks,
+service marks, or product names of the Licensor, except as required for
+reasonable and customary use in describing the origin of the Work and
+reproducing the content of the NOTICE file.
+
+7. Disclaimer of Warranty.
+
+Unless required by applicable law or agreed to in writing, Licensor provides the
+Work (and each Contributor provides its Contributions) on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied,
+including, without limitation, any warranties or conditions of TITLE,
+NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A PARTICULAR PURPOSE. You are
+solely responsible for determining the appropriateness of using or
+redistributing the Work and assume any risks associated with Your exercise of
+permissions under this License.
+
+8. Limitation of Liability.
+
+In no event and under no legal theory, whether in tort (including negligence),
+contract, or otherwise, unless required by applicable law (such as deliberate
+and grossly negligent acts) or agreed to in writing, shall any Contributor be
+liable to You for damages, including any direct, indirect, special, incidental,
+or consequential damages of any character arising as a result of this License or
+out of the use or inability to use the Work (including but not limited to
+damages for loss of goodwill, work stoppage, computer failure or malfunction, or
+any and all other commercial damages or losses), even if such Contributor has
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+9. Accepting Warranty or Additional Liability.
+
+While redistributing the Work or Derivative Works thereof, You may choose to
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+incurred by, or claims asserted against, such Contributor by reason of your
+accepting any such warranty or additional liability.

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/README.md

@@ -0,0 +1,22 @@
+# PSoC 6 GNU make Build System
+
+## Overview
+
+This repo provides the build recipe make files and scripts for building and programming PSoC 6 applications. Builds can be run either through a command-line interface (CLI) or through the ModusToolbox Integrated Devlopment Environment (IDE).
+
+## Prerequisite
+
+Builds require that the ModusToolbox tools be installed on your machine. This comes with the ModusToolbox IDE install. On Windows machines, it is recommended that CLI builds be executed using the Cygwin.bat located in ModusToolBox/tools_x.y/modus-shell install directory. This guarantees a consistent shell environment for your builds.
+
+## Options
+
+To list the build options, run the "help" target by typing "make help" in CLI. For a verbose documentation on a specific subject type "make help CY_HELP={variable/target}", where "variable" or "target" is one of the listed make variables or targets.
+
+
+## More information
+* [Cypress Semiconductor](http://www.cypress.com)
+* [Cypress Semiconductor GitHub](https://github.com/cypresssemiconductorco)
+* [ModusToolbox](https://www.cypress.com/products/modustoolbox-software-environment)
+
+---
+© Cypress Semiconductor Corporation, 2019.

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/RELEASE.md

@@ -0,0 +1,39 @@
+### PSoC 6 GNU make Build System 1.0
+This repo provides the build recipe make files and scripts for building and programming PSoC 6 applications. Builds can be run either through a command-line interface (CLI) or through the ModusToolbox Integrated Devlopment Environment (IDE).
+ 
+### What's Included?
+The this release of the PSoC 6 GNU make Build System includes complete support for building, programming, and debugging PSoC 6 application projects. It is expected that a code example contains a top level make file for itself and references a Board Support Package (BSP) that defines specifics items, like the PSoC 6 part, for the target board. This includes the following:
+* Supported operations:
+    * Build
+    * Program
+    * Debug
+* Supported toolchains:
+    * GCC
+    * IAR
+    * ARMv6
+
+This also includes the getlibs.bash script that can be used directly, or via the make target to download additional git repo based libraries for the application.
+
+### Product/Asset Specific Instructions
+Builds require that the ModusToolbox tools be installed on your machine. This comes with the ModusToolbox IDE install. On Windows machines, it is recommended that CLI builds be executed using the Cygwin.bat located in ModusToolBox/tools_x.y/modus-shell install directory. This guarantees a consistent shell environment for your builds.
+
+To list the build options, run the "help" target by typing "make help" in CLI. For a verbose documentation on a specific subject type "make help CY_HELP={variable/target}", where "variable" or "target" is one of the listed make variables or targets.
+
+### Supported Software and Tools
+This version of the Cypress PSoC 6 Hardware Abstraction Layer was validated for compatibility with the following Software and Tools:
+
+| Software and Tools                        | Version |
+| :---                                      | :----:  |
+| ModusToolbox Software Environment         | 2.0     |
+| GCC Compiler                              | 7.4     |
+| IAR Compiler                              | 8.32    |
+| ARM Compiler                              | 6.11    |
+
+### More information
+Use the following links for more information, as needed:
+* [Cypress Semiconductor](http://www.cypress.com)
+* [Cypress Semiconductor GitHub](https://github.com/cypresssemiconductorco)
+* [ModusToolbox](https://www.cypress.com/products/modustoolbox-software-environment)
+
+---
+© Cypress Semiconductor Corporation, 2019.

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/core/build.mk

@@ -0,0 +1,694 @@
+################################################################################
+# \file build.mk
+# \version 1.0
+#
+# \brief
+# Performs the compilation and linking steps.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+
+################################################################################
+# Target output
+################################################################################
+
+ifneq ($(LIBNAME),)
+CY_BUILD_TARGET=$(CY_CONFIG_DIR)/$(LIBNAME).$(CY_TOOLCHAIN_SUFFIX_ARCHIVE)
+else
+CY_BUILD_TARGET=$(CY_CONFIG_DIR)/$(APPNAME).$(CY_TOOLCHAIN_SUFFIX_TARGET)
+endif
+CY_BUILD_MAPFILE=$(CY_CONFIG_DIR)/$(APPNAME).$(CY_TOOLCHAIN_SUFFIX_MAP)
+
+
+################################################################################
+# VPATH resolution
+################################################################################
+
+#
+# Search for relative path patterns in source list
+# $(1) : Pattern
+# $(2) : Sources
+#
+CY_MACRO_VPATH_FIND=$(foreach level,$(1),$(if $(filter $(level)%,$(2)),$(level)))
+
+#
+# Search for relative paths in user sources and include them in the VPATH
+#
+CY_BUILD_VPATH_PATTERN=./ ./../ ./../../ ./../../../ ./../../../../ ./../../../../../ ./../../../../../../ ./../../../../../../../ \
+					../ ../../ ../../../ ../../../../ ../../../../../ ../../../../../../ ../../../../../../../
+VPATH+=$(call CY_MACRO_VPATH_FIND,$(CY_BUILD_VPATH_PATTERN),$(SOURCES))
+
+
+##############################################################################
+#
+# Macro to construct recursive make for dependent lib apps
+#
+# Arguments:
+# 1: The name of the target
+# 2: The lib app directory
+#
+define CY_MACRO_SHAREDLIB_DEPENDENCIES
+
+$(1)_SED_PATTERN=$(subst /,\/,$(subst .,\.,$(2)))
+ifeq ($(CY_BUILD_LOC),$(CY_APP_LOCATION)/build)
+$(1)_SHAREDLIB_BUILD_LOCATION?=$(2)/build/$(TARGET)/$(CONFIG)
+else
+$(1)_SHAREDLIB_BUILD_LOCATION?=$(CY_INTERNAL_BUILD_LOCATION)/$(1)/$(TARGET)/$(CONFIG)
+endif
+
+# Satisfy dependencies
+$$($(1)_SHAREDLIB_BUILD_LOCATION)/inclist.rsp: | shared_libs
+$$($(1)_SHAREDLIB_BUILD_LOCATION)/liblist.rsp: | shared_libs
+$$($(1)_SHAREDLIB_BUILD_LOCATION)/artifact.rsp: | shared_libs
+$(1)_shared_lib: | $$($(1)_SHAREDLIB_BUILD_LOCATION)/inclist.rsp $$($(1)_SHAREDLIB_BUILD_LOCATION)/liblist.rsp $$($(1)_SHAREDLIB_BUILD_LOCATION)/artifact.rsp
+
+$(1)_shared_lib:
+	 @inclist_read=$$$$(cat $$($(1)_SHAREDLIB_BUILD_LOCATION)/inclist.rsp | sed -e "s/I\.\//I$$($(1)_SED_PATTERN)\//g" | tr " " "\n"); \
+	 if [ -f "$$($(1)_SHAREDLIB_BUILD_LOCATION)/inclist_export.rsp" ]; then \
+	 	inclist_export_read=$$$$(cat $$($(1)_SHAREDLIB_BUILD_LOCATION)/inclist_export.rsp | tr " " "\n"); \
+	 else \
+		 echo $$$$inclist_read > $$($(1)_SHAREDLIB_BUILD_LOCATION)/inclist_export.rsp ;\
+	 fi;\
+	 if [[ "$$$$inclist_read" != "$$$$inclist_export_read" ]]; then \
+		echo $$$$inclist_read > $$($(1)_SHAREDLIB_BUILD_LOCATION)/inclist_export.rsp ;\
+	 fi; \
+	 liblist_read=$$$$(cat $$($(1)_SHAREDLIB_BUILD_LOCATION)/liblist.rsp | sed -e "s/\.\//$$($(1)_SED_PATTERN)\//g" | tr " " "\n"); \
+	 if [ -f "$$($(1)_SHAREDLIB_BUILD_LOCATION)/liblist_export.rsp" ]; then \
+	 	liblist_export_read=$$$$(cat $$($(1)_SHAREDLIB_BUILD_LOCATION)/liblist_export.rsp | tr " " "\n"); \
+	 else \
+	  	echo $$$$liblist_read > $$($(1)_SHAREDLIB_BUILD_LOCATION)/liblist_export.rsp ;\
+	 fi;\
+	 if [[ "$$$$liblist_read" != "$$$$liblist_export_read" ]]; then \
+		echo $$$$liblist_read > $$($(1)_SHAREDLIB_BUILD_LOCATION)/liblist_export.rsp ;\
+	 fi; \
+	 artifact_read=$$$$(sed '1s;^;$$($(1)_SHAREDLIB_BUILD_LOCATION)/;' $$($(1)_SHAREDLIB_BUILD_LOCATION)/artifact.rsp); \
+	 if [ -f "$$($(1)_SHAREDLIB_BUILD_LOCATION)/artifact_export.rsp" ]; then \
+ 		artifact_export_read=$$$$(cat $$($(1)_SHAREDLIB_BUILD_LOCATION)/artifact_export.rsp); \
+	 else \
+		echo $$$$artifact_read > $$($(1)_SHAREDLIB_BUILD_LOCATION)/artifact_export.rsp;\
+	 fi;\
+	 if [[ "$$$$artifact_read" -nt "$(CY_BUILD_TARGET)" ]] || [[ "$$$$artifact_read" != "$$$$artifact_export_read" ]]; then\
+		echo $$$$artifact_read > $$($(1)_SHAREDLIB_BUILD_LOCATION)/artifact_export.rsp;\
+	 fi;
+
+# Satisfy dependencies
+$$($(1)_SHAREDLIB_BUILD_LOCATION)/inclist_export.rsp: | $(1)_shared_lib
+$$($(1)_SHAREDLIB_BUILD_LOCATION)/liblist_export.rsp: | $(1)_shared_lib
+$$($(1)_SHAREDLIB_BUILD_LOCATION)/artifact_export.rsp: | $(1)_shared_lib
+
+endef
+
+
+################################################################################
+# Shared libraries
+################################################################################
+
+ifneq ($(SEARCH_LIBS_AND_INCLUDES),)
+
+# Construct targets for all dependent lib apps
+$(foreach lib,$(SEARCH_LIBS_AND_INCLUDES),$(eval $(call CY_MACRO_SHAREDLIB_DEPENDENCIES,$(notdir $(lib)),$(lib))))
+
+CY_SHAREDLIB_LIST=$(foreach lib,$(SEARCH_LIBS_AND_INCLUDES),$(notdir $(lib)_shared_lib))
+CY_SHAREDLIB_ARTIFACT_LIST=$(foreach lib,$(SEARCH_LIBS_AND_INCLUDES),$($(notdir $(lib))_SHAREDLIB_BUILD_LOCATION)/artifact.rsp)
+
+CY_SHAREDLIB_INCLUDES_EXPORT_LIST=$(foreach lib,$(SEARCH_LIBS_AND_INCLUDES),$($(notdir $(lib))_SHAREDLIB_BUILD_LOCATION)/inclist_export.rsp)
+CY_SHAREDLIB_LIBS_EXPORT_LIST=$(foreach lib,$(SEARCH_LIBS_AND_INCLUDES),$($(notdir $(lib))_SHAREDLIB_BUILD_LOCATION)/liblist_export.rsp)
+CY_SHAREDLIB_ARTIFACT_EXPORT_LIST=$(foreach lib,$(SEARCH_LIBS_AND_INCLUDES),$($(notdir $(lib))_SHAREDLIB_BUILD_LOCATION)/artifact_export.rsp)
+
+CY_BUILD_SHAREDLIB_INCLIST=$(foreach inc,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST),$(addprefix $(CY_TOOLCHAIN_INCRSPFILE),$(inc)))
+CY_BUILD_SHAREDLIB_LIBLIST=$(foreach lib,$(CY_SHAREDLIB_LIBS_EXPORT_LIST),$(addprefix $(CY_TOOLCHAIN_OBJRSPFILE),$(lib)))\
+							$(foreach artifact,$(CY_SHAREDLIB_ARTIFACT_EXPORT_LIST),$(addprefix $(CY_TOOLCHAIN_OBJRSPFILE),$(artifact)))
+
+# Sentinel file to always trigger link step
+CY_SHAREDLIB_TIMESTAMP=$(CY_CONFIG_DIR)/shared_libs.timestamp
+$(shell touch $(CY_SHAREDLIB_TIMESTAMP))
+
+endif
+
+
+################################################################################
+# Build arguments
+################################################################################
+
+#
+# The list of C and S source files that come from the application and generated source
+#
+CY_BUILD_SRC_S_FILES=$(patsubst $(CY_INTERNAL_APP_PATH)/%,/%,$(patsubst $(CY_INTERNAL_EXTAPP_PATH)/%,/%,\
+						$(filter %.$(CY_TOOLCHAIN_SUFFIX_S),$(CY_RECIPE_SOURCE))))
+CY_BUILD_SRC_s_FILES=$(patsubst $(CY_INTERNAL_APP_PATH)/%,/%,$(patsubst $(CY_INTERNAL_EXTAPP_PATH)/%,/%,\
+						$(filter %.$(CY_TOOLCHAIN_SUFFIX_s),$(CY_RECIPE_SOURCE))))
+CY_BUILD_SRC_C_FILES=$(patsubst $(CY_INTERNAL_APP_PATH)/%,/%,$(patsubst $(CY_INTERNAL_EXTAPP_PATH)/%,/%,\
+						$(filter %.$(CY_TOOLCHAIN_SUFFIX_C),$(CY_RECIPE_SOURCE))))
+CY_BUILD_SRC_CPP_FILES=$(patsubst $(CY_INTERNAL_APP_PATH)/%,/%,$(patsubst $(CY_INTERNAL_EXTAPP_PATH)/%,/%,\
+						$(filter %.$(CY_TOOLCHAIN_SUFFIX_CPP),$(CY_RECIPE_SOURCE))))
+CY_BUILD_GENSRC_S_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_S),$(CY_RECIPE_GENERATED))
+CY_BUILD_GENSRC_s_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_s),$(CY_RECIPE_GENERATED))
+CY_BUILD_GENSRC_C_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_C),$(CY_RECIPE_GENERATED))
+CY_BUILD_GENSRC_CPP_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_CPP),$(CY_RECIPE_GENERATED))
+CY_BUILD_EXTSRC_S_FILES=$(patsubst $(CY_INTERNAL_APP_PATH)/%,/%,$(subst ../,,$(filter %.$(CY_TOOLCHAIN_SUFFIX_S),$(SOURCES))))
+CY_BUILD_EXTSRC_s_FILES=$(patsubst $(CY_INTERNAL_APP_PATH)/%,/%,$(subst ../,,$(filter %.$(CY_TOOLCHAIN_SUFFIX_s),$(SOURCES))))
+CY_BUILD_EXTSRC_C_FILES=$(patsubst $(CY_INTERNAL_APP_PATH)/%,/%,$(subst ../,,$(filter %.$(CY_TOOLCHAIN_SUFFIX_C),$(SOURCES))))
+CY_BUILD_EXTSRC_CPP_FILES=$(patsubst $(CY_INTERNAL_APP_PATH)/%,/%,$(subst ../,,$(filter %.$(CY_TOOLCHAIN_SUFFIX_CPP),$(SOURCES))))
+
+#
+# The list of object files
+#
+CY_BUILD_SRC_S_OBJ_FILES=$(addprefix $(CY_CONFIG_DIR)/,$(CY_BUILD_SRC_S_FILES:%.$(CY_TOOLCHAIN_SUFFIX_S)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_SRC_s_OBJ_FILES=$(addprefix $(CY_CONFIG_DIR)/,$(CY_BUILD_SRC_s_FILES:%.$(CY_TOOLCHAIN_SUFFIX_s)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_SRC_C_OBJ_FILES=$(addprefix $(CY_CONFIG_DIR)/,$(CY_BUILD_SRC_C_FILES:%.$(CY_TOOLCHAIN_SUFFIX_C)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_SRC_CPP_OBJ_FILES=$(addprefix $(CY_CONFIG_DIR)/,$(CY_BUILD_SRC_CPP_FILES:%.$(CY_TOOLCHAIN_SUFFIX_CPP)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_GENSRC_S_OBJ_FILES=$(patsubst $(CY_BUILDTARGET_DIR)/%,$(CY_CONFIG_DIR)/%,$(CY_BUILD_GENSRC_S_FILES:%.$(CY_TOOLCHAIN_SUFFIX_S)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_GENSRC_s_OBJ_FILES=$(patsubst $(CY_BUILDTARGET_DIR)/%,$(CY_CONFIG_DIR)/%,$(CY_BUILD_GENSRC_s_FILES:%.$(CY_TOOLCHAIN_SUFFIX_s)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_GENSRC_C_OBJ_FILES=$(patsubst $(CY_BUILDTARGET_DIR)/%,$(CY_CONFIG_DIR)/%,$(CY_BUILD_GENSRC_C_FILES:%.$(CY_TOOLCHAIN_SUFFIX_C)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_GENSRC_CPP_OBJ_FILES=$(patsubst $(CY_BUILDTARGET_DIR)/%,$(CY_CONFIG_DIR)/%,$(CY_BUILD_GENSRC_CPP_FILES:%.$(CY_TOOLCHAIN_SUFFIX_CPP)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_EXTSRC_S_OBJ_FILES=$(addprefix $(CY_CONFIG_DIR)/user/,$(CY_BUILD_EXTSRC_S_FILES:%.$(CY_TOOLCHAIN_SUFFIX_S)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_EXTSRC_s_OBJ_FILES=$(addprefix $(CY_CONFIG_DIR)/user/,$(CY_BUILD_EXTSRC_s_FILES:%.$(CY_TOOLCHAIN_SUFFIX_s)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_EXTSRC_C_OBJ_FILES=$(addprefix $(CY_CONFIG_DIR)/user/,$(CY_BUILD_EXTSRC_C_FILES:%.$(CY_TOOLCHAIN_SUFFIX_C)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+CY_BUILD_EXTSRC_CPP_OBJ_FILES=$(addprefix $(CY_CONFIG_DIR)/user/,$(CY_BUILD_EXTSRC_CPP_FILES:%.$(CY_TOOLCHAIN_SUFFIX_CPP)=%.$(CY_TOOLCHAIN_SUFFIX_O)))
+
+CY_BUILD_ALL_OBJ_FILES=\
+	$(call CY_MACRO_REMOVE_DOUBLESLASH,\
+	$(CY_BUILD_SRC_S_OBJ_FILES)\
+	$(CY_BUILD_SRC_s_OBJ_FILES)\
+	$(CY_BUILD_SRC_C_OBJ_FILES)\
+	$(CY_BUILD_SRC_CPP_OBJ_FILES)\
+	$(CY_BUILD_GENSRC_S_OBJ_FILES)\
+	$(CY_BUILD_GENSRC_s_OBJ_FILES)\
+	$(CY_BUILD_GENSRC_C_OBJ_FILES)\
+	$(CY_BUILD_GENSRC_CPP_OBJ_FILES)\
+	$(CY_BUILD_EXTSRC_S_OBJ_FILES)\
+	$(CY_BUILD_EXTSRC_s_OBJ_FILES)\
+	$(CY_BUILD_EXTSRC_C_OBJ_FILES)\
+	$(CY_BUILD_EXTSRC_CPP_OBJ_FILES))
+
+#
+# Dependency files
+#
+CY_DEPENDENCY_FILES=$(CY_BUILD_ALL_OBJ_FILES:%.$(CY_TOOLCHAIN_SUFFIX_O)=%.$(CY_TOOLCHAIN_SUFFIX_D))
+
+#
+# The list of static libraries
+#
+CY_BUILD_ALL_LIB_FILES=$(CY_RECIPE_LIBS)
+
+#
+# Output directories
+#
+CY_BUILD_DIRS=$(sort $(call CY_MACRO_DIR,$(CY_BUILD_ALL_OBJ_FILES)) $(call CY_MACRO_DIR,$(CY_BUILD_TARGET)))
+
+#
+# Check Windows path length limit for build directories
+#
+ifeq ($(OS),Windows_NT)
+CY_BUILD_CHECK_STRLEN:=$(shell \
+	for directory in $(CY_BUILD_DIRS); do\
+		if [ "$${\#directory}" -ge 260 ]; then\
+			echo "$$directory";\
+		fi;\
+	done)
+
+ifneq ($(strip $(CY_BUILD_CHECK_STRLEN)),)
+$(error Detected path(s) that exceed the Windows path length: $(CY_BUILD_CHECK_STRLEN))
+endif
+endif
+
+#
+# Prints full/shortened source name
+#
+ifneq (,$(filter $(VERBOSE),true 1))
+CY_COMPILE_PRINT=$<
+else
+CY_COMPILE_PRINT=$(notdir $<)
+endif
+
+# 
+# Gather the includes in inclist_export.rsp files
+# $(1) : List of inclist_export.rsp files
+#
+CY_MACRO_ECLIPSE_PRINT=$(shell \
+						for incFile in $(1); do\
+							incDirs="$$incDirs $$(cat $$incFile)";\
+						done;\
+						echo $$incDirs)
+
+#
+# Construct the full list of flags
+#
+CY_BUILD_ALL_ASFLAGS_UC=\
+	$(CY_RECIPE_ASFLAGS)\
+	$(CY_RECIPE_DEFINES)
+
+CY_BUILD_ALL_ASFLAGS_LC=\
+	$(CY_RECIPE_ASFLAGS)
+
+CY_BUILD_ALL_CFLAGS=\
+	$(CY_RECIPE_CFLAGS)\
+	$(CY_RECIPE_DEFINES)
+
+CY_BUILD_ALL_CXXFLAGS=\
+	$(CY_RECIPE_CXXFLAGS)\
+	$(CY_RECIPE_DEFINES)
+
+#
+# Compiler arguments
+#
+CY_BUILD_COMPILE_AS_UC=$(AS) $(CY_BUILD_ALL_ASFLAGS_UC) $(CY_TOOLCHAIN_INCRSPFILE_ASM)$(CY_CONFIG_DIR)/inclist.rsp \
+						$(CY_BUILD_SHAREDLIB_INCLIST) $(CY_TOOLCHAIN_OUTPUT_OPTION)
+CY_BUILD_COMPILE_AS_LC=$(AS) $(CY_BUILD_ALL_ASFLAGS_LC) $(CY_TOOLCHAIN_INCRSPFILE_ASM)$(CY_CONFIG_DIR)/inclist.rsp \
+						$(CY_BUILD_SHAREDLIB_INCLIST) $(CY_TOOLCHAIN_OUTPUT_OPTION)
+CY_BUILD_COMPILE_C=$(CC) $(CY_BUILD_ALL_CFLAGS) $(CY_TOOLCHAIN_INCRSPFILE)$(CY_CONFIG_DIR)/inclist.rsp \
+						$(CY_BUILD_SHAREDLIB_INCLIST) $(CY_TOOLCHAIN_DEPENDENCIES) $(CY_TOOLCHAIN_OUTPUT_OPTION) 
+CY_BUILD_COMPILE_CPP=$(CXX) $(CY_BUILD_ALL_CXXFLAGS) $(CY_TOOLCHAIN_INCRSPFILE)$(CY_CONFIG_DIR)/inclist.rsp \
+						$(CY_BUILD_SHAREDLIB_INCLIST) $(CY_TOOLCHAIN_DEPENDENCIES) $(CY_TOOLCHAIN_OUTPUT_OPTION)
+
+#
+# Linker arguments
+#
+CY_BUILD_LINK=$(LD) $(CY_RECIPE_LDFLAGS) $(CY_TOOLCHAIN_OUTPUT_OPTION) $@ $(CY_TOOLCHAIN_MAPFILE)$(CY_BUILD_MAPFILE) \
+	$(CY_TOOLCHAIN_OBJRSPFILE)$(CY_CONFIG_DIR)/objlist.rsp \
+	$(CY_TOOLCHAIN_STARTGROUP) $(CY_RECIPE_EXTRA_LIBS) $(CY_BUILD_ALL_LIB_FILES) $(CY_BUILD_SHAREDLIB_LIBLIST) $(CY_TOOLCHAIN_ENDGROUP)
+
+#
+# Archiver arguments
+#
+CY_BUILD_ARCHIVE=$(AR) $(CY_RECIPE_ARFLAGS) $(CY_TOOLCHAIN_OUTPUT_OPTION) $@ $(CY_TOOLCHAIN_OBJRSPFILE)$(CY_CONFIG_DIR)/objlist.rsp 
+
+
+################################################################################
+# Dependency construction
+################################################################################
+
+#
+# Dependency variables for compilation
+#
+CY_BUILD_COMPILER_DEPS=\
+	$(CY_BUILD_COMPILE_AS_UC)\
+	$(CY_BUILD_COMPILE_AS_LC)\
+	$(CY_BUILD_COMPILE_C)\
+	$(CY_BUILD_COMPILE_CPP)\
+	$(CY_RECIPE_INCLUDES)
+
+#
+# Dependency variables for link/archive
+#
+CY_BUILD_LINKER_DEPS=\
+	$(CY_BUILD_LINK)\
+	$(CY_BUILD_ARCHIVE)\
+	$(CY_SHAREDLIB_ARTIFACT_EXPORT_LIST)
+
+#
+# Read previous build's configuration if one exists
+#
+CY_BUILD_COMPILER_PREV=$(shell if [ -f "$(CY_CONFIG_DIR)/.cycompiler" ]; then cat $(CY_CONFIG_DIR)/.cycompiler; fi)
+CY_BUILD_LINKER_PREV=$(shell if [ -f "$(CY_CONFIG_DIR)/.cylinker" ]; then cat $(CY_CONFIG_DIR)/.cylinker; fi)
+
+#
+# Take care of the quotes for the echo command
+#
+CY_BUILD_COMPILER_DEPS_FORMATTED=$(subst ',,$(subst ",,$(CY_BUILD_COMPILER_DEPS)))
+CY_BUILD_LINKER_DEPS_FORMATTED=$(subst ',,$(subst ",,$(CY_BUILD_LINKER_DEPS)))
+
+#
+# Create compilation dependency file
+#
+ifneq ($(strip $(CY_BUILD_COMPILER_DEPS_FORMATTED)),$(strip $(CY_BUILD_COMPILER_PREV)))
+ifeq ($(CY_BUILD_COMPILER_PREV),)
+$(shell mkdir -p $(CY_CONFIG_DIR))
+endif
+$(shell echo "$(CY_BUILD_COMPILER_DEPS_FORMATTED)" > $(CY_CONFIG_DIR)/.cycompiler)
+endif
+
+#
+# Create link dependency file
+#
+ifneq ($(strip $(CY_BUILD_LINKER_DEPS_FORMATTED)),$(strip $(CY_BUILD_LINKER_PREV)))
+ifneq ($(CY_BUILD_LINKER_PREV),)
+$(shell mkdir -p $(CY_CONFIG_DIR))
+endif
+$(shell echo "$(CY_BUILD_LINKER_DEPS_FORMATTED)" > $(CY_CONFIG_DIR)/.cylinker)
+endif
+
+
+################################################################################
+# Application source Compilation
+################################################################################
+
+# Compile .S source
+$(CY_CONFIG_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_INTERNAL_APP_PATH)/%.$(CY_TOOLCHAIN_SUFFIX_S)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling app file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_AS_UC) $@ $<
+
+# Compile .s source
+$(CY_CONFIG_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_INTERNAL_APP_PATH)/%.$(CY_TOOLCHAIN_SUFFIX_s)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling app file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_AS_LC) $@ $<
+
+# Compile .c source
+$(CY_CONFIG_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_INTERNAL_APP_PATH)/%.$(CY_TOOLCHAIN_SUFFIX_C)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling app file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_C) $@ $<
+
+# Compile .cpp source
+$(CY_CONFIG_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_INTERNAL_APP_PATH)/%.$(CY_TOOLCHAIN_SUFFIX_CPP)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling app file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_CPP) $@ $<
+
+
+################################################################################
+# ExtApp source Compilation
+################################################################################
+
+# Compile .S source
+$(CY_CONFIG_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_INTERNAL_EXTAPP_PATH)/%.$(CY_TOOLCHAIN_SUFFIX_S)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling extapp file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_AS_UC) $@ $<
+
+# Compile .s source
+$(CY_CONFIG_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_INTERNAL_EXTAPP_PATH)/%.$(CY_TOOLCHAIN_SUFFIX_s)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling extapp file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_AS_LC) $@ $<
+
+# Compile .c source
+$(CY_CONFIG_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_INTERNAL_EXTAPP_PATH)/%.$(CY_TOOLCHAIN_SUFFIX_C)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling extapp file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_C) $@ $<
+
+# Compile .cpp source
+$(CY_CONFIG_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_INTERNAL_EXTAPP_PATH)/%.$(CY_TOOLCHAIN_SUFFIX_CPP)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling extapp file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_CPP) $@ $<
+
+
+################################################################################
+# Generated Source Compilation
+################################################################################
+
+# Compile .S source
+$(CY_CONFIG_DIR)/generated/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_GENERATED_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_S)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling generated file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_AS_UC) $@ $<
+
+# Compile .s source
+$(CY_CONFIG_DIR)/generated/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_GENERATED_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_s)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling generated file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_AS_LC) $@ $<
+
+# Compile .c source
+$(CY_CONFIG_DIR)/generated/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_GENERATED_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_C)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling generated file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_C) $@ $<
+
+# Compile .cpp source
+$(CY_CONFIG_DIR)/generated/%.$(CY_TOOLCHAIN_SUFFIX_O) : $(CY_GENERATED_DIR)/%.$(CY_TOOLCHAIN_SUFFIX_CPP)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling generated file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_CPP) $@ $<
+
+
+################################################################################
+# User source Compilation
+################################################################################
+
+# Compile .S source
+$(CY_CONFIG_DIR)/user/%.$(CY_TOOLCHAIN_SUFFIX_O) : %.$(CY_TOOLCHAIN_SUFFIX_S)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling user file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_AS_UC) $@ $<
+
+# Compile .s source
+$(CY_CONFIG_DIR)/user/%.$(CY_TOOLCHAIN_SUFFIX_O) : %.$(CY_TOOLCHAIN_SUFFIX_s)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling user file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_AS_LC) $@ $<
+
+# Compile .c source
+$(CY_CONFIG_DIR)/user/%.$(CY_TOOLCHAIN_SUFFIX_O) : %.$(CY_TOOLCHAIN_SUFFIX_C)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling user file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_C) $@ $<
+
+# Compile .cpp source
+$(CY_CONFIG_DIR)/user/%.$(CY_TOOLCHAIN_SUFFIX_O) : %.$(CY_TOOLCHAIN_SUFFIX_CPP)
+ifneq ($(CY_MAKE_IDE),eclipse)
+	$(info $(CY_INDENT)Compiling user file $(CY_COMPILE_PRINT))
+else
+	$(info Compiling $< $(CY_RECIPE_DEFINES) $(sort $(CY_RECIPE_INCLUDES) $(call CY_MACRO_ECLIPSE_PRINT,$(CY_SHAREDLIB_INCLUDES_EXPORT_LIST))))
+endif
+	$(CY_NOISE)$(CY_BUILD_COMPILE_CPP) $@ $<
+
+
+################################################################################
+# Prebuild, Postbuild and Link
+################################################################################
+
+#
+# Top-level application dependency
+#
+app: CY_BUILD_sentinel
+
+#
+# Print information before we start the build
+#
+CY_BUILD_preprint: | $(CY_SHAREDLIB_INCLUDES_EXPORT_LIST) $(CY_SHAREDLIB_LIBS_EXPORT_LIST) $(CY_SHAREDLIB_ARTIFACT_EXPORT_LIST)
+	$(info )
+	$(info ==============================================================================)
+	$(info = Building application =)
+	$(info ==============================================================================)
+
+#
+# Create the directories needed to do the build
+#
+CY_BUILD_mkdirs: CY_BUILD_preprint
+	$(CY_NOISE)mkdir -p $(CY_BUILD_DIRS) $(CY_CMD_TERM)
+ifeq ($(CY_RECIPE_GENERATED_FLAG),TRUE)
+	$(CY_NOISE)mkdir -p $(CY_GENERATED_DIR) $(CY_CMD_TERM)
+endif
+
+#
+# Run BSP pre-build step
+#
+CY_BUILD_bsp_prebuild: CY_BUILD_mkdirs
+	$(CY_BSP_PREBUILD)
+
+#
+# Run application pre-build step
+#
+CY_BUILD_app_prebuild: CY_BUILD_bsp_prebuild
+	$(PREBUILD)
+
+#
+# Run generate source step
+#
+CY_BUILD_gensrc: CY_BUILD_app_prebuild
+ifneq ($(CY_SEARCH_RESOURCE_FILES),)
+	@echo $(CY_RECIPE_RESOURCE_FILES) > $(CY_GENERATED_DIR)/resources.cyrsc
+endif
+ifeq ($(CY_RECIPE_GENERATED_FLAG),TRUE)
+	$(CY_NOISE)$(CY_RECIPE_GENSRC) $(CY_CMD_TERM)
+	$(info Generated $(words $(CY_RECIPE_GENERATED)) source file(s))
+endif
+
+#
+# Add dependancy to support parallel builds
+#
+$(CY_BUILD_GENSRC_C_FILES): | CY_BUILD_gensrc
+
+#
+# Run pre-build step
+#
+CY_BUILD_prebuild: CY_BUILD_gensrc
+	$(CY_NOISE)$(CY_RECIPE_PREBUILD) $(CY_CMD_TERM)
+
+#
+# Print before compilation
+#
+CY_BUILD_precompile: CY_BUILD_prebuild
+	$(info Building $(words $(CY_BUILD_ALL_OBJ_FILES)) file(s))
+	@echo $(CY_RECIPE_INCLUDES) | tr " " "\n" > $(CY_CONFIG_DIR)/inclist.rsp; \
+	 echo $(CY_BUILD_ALL_OBJ_FILES) | tr " " "\n"  > $(CY_CONFIG_DIR)/objlist.rsp; \
+	 echo $(CY_BUILD_ALL_LIB_FILES) | tr " " "\n"  > $(CY_CONFIG_DIR)/liblist.rsp;
+
+#
+# Dependencies for compilation
+#
+$(CY_BUILD_ALL_OBJ_FILES): | CY_BUILD_precompile 
+$(CY_BUILD_ALL_OBJ_FILES): $(CY_CONFIG_DIR)/.cycompiler $(CY_SHAREDLIB_INCLUDES_EXPORT_LIST)
+
+#
+# Dependencies for link
+#
+$(CY_BUILD_TARGET): | CY_BUILD_precompile
+$(CY_BUILD_TARGET): $(CY_CONFIG_DIR)/.cylinker $(CY_SHAREDLIB_LIBS_EXPORT_LIST) $(CY_SHAREDLIB_ARTIFACT_EXPORT_LIST)
+
+#
+# Link/archive the application
+#
+ifneq ($(LIBNAME),)
+$(CY_BUILD_TARGET): $(CY_BUILD_ALL_OBJ_FILES) $(CY_BUILD_ALL_LIB_FILES)
+ifneq ($(strip $(CY_BUILD_ALL_OBJ_FILES) $(CY_BUILD_ALL_LIB_FILES)),)
+	$(info $(CY_INDENT)Archiving output file $(notdir $@))
+	$(CY_NOISE)$(CY_BUILD_ARCHIVE) $(CY_CMD_TERM)
+endif
+else
+$(CY_BUILD_TARGET): $(CY_BUILD_ALL_OBJ_FILES) $(CY_BUILD_ALL_LIB_FILES) $(LINKER_SCRIPT) $(CY_SHAREDLIB_TIMESTAMP)
+ifneq ($(SEARCH_LIBS_AND_INCLUDES),)
+	@libArray=($(CY_SHAREDLIB_LIBS_EXPORT_LIST)); \
+	for libFile in "$${libArray[@]}"; do \
+		if [ "$$libFile" -nt "$(CY_BUILD_TARGET)" ]; then \
+			relink=true; \
+		fi; \
+	done; \
+	artifactArray=($(CY_SHAREDLIB_ARTIFACT_EXPORT_LIST)); \
+	for artifactFile in "$${artifactArray[@]}"; do \
+		if [ "$$artifactFile" -nt "$(CY_BUILD_TARGET)" ]; then \
+			relink=true; \
+		fi; \
+	done; \
+	if [[ "$?" == *".$(CY_TOOLCHAIN_SUFFIX_O)"* ]] || [[ "$?" == *".$(CY_TOOLCHAIN_SUFFIX_A)"* ]]; then \
+		relink=true; \
+	fi; \
+	if [ $$relink ]; then \
+		echo "    Linking output file $(notdir $@)"; \
+		$(CY_BUILD_LINK); \
+	fi
+else
+	$(info $(CY_INDENT)Linking output file $(notdir $@))
+	$(CY_NOISE)$(CY_BUILD_LINK)
+endif
+endif
+
+#
+# Perform post-build step
+#
+CY_BUILD_postbuild: $(CY_BUILD_TARGET)
+	$(CY_NOISE)$(CY_RECIPE_POSTBUILD) $(CY_CMD_TERM)
+
+#
+# Run BSP post-build step
+#
+CY_BUILD_bsp_postbuild: CY_BUILD_postbuild
+	$(CY_BSP_POSTBUILD)
+
+#
+# Perform application post-build step
+#
+CY_BUILD_app_postbuild: CY_BUILD_bsp_postbuild
+	$(POSTBUILD)
+
+#
+# Perform the post build print step, basically stating we are done
+#
+CY_BUILD_postprint: CY_BUILD_app_postbuild
+	$(info ==============================================================================)
+	$(info = Build complete =)
+	$(info ==============================================================================)
+	$(info )
+
+#
+# Create an artifact sentinel file for shared libs
+#
+ifneq ($(LIBNAME),)
+CY_BUILD_sentinel: CY_BUILD_postprint
+ifneq ($(strip $(CY_BUILD_ALL_OBJ_FILES) $(CY_BUILD_ALL_LIB_FILES)),)
+	@echo $(LIBNAME).$(CY_TOOLCHAIN_SUFFIX_ARCHIVE) > $(CY_CONFIG_DIR)/artifact.rsp
+else
+	@touch $(CY_CONFIG_DIR)/artifact.rsp
+endif
+else
+CY_BUILD_sentinel: CY_BUILD_postprint
+
+endif
+
+#
+# Include generated dependency files (if rebuilding)
+#
+-include $(CY_DEPENDENCY_FILES)
+
+#
+# Indicate all phony targets that should be built regardless
+#
+.PHONY: app $(CY_SHAREDLIB_LIST)
+.PHONY: CY_BUILD_mkdirs
+.PHONY: CY_BUILD_prebuild CY_BUILD_app_prebuild CY_BUILD_bsp_prebuild
+.PHONY: CY_BUILD_postbuild CY_BUILD_app_postbuild CY_BUILD_bsp_postbuild
+.PHONY: CY_BUILD_gensrc
+.PHONY: CY_BUILD_genresource
+.PHONY: CY_BUILD_preprint
+.PHONY: CY_BUILD_postprint 
+.PHONY: CY_BUILD_sentinel

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/core/config.mk

@@ -0,0 +1,235 @@
+################################################################################
+# \file config.mk
+# \version 1.0
+#
+# \brief
+# Configurator-related routines
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+#
+# Default file extension
+#
+CY_CONFIG_FILE_EXT?=modus
+
+
+################################################################################
+# Search
+################################################################################
+
+CY_CONFIG_MODUS_EXT=modus
+CY_CONFIG_CYBT_EXT=cybt
+CY_CONFIG_CYUSBDEV_EXT=cyusbdev
+
+#
+# Search for configuration files and filter
+#
+CY_CONFIG_MODUS_FILES:=$(call CY_MACRO_SEARCH,.$(CY_CONFIG_MODUS_EXT),$(CY_INTERNAL_APP_PATH))\
+					$(if $(CY_INTERNAL_EXTAPP_PATH),$(call CY_MACRO_SEARCH,.$(CY_CONFIG_MODUS_EXT),$(CY_INTERNAL_EXTAPP_PATH)))\
+					$(if $(SEARCH_LIBS_AND_INCLUDES),$(foreach d,$(SEARCH_LIBS_AND_INCLUDES),$(call CY_MACRO_SEARCH,.$(CY_CONFIG_MODUS_EXT),$(d))))
+CY_CONFIG_CYBT_FILES:=$(call CY_MACRO_SEARCH,.$(CY_CONFIG_CYBT_EXT),$(CY_INTERNAL_APP_PATH))\
+					$(if $(CY_INTERNAL_EXTAPP_PATH),$(call CY_MACRO_SEARCH,.$(CY_CONFIG_CYBT_EXT),$(CY_INTERNAL_EXTAPP_PATH)))\
+					$(if $(SEARCH_LIBS_AND_INCLUDES),$(foreach d,$(SEARCH_LIBS_AND_INCLUDES),$(call CY_MACRO_SEARCH,.$(CY_CONFIG_CYBT_EXT),$(d))))
+CY_CONFIG_CYUSBDEV_FILES:=$(call CY_MACRO_SEARCH,.$(CY_CONFIG_CYUSBDEV_EXT),$(CY_INTERNAL_APP_PATH))\
+					$(if $(CY_INTERNAL_EXTAPP_PATH),$(call CY_MACRO_SEARCH,.$(CY_CONFIG_CYUSBDEV_EXT),$(CY_INTERNAL_EXTAPP_PATH)))\
+					$(if $(SEARCH_LIBS_AND_INCLUDES),$(foreach d,$(SEARCH_LIBS_AND_INCLUDES),$(call CY_MACRO_SEARCH,.$(CY_CONFIG_CYUSBDEV_EXT),$(d))))
+
+CY_SEARCH_PRUNED_MODUS_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_DIRS),$(filter $(d)%,$(CY_CONFIG_MODUS_FILES))),$(CY_CONFIG_MODUS_FILES))
+CY_SEARCH_PRUNED_CYBT_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_DIRS),$(filter $(d)%,$(CY_CONFIG_CYBT_FILES))),$(CY_CONFIG_CYBT_FILES))
+CY_SEARCH_PRUNED_CYUSBDEV_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_DIRS),$(filter $(d)%,$(CY_CONFIG_CYUSBDEV_FILES))),$(CY_CONFIG_CYUSBDEV_FILES))
+
+CY_SEARCH_AVAILABLE_MODUS_SOURCES=$(call CY_MACRO_FILTER_FILES,MODUS)
+CY_SEARCH_AVAILABLE_CYBT_SOURCES=$(call CY_MACRO_FILTER_FILES,CYBT)
+CY_SEARCH_AVAILABLE_CYUSBDEV_SOURCES=$(call CY_MACRO_FILTER_FILES,CYUSBDEV)
+
+ifneq ($(words $(CY_SEARCH_AVAILABLE_MODUS_SOURCES)),1)
+ifneq ($(words $(CY_SEARCH_AVAILABLE_MODUS_SOURCES)),0)
+$(call CY_MACRO_ERROR,Multiple device configuration files detected: $(CY_SEARCH_AVAILABLE_MODUS_SOURCES))
+endif
+endif
+ifneq ($(words $(CY_SEARCH_AVAILABLE_CYBT_SOURCES)),1)
+ifneq ($(words $(CY_SEARCH_AVAILABLE_CYBT_SOURCES)),0)
+$(call CY_MACRO_ERROR,Multiple BT configuration files detected: $(CY_SEARCH_AVAILABLE_CYBT_SOURCES))
+endif
+endif
+ifneq ($(words $(CY_SEARCH_AVAILABLE_CYUSBDEV_SOURCES)),1)
+ifneq ($(words $(CY_SEARCH_AVAILABLE_CYUSBDEV_SOURCES)),0)
+$(call CY_MACRO_ERROR,Multiple USBDEV configuration files detected: $(CY_SEARCH_AVAILABLE_CYUSBDEV_SOURCES))
+endif
+endif
+
+
+################################################################################
+# Arguments constructions
+################################################################################
+
+##########################
+# .modus (HW)
+##########################
+
+CY_CONFIG_MODUS_FILE?=$(CY_SEARCH_AVAILABLE_MODUS_SOURCES)
+CY_CONFIG_MODUS_OUTPUT=$(call CY_MACRO_DIR,$(CY_CONFIG_MODUS_FILE))/GeneratedSource
+
+ifeq ($(CY_DEVICESUPPORT_PATH),)
+CY_CONFIG_LIBFILE=
+else
+CY_CONFIG_LIBFILE=--library $(CY_INTERNAL_DEVICESUPPORT_PATH)/devicesupport.xml
+endif
+
+CY_CONFIG_MODUS_EXEC=$(CY_CFG_BACKEND_CLI_DIR)/cfg-backend-cli
+CY_CONFIG_MODUS_EXEC_FLAGS=\
+	$(CY_CONFIG_LIBFILE)\
+	--build $(CY_CONFIG_MODUS_FILE)\
+	--set-device=$(subst $(CY_SPACE),$(CY_COMMA),$(DEVICE) $(ADDITIONAL_DEVICES))
+
+CY_CONFIG_MODUS_GUI=$(CY_DEVICE_CONFIGURATOR_DIR)/device-configurator
+CY_CONFIG_MODUS_GUI_FLAGS=\
+	--design
+
+##########################
+# .cybt (SW)
+##########################
+
+CY_CONFIG_CYBT_FILE?=$(CY_SEARCH_AVAILABLE_CYBT_SOURCES)
+CY_CONFIG_CYBT_OUTPUT=$(call CY_MACRO_DIR,$(CY_CONFIG_CYBT_FILE))/GeneratedSource
+
+CY_CONFIG_CYBT_EXEC=$(CY_BT_CONFIGURATOR_DIR)/bt-configurator-cli
+CY_CONFIG_CYBT_EXEC_FLAGS=\
+	--config $(CY_CONFIG_CYBT_FILE)
+
+CY_CONFIG_CYBT_GUI=$(CY_BT_CONFIGURATOR_DIR)/bt-configurator
+CY_CONFIG_CYBT_GUI_FLAGS=\
+	--config
+
+##########################
+# .cyusbdev (SW)
+##########################
+
+CY_CONFIG_CYUSBDEV_FILE?=$(CY_SEARCH_AVAILABLE_CYUSBDEV_SOURCES)
+CY_CONFIG_CYUSBDEV_OUTPUT=$(call CY_MACRO_DIR,$(CY_CONFIG_CYUSBDEV_FILE))/GeneratedSource
+
+CY_CONFIG_CYUSBDEV_EXEC=$(CY_USBDEV_CONFIGURATOR_DIR)/usbdev-configurator-cli
+CY_CONFIG_CYUSBDEV_EXEC_FLAGS=\
+	--config $(CY_CONFIG_CYUSBDEV_FILE)
+
+CY_CONFIG_CYUSBDEV_GUI=$(CY_USBDEV_CONFIGURATOR_DIR)/usbdev-configurator
+CY_CONFIG_CYUSBDEV_GUI_FLAGS=\
+	--config
+
+
+################################################################################
+# Source generation
+################################################################################
+
+ifeq ($(CY_COMMENCE_BUILD),true)
+
+##########################
+# .modus
+##########################
+
+# Check the timestamps and re-run the configurator if it's stale
+ifneq ($(CY_CONFIG_MODUS_FILE),)
+CY_CONFIG_MODUS_STATE=$(shell if [ "$(CY_CONFIG_MODUS_FILE)" -nt "$(CY_CONFIG_MODUS_OUTPUT)/cycfg.timestamp" ]; then echo 1; else echo 0; fi)
+ifeq ($(CY_CONFIG_MODUS_STATE),1)
+$(info $(CY_INDENT)Stale device files detected. Running device configurator to regenerate files...)
+ifneq ($(shell $(CY_CONFIG_MODUS_EXEC) $(CY_CONFIG_MODUS_EXEC_FLAGS) 1> /dev/null; echo $$?),0)
+    $(error Error(s) encountered while running the configurator on $(CY_CONFIG_MODUS_FILE))
+endif
+endif
+endif
+
+##########################
+# .cybt
+##########################
+
+# Check the timestamps and re-run the configurator if it's stale
+ifneq ($(CY_CONFIG_CYBT_FILE),)
+CY_CONFIG_CYBT_STATE=$(shell if [ "$(CY_CONFIG_CYBT_FILE)" -nt "$(CY_CONFIG_CYBT_OUTPUT)/cycfg_bt.timestamp" ]; then echo 1; else echo 0; fi)
+ifeq ($(CY_CONFIG_CYBT_STATE),1)
+$(info $(CY_INDENT)Stale BT files detected. Running BT-configurator to regenerate files...)
+ifneq ($(shell $(CY_CONFIG_CYBT_EXEC) $(CY_CONFIG_CYBT_EXEC_FLAGS) 1> /dev/null; echo $$?),0)
+    $(error Error(s) encountered while running the configurator on $(CY_CONFIG_CYBT_FILE))
+endif
+endif
+endif
+
+##########################
+# .cyusbdev
+##########################
+
+# Check the timestamps and re-run the configurator if it's stale
+ifneq ($(CY_CONFIG_CYUSBDEV_FILE),)
+CY_CONFIG_CYUSBDEV_STATE=$(shell if [ "$(CY_CONFIG_CYUSBDEV_FILE)" -nt "$(CY_CONFIG_CYUSBDEV_OUTPUT)/cycfg_usbdev.timestamp" ]; then echo 1; else echo 0; fi)
+ifeq ($(CY_CONFIG_CYUSBDEV_STATE),1)
+$(info $(CY_INDENT)Stale USBDEV files detected. Running USBDEV-configurator to regenerate files...)
+ifneq ($(shell $(CY_CONFIG_CYUSBDEV_EXEC) $(CY_CONFIG_CYUSBDEV_EXEC_FLAGS) 1> /dev/null; echo $$?),0)
+    $(error Error(s) encountered while running the configurator on $(CY_CONFIG_CYUSBDEV_FILE))
+endif
+endif
+endif
+
+endif
+
+
+################################################################################
+# Targets
+################################################################################
+
+# Extract the names for the variable name construction
+CY_CONFIG_CONVERT=$(foreach ext,$(CY_CONFIG_FILE_EXT),$(call CY_MACRO_UC,$(ext)))
+
+# Gather the files. Find all files that match the extensions in the design.modus location
+CY_CONFIG_FILES=$(sort $(foreach ext,$(CY_CONFIG_CONVERT),$(CY_CONFIG_$(ext)_FILE))\
+				$(foreach ext,$(CY_CONFIG_FILE_EXT),$(wildcard $(call CY_MACRO_DIR,$(CY_CONFIG_MODUS_FILE))/*.$(ext))))
+
+config:
+ifeq ($(CY_CONFIG_MODUS_FILE),)
+	$(info $(CY_NEWLINE)Could not find any device configuration files)
+	$(info Launching device-configurator for a new configuration)
+	$(CY_NOISE) $(CY_CONFIG_MODUS_GUI) $(CY_CONFIG_LIBFILE)
+else
+	$(info $(CY_NEWLINE)Launching device-configurator on $(CY_CONFIG_MODUS_FILE))
+	$(CY_NOISE) $(CY_CONFIG_MODUS_GUI) $(CY_CONFIG_LIBFILE) $(CY_CONFIG_MODUS_GUI_FLAGS) $(CY_CONFIG_MODUS_FILE)
+endif
+
+config_bt:
+ifeq ($(CY_CONFIG_CYBT_FILE),)
+	$(info $(CY_NEWLINE)Could not find any bt-configuration files)
+	$(info Launching bt-configurator for a new configuration)
+	$(CY_NOISE) $(CY_CONFIG_CYBT_GUI)
+else
+	$(info $(CY_NEWLINE)Launching bt-configurator on $(CY_CONFIG_CYBT_FILE))
+	$(CY_NOISE) $(CY_CONFIG_CYBT_GUI) $(CY_CONFIG_CYBT_GUI_FLAGS) $(CY_CONFIG_CYBT_FILE)
+endif
+
+config_usbdev:
+ifeq ($(CY_CONFIG_CYUSBDEV_FILE),)
+	$(info $(CY_NEWLINE)Could not find any usbdev-configuration files)
+	$(info Launching usbdev-configurator for a new configuration)
+	$(CY_NOISE) $(CY_CONFIG_CYUSBDEV_GUI)
+else
+	$(info $(CY_NEWLINE)Launching usbdev-configurator on $(CY_CONFIG_CYUSBDEV_FILE))
+	$(CY_NOISE) $(CY_CONFIG_CYUSBDEV_GUI) $(CY_CONFIG_CYUSBDEV_GUI_FLAGS) $(CY_CONFIG_CYUSBDEV_FILE)
+endif
+
+.PHONY: config config_bt config_usbdev

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/core/help.mk

@@ -0,0 +1,374 @@
+################################################################################
+# \file help.mk
+# \version 1.0
+#
+# \brief
+# Default help documentation
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+#
+# General Targets
+#
+CY_HELP_all_VERBOSE=This target is equivalent to the "build" target.
+CY_HELP_getlibs_VERBOSE=The repos are cloned to the libs directory. By default, this directory is\
+					created in the application directory. It may be directed to other locations using\
+					the CY_GETLIBS_PATH variable.
+CY_HELP_build_VERBOSE=The build process involves source auto-discovery, code generation, prebuilds, and postbuilds.\
+					For faster incremental builds, use the "qbuild" target to skip the auto-generation step. 
+CY_HELP_qbuild_VERBOSE=When no other sources need to be auto-discovered, this target can be used to skip\
+					the auto-discovery step for a faster incremental build.
+CY_HELP_program_VERBOSE=The build process performs the same operations as the "build" target. Upon completion,\
+					the artifact is programmed to the board.
+CY_HELP_qprogram_VERBOSE=This target allows programming an existing artifact to the board without a build step.
+CY_HELP_debug_VERBOSE=Once the GDB server is launched, another shell should be opened to launch a GDB client.
+CY_HELP_qdebug_VERBOSE=Once the GDB server is launched, another shell should be opened to launch a GDB client.
+CY_HELP_clean_VERBOSE=The directory and all its contents are deleted from disk.
+CY_HELP_help_VERBOSE=Use the CY_HELP=<NAME of target of variable> to see the verbose documentation for a\
+					particular target or a variable.
+
+#
+# Configurator Targets
+#
+CY_HELP_open_VERBOSE=This target accepts two variables – CY_OPEN_TYPE and CY_OPEN_FILE. At least one of\
+					these must be provided. The tool can be specified by setting the CY_OPEN_TYPE variable.\
+					A specific file can also be passed using the CY_OPEN_FILE variable. If only CY_OPEN_FILE is given,\
+					the build system will launch the default tool associated with the file’s extension.
+CY_HELP_config_VERBOSE=If no existing device-configuration files are found, the configurator is launched to create one.
+CY_HELP_config_bt_VERBOSE=If no existing bt-configuration files are found, the configurator is launched to create one.
+CY_HELP_config_usbdev_VERBOSE=If no existing usbdev-configuration files are found, the configurator is launched to create one.
+
+#
+# Utility Targets
+#
+CY_HELP_eclipse_VERBOSE=This target expects the CY_IDE_PRJNAME variable to be set to the name of the project\
+					as defined in the eclipse IDE. E.g. "make eclipse CY_IDE_PRJNAME=AppV1". If this variable\
+					is not defined, it will use the APPNAME for the launch configs.
+CY_HELP_check_VERBOSE=Not all tools are necessary for every build recipe. This target allows the user\
+					to get an idea of which tools are missing if a build fails in an unexpected way.
+CY_HELP_get_app_info_VERBOSE=The file types can be specified by setting the\
+					CY_CONFIG_FILE_EXT variable. E.g. "make get_app_info "CY_CONFIG_FILE_EXT=modus cybt cyusbdev"".
+CY_HELP_get_env_info_VERBOSE=This allows a quick printout of the current app repo and the "make" and "git"\
+					tool locations and versions.
+CY_HELP_printlibs_VERBOSE=This target parses through the library repos and prints the SHA1 commit id for each library.\
+					It also shows whether the repo is clean (no changes) or dirty (modified or new files).
+
+#
+# Basic configuration
+#
+CY_HELP_TARGET=Specifies the target board/kit. E.g. CY8CPROTO-062-4343W.
+CY_HELP_TARGET_VERBOSE=Currently available target(s) in this application is/are, [ $(CY_TARGET_AVAILABLE) ].
+CY_HELP_APPNAME=Specifies the name of the application. E.g. AppV1.
+CY_HELP_APPNAME_VERBOSE=This variable signifies that the application will build an artifact that is\
+				intended for a target board. For applications that need to build into an archive (library),\
+				use the LIBNAME variable.
+CY_HELP_LIBNAME=Specifies the name of the library application. E.g. LibV1.
+CY_HELP_LIBNAME_VERBOSE=This variable signifies that the application will build an archive (library).\
+				These library applications can be added as a dependency to an artifact producing application\
+				using the SEARCH_LIBS_AND_INCLUDES variable.
+CY_HELP_TOOLCHAIN=Specifies the toolchain for building the application. E.g. GCC_ARM.
+CY_HELP_TOOLCHAIN_VERBOSE=Supported toolchains for this target are, [ $(CY_SUPPORTED_TOOLCHAINS) ].
+CY_HELP_CONFIG=Specifies the configuration option for the build [Debug Release].
+CY_HELP_CONFIG_VERBOSE=The CONFIG variable is not limited to Debug/Release. It can be\
+						other values. However in those instances, the build system will not configure the optimization flags.\
+						Debug=lowest optimization, Release=highest optimization. The optimization flags are toolchain-specific.\
+						If you go with your custom config then you can manually set the optimization flag in the CFLAGS.
+CY_HELP_VERBOSE=Specifies whether the build is silent [false] or verbose [true].
+CY_HELP_VERBOSE_VERBOSE=Setting VERBOSE to true may help in debuggging build errors/warnings.
+
+#
+# Advanced configuration
+#
+CY_HELP_SOURCES=Specifies C/C++ and assembly files not under the working directory.
+CY_HELP_SOURCES_VERBOSE=This can be used to include files external to the application directory.
+CY_HELP_INCLUDES=Specifies include paths not under the working directory.
+CY_HELP_INCLUDES_VERBOSE=Note: These MUST NOT have -I prepended.
+CY_HELP_DEFINES=Specifies additional defines passed to the compiler.
+CY_HELP_DEFINES_VERBOSE=Note: These MUST NOT have -D prepended.
+CY_HELP_VFP_SELECT=Selects hard/soft ABI for floating-point operations [softfp hardfp].
+CY_HELP_VFP_SELECT_VERBOSE=If not defined, this value defaults to softfp.
+CY_HELP_CFLAGS=Prepends additional C compiler flags. 
+CY_HELP_CFLAGS_VERBOSE=Note: If the entire C compiler flags list needs to be replaced, define the\
+						CY_RECIPE_CFLAGS make variable with the desired C flags.
+CY_HELP_CXXFLAGS=Prepends additional C++ compiler flags. 
+CY_HELP_CXXFLAGS_VERBOSE=Note: If the entire C++ compiler flags list needs to be replaced, define the\
+						CY_RECIPE_CXXFLAGS make variable with the desired C++ flags.
+CY_HELP_ASFLAGS=Prepends additional assembler flags. 
+CY_HELP_ASFLAGS_VERBOSE=Note: If the entire assembler flags list needs to be replaced, define the\
+						CY_RECIPE_ASFLAGS make variable with the desired assembly flags.
+CY_HELP_LDFLAGS=Prepends additional linker flags. 
+CY_HELP_LDFLAGS_VERBOSE=Note: If the entire linker flags list needs to be replaced, define the\
+						CY_RECIPE_LDFLAGS make variable with the desired linker flags.
+CY_HELP_LDLIBS=Includes application-specific prebuilt libraries.
+CY_HELP_LDLIBS_VERBOSE=Note: If additional libraries need to be added using -l or -L, add to the\
+						CY_RECIPE_EXTRA_LIBS make variable.
+CY_HELP_LINKER_SCRIPT=Specifies a custom linker script location.
+CY_HELP_LINKER_SCRIPT_VERBOSE=This linker script overrides the default. Note: Additional\
+					linker scripts can be added for GCC via the LDFLAGS variable as a -L option.
+CY_HELP_PREBUILD=Specifies the location of a custom prebuild step and its arguments.
+CY_HELP_PREBUILD_VERBOSE=This operation runs before the build recipe's prebuild step.\
+					$(CY_NEWLINE)Note: BSPs can also define a prebuild step. This runs before the\
+					application prebuild step.\
+					$(CY_NEWLINE)Note: If the default prebuild step needs to be replaced, define the\
+					CY_RECIPE_PREBUILD make variable with the desired prebuild step.
+CY_HELP_POSTBUILD=Specifies the location of a custom postbuild step and its arguments.
+CY_HELP_POSTBUILD_VERBOSE=This operation runs after the build recipe's postbuild step.\
+					$(CY_NEWLINE)Note: BSPs can also define a postbuild step. This runs before the\
+					application postbuild step.\
+					$(CY_NEWLINE)Note: If the default postbuild step needs to be replaced, define the\
+					CY_RECIPE_POSTBUILD make variable with the desired postbuild step.
+CY_HELP_COMPONENTS=Adds component-specific files to the build.
+CY_HELP_COMPONENTS_VERBOSE=Create a directory named COMPONENT_<VALUE> and place your files.\
+					Then include the <VALUE> to this make variable to have that feature library\
+					be included in the build. E.g. Create a directory named COMPONENT_ACCELEROMETER.\
+					Then include it in the make variable. COMPONENT=ACCELEROMETER. If the make variable\
+					does not include the <VALUE>, then that library will not be included in the build.\
+					$(CY_NEWLINE)Note: If the default COMPONENT list must be overridden, defined the CY_COMPONENT_LIST\
+					make variable with the list of component values.
+CY_HELP_DISABLE_COMPONENTS=Removes component-specific files from the build.
+CY_HELP_DISABLE_COMPONENTS_VERBOSE=Include a <VALUE> to this make variable to have that feature library\
+					be excluded in the build. E.g. To exclude the contents of COMPONENT_BSP_DESIGN_MODUS\
+					directory, set DISABLE_COMPONENTS=BSP_DESIGN_MODUS.
+CY_HELP_SEARCH_LIBS_AND_INCLUDES=List of dependent library application paths. E.g. ../bspLib.
+CY_HELP_SEARCH_LIBS_AND_INCLUDES_VERBOSE=An artifact producing application (Defined by setting APPNAME),\
+					can have a dependency on library applications (Defined by setting LIBNAME). This variable\
+					defines those dependencies for the artifact producing application. The actual build invocation\
+					of those libraries are handled at the application level by defining the "shared_libs" target. E.g.\
+					$(CY_NEWLINE)$(CY_NEWLINE)shared_libs: $(CY_NEWLINE)$(CY_INDENT)make -C ../bspLib build -j
+
+#
+# Path variables
+#
+CY_HELP_CY_APP_PATH=Relative path to the top-level of application. E.g. ./
+CY_HELP_CY_APP_PATH_VERBOSE=Settings this path to other than ./ allows the auto-discovery mechanism\
+					to search from a root directory location that is higher than the app directory.\
+					E.g. CY_APP_PATH=../../ allows auto-discovery of files from a location that is\
+					two directories above the location of ./Makefile.
+CY_HELP_CY_BASELIB_PATH=Relative path to the base library. E.g. ./libs/psoc6make
+CY_HELP_CY_BASELIB_PATH_VERBOSE=This directory must be relative to CY_APP_PATH. It defines the location\
+					of the library containing the recipe make files, where the expected directory structure\
+					is <CY_BASELIB_PATH>/make. All applications must set the location of the base library.
+CY_HELP_CY_GETLIBS_PATH=Absolute path to the intended location of libs directory.
+CY_HELP_CY_GETLIBS_PATH_VERBOSE=The library repos are cloned into a directory named, libs (Default: <CY_APP_PATH>/libs).\
+					Setting this variable allows specifying the location of the libs directory to elsewhere on disk. 
+CY_HELP_CY_GETLIBS_SEARCH_PATH=Relative path to the top directory for "getlibs" operation.
+CY_HELP_CY_GETLIBS_SEARCH_PATH_VERBOSE=The getlibs operation by default executes at the location of the CY_APP_PATH. This can\
+					be overridden by specifying this variable to point to a specific location.
+CY_HELP_CY_DEVICESUPPORT_PATH=Relative path to the devicesupport.xml file.
+CY_HELP_CY_DEVICESUPPORT_PATH_VERBOSE=This path specifies the location of the devicesupport.xml file for device-configurators.\
+					It is used when the configurator needs to be run in a multi-app scenario.
+CY_HELP_CY_SHARED_PATH=Relative path to the location of shared .lib files.
+CY_HELP_CY_SHARED_PATH_VERBOSE=This variable is used in shared library applications to point to the location of external .lib files.
+CY_HELP_CY_COMPILER_PATH=Absolute path to the compiler (Default: GCC_ARM in CY_TOOLS_DIR).
+CY_HELP_CY_COMPILER_PATH_VERBOSE=Setting this path allows custom toolchains to be used instead of the defaults.\
+					This should be the location of the /bin directory containing the compiler, assembler and\
+					linker. E.g. CY_COMPILER_PATH="C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.2/arm/bin".
+CY_HELP_CY_TOOLS_DIR=Absolute path to the tools root directory.
+CY_HELP_CY_TOOLS_DIR_VERBOSE=Applications must specify the directory of the tools install, which contains the\
+					root makefile and the necessary tools and scripts to build an application. Application Makefiles\
+					are configured to automatically search in the standard locations for various platforms.\
+					If the tools are not located in the standard location, you may explicitly set this.
+CY_HELP_CY_BUILD_LOCATION=Absolute path to the build output directory (Default: pwd/build).
+CY_HELP_CY_BUILD_LOCATION_VERBOSE=The build output directory is structured as /TARGET/CONFIG/. Setting this variable\
+					allows the build artifacts to be located in the directory pointed to by this variable.
+CY_HELP_CY_EXTAPP_PATH=Relative path to an external app directory. E.g. ../external
+CY_HELP_CY_EXTAPP_PATH_VERBOSE=This directory must be relative to CY_APP_PATH. Setting this path\
+					allows incorporating files external to CY_APP_PATH. E.g. CY_EXTAPP_PATH=../external\
+					lets the auto-discovery to pull in the contents of ../external directory into the build.\
+					$(CY_NEWLINE)Note: This variable is only supported in CLI. Use the shared_libs mechanism and\
+					CY_HELP_SEARCH_LIBS_AND_INCLUDES for tools and IDE support.
+
+#
+# Miscellaneous variables
+#
+CY_HELP_CY_IGNORE=Adds to the directory and file ignore list. E.g. ./file1.c ./inc1
+CY_HELP_CY_IGNORE_VERBOSE=Directories and files listed in this variable are ignored in the auto-discovery.\
+					This mechanism works in combination with any existing .cyignore files in the application.
+CY_HELP_CY_IDE_PRJNAME=Name of the eclipse IDE project.
+CY_HELP_CY_IDE_PRJNAME_VERBOSE=This variable can be used to define the file and target project name when\
+					generating eclipse launch configurations in the "eclipse" target.
+CY_HELP_CY_CONFIG_FILE_EXT=Specifies the configurator file extension. E.g. modus
+CY_HELP_CY_CONFIG_FILE_EXT_VERBOSE=This variable accepts a space-separated list of configurator file extensions\
+					that should be searched for when running the "get_app_info" target.
+CY_HELP_CY_SKIP_RECIPE=Skip including the recipe make files.
+CY_HELP_CY_SKIP_RECIPE_VERBOSE=This allows the application to not include any recipe makefiles and only\
+					include the start.mk file from the tools install.
+CY_HELP_CY_SUPPORTED_TOOL_TYPES=Defines the supported tools for a BSP.
+CY_HELP_CY_SUPPORTED_TOOL_TYPES_VERBOSE=BSPs can define the supported tools that can be launched using the\
+					"open" target. The supported tool types are $(CY_OPEN_TYPE_LIST).
+CY_HELP_CY_LIBS_SEARCH_DEPTH=Search depth for .lib files (Default: 5).
+CY_HELP_CY_LIBS_SEARCH_DEPTH_VERBOSE=This variable controls how deep (directory) the search mechanism in getlibs looks for .lib files.\
+					$(CY_NEWLINE)Note: Deeper searches take longer to process.
+CY_HELP_CY_UTILS_SEARCH_DEPTH=Search depth for .cyignore and TARGET.mk files (Default: 5).
+CY_HELP_CY_UTILS_SEARCH_DEPTH_VERBOSE=This variable controls how deep (directory) the search mechanism looks for .cyignore\
+					and TARGET.mk files. Min=1, Max=9.\
+					$(CY_NEWLINE)Note: Deeper searches take longer to process.
+CY_HELP_CY_EXTRA_INCLUDES=Specifies additional makefiles to add to the build.
+CY_HELP_CY_EXTRA_INCLUDES_VERBOSE=The application Makefile cannot add additional make files directly. Instead, use\
+					this variable to include these in the build. E.g. CY_EXTRA_INCLUDES=./custom1.mk ./custom2.mk
+CY_HELP_TOOLCHAIN_MK_PATH=Specifies the location of a custom TOOLCHAIN makefile.
+CY_HELP_TOOLCHAIN_MK_PATH_VERBOSE=Defining this path allows the build system to use a custom TOOLCHAIN.mk\
+					pointed to by this variable.\
+					$(CY_NEWLINE)Note: The make variables in this file should match the\
+					variables used in existing TOOLCHAIN.mk files.  
+
+# Pass these to CY_HELP to get the full verbose info
+CY_HELP_TARGETS_ALL=all getlibs build qbuild program qprogram debug qdebug clean help open config config_bt config_usbdev \
+					eclipse check get_app_info get_env_info printlibs
+CY_HELP_BASIC_CFG_ALL=TARGET APPNAME LIBNAME TOOLCHAIN CONFIG VERBOSE
+CY_HELP_ADVANCED_CFG_ALL=SOURCES INCLUDES DEFINES VFP_SELECT CFLAGS CXXFLAGS ASFLAGS LDFLAGS LDLIBS LINKER_SCRIPT \
+					PREBUILD POSTBUILD COMPONENTS DISABLE_COMPONENTS SEARCH_LIBS_AND_INCLUDES
+CY_HELP_PATHS_ALL=CY_APP_PATH CY_BASELIB_PATH CY_EXTAPP_PATH CY_GETLIBS_PATH CY_GETLIBS_SEARCH_PATH CY_DEVICESUPPORT_PATH \
+					CY_SHARED_PATH CY_COMPILER_PATH CY_TOOLS_DIR CY_BUILD_LOCATION
+CY_HELP_MISC_ALL=CY_IGNORE CY_IDE_PRJNAME CY_CONFIG_FILE_EXT CY_SKIP_RECIPE CY_SUPPORTED_TOOL_TYPES CY_LIBS_SEARCH_DEPTH \
+					CY_UTILS_SEARCH_DEPTH CY_EXTRA_INCLUDES TOOLCHAIN_MK_PATH
+CY_HELP_PRINT_ALL=$(CY_HELP_TARGETS_ALL) $(CY_HELP_BASIC_CFG_ALL) $(CY_HELP_ADVANCED_CFG_ALL) $(CY_HELP_PATHS_ALL) $(CY_HELP_MISC_ALL)
+
+
+help_default:
+ifneq ($(CY_HELP),)
+	@echo 
+	$(foreach topic,$(CY_HELP),\
+	$(info $(CY_NEWLINE)Topic-specific help for "$(topic)")\
+	$(info $(CY_SPACE)$(CY_SPACE)Brief: $(CY_HELP_$(topic)))\
+	$(info $(CY_SPACE)$(CY_SPACE)Verbose: $(CY_HELP_$(topic)_VERBOSE)))
+else
+	@echo 
+	$(info                                                                                    )
+	$(info ==============================================================================     )
+	$(info $(CY_SPACE)Cypress Build System                                                    )
+	$(info ==============================================================================     )
+	$(info $(CY_SPACE)Copyright 2018-2019 Cypress Semiconductor Corporation                   )
+	$(info $(CY_SPACE)SPDX-License-Identifier: Apache-2.0                                     )
+	$(info                                                                                    )
+	$(info $(CY_SPACE)Licensed under the Apache License, Version 2.0 (the "License");         )
+	$(info $(CY_SPACE)you may not use this file except in compliance with the License.        )
+	$(info $(CY_SPACE)You may obtain a copy of the License at                                 )
+	$(info                                                                                    )
+	$(info $(CY_SPACE)$(CY_SPACE)    http://www.apache.org/licenses/LICENSE-2.0               )
+	$(info                                                                                    )
+	$(info $(CY_SPACE)Unless required by applicable law or agreed to in writing, software     )
+	$(info $(CY_SPACE)distributed under the License is distributed on an "AS IS" BASIS,       )
+	$(info $(CY_SPACE)WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.)
+	$(info $(CY_SPACE)See the License for the specific language governing permissions and     )
+	$(info $(CY_SPACE)limitations under the License.                                          )
+	$(info ==============================================================================     )
+	$(info                                                                                    )
+	$(info $(CY_SPACE)This is the help documentation for the Cypress build system.            )
+	$(info $(CY_SPACE)It lists the supported make targets and make variables.                 )
+	$(info                                                                                    )
+	$(info $(CY_SPACE)Usage:   make [target][variable]                                        )
+	$(info $(CY_SPACE)Example: make help CY_HELP=TOOLCHAIN                                    )
+	$(info                                                               )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)General make targets                               )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)all                 $(CY_HELP_all))
+	$(info $(CY_SPACE)getlibs             $(CY_HELP_getlibs))
+	$(info $(CY_SPACE)build               $(CY_HELP_build))
+	$(info $(CY_SPACE)qbuild              $(CY_HELP_qbuild))
+	$(info $(CY_SPACE)program             $(CY_HELP_program))
+	$(info $(CY_SPACE)qprogram            $(CY_HELP_qprogram))
+	$(info $(CY_SPACE)debug               $(CY_HELP_debug))
+	$(info $(CY_SPACE)qdebug              $(CY_HELP_qdebug))
+	$(info $(CY_SPACE)clean               $(CY_HELP_clean))
+	$(info $(CY_SPACE)help                $(CY_HELP_help))
+	$(info                                                               )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)Tools make targets                                 )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)open                $(CY_HELP_open))
+	$(info $(CY_SPACE)config              $(CY_HELP_config))
+	$(info $(CY_SPACE)config_bt           $(CY_HELP_config_bt))
+	$(info $(CY_SPACE)config_usbdev       $(CY_HELP_config_usbdev))
+	$(info                                                               )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)Utility make targets                               )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)eclipse             $(CY_HELP_eclipse))
+	$(info $(CY_SPACE)check               $(CY_HELP_check))
+	$(info $(CY_SPACE)get_app_info        $(CY_HELP_get_app_info))
+	$(info $(CY_SPACE)get_env_info        $(CY_HELP_get_env_info))
+	$(info $(CY_SPACE)printlibs           $(CY_HELP_printlibs))
+	$(info                                                               )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)Basic configuration make variables                 )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)TARGET              $(CY_HELP_TARGET))
+	$(info $(CY_SPACE)APPNAME             $(CY_HELP_APPNAME))
+	$(info $(CY_SPACE)LIBNAME             $(CY_HELP_LIBNAME))
+	$(info $(CY_SPACE)TOOLCHAIN           $(CY_HELP_TOOLCHAIN))
+	$(info $(CY_SPACE)CONFIG              $(CY_HELP_CONFIG))
+	$(info $(CY_SPACE)VERBOSE             $(CY_HELP_VERBOSE))
+	$(info                                                               )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)Advanced configuration make variables              )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)SOURCES             $(CY_HELP_SOURCES))
+	$(info $(CY_SPACE)INCLUDES            $(CY_HELP_INCLUDES))
+	$(info $(CY_SPACE)DEFINES             $(CY_HELP_DEFINES))
+	$(info $(CY_SPACE)VFP_SELECT          $(CY_HELP_VFP_SELECT))
+	$(info $(CY_SPACE)CFLAGS              $(CY_HELP_CFLAGS))
+	$(info $(CY_SPACE)CXXFLAGS            $(CY_HELP_CXXFLAGS))
+	$(info $(CY_SPACE)ASFLAGS             $(CY_HELP_ASFLAGS))
+	$(info $(CY_SPACE)LDFLAGS             $(CY_HELP_LDFLAGS))
+	$(info $(CY_SPACE)LDLIBS              $(CY_HELP_LDLIBS))
+	$(info $(CY_SPACE)LINKER_SCRIPT       $(CY_HELP_LINKER_SCRIPT))
+	$(info $(CY_SPACE)PREBUILD            $(CY_HELP_PREBUILD))
+	$(info $(CY_SPACE)POSTBUILD           $(CY_HELP_POSTBUILD))
+	$(info $(CY_SPACE)COMPONENTS          $(CY_HELP_COMPONENTS))
+	$(info $(CY_SPACE)DISABLE_COMPONENTS  $(CY_HELP_DISABLE_COMPONENTS))
+	$(info $(CY_SPACE)SEARCH_LIBS_AND_INCLUDES  $(CY_HELP_SEARCH_LIBS_AND_INCLUDES))
+	$(info                                                               )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)Path make variables                                )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)CY_APP_PATH         $(CY_HELP_CY_APP_PATH))
+	$(info $(CY_SPACE)CY_BASELIB_PATH     $(CY_HELP_CY_BASELIB_PATH))
+	$(info $(CY_SPACE)CY_EXTAPP_PATH      $(CY_HELP_CY_EXTAPP_PATH))
+	$(info $(CY_SPACE)CY_GETLIBS_PATH     $(CY_HELP_CY_GETLIBS_PATH))
+	$(info $(CY_SPACE)CY_GETLIBS_SEARCH_PATH  $(CY_HELP_CY_GETLIBS_SEARCH_PATH))
+	$(info $(CY_SPACE)CY_DEVICESUPPORT_PATH  $(CY_HELP_CY_DEVICESUPPORT_PATH))
+	$(info $(CY_SPACE)CY_SHARED_PATH      $(CY_HELP_CY_SHARED_PATH))
+	$(info $(CY_SPACE)CY_COMPILER_PATH    $(CY_HELP_CY_COMPILER_PATH))
+	$(info $(CY_SPACE)CY_TOOLS_DIR        $(CY_HELP_CY_TOOLS_DIR))
+	$(info $(CY_SPACE)CY_BUILD_LOCATION   $(CY_HELP_CY_BUILD_LOCATION))
+	$(info                                                               )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)Miscellaneous make variables                       )
+	$(info =======================================                       )
+	$(info $(CY_SPACE)CY_IGNORE           $(CY_HELP_CY_IGNORE))
+	$(info $(CY_SPACE)CY_IDE_PRJNAME      $(CY_HELP_CY_IDE_PRJNAME))
+	$(info $(CY_SPACE)CY_CONFIG_FILE_EXT  $(CY_HELP_CY_CONFIG_FILE_EXT))
+	$(info $(CY_SPACE)CY_SKIP_RECIPE      $(CY_HELP_CY_SKIP_RECIPE))
+	$(info $(CY_SPACE)CY_SUPPORTED_TOOL_TYPES  $(CY_HELP_CY_SUPPORTED_TOOL_TYPES))
+	$(info $(CY_SPACE)CY_LIBS_SEARCH_DEPTH  $(CY_HELP_CY_LIBS_SEARCH_DEPTH))
+	$(info $(CY_SPACE)CY_UTILS_SEARCH_DEPTH  $(CY_HELP_CY_UTILS_SEARCH_DEPTH))
+	$(info $(CY_SPACE)CY_EXTRA_INCLUDES   $(CY_HELP_CY_EXTRA_INCLUDES))
+	$(info $(CY_SPACE)TOOLCHAIN_MK_PATH   $(CY_HELP_TOOLCHAIN_MK_PATH))
+endif
+
+#
+# Identify the phony targets
+#
+.PHONY: help help_default

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/core/main.mk

@@ -0,0 +1,317 @@
+################################################################################
+# \file main.mk
+# \version 1.0
+#
+# \brief
+# Defines the public facing build targets common to all recipes and includes
+# the core makefiles.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+
+################################################################################
+# Paths
+################################################################################
+
+#
+# Set the build location. Append app dir if CY_BUILD_LOCATION is defined
+#
+ifneq ($(CY_BUILD_LOCATION),)
+CY_BUILD_LOC=$(CY_BUILD_LOCATION)/$(notdir $(CY_APP_LOCATION))
+else
+CY_BUILD_LOC=$(CY_APP_LOCATION)/build
+endif
+
+#
+# Windows paths
+#
+ifeq ($(OS),Windows_NT)
+
+#
+# CygWin/MSYS
+#
+ifneq ($(CY_WHICH_CYGPATH),)
+CY_INTERNAL_BUILD_LOC:=$(shell cygpath -m --absolute $(subst \,/,$(CY_BUILD_LOC)))
+ifneq ($(CY_BUILD_LOCATION),)
+CY_INTERNAL_BUILD_LOCATION:=$(shell cygpath -m --absolute $(subst \,/,$(CY_BUILD_LOCATION)))
+endif
+ifneq ($(CY_DEVICESUPPORT_PATH),)
+CY_INTERNAL_DEVICESUPPORT_PATH:=$(shell cygpath -m --absolute $(subst \,/,$(CY_DEVICESUPPORT_PATH)))
+endif
+
+#
+# Other Windows environments
+#
+else
+CY_INTERNAL_BUILD_LOC:=$(subst \,/,$(CY_BUILD_LOC))
+CY_INTERNAL_BUILD_LOCATION:=$(subst \,/,$(CY_BUILD_LOCATION))
+CY_INTERNAL_DEVICESUPPORT_PATH:=$(abspath $(subst \,/,$(CY_DEVICESUPPORT_PATH)))
+endif
+
+#
+# Linux and macOS paths
+#
+else
+CY_INTERNAL_BUILD_LOC:=$(CY_BUILD_LOC)
+CY_INTERNAL_BUILD_LOCATION:=$(CY_BUILD_LOCATION)
+CY_INTERNAL_DEVICESUPPORT_PATH:=$(abspath $(CY_DEVICESUPPORT_PATH))
+endif
+
+#
+# Build directories
+#
+CY_RECIPE_DIR=$(CY_INTERNAL_BUILD_LOC)
+CY_BUILDTARGET_DIR=$(CY_RECIPE_DIR)/$(TARGET)
+CY_CONFIG_DIR=$(CY_BUILDTARGET_DIR)/$(CONFIG)
+CY_GENERATED_DIR=$(CY_BUILDTARGET_DIR)/generated
+
+#
+# Default toolchain locations
+#
+CY_COMPILER_GCC_ARM_DEFAULT_DIR=$(CY_COMPILER_DEFAULT_DIR)
+CY_COMPILER_IAR_DEFAULT_DIR="C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.2/arm"
+CY_COMPILER_ARM_DEFAULT_DIR="C:/Program Files/ARMCompiler6.11"
+CY_COMPILER_A_Clang_DEFAULT_DIR=/Library/Developer/CommandLineTools/usr/lib/clang/10.0.0
+
+#
+# Toolchain locations
+#
+CY_COMPILER_GCC_ARM_DIR?=$(CY_COMPILER_GCC_ARM_DEFAULT_DIR)
+CY_COMPILER_IAR_DIR?=$(CY_COMPILER_IAR_DEFAULT_DIR)
+CY_COMPILER_ARM_DIR?=$(CY_COMPILER_ARM_DEFAULT_DIR)
+CY_COMPILER_A_Clang_DIR?=$(CY_COMPILER_A_Clang_DEFAULT_DIR)
+
+
+################################################################################
+# User-facing make targets
+################################################################################
+
+CY_HELP_all=Same as build. i.e. Builds the application.
+all: build
+
+CY_HELP_getlibs=Clones the repositories, and checks out the identified commit.
+getlibs:
+
+CY_HELP_build=Builds the application.
+build: app memcalc
+
+CY_HELP_qbuild=Builds the application using the previous build's source list.
+qbuild: app memcalc
+
+CY_HELP_program=Builds the application and programs it to the target device.
+program:
+
+CY_HELP_qprogram=Programs a built application to the target device without rebuilding.
+qprogram:
+
+CY_HELP_debug=Builds and programs. Then launches a GDB server.
+debug:
+
+CY_HELP_qdebug=Skips the build and program step. Launches a GDB server.
+qdebug:
+
+CY_HELP_clean=Cleans the /build/<TARGET> directory.
+clean: shared_libs
+	rm -rf $(CY_BUILDTARGET_DIR)
+
+# Note: Define the help target in BSP/recipe for custom help
+CY_HELP_help=Prints the help documentation.
+help: help_default
+
+CY_HELP_open=Opens/launches a specified tool.
+open:
+
+CY_HELP_config=Runs the configurator on the target .modus file.
+config:
+
+CY_HELP_config_bt=Runs the bt-configurator on the target .cybt file.
+config_bt:
+
+CY_HELP_config_usbdev=Runs the usbdev-configurator on the target .cyusbdev file.
+config_usbdev:
+
+
+################################################################################
+# Include make files
+################################################################################
+
+# Make a decision on including logic pertinent to builds.
+# If it's not any of these targets, then it's an actual build.
+CY_COMMENCE_BUILD=false
+ifneq ($(findstring clean,$(MAKECMDGOALS)),clean)
+ifneq ($(findstring qprogram,$(MAKECMDGOALS)),qprogram)
+ifneq ($(findstring qdebug,$(MAKECMDGOALS)),qdebug)
+ifneq ($(findstring erase,$(MAKECMDGOALS)),erase)
+ifneq ($(findstring attach,$(MAKECMDGOALS)),attach)
+ifneq ($(findstring eclipse,$(MAKECMDGOALS)),eclipse)
+ifneq ($(findstring check,$(MAKECMDGOALS)),check)
+ifneq ($(findstring get_env_info,$(MAKECMDGOALS)),get_env_info)
+ifneq ($(findstring get_app_info,$(MAKECMDGOALS)),get_app_info)
+ifneq ($(findstring help,$(MAKECMDGOALS)),help)
+# Note: covers config config_bt and config_usbdev
+ifneq ($(findstring config,$(MAKECMDGOALS)),config)
+ifneq ($(findstring open,$(MAKECMDGOALS)),open)
+CY_COMMENCE_BUILD=true
+endif
+endif
+endif
+endif
+endif
+endif
+endif
+endif
+endif
+endif
+endif
+endif
+
+ifeq ($(CY_COMMENCE_BUILD),true)
+$(info )
+$(info Initializing build: $(APPNAME)$(LIBNAME) $(CONFIG) $(TARGET) $(TOOLCHAIN))
+ifeq ($(wildcard $(CY_INTERNAL_BASELIB_PATH)),)
+$(info )
+$(error Cannot find the base library. Run "make getlibs" and/or check\
+that the library location is correct in the CY_BASELIB_PATH variable)
+endif
+endif
+
+#
+# Include utilities used by all make files
+#
+include $(CY_BASELIB_CORE_PATH)/make/core/utils.mk
+
+#
+# Include any extra makefiles defined by app
+#
+include $(CY_EXTRA_INCLUDES)
+
+#
+# Find the target and check that the device is valid
+#
+include $(CY_BASELIB_CORE_PATH)/make/core/target.mk
+-include $(CY_INTERNAL_BASELIB_PATH)/make/udd/features.mk
+include $(CY_INTERNAL_BASELIB_PATH)/make/recipe/defines.mk
+
+#
+# Check if the user-data is correct
+#
+ifneq ($(APPNAME),)
+ifneq ($(LIBNAME),)
+$(error An application cannot define both APPNAME and LIBNAME. Define one or the other)
+endif
+endif
+ifneq ($(findstring -I,$(INCLUDES)),)
+$(error INCLUDES must be directories without -I prepended)
+endif
+ifneq ($(findstring -D,$(DEFINES)),)
+$(error DEFINES must be specified without -D prepended)
+endif
+ifneq ($(findstring -I,$(CFLAGS)),)
+$(error Include paths must be specified in the INCLUDES variable instead\
+of directly in CFLAGS. These must be directories without -I prepended)
+endif
+ifneq ($(findstring -D,$(CFLAGS)),)
+$(error Defines must be specified in the DEFINES variable instead\
+of directly in CFLAGS. These must be specified without -D prepended)
+endif
+ifneq ($(findstring -I,$(CXXFLAGS)),)
+$(error Include paths must be specified in the INCLUDES variable instead\
+of directly in CXXFLAGS. These must be directories without -I prepended)
+endif
+ifneq ($(findstring -D,$(CXXFLAGS)),)
+$(error Defines must be specified in the DEFINES variable instead\
+of directly in CXXFLAGS. These must be specified without -D prepended)
+endif
+ifneq ($(findstring -I,$(ASFLAGS)),)
+$(error Include paths must be specified in the INCLUDES variable instead\
+of directly in ASFLAGS. These must be directories without -I prepended)
+endif
+ifneq ($(findstring -D,$(ASFLAGS)),)
+$(error Defines must be specified in the DEFINES variable instead\
+of directly in ASFLAGS. These must be specified without -D prepended)
+endif
+
+#
+# Choose local or default toolchain makefile
+#
+ifeq ($(TOOLCHAIN_MK_PATH),)
+include $(CY_INTERNAL_BASELIB_PATH)/make/toolchains/$(TOOLCHAIN).mk
+else
+# Include the custom app-specific toolchain file
+include $(TOOLCHAIN_MK_PATH)
+endif
+
+#
+# Configurator-related routines
+#
+ifeq ($(CY_SKIP_CONFIGURATOR),)
+include $(CY_BASELIB_CORE_PATH)/make/core/config.mk
+endif
+
+#
+# Build-related routines
+#
+ifeq ($(CY_COMMENCE_BUILD),true)
+
+ifneq ($(findstring qbuild,$(MAKECMDGOALS)),qbuild)
+include $(CY_BASELIB_CORE_PATH)/make/core/search.mk
+else
+# Skip the auto-discovery and re-use the last build's source list
+-include $(CY_CONFIG_DIR)/cyqbuild.mk
+CY_QBUILD=$(shell if [ -f $(CY_CONFIG_DIR)/cyqbuild.mk ]; then echo "true"; fi;)
+ifneq ($(CY_QBUILD),true)
+$(info WARNING: Cannot find the auto-discovery make file. Run "make build" to generate it.)
+endif
+endif
+
+include $(CY_INTERNAL_BASELIB_PATH)/make/recipe/recipe.mk
+
+ifneq ($(findstring vscode,$(MAKECMDGOALS)),vscode)
+include $(CY_BASELIB_CORE_PATH)/make/core/build.mk
+endif
+
+endif
+
+#
+# Optional recipe-specific program routine 
+#
+ifndef CY_BSP_PROGRAM
+-include $(CY_INTERNAL_BASELIB_PATH)/make/recipe/program.mk
+endif
+
+#
+# Launch tools
+#
+-include $(CY_INTERNAL_TOOLS)/make/tools.mk
+include $(CY_BASELIB_CORE_PATH)/make/core/open.mk
+
+#
+# Help documentation
+#
+include $(CY_BASELIB_CORE_PATH)/make/core/help.mk
+
+#
+# Identify the phony targets
+#
+.PHONY: all build qbuild getlibs clean program quickprogram help
+.PHONY: app memcalc

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/core/open.mk

@@ -0,0 +1,126 @@
+################################################################################
+# \file open.mk
+# \version 1.0
+#
+# \brief
+# Opens/launches a specified tool 
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+
+# Verify that the tool is supported
+ifneq ($(CY_OPEN_TYPE),)
+ifeq ($(filter $(CY_OPEN_TYPE),$(CY_OPEN_TYPE_LIST)),)
+$(error Unsupported tool type - $(CY_OPEN_TYPE). $(CY_NEWLINE)Supported types are: $(CY_OPEN_TYPE_LIST))
+endif
+endif
+
+# Extension construction from given file
+ifneq ($(CY_OPEN_FILE)),)
+CY_OPEN_EXT=$(subst .,,$(suffix $(CY_OPEN_FILE)))
+endif
+
+
+################################################################################
+# New configurations
+################################################################################
+
+# Limit this as it can be a performance hit
+ifneq ($(filter get_app_info open,$(MAKECMDGOALS)),)
+
+# Look for tools that DISALLOW new configurations
+CY_OPEN_NEWCFG_XML_TYPES+=$(shell \
+	xmlFileArray=($$(find $(CY_INTERNAL_TOOLS) -maxdepth 2 -name "configurator.xml" \
+					-exec grep "<new_configuration_enabled>false</new_configuration_enabled>" {} +));\
+	for xmlFile in "$${xmlFileArray[@]}"; do\
+		if [[ "$$xmlFile" == *"configurator.xml"* ]]; then\
+			toolNameDir="$${xmlFile%/*}";\
+			toolName="$${toolNameDir\#\#*/}";\
+			echo "$$toolName";\
+		fi;\
+	done;\
+)
+
+endif
+
+# Tools for existing files
+CY_OPEN_NEWCFG_EXISTING_TYPES=$(foreach ext,$(subst .,,$(suffix $(CY_CONFIG_FILES))),$($(addsuffix _DEFAULT_TYPE,$(ext))))
+# Tools that do not have an existing file
+CY_OPEN_NEWCFG_POSSIBLE_TYPES=$(filter-out $(CY_OPEN_NEWCFG_EXISTING_TYPES) $(CY_OPEN_NEWCFG_XML_TYPES),$(CY_SUPPORTED_TOOL_TYPES))
+# Complete list of supported files
+CY_OPEN_FILTERED_SUPPORTED_TYPES=$(sort $(CY_OPEN_NEWCFG_POSSIBLE_TYPES) $(CY_OPEN_NEWCFG_EXISTING_TYPES))
+
+
+################################################################################
+# Prepare tool launch
+################################################################################
+
+# Only file is given. Use the default type for that file extension
+ifneq ($(CY_OPEN_FILE),)
+ifeq ($(CY_OPEN_TYPE),)
+CY_OPEN_TYPE=$(firstword $($(CY_OPEN_EXT)_DEFAULT_TYPE))
+endif
+endif
+
+# Set the tool and its arguments
+CY_OPEN_TOOL_FILE=$(CY_OPEN_$(subst -,_,$(CY_OPEN_TYPE))_FILE)
+CY_OPEN_TOOL_LAUNCH=$(CY_OPEN_$(subst -,_,$(CY_OPEN_TYPE))_TOOL)
+CY_OPEN_TOOL_FLAGS=$(CY_OPEN_$(subst -,_,$(CY_OPEN_TYPE))_TOOL_FLAGS)
+CY_OPEN_TOOL_ARGS=$(CY_OPEN_$(subst -,_,$(CY_OPEN_TYPE))_TOOL_ARGS)
+CY_OPEN_TOOL_NEWCFG_FLAGS=$(CY_OPEN_$(subst -,_,$(CY_OPEN_TYPE))_TOOL_NEWCFG_FLAGS)
+
+# Use the file if provided
+ifneq ($(CY_OPEN_FILE),)
+CY_OPEN_TOOL_FILE=$(CY_OPEN_FILE)
+endif
+
+ifneq ($(CY_MAKE_IDE),)
+CY_OPEN_STDOUT=>& /dev/null
+endif
+
+
+################################################################################
+# Tool launch target
+################################################################################
+
+open:
+ifeq ($(CY_OPEN_FILE),)
+ifeq ($(CY_OPEN_TYPE),)
+	$(error Neither tool type or file specified to launch a tool)
+endif
+endif
+ifeq ($(CY_OPEN_TOOL_LAUNCH),)
+	$(error Unable to find a default tool to launch .$(CY_OPEN_EXT) file extension)
+endif
+ifeq ($(CY_OPEN_TOOL_FILE),)
+	$(info Launching $(notdir $(CY_OPEN_TOOL_LAUNCH)) tool for a new configuration)
+	$(CY_NOISE) $(CY_OPEN_TOOL_LAUNCH) $(CY_OPEN_TOOL_ARGS) $(CY_OPEN_TOOL_NEWCFG_FLAGS) $(CY_OPEN_STDOUT) &
+else
+	$(info $(CY_NEWLINE)Launching $(notdir $(CY_OPEN_TOOL_LAUNCH)) tool on $(CY_OPEN_TOOL_FILE))
+	$(CY_NOISE) $(CY_OPEN_TOOL_LAUNCH) $(CY_OPEN_TOOL_ARGS) $(CY_OPEN_TOOL_FLAGS) $(CY_OPEN_TOOL_FILE) $(CY_OPEN_STDOUT) &
+endif
+
+#
+# Identify the phony targets
+#
+.PHONY: open

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/core/search.mk

@@ -0,0 +1,158 @@
+################################################################################
+# \file search.mk
+# \version 1.0
+#
+# \brief
+# Performs auto-discovery of files in the project directories.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+
+################################################################################
+# Search Files
+################################################################################
+
+$(info )
+$(info Auto-discovery in progress...)
+
+#
+# Search for files. Use := assignment for better performance. Need to look in both project and shared lib.
+#
+CY_SEARCH_ALL_FILES:=$(sort $(shell $(CY_FIND) -L $(CY_INTERNAL_APP_PATH) $(CY_INTERNAL_EXTAPP_PATH) \
+                        \( $(CY_IGNORE_PRUNE) \) -prune \
+                        -o -type f -name "*.$(CY_TOOLCHAIN_SUFFIX_C)" -print \
+                        -o -type f -name "*.$(CY_TOOLCHAIN_SUFFIX_S)" -print \
+                        -o -type f -name "*.$(CY_TOOLCHAIN_SUFFIX_s)" -print \
+                        -o -type f -name "*.$(CY_TOOLCHAIN_SUFFIX_CPP)" -print \
+                        -o -type f -name "*.$(CY_TOOLCHAIN_SUFFIX_O)" -print \
+                        -o -type f -name "*.$(CY_TOOLCHAIN_SUFFIX_A)" -print \
+                        -o -type f -name "*.$(CY_TOOLCHAIN_SUFFIX_H)" -print \
+                        -o -type f -name "*.$(CY_TOOLCHAIN_SUFFIX_HPP)" -print \
+                        -o -type d -name "COMPONENT_RESOURCE" -print \
+                        -o -type d -name "* *" -print))
+
+CY_SEARCH_C_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_C),$(CY_SEARCH_ALL_FILES))
+CY_SEARCH_S_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_S),$(CY_SEARCH_ALL_FILES))
+CY_SEARCH_s_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_s),$(CY_SEARCH_ALL_FILES))
+CY_SEARCH_CPP_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_CPP),$(CY_SEARCH_ALL_FILES))
+CY_SEARCH_O_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_O),$(CY_SEARCH_ALL_FILES))
+CY_SEARCH_A_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_A),$(CY_SEARCH_ALL_FILES))
+CY_SEARCH_H_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_H),$(CY_SEARCH_ALL_FILES))
+CY_SEARCH_HPP_FILES=$(filter %.$(CY_TOOLCHAIN_SUFFIX_HPP),$(CY_SEARCH_ALL_FILES))
+
+#
+# Search for resource directories and gather the files
+#
+CY_SEARCH_RESOURCE_DIR=$(filter %/COMPONENT_RESOURCE,$(CY_SEARCH_ALL_FILES))
+CY_SEARCH_RESOURCE_FILES=$(foreach dir,$(CY_SEARCH_RESOURCE_DIR),$(wildcard $(dir)/*))
+
+#
+# Check that the directories do not contain spaces
+#
+CY_SEARCH_EMPTY_DIRS=$(filter-out $(CY_SEARCH_C_FILES) $(CY_SEARCH_S_FILES) $(CY_SEARCH_s_FILES) $(CY_SEARCH_CPP_FILES)\
+                        $(CY_SEARCH_O_FILES) $(CY_SEARCH_A_FILES) $(CY_SEARCH_H_FILES) $(CY_SEARCH_HPP_FILES)\
+                        $(CY_SEARCH_RESOURCE_DIR),$(CY_SEARCH_ALL_FILES))
+
+#
+# Print the number of discovered files
+#
+ifneq ($(CY_SEARCH_EMPTY_DIRS),)
+$(error The application must not contain spaces in the paths. Detected dir(s): $(CY_SEARCH_EMPTY_DIRS))
+else
+$(info -> Found $(words $(CY_SEARCH_C_FILES)) .$(CY_TOOLCHAIN_SUFFIX_C) file(s))
+$(info -> Found $(words $(CY_SEARCH_S_FILES)) .$(CY_TOOLCHAIN_SUFFIX_S) file(s))
+$(info -> Found $(words $(CY_SEARCH_s_FILES)) .$(CY_TOOLCHAIN_SUFFIX_s) file(s))
+$(info -> Found $(words $(CY_SEARCH_CPP_FILES)) .$(CY_TOOLCHAIN_SUFFIX_CPP) file(s))
+$(info -> Found $(words $(CY_SEARCH_O_FILES)) .$(CY_TOOLCHAIN_SUFFIX_O) file(s))
+$(info -> Found $(words $(CY_SEARCH_A_FILES)) .$(CY_TOOLCHAIN_SUFFIX_A) file(s))
+$(info -> Found $(words $(CY_SEARCH_H_FILES)) .$(CY_TOOLCHAIN_SUFFIX_H) file(s))
+$(info -> Found $(words $(CY_SEARCH_HPP_FILES)) .$(CY_TOOLCHAIN_SUFFIX_HPP) file(s))
+$(info -> Found $(words $(CY_SEARCH_RESOURCE_FILES)) resource file(s))
+endif
+
+
+################################################################################
+# Filter lists
+################################################################################
+
+$(info Applying filters...)
+
+#
+# Apply the filtering for files in .cyignore
+#
+CY_SEARCH_PRUNED_C_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_FILES),$(filter $(d)%,$(CY_SEARCH_C_FILES))),$(CY_SEARCH_C_FILES))
+CY_SEARCH_PRUNED_S_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_FILES),$(filter $(d)%,$(CY_SEARCH_S_FILES))),$(CY_SEARCH_S_FILES))
+CY_SEARCH_PRUNED_s_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_FILES),$(filter $(d)%,$(CY_SEARCH_s_FILES))),$(CY_SEARCH_s_FILES))
+CY_SEARCH_PRUNED_CPP_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_FILES),$(filter $(d)%,$(CY_SEARCH_CPP_FILES))),$(CY_SEARCH_CPP_FILES))
+CY_SEARCH_PRUNED_O_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_FILES),$(filter $(d)%,$(CY_SEARCH_O_FILES))),$(CY_SEARCH_O_FILES))
+CY_SEARCH_PRUNED_A_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_FILES),$(filter $(d)%,$(CY_SEARCH_A_FILES))),$(CY_SEARCH_A_FILES))
+CY_SEARCH_PRUNED_H_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_FILES),$(filter $(d)%,$(CY_SEARCH_H_FILES))),$(CY_SEARCH_H_FILES))
+CY_SEARCH_PRUNED_HPP_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_FILES),$(filter $(d)%,$(CY_SEARCH_HPP_FILES))),$(CY_SEARCH_HPP_FILES))
+
+#
+# Apply the COMPONENT and configuration filtering
+#
+CY_SEARCH_AVAILABLE_C_SOURCES=$(call CY_MACRO_FILTER_FILES,C)
+CY_SEARCH_AVAILABLE_S_SOURCES=$(call CY_MACRO_FILTER_FILES,S)
+CY_SEARCH_AVAILABLE_s_SOURCES=$(call CY_MACRO_FILTER_FILES,s)
+CY_SEARCH_AVAILABLE_CPP_SOURCES=$(call CY_MACRO_FILTER_FILES,CPP)
+CY_SEARCH_AVAILABLE_O_SOURCES=$(call CY_MACRO_FILTER_FILES,O)
+CY_SEARCH_AVAILABLE_A_LIBS=$(call CY_MACRO_FILTER_FILES,A)
+
+CY_SEARCH_AVAILABLE_H_INCLUDES=$(sort $(call CY_MACRO_DIR,$(call CY_MACRO_FILTER_FILES,H)))
+CY_SEARCH_AVAILABLE_HPP_INCLUDES=$(sort $(call CY_MACRO_DIR,$(call CY_MACRO_FILTER_FILES,HPP)))
+
+#
+# Combine the directories of the header files and its parent directories  
+#
+CY_SEARCH_AVAILABLE_INCLUDES=\
+    $(CY_SEARCH_AVAILABLE_H_INCLUDES)\
+    $(call CY_MACRO_SEARCH_PARENT,$(CY_SEARCH_AVAILABLE_H_INCLUDES))\
+    $(CY_SEARCH_AVAILABLE_HPP_INCLUDES)\
+    $(call CY_MACRO_SEARCH_PARENT,$(CY_SEARCH_AVAILABLE_HPP_INCLUDES))\
+
+# Conditionally add the generated source includes
+ifneq ($(CY_SEARCH_RESOURCE_FILES),)
+CY_SEARCH_AVAILABLE_INCLUDES+=$(CY_GENERATED_DIR)
+endif
+
+#
+# Add to the list
+#
+CY_SEARCH_APP_SOURCE=$(sort $(CY_SEARCH_AVAILABLE_S_SOURCES) $(CY_SEARCH_AVAILABLE_s_SOURCES)\
+                $(CY_SEARCH_AVAILABLE_C_SOURCES) $(CY_SEARCH_AVAILABLE_CPP_SOURCES))
+CY_SEARCH_APP_LIBS=$(sort $(CY_SEARCH_AVAILABLE_O_SOURCES) $(CY_SEARCH_AVAILABLE_A_LIBS))
+CY_SEARCH_APP_INCLUDES=$(sort $(CY_SEARCH_AVAILABLE_INCLUDES))
+
+#
+# Create cyqbuild makefile
+#
+$(shell \
+mkdir -p $(CY_CONFIG_DIR); \
+echo "CY_COMPONENT_LIST:=$(CY_COMPONENT_LIST)" > $(CY_CONFIG_DIR)/cyqbuild.mk; \
+echo "CY_SEARCH_APP_SOURCE:=$(CY_SEARCH_APP_SOURCE)" >> $(CY_CONFIG_DIR)/cyqbuild.mk; \
+echo "CY_SEARCH_APP_LIBS:=$(CY_SEARCH_APP_LIBS)" >> $(CY_CONFIG_DIR)/cyqbuild.mk; \
+echo "CY_SEARCH_APP_INCLUDES:=$(CY_SEARCH_APP_INCLUDES)" >> $(CY_CONFIG_DIR)/cyqbuild.mk; \
+)
+
+$(info Auto-discovery complete)

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/core/target.mk

@@ -0,0 +1,79 @@
+################################################################################
+# \file target.mk
+# \version 1.0
+#
+# \brief
+# Finds available targets in the design.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+
+#
+# Search for target make files and BSPs. Use := assignment for better performance.
+#
+CY_TARGET_MAKEFILE_SEARCH:=$(call CY_MACRO_SEARCH,$(TARGET).mk,$(CY_INTERNAL_APP_PATH))\
+                    $(if $(CY_INTERNAL_EXTAPP_PATH),$(call CY_MACRO_SEARCH,$(TARGET).mk,$(CY_INTERNAL_EXTAPP_PATH)))\
+                    $(if $(SEARCH_LIBS_AND_INCLUDES),$(foreach d,$(SEARCH_LIBS_AND_INCLUDES),$(call CY_MACRO_SEARCH,$(TARGET).mk,$(d))))
+CY_TARGET_AVAILABLE_SEARCH:=$(call CY_MACRO_SEARCH,.mk,$(CY_INTERNAL_APP_PATH))\
+                    $(if $(CY_INTERNAL_EXTAPP_PATH),$(call CY_MACRO_SEARCH,.mk,$(CY_INTERNAL_EXTAPP_PATH)))\
+                    $(if $(SEARCH_LIBS_AND_INCLUDES),$(foreach d,$(SEARCH_LIBS_AND_INCLUDES),$(call CY_MACRO_SEARCH,.mk,$(d))))\
+
+# Gather and filter the found files
+CY_SEARCH_PRUNED_MAKE_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_DIRS),$(filter $(d)%,$(CY_TARGET_MAKEFILE_SEARCH))),$(CY_TARGET_MAKEFILE_SEARCH))
+CY_SEARCH_PRUNED_AVAILABLEMAKE_FILES:=$(filter-out $(foreach d,$(CY_IGNORE_DIRS),$(filter $(d)%,$(CY_TARGET_AVAILABLE_SEARCH))),$(CY_TARGET_AVAILABLE_SEARCH))
+
+# Target makefile
+CY_TARGET_MAKEFILE=$(call CY_MACRO_FILTER_FILES,MAKE)
+
+# Check if the TARGET.mk was brought in through CY_EXTRA_INCLUDES or directly in the app makefile
+CY_TARGET_EXTRA_INCLUDES=$(filter %/$(TARGET).mk,$(MAKEFILE_LIST))
+CY_TARGET_EXTRA_FILTERED=$(filter-out $(CY_TARGET_EXTRA_INCLUDES),$(CY_TARGET_MAKEFILE))
+
+# Full list of available targets
+CY_TARGET_AVAILABLE_DIRS=$(notdir $(call CY_MACRO_DIR,$(CY_SEARCH_PRUNED_AVAILABLEMAKE_FILES) $(CY_TARGET_EXTRA_INCLUDES)))
+CY_TARGET_AVAILABLE=$(sort $(subst TARGET_,,$(foreach item,$(CY_TARGET_AVAILABLE_DIRS),$(if $(findstring /TARGET_,/$(item)),$(item),))))
+
+#
+# Set the target makefile and directory
+#
+ifneq ($(CY_TARGET_EXTRA_INCLUDES),)
+
+ifneq ($(CY_TARGET_EXTRA_FILTERED),)
+$(call CY_MACRO_ERROR,Found multiple identical targets: $(CY_TARGET_EXTRA_INCLUDES) $(CY_TARGET_EXTRA_FILTERED))
+else
+CY_TARGET_DIR=$(call CY_MACRO_DIR,$(CY_TARGET_EXTRA_INCLUDES))
+endif
+
+else
+
+ifeq ($(words $(CY_TARGET_MAKEFILE)),0)
+$(info Available target(s): $(CY_TARGET_AVAILABLE))
+$(call CY_MACRO_ERROR,Target "$(TARGET)" not found)
+else ifeq ($(words $(CY_TARGET_MAKEFILE)),1)
+CY_TARGET_DIR=$(call CY_MACRO_DIR,$(CY_TARGET_MAKEFILE)$(CY_TARGET_MAKEFILE_SEARCH_LIBS))
+include $(CY_TARGET_MAKEFILE) $(CY_TARGET_MAKEFILE_SEARCH_LIBS)  
+else
+$(call CY_MACRO_ERROR,Found multiple identical targets:$(CY_TARGET_MAKEFILE))
+endif
+
+endif

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/core/utils.mk

@@ -0,0 +1,358 @@
+################################################################################
+# \file utils.mk
+# \version 1.0
+#
+# \brief
+# Global utilities used across the application recipes and BSPs
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+
+################################################################################
+# Components
+################################################################################
+
+#
+# VFP-specific component
+#
+ifeq ($(VFP_SELECT),hardfp)
+CY_COMPONENT_VFP=HARDFP
+else
+CY_COMPONENT_VFP=SOFTFP
+endif
+
+#
+# Component list
+#
+CY_COMPONENT_LIST_DEFAULT=$(CORE) $(CY_COMPONENT_VFP) $(COMPONENTS)
+# Note: CY_DEFAULT_COMPONENT is needed as DISABLE_COMPONENTS cannot be empty
+DISABLE_COMPONENTS+=CY_DEFAULT_COMPONENT
+CY_COMPONENT_LIST?=$(sort $(filter-out $(DISABLE_COMPONENTS),$(CY_COMPONENT_LIST_DEFAULT)))
+
+
+################################################################################
+# Utility variables
+################################################################################
+
+# Create a make variable that contains a space
+CY_SPACE= 
+CY_SPACE+=
+
+# Create a make variable that contains a soft tab
+CY_INDENT=$(CY_SPACE)$(CY_SPACE)$(CY_SPACE)$(CY_SPACE)
+
+# Create a make variable that contains a line break
+define CY_NEWLINE
+
+
+endef
+
+# Create a make variable that contains a comma
+CY_COMMA=,
+
+# Displays/Hides the build steps
+ifneq (,$(filter $(VERBOSE),true 1))
+CY_NOISE=
+CY_CMD_TERM=
+else
+CY_NOISE=@
+CY_CMD_TERM= > /dev/null 2>&1
+endif
+
+# Set the location of the find utility (Avoid conflict with Windows system32/find.exe)
+CY_QUERY_FIND=$(findstring /usr/bin/find,$(shell whereis find))
+ifeq ($(CY_QUERY_FIND),)
+CY_FIND=find
+else
+CY_FIND=/usr/bin/find
+endif
+
+#
+# Prints for bypassing TARGET/DEVICE checks
+# $(1) : String to print
+#
+ifeq ($(CY_COMMENCE_BUILD),true)
+CY_MACRO_ERROR=$(error $(1))
+else
+CY_MACRO_ERROR=$(info WARNING: $(1))
+endif
+
+
+################################################################################
+# Search macros
+################################################################################
+
+# 
+# Macros to find all COMPONENTS not listed in the component list.
+# Step 1: Find all COMPONENT directories in app
+# Step 2: Process the list and get a list of all COMPONENTS
+# Step 3: Compare the found COMPONENTS with the expected components list
+#
+# $(1): List of files of a certain file type
+#
+CY_MACRO_FIND_COMPONENTS=$(strip $(foreach item,$(1),$(if $(findstring /COMPONENT_,/$(item)),$(item),)))
+CY_MACRO_PROCESS_COMPONENTS=\
+$(foreach item,$(1),\
+    $(if $(findstring /COMPONENT_,/$(notdir $(item))),$(subst COMPONENT_,,$(notdir $(item))),)\
+    $(if $(call CY_MACRO_EQUALITY,$(CY_INTERNAL_APP_PATH),$(item)),,$(call CY_MACRO_PROCESS_COMPONENTS,$(call CY_MACRO_DIR,$(item))))\
+)
+CY_MACRO_COMPARE_COMPONENTS=$(filter-out $(CY_COMPONENT_LIST),$(sort $(call CY_MACRO_PROCESS_COMPONENTS,$(call CY_MACRO_FIND_COMPONENTS,$(1)))))
+
+#
+# Filters for components. Iterates through CY_COMPONENT_LIST
+# $(1) : List of files of a certain file type
+#
+CY_MACRO_MATCH_COMPONENT=$(sort $(foreach component,$(2),\
+				$(foreach item,$(1),$(if $(findstring /COMPONENT_$(component)/,/$(item)/),$(item),))))
+CY_MACRO_GET_COMPONENT=$(filter-out \
+                $(call CY_MACRO_MATCH_COMPONENT,$(1),$(call CY_MACRO_COMPARE_COMPONENTS,$(1))),\
+                $(call CY_MACRO_MATCH_COMPONENT,$(1),$(CY_COMPONENT_LIST)))
+CY_MACRO_REMOVE_COMPONENT=$(strip $(foreach item,$(1),$(if $(findstring /COMPONENT_,/$(item)),,$(item))))
+CY_MACRO_FILTER_COMPONENT=$(call CY_MACRO_REMOVE_COMPONENT,$(1)) $(call CY_MACRO_GET_COMPONENT,$(1))
+
+#
+# Filters for configurations
+# $(1) : List of files of a certain file type
+# $(2) : Filter string
+#
+CY_MACRO_MATCH_CONFIGURATION=$(strip $(foreach item,$(1),$(if $(findstring $(2),/$(item)/),$(item),)))
+CY_MACRO_REMOVE_CONFIGURATION=$(strip $(foreach item,$(1),$(if $(findstring $(2),/$(item)),,$(item))))
+CY_MACRO_FILTER_CONFIGURATION=$(call CY_MACRO_REMOVE_CONFIGURATION,$(1),/$(strip $(2))_)\
+							$(call CY_MACRO_MATCH_CONFIGURATION,$(1),/$(strip $(2))_$($(strip $(2)))/)
+
+#
+# Filter for defined components and configurations 
+# $(1) : List of files of a certain file type
+#
+CY_MACRO_FILTER=\
+	$(strip \
+	$(call CY_MACRO_FILTER_COMPONENT,\
+	$(call CY_MACRO_FILTER_CONFIGURATION,\
+	$(call CY_MACRO_FILTER_CONFIGURATION,\
+	$(call CY_MACRO_FILTER_CONFIGURATION,\
+	$(1),\
+	TOOLCHAIN),\
+	TARGET),\
+	CONFIG)))
+
+#
+# Search for files
+# $(1) : File type
+#
+CY_MACRO_FILTER_FILES=$(call CY_MACRO_FILTER,$(CY_SEARCH_PRUNED_$(1)_FILES))
+
+#
+# Test for equality
+# $(1) : Base path
+# $(2) : Directory containing header file
+#
+CY_MACRO_EQUALITY=$(if $(and $(findstring $1,$2),$(findstring $2,$1)),TRUE)
+
+#
+# Recursively search for the parent directories up to the project root directory
+# $(1) : Directories containing header files
+#
+CY_MACRO_SEARCH_PARENT=\
+$(foreach item,$(1),\
+    $(if $(call CY_MACRO_EQUALITY,.,$(item)),\
+        .\
+    ,\
+        $(call CY_MACRO_DIR,$(item))\
+        $(call CY_MACRO_SEARCH_PARENT,$(call CY_MACRO_DIR,$(item)))\
+    )\
+)
+
+#
+# Convert to lower case
+# $(1) : String to convert to lower case
+#
+CY_MACRO_LC=$(subst A,a,$(subst B,b,$(subst C,c,$(subst D,d,$(subst E,e,$(subst F,f,$(subst G,g,$(subst \
+		H,h,$(subst I,i,$(subst J,j,$(subst K,k,$(subst L,l,$(subst M,m,$(subst N,n,$(subst O,o,$(subst P,p,$(subst \
+		Q,q,$(subst R,r,$(subst S,s,$(subst T,t,$(subst U,u,$(subst V,v,$(subst \
+		W,w,$(subst X,x,$(subst Y,y,$(subst Z,z,$1))))))))))))))))))))))))))
+
+#
+# Convert to upper case
+# $(1) : String to convert to upper case
+#
+CY_MACRO_UC=$(subst a,A,$(subst b,B,$(subst c,C,$(subst d,D,$(subst e,E,$(subst f,F,$(subst g,G,$(subst \
+		h,H,$(subst i,I,$(subst j,J,$(subst k,K,$(subst l,L,$(subst m,M,$(subst n,N,$(subst o,O,$(subst p,P,$(subst \
+		q,Q,$(subst r,R,$(subst s,S,$(subst t,T,$(subst u,U,$(subst v,V,$(subst \
+		w,W,$(subst x,X,$(subst y,Y,$(subst z,Z,$1))))))))))))))))))))))))))
+
+
+################################################################################
+# IDE-specifc targets
+################################################################################
+
+CY_VSCODE_OUT_PATH=$(CY_INTERNAL_APP_PATH)/.vscode
+CY_VSCODE_OUT_TEMPLATE_PATH=$(CY_VSCODE_OUT_PATH)/cytemplates
+CY_VSCODE_BACKUP_PATH=$(CY_VSCODE_OUT_PATH)/backup
+CY_VSCODE_TEMPLATE_PATH=$(CY_INTERNAL_BASELIB_PATH)/make/scripts/vscode
+CY_VSCODE_TEMPFILE=$(CY_CONFIG_DIR)/vscode_launch.temp
+
+CY_ECLIPSE_OUT_PATH=$(CY_INTERNAL_APP_PATH)/.mtbLaunchConfigs
+CY_ECLIPSE_TEMPLATE_PATH=$(CY_INTERNAL_BASELIB_PATH)/make/scripts/eclipse
+CY_ECLIPSE_TEMPFILE=$(CY_CONFIG_DIR)/eclipse_launch.temp
+CY_ECLIPSE_TEMPLATES_WILDCARD?=*
+
+ifeq ($(CY_IDE_PRJNAME),)
+CY_IDE_PRJNAME=$(APPNAME)
+endif
+
+vscode:
+ifeq ($(LIBNAME),)
+	@mkdir -p $(CY_CONFIG_DIR);\
+	mkdir -p $(CY_VSCODE_OUT_TEMPLATE_PATH);\
+	mkdir -p $(CY_VSCODE_BACKUP_PATH);\
+	echo $(CY_VSCODE_ARGS) > $(CY_VSCODE_TEMPFILE);\
+	echo "s|&&JSONINCLUDELIST&&|$(foreach onedef,$(subst -I,,$(CY_RECIPE_INCLUDES)),\"$(onedef)\",)|" >> $(CY_VSCODE_TEMPFILE);\
+	echo "s|&&JSONDEFINELIST&&|$(foreach onedef,$(subst -D,,$(CY_RECIPE_DEFINES)),\"$(onedef)\",)|" >> $(CY_VSCODE_TEMPFILE);\
+	for json in $(CY_VSCODE_TEMPLATE_PATH)/*; do\
+		jsonFile="$${json##*/}";\
+		if [[ $$jsonFile == *"c_cpp_properties"* ]] && [[ $$jsonFile != *"c_cpp_properties_$(TOOLCHAIN).json" ]]; then\
+			continue;\
+		fi;\
+		sed -f $(CY_VSCODE_TEMPFILE) $(CY_VSCODE_TEMPLATE_PATH)/$$jsonFile > $(CY_VSCODE_OUT_TEMPLATE_PATH)/$$jsonFile;\
+		jsonFiles="$$jsonFiles $$jsonFile";\
+		if [ -f $(CY_VSCODE_OUT_PATH)/$$jsonFile ] && [[ $$jsonFile == *"settings.json" ]]; then\
+			echo "Modifying existing settings.json file";\
+			mv $(CY_VSCODE_OUT_PATH)/$$jsonFile $(CY_VSCODE_BACKUP_PATH)/$$jsonFile;\
+			sed \
+				-e /cortex-debug\\.armToolchainPath/s%:.*%:\ \"$(CY_COMPILER_DIR)/bin\",% \
+				-e /cortex-debug\\.openocdPath/s%:.*%:\ \"$(CY_OPENOCD_DIR)/bin/openocd\",% \
+				$(CY_VSCODE_BACKUP_PATH)/$$jsonFile > $(CY_VSCODE_OUT_PATH)/$$jsonFile;\
+		else\
+			cp $(CY_VSCODE_OUT_TEMPLATE_PATH)/$$jsonFile $(CY_VSCODE_OUT_PATH)/$$jsonFile;\
+		fi;\
+	done;\
+	mv $(CY_VSCODE_OUT_PATH)/c_cpp_properties_$(TOOLCHAIN).json $(CY_VSCODE_OUT_PATH)/c_cpp_properties.json;\
+	mv $(CY_VSCODE_OUT_PATH)/openocd.tcl $(CY_INTERNAL_APP_PATH)/openocd.tcl;\
+	rm $(CY_VSCODE_TEMPFILE);\
+	rm -rf $(CY_VSCODE_OUT_TEMPLATE_PATH);\
+	echo;\
+	echo Generated Visual Studio Code files: $$jsonFiles;\
+	echo;\
+	echo WARNING: The vscode target is preliminary...
+else
+	@echo 
+endif
+
+CY_HELP_eclipse=Generates eclipse IDE launch configs.
+eclipse:
+ifeq ($(LIBNAME),)
+	@mkdir -p $(CY_CONFIG_DIR);\
+	mkdir -p $(CY_ECLIPSE_OUT_PATH);\
+	echo $(CY_ECLIPSE_ARGS) > $(CY_ECLIPSE_TEMPFILE);\
+	for launch in $(CY_ECLIPSE_TEMPLATE_PATH)/$(CY_ECLIPSE_TEMPLATES_WILDCARD); do\
+		launchFile="$${launch##*/}";\
+		launchFileName="$${launchFile%.*}";\
+		sed -f $(CY_ECLIPSE_TEMPFILE) "$(CY_ECLIPSE_TEMPLATE_PATH)/$$launchFileName.xml" > "$(CY_ECLIPSE_OUT_PATH)/$(CY_IDE_PRJNAME) $$launchFileName.launch";\
+		launchConfigs="$$launchConfigs \"$(CY_IDE_PRJNAME) $$launchFileName.launch"\";\
+	done;\
+	rm $(CY_ECLIPSE_TEMPFILE);\
+	echo;\
+	echo Generated Eclipse launch config files: "$$launchConfigs"
+else
+	@echo
+endif
+
+ifneq ($(SEARCH_LIBS_AND_INCLUDES),)
+CY_SHARED_ALL_LIB_FILES=$(call CY_MACRO_SEARCH,.lib,$(CY_SHARED_PATH))
+CY_SHARED_USED_LIB_NAMES=$(foreach item,$(SEARCH_LIBS_AND_INCLUDES),$(notdir $(item).lib))
+CY_SHARED_USED_LIB_FILES=$(foreach name,$(CY_SHARED_USED_LIB_NAMES),$(filter %/$(name),$(CY_SHARED_ALL_LIB_FILES)))
+endif
+
+CY_HELP_get_app_info=Prints the app info for the eclipse IDE.
+get_app_info:
+	@echo;\
+	echo "APP_NAME=$(APPNAME)";\
+	echo "LIB_NAME=$(LIBNAME)";\
+	echo "TARGET=$(TARGET)";\
+	echo "TARGET_DEVICE=$(DEVICE)";\
+	echo "CONFIGURATOR_FILES=$(CY_CONFIG_FILES)";\
+	echo "SUPPORTED_TOOL_TYPES=$(CY_OPEN_FILTERED_SUPPORTED_TYPES)";\
+	echo "CY_TOOLS_PATH=$(CY_TOOLS_DIR)";\
+	echo "CY_GETLIBS_PATH=$(CY_INTERNAL_GETLIBS_PATH)";\
+	echo "SHAREDLIBS_ROOT=$(CY_SHARED_PATH)";\
+	echo "SHAREDLIBS=$(SEARCH_LIBS_AND_INCLUDES)";\
+	echo "SHAREDLIBS_FILES=$(CY_SHARED_USED_LIB_FILES)";\
+	echo "CY_DEPENDENT_PROJECTS=$(CY_DEPENDENT_PROJECTS)"
+
+
+################################################################################
+# Test/debug targets
+################################################################################
+
+CY_TOOLS_LIST+=bash git find ls cp mkdir rm cat sed awk perl file whereis
+
+CY_HELP_check=Checks for the necessary tools.
+check:
+	$(info )
+	$(foreach tool,$(CY_TOOLS_LIST),$(if $(shell which $(tool)),,$(error "$(tool) was not found in user's PATH")))
+	@if [ ! -d $(CY_BT_CONFIGURATOR_DIR) ]; then toolsTest+=("bt-configurator could not be found"); fi;\
+	if [ ! -d $(CY_CAPSENSE_CONFIGURATOR_DIR) ]; then toolsTest+=("capsense-configurator could not be found"); fi;\
+	if [ ! -d $(CY_CFG_BACKEND_CLI_DIR) ]; then toolsTest+=("cfg-backend-cli could not be found"); fi;\
+	if [ ! -d $(CY_MCUELFTOOL_DIR) ]; then toolsTest+=("cymcuelftool could not be found"); fi;\
+	if [ ! -d $(CY_PE_TOOL_DIR) ]; then toolsTest+=("cype-tool could not be found"); fi;\
+	if [ ! -d $(CY_DEVICE_CONFIGURATOR_DIR) ]; then toolsTest+=("device-configurator could not be found"); fi;\
+	if [ ! -d $(CY_DFUH_TOOL_DIR) ]; then toolsTest+=("dfuh-tool could not be found"); fi;\
+	if [ ! -d $(CY_FW_LOADER_DIR) ]; then toolsTest+=("fw-loader could not be found"); fi;\
+	if [ ! -d $(CY_COMPILER_DIR) ]; then toolsTest+=("Default ARM GCC toolchain could not be found"); fi;\
+	if [ ! -d $(CY_JRE_DIR) ]; then toolsTest+=("Java Runtime Environment tool could not be found"); fi;\
+	if [ ! -d $(CY_LIBRARY_MANAGER_DIR) ]; then toolsTest+=("Library Manager could not be found"); fi;\
+	if [ ! -d $(CY_MODUS_SHELL_DIR) ]; then toolsTest+=("modus-shell could not be found"); fi;\
+	if [ ! -d $(CY_OPENOCD_DIR) ]; then toolsTest+=("openocd could not be found"); fi;\
+	if [ ! -d $(CY_PROJECT_CREATOR_DIR) ]; then toolsTest+=("Project Creator could not be found"); fi;\
+	if [ ! -d $(CY_QSPI_CONFIGURATOR_DIR) ]; then toolsTest+=("qspi-configurator could not be found"); fi;\
+	if [ ! -d $(CY_SEGLCD_CONFIGURATOR_DIR) ]; then toolsTest+=("seglcd-configurator could not be found"); fi;\
+	if [ ! -d $(CY_SMARTIO_CONFIGURATOR_DIR) ]; then toolsTest+=("smartio-configurator could not be found"); fi;\
+	if [ ! -d $(CY_MAKEFILES_DIR) ]; then toolsTest+=("Tools make files could not be found"); fi;\
+	if [ $${#toolsTest[@]} -eq 0 ]; then\
+		printf "SUCCESS: All tools are present";\
+	else\
+		printf "FAILED: The following tools are missing\n";\
+		printf '  %s\n' "$${toolsTest[@]}";\
+	fi;
+
+CY_HELP_get_env_info=Prints the make, git, and app repo info.
+get_env_info:
+	@echo;\
+	echo "make location :" $$(which make);\
+	echo "make version  :" $(MAKE_VERSION);\
+	echo "git location  :" $$(which git);\
+	echo "git version   :" $$(git --version);\
+	echo "git remote    :";\
+	git remote -v;\
+	echo "git rev-parse :" $$(git rev-parse HEAD)
+
+# Empty libs on purpose. May be defined by the application
+shared_libs:
+
+CY_HELP_printlibs=Prints the status of the library repos.
+printlibs:
+
+#
+# Identify the phony targets
+#
+.PHONY: help help_default vscode eclipse check shared_libs get_env_info get_app_info

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/recipe/defines.mk

@@ -0,0 +1,295 @@
+################################################################################
+# \file defines.mk
+# \version 1.0
+#
+# \brief
+# Defines, needed for the PSoC 6 build recipe.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+
+#
+# List the supported toolchains
+#
+CY_SUPPORTED_TOOLCHAINS=GCC_ARM IAR ARM A_Clang
+
+#
+# Define the default core
+#
+CORE?=CM4
+CY_START_FLASH=0x10000000
+CY_START_SRAM=0x08000000
+
+CY_OPEN_bt_configurator_DEVICE=--device PSoC6 
+CY_OPENOCD_CHIP_NAME=psoc6
+CY_OPENOCD_SECOND_RESET_TYPE=run
+CY_OPENOCD_OTHER_RUN_CMD=mon psoc6 reset_halt sysresetreq
+CY_OPENOCD_OTHER_RUN_CMD_ECLIPSE=$(CY_OPENOCD_OTHER_RUN_CMD)\&\#13;\&\#10;
+
+#
+# Core specifics
+#
+ifeq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_M0P)))
+ifeq ($(CORE),CM0P)
+$(call CY_MACRO_ERROR,$(DEVICE) does not have a CM0+ core)
+endif
+CY_LINKERSCRIPT_SUFFIX=cm4
+CY_OPENOCD_EXTRA_PORT_FLAG=
+CY_OPENOCD_EXTRA_PORT_ECLIPSE=
+CY_OPENOCD_CM0_DISABLE_FLAG=set ENABLE_CM0 0
+CY_OPENOCD_CM0_DISABLE_ECLIPSE=-c \"$(CY_OPENOCD_CM0_DISABLE_FLAG)\"\&\#13;\&\#10;
+else
+ifeq ($(CORE),CM0P)
+CY_LINKERSCRIPT_SUFFIX=cm0plus
+else
+CY_LINKERSCRIPT_SUFFIX=cm4_dual
+CY_OPENOCD_EXTRA_PORT_FLAG=gdb_port 3332
+CY_OPENOCD_EXTRA_PORT_ECLIPSE=-c \"$(CY_OPENOCD_EXTRA_PORT_FLAG)\"\&\#13;\&\#10;
+CY_OPENOCD_CM0_DISABLE_FLAG=
+CY_OPENOCD_CM0_DISABLE_ECLIPSE=
+endif
+endif
+
+#
+# Architecure specifics
+#
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_DIE_PSOC6ABLE2)))
+
+CY_PSOC_ARCH=psoc6_01
+CY_PSOC_DIE_NAME=PSoC6ABLE2
+CY_OPENOCD_DEVICE_CFG=psoc6.cfg
+CY_JLINK_DEVICE_CFG_PROGRAM=CY8C6xx7_CM0p_sect256KB_tm
+CY_JLINK_DEVICE_CFG_DEBUG=CY8C6xx7_CM4_sect256KB
+ifeq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_M0P)))
+CY_JLINK_DEVICE_CFG_PROGRAM=CY8C6xx6_CM4_sect256KB
+CY_JLINK_DEVICE_CFG_DEBUG=CY8C6xx6_CM4_sect256KB
+endif
+ifneq (,$(findstring CYB0,$(DEVICE)))
+CY_PSOC_ARCH=psoc6_secure
+CY_PSOC_DIE_NAME=PSoC6ABLE2Secure
+CY_OPENOCD_CHIP_NAME=psoc64
+CY_OPENOCD_DEVICE_CFG=psoc6_secure.cfg
+CY_OPENOCD_CM0_DISABLE_FLAG=set TARGET_AP cm4_ap
+CY_OPENOCD_EXTRA_PORT_FLAG=
+CY_OPENOCD_CM0_DISABLE_ECLIPSE=-c \"$(CY_OPENOCD_CM0_DISABLE_FLAG)\"\&\#13;\&\#10;
+CY_OPENOCD_EXTRA_PORT_ECLIPSE=
+CY_OPENOCD_SECOND_RESET_TYPE=init
+CY_OPENOCD_OTHER_RUN_CMD=
+CY_OPENOCD_OTHER_RUN_CMD_ECLIPSE=
+CY_OPENOCD_SMIF_DISABLE=set DISABLE_SMIF 1
+CY_OPENOCD_SMIF_DISABLE_ECLIPSE=-c \"$(CY_OPENOCD_SMIF_DISABLE)\"\&\#13;\&\#10;
+endif
+
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_DIE_PSOC6A2M)))
+
+CY_PSOC_ARCH=psoc6_02
+CY_PSOC_DIE_NAME=PSoC6A2M
+CY_OPENOCD_DEVICE_CFG=psoc6_2m.cfg
+CY_JLINK_DEVICE_CFG_PROGRAM=CY8C6xxA_CM0p_sect256KB_tm
+CY_JLINK_DEVICE_CFG_DEBUG=CY8C6xxA_CM4_sect256KB
+ifneq (,$(findstring CYB0,$(DEVICE)))
+CY_PSOC_ARCH=psoc6_2m_secure
+CY_PSOC_DIE_NAME=PSoC6A2MSecure
+CY_OPENOCD_CHIP_NAME=psoc64_2m
+CY_OPENOCD_DEVICE_CFG=psoc6_2m_secure.cfg
+CY_OPENOCD_CM0_DISABLE_FLAG=set TARGET_AP cm4_ap
+CY_OPENOCD_EXTRA_PORT_FLAG=
+CY_OPENOCD_CM0_DISABLE_ECLIPSE=-c \"$(CY_OPENOCD_CM0_DISABLE_FLAG)\"\&\#13;\&\#10;
+CY_OPENOCD_EXTRA_PORT_ECLIPSE=
+CY_OPENOCD_SECOND_RESET_TYPE=init
+CY_OPENOCD_OTHER_RUN_CMD=
+CY_OPENOCD_OTHER_RUN_CMD_ECLIPSE=
+CY_OPENOCD_SMIF_DISABLE=set DISABLE_SMIF 1
+CY_OPENOCD_SMIF_DISABLE_ECLIPSE=-c \"$(CY_OPENOCD_SMIF_DISABLE)\"\&\#13;\&\#10;
+endif
+
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_DIE_PSOC6A512K)))
+
+CY_PSOC_ARCH=psoc6_03
+CY_PSOC_DIE_NAME=PSoC6A512K
+CY_OPENOCD_DEVICE_CFG=psoc6_512k.cfg
+CY_JLINK_DEVICE_CFG_PROGRAM=CY8C6xx5_CM0p_sect256KB_tm
+CY_JLINK_DEVICE_CFG_DEBUG=CY8C6xx5_CM4_sect256KB
+
+else
+$(call CY_MACRO_ERROR,Incorrect part number $(DEVICE). Check DEVICE variable.)
+endif
+
+#
+# Flash memory specifics
+#
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_512)))
+CY_MEMORY_FLASH=524288
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_832)))
+CY_MEMORY_FLASH=850944
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_1024)))
+CY_MEMORY_FLASH=1048576
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_1856)))
+CY_MEMORY_FLASH=1899520
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_2048)))
+CY_MEMORY_FLASH=2097152
+else
+$(call CY_MACRO_ERROR,No Flash memory size defined for $(DEVICE))
+endif
+
+#
+# SRAM memory specifics
+#
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_SRAM_KB_128)))
+CY_MEMORY_SRAM=129024
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_SRAM_KB_256)))
+CY_MEMORY_SRAM=260096
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_SRAM_KB_288)))
+CY_MEMORY_SRAM=292864
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_SRAM_KB_512)))
+CY_MEMORY_SRAM=522240
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_SRAM_KB_1024)))
+CY_MEMORY_SRAM=1046528
+else
+$(call CY_MACRO_ERROR,No SRAM memory size defined for $(DEVICE))
+endif
+
+#
+# linker scripts
+#
+
+# Secure parts
+ifneq (,$(findstring CYB06,$(DEVICE)))
+
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_DIE_PSOC6ABLE2)))
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_832)))
+CY_LINKER_SCRIPT_NAME=cyb06xx7
+endif
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_DIE_PSOC6A2M)))
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_1856)))
+CY_LINKER_SCRIPT_NAME=cyb06xxa
+endif
+endif
+
+# Non-secure part
+else
+
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_DIE_PSOC6A512K)))
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_512)))
+CY_LINKER_SCRIPT_NAME=cy8c6xx5
+endif
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_DIE_PSOC6ABLE2)))
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_512)))
+CY_LINKER_SCRIPT_NAME=cy8c6xx6
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_1024)))
+CY_LINKER_SCRIPT_NAME=cy8c6xx7
+endif
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_DIE_PSOC6A2M)))
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_1024)))
+CY_LINKER_SCRIPT_NAME=cy8c6xx8
+else ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FLASH_KB_2048)))
+CY_LINKER_SCRIPT_NAME=cy8c6xxa
+endif
+endif
+
+endif
+
+ifeq ($(CY_LINKER_SCRIPT_NAME),)
+$(call CY_MACRO_ERROR,Could not resolve device series for linker script)
+endif
+
+#
+# Paths used in program/debug
+#
+ifeq ($(CY_DEVICESUPPORT_PATH),)
+CY_OPENOCD_SVD_PATH?=
+else
+CY_OPENOCD_SVD_PATH?=
+endif
+CY_OPENOCD_QSPI_CFG_PATH=$(CY_TARGET_DIR)/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource
+
+#
+# Set the output file paths
+#
+ifneq ($(CY_BUILD_LOCATION),)
+CY_SYM_FILE?=$(CY_INTERNAL_BUILD_LOCATION)/$(APPNAME)/$(TARGET)/$(CONFIG)/$(APPNAME).elf
+CY_PROG_FILE?=$(CY_INTERNAL_BUILD_LOCATION)/$(APPNAME)/$(TARGET)/$(CONFIG)/$(APPNAME).hex
+else
+CY_SYM_FILE?=\$$\{cy_prj_path\}/$(notdir $(CY_INTERNAL_BUILD_LOC))/$(TARGET)/$(CONFIG)/$(APPNAME).elf
+CY_PROG_FILE?=\$$\{cy_prj_path\}/$(notdir $(CY_INTERNAL_BUILD_LOC))/$(TARGET)/$(CONFIG)/$(APPNAME).hex
+endif
+
+#
+# IDE specifics
+#
+ifneq (,$(findstring CYB0,$(DEVICE)))
+CY_ECLIPSE_TEMPLATES_WILDCARD=*KitProg3*
+endif
+
+CY_VSCODE_ARGS="s|&&RELEASETARGET&&|build/$(TARGET)/Release/$(APPNAME).elf|g;"\
+				"s|&&DEBUGTARGET&&|build/$(TARGET)/Debug/$(APPNAME).elf|g;"\
+				"s|&&PSOCFAMILY&&|$(CY_PSOC_ARCH)|g;"\
+				"s|&&MODUSSHELL&&|$(CY_MODUS_SHELL_DIR)|g;"\
+				"s|&&OPENOCDFILE&&|$(CY_OPENOCD_DEVICE_CFG)|g;"\
+				"s|&&SVDFILENAME&&|$(CY_OPENOCD_SVD_PATH)|g;"\
+				"s|&&MODUSTOOLCHAIN&&|$(CY_COMPILER_DIR)|g;"\
+				"s|&&MODUSTOOLCHAINVERSION&&|$(notdir $(CY_COMPILER_DIR))|g;"\
+				"s|&&MODUSOPENCOD&&|$(CY_OPENOCD_DIR)|g;"\
+				"s|&&MODUSLIBMANAGER&&|$(CY_LIBRARY_MANAGER_DIR)|g;"\
+
+CY_ECLIPSE_ARGS="s|&&CY_OPENOCD_CFG&&|$(CY_OPENOCD_DEVICE_CFG)|;"\
+				"s|&&CY_OPENOCD_CHIP&&|$(CY_OPENOCD_CHIP_NAME)|;"\
+				"s|&&CY_OPENOCD_SECOND_RESET&&|$(CY_OPENOCD_SECOND_RESET_TYPE)|;"\
+				"s|&&CY_OPENOCD_OTHER_RUN_CMD&&|$(CY_OPENOCD_OTHER_RUN_CMD_ECLIPSE)|;"\
+				"s|&&CY_JLINK_CFG_PROGRAM&&|$(CY_JLINK_DEVICE_CFG_PROGRAM)|;"\
+				"s|&&CY_JLINK_CFG_DEBUG&&|$(CY_JLINK_DEVICE_CFG_DEBUG)|;"\
+				"s|&&CY_OPENOCD_PORT_SELECT&&|$(CY_OPENOCD_EXTRA_PORT_ECLIPSE)|;"\
+				"s|&&CY_OPENOCD_CM0_FLAG&&|$(CY_OPENOCD_CM0_DISABLE_ECLIPSE)|;"\
+				"s|&&CY_OPENOCD_SMIF_DISABLE&&|$(CY_OPENOCD_SMIF_DISABLE_ECLIPSE)|;"\
+				"s|&&CY_APPNAME&&|$(CY_IDE_PRJNAME)|;"\
+				"s|&&CY_CONFIG&&|$(CONFIG)|;"\
+				"s|&&CY_QSPI_CFG_PATH&&|$(CY_OPENOCD_QSPI_CFG_PATH)|;"\
+				"s|&&CY_SVD_PATH&&|$(CY_OPENOCD_SVD_PATH)|;"\
+				"s|&&CY_SYM_FILE&&|$(CY_SYM_FILE)|;"\
+				"s|&&CY_PROG_FILE&&|$(CY_PROG_FILE)|;"
+
+#
+# Tools specifics
+#
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_CAPSENSE)))
+CY_SUPPORTED_TOOL_TYPES+=capsense-configurator capsense-tuner
+endif
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_BLE)))
+CY_SUPPORTED_TOOL_TYPES+=bt-configurator
+endif
+ifneq (,$(findstring $(DEVICE),$(CY_DEVICES_WITH_FS_USB)))
+CY_SUPPORTED_TOOL_TYPES+=usbdev-configurator
+endif
+CY_SUPPORTED_TOOL_TYPES+=\
+	device-configurator\
+	qspi-configurator\
+	seglcd-configurator\
+	smartio-configurator\
+	cype-tool\
+	dfuh-tool
+
+# PSoC 6 smartio also uses the .modus extension
+modus_DEFAULT_TYPE+=device-configurator smartio-configurator
+
+# PSoC 6 capsense-tuner shares its existence with capsense-configurator
+CY_OPEN_NEWCFG_XML_TYPES+=capsense-tuner

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/recipe/program.mk

@@ -0,0 +1,104 @@
+################################################################################
+# \file program.mk
+# \version 1.0
+#
+# \brief
+# This make file is called recursively and is used to build the
+# resoures file system. It is expected to be run from the example directory.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+
+CY_GDB_CLIENT=$(CY_COMPILER_DIR)/bin/arm-none-eabi-gdb
+CY_GDB_ARGS=$(CY_INTERNAL_BASELIB_PATH)/make/scripts/gdbinit
+
+ifeq ($(TOOLCHAIN),A_Clang)
+CY_OPENOCD_PROGRAM_IMG=$(CY_CONFIG_DIR)/$(APPNAME).bin $(TOOLCHAIN_VECT_BASE_CM4)
+else
+CY_OPENOCD_SYMBOL_IMG=$(CY_CONFIG_DIR)/$(APPNAME).elf
+CY_OPENOCD_PROGRAM_IMG=$(CY_CONFIG_DIR)/$(APPNAME).hex
+endif
+
+CY_OPENOCD_SCRIPTS=-s $(CY_OPENOCD_DIR)/scripts
+CY_OPENOCD_QSPI=-s $(CY_OPENOCD_QSPI_CFG_PATH)
+CY_OPENOCD_INTERFACE=source [find interface/kitprog3.cfg];
+CY_OPENOCD_TARGET=source [find target/$(CY_OPENOCD_DEVICE_CFG)];
+ifeq (,$(findstring CYB0,$(DEVICE)))
+CY_OPENOCD_CUSTOM_COMMAND?=psoc6 allow_efuse_program off;
+else
+CY_GDB_ARGS=$(CY_INTERNAL_BASELIB_PATH)/make/scripts/gdbinit_secure
+endif
+
+CY_OPENOCD_ERASE=init; reset init; psoc6 sflash_restrictions 1; erase_all; exit;
+CY_OPENOCD_PROGRAM=psoc6 sflash_restrictions 1; program $(CY_OPENOCD_PROGRAM_IMG) verify reset exit;
+CY_OPENOCD_DEBUG=$(CY_OPENOCD_CHIP_NAME).cpu.cm4 configure -rtos auto -rtos-wipe-on-reset-halt 1; $(CY_OPENOCD_EXTRA_PORT_FLAG); init; reset init;
+
+CY_OPENOCD_ERASE_ARGS=$(CY_OPENOCD_SCRIPTS) -c \
+					"$(CY_OPENOCD_INTERFACE) $(CY_OPENOCD_CM0_DISABLE_FLAG); $(CY_OPENOCD_SMIF_DISABLE); $(CY_OPENOCD_TARGET) $(CY_OPENOCD_CUSTOM_COMMAND) $(CY_OPENOCD_ERASE)"
+CY_OPENOCD_PROGRAM_ARGS=$(CY_OPENOCD_SCRIPTS) $(CY_OPENOCD_QSPI) -c \
+					"$(CY_OPENOCD_INTERFACE) $(CY_OPENOCD_CM0_DISABLE_FLAG); $(CY_OPENOCD_TARGET) $(CY_OPENOCD_CUSTOM_COMMAND) $(CY_OPENOCD_PROGRAM)"
+CY_OPENOCD_DEBUG_ARGS=$(CY_OPENOCD_SCRIPTS) $(CY_OPENOCD_QSPI) -c \
+					"$(CY_OPENOCD_INTERFACE) $(CY_OPENOCD_CM0_DISABLE_FLAG); $(CY_OPENOCD_TARGET) $(CY_OPENOCD_CUSTOM_COMMAND) $(CY_OPENOCD_DEBUG)"
+
+erase:
+	@echo;\
+	echo "Erasing target device... ";\
+	$(CY_OPENOCD_DIR)/bin/openocd $(CY_OPENOCD_ERASE_ARGS)
+
+program: build qprogram
+
+qprogram: memcalc
+ifeq ($(LIBNAME),)
+	@echo;\
+	echo "Programming target device... ";\
+	$(CY_OPENOCD_DIR)/bin/openocd $(CY_OPENOCD_PROGRAM_ARGS)
+else
+	@echo "Library application detected. Skip programming... ";\
+	echo
+endif
+
+debug: program qdebug
+
+qdebug: qprogram
+ifeq ($(LIBNAME),)
+	@echo;\
+	echo ==============================================================================;\
+	echo "Instruction:";\
+	echo "Open a separate shell and run the attach target (make attach)";\
+	echo "to start the GDB client. Then use the GDB commands to debug.";\
+	echo ==============================================================================;\
+	echo;\
+	echo "Opening GDB port ... ";\
+	$(CY_OPENOCD_DIR)/bin/openocd $(CY_OPENOCD_DEBUG_ARGS)
+else
+	@echo "Library application detected. Skip debug... ";\
+	echo
+endif
+
+attach:
+	@echo;\
+	echo "Starting GDB Client... ";\
+	$(CY_GDB_CLIENT) $(CY_OPENOCD_SYMBOL_IMG) -x $(CY_GDB_ARGS)
+
+
+.PHONY: erase program qprogram debug qdebug attach

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/recipe/recipe.mk

@@ -0,0 +1,202 @@
+################################################################################
+# \file recipe.mk
+# \version 1.0
+#
+# \brief
+# Set up a set of defines, includes, software components, linker script, 
+# Pre and Post build steps and call a macro to create a specific ELF file.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+
+#
+# linker script construction
+#
+ifeq ($(LINKER_SCRIPT),)
+LINKER_SCRIPT=$(CY_TARGET_DIR)/linker/TOOLCHAIN_$(TOOLCHAIN)/$(CY_LINKER_SCRIPT_NAME)_$(CY_LINKERSCRIPT_SUFFIX).$(CY_TOOLCHAIN_SUFFIX_LS)
+endif
+
+ifeq ($(shell if [ -f $(LINKER_SCRIPT) ]; then echo 1; else echo 0; fi;),0)
+$(error The specified linker script could not be found at $(LINKER_SCRIPT))
+endif
+
+ifeq ($(TOOLCHAIN),A_Clang)
+include $(LINKER_SCRIPT)
+else
+CY_RECIPE_LSFLAG=$(CY_TOOLCHAIN_LSFLAGS)$(LINKER_SCRIPT)
+endif
+
+#
+# Flags construction
+#
+CY_RECIPE_CFLAGS?=\
+	$(CFLAGS)\
+	$(CY_TOOLCHAIN_CFLAGS)
+
+CY_RECIPE_CXXFLAGS?=\
+	$(CXXFLAGS)\
+	$(CY_TOOLCHAIN_CXXFLAGS)
+
+CY_RECIPE_ASFLAGS?=\
+	$(ASFLAGS)\
+	$(CY_TOOLCHAIN_ASFLAGS)
+
+CY_RECIPE_ARFLAGS?=\
+	$(CY_TOOLCHAIN_ARFLAGS)
+		
+CY_RECIPE_LDFLAGS?=\
+	$(LDFLAGS)\
+	$(CY_TOOLCHAIN_LDFLAGS)\
+	$(CY_RECIPE_LSFLAG)
+
+#
+# Defines construction
+#
+ifneq ($(DEFINES),)
+CY_RECIPE_USER_DEFINES=$(addprefix -D,$(DEFINES))
+endif
+ifneq ($(LIBNAME),)
+CY_RECIPE_USER_NAME=-DCY_LIBNAME_$(subst -,_,$(LIBNAME))
+else
+CY_RECIPE_USER_NAME=-DCY_APPNAME_$(subst -,_,$(APPNAME))
+endif
+
+CY_RECIPE_DEFINES=\
+	$(CY_RECIPE_USER_DEFINES)\
+	$(CY_RECIPE_USER_NAME)\
+	-D$(subst -,_,$(DEVICE))\
+	-DCY_TARGET_DEVICE=$(subst -,_,$(DEVICE))\
+	-DTARGET_$(subst -,_,$(TARGET))\
+	-DCY_TARGET_BOARD=$(subst -,_,$(TARGET))\
+	$(foreach feature,$(CY_COMPONENT_LIST),-DCOMPONENT_$(subst -,_,$(feature)))\
+	$(CY_TOOLCHAIN_DEBUG_FLAG)\
+	$(CY_TOOLCHAIN_DEFINES)
+
+#
+# Includes construction
+#
+CY_RECIPE_INCLUDES=\
+	$(addprefix -I,$(INCLUDES))\
+	$(addprefix -I,$(CY_SEARCH_APP_INCLUDES))\
+	$(addprefix -I,$(CY_TOOLCHAIN_INCLUDES))
+
+#
+# Sources construction
+#
+CY_RECIPE_SOURCE=$(CY_SEARCH_APP_SOURCE)
+
+#
+# Libraries construction
+#
+CY_RECIPE_LIBS=$(LDLIBS) $(CY_SEARCH_APP_LIBS)
+
+#
+# Generate source step
+#
+ifneq ($(CY_SEARCH_RESOURCE_FILES),)
+CY_RECIPE_RESOURCE_FILES=$(CY_SEARCH_RESOURCE_FILES)
+CY_RECIPE_GENERATED_FLAG=TRUE
+
+# Define the generated source file. Use := for better performance
+CY_RECIPE_GENERATED:=$(addprefix $(CY_GENERATED_DIR)/,$(addsuffix .$(CY_TOOLCHAIN_SUFFIX_C),\
+					$(basename $(notdir $(subst .,_,$(CY_SEARCH_RESOURCE_FILES))))))
+
+CY_RECIPE_GENSRC=\
+	bash --norc --noprofile\
+	$(CY_INTERNAL_BASELIB_PATH)/make/scripts/genresources.bash\
+	$(CY_INTERNAL_BASELIB_PATH)/make/scripts\
+	$(CY_GENERATED_DIR)/resources.cyrsc\
+	$(CY_INTERNAL_APP_PATH)\
+	$(CY_GENERATED_DIR)\
+	"MEM"
+endif
+
+#
+# Prebuild step
+#
+CY_RECIPE_PREBUILD?=
+
+#
+# Postbuild step
+#
+ifeq ($(LIBNAME),)
+
+ifeq ($(TOOLCHAIN),A_Clang)
+CY_RECIPE_POSTBUILD?=\
+	$(CY_TOOLCHAIN_M2BIN)\
+	--verbose --vect $(VECT_BASE_CM4) --text $(TEXT_BASE_CM4) --data $(RAM_BASE_CM4) --size $(TEXT_SIZE_CM4)\
+	$(CY_CONFIG_DIR)/$(APPNAME).mach_o\
+	$(CY_CONFIG_DIR)/$(APPNAME).bin
+
+else ifeq ($(TOOLCHAIN),ARM)
+ifeq ($(CY_COMPILER_PATH),)
+CY_RECIPE_POSTBUILD?=$(CY_COMPILER_ARM_DIR)/bin/fromelf --output $(CY_CONFIG_DIR)/$(APPNAME).hex --i32combined $(CY_CONFIG_DIR)/$(APPNAME).elf
+else
+CY_RECIPE_POSTBUILD?=$(CY_COMPILER_PATH)/bin/fromelf --output $(CY_CONFIG_DIR)/$(APPNAME).hex --i32combined $(CY_CONFIG_DIR)/$(APPNAME).elf
+endif
+
+else ifeq ($(TOOLCHAIN),IAR)
+CY_RECIPE_POSTBUILD?=$(CY_COMPILER_GCC_ARM_DIR)/bin/arm-none-eabi-objcopy -O ihex $(CY_CONFIG_DIR)/$(APPNAME).elf $(CY_CONFIG_DIR)/$(APPNAME).hex
+
+else ifeq ($(TOOLCHAIN),GCC_ARM)
+ifeq ($(CY_COMPILER_PATH),)
+CY_RECIPE_POSTBUILD?=$(CY_COMPILER_GCC_ARM_DIR)/bin/arm-none-eabi-objcopy -O ihex $(CY_CONFIG_DIR)/$(APPNAME).elf $(CY_CONFIG_DIR)/$(APPNAME).hex
+else
+CY_RECIPE_POSTBUILD?=$(CY_COMPILER_PATH)/bin/arm-none-eabi-objcopy -O ihex $(CY_CONFIG_DIR)/$(APPNAME).elf $(CY_CONFIG_DIR)/$(APPNAME).hex
+endif
+endif
+
+endif
+
+################################################################################
+# Memory Consumption
+################################################################################
+
+ifeq ($(TOOLCHAIN),A_Clang)
+CY_GEN_READELF=
+CY_MEMORY_CALC=
+else
+CY_GEN_READELF=$(CY_COMPILER_DIR)/bin/arm-none-eabi-readelf -Sl $(CY_CONFIG_DIR)/$(APPNAME).elf > $(CY_CONFIG_DIR)/$(APPNAME).readelf
+CY_MEM_CALC=\
+	bash --norc --noprofile\
+	$(CY_INTERNAL_BASELIB_PATH)/make/scripts/memcalc.bash\
+	$(CY_CONFIG_DIR)/$(APPNAME).readelf\
+	$(CY_MEMORY_FLASH)\
+	$(CY_MEMORY_SRAM)\
+	$(CY_START_FLASH)\
+	$(CY_START_SRAM)
+endif
+
+memcalc: app
+ifneq ($(LIBNAME),)
+else
+	@echo Calculating memory consumption: $(DEVICE) $(TOOLCHAIN) $(CY_TOOLCHAIN_OPTIMIZATION)
+	@echo
+	$(CY_NOISE)$(CY_GEN_READELF)
+	$(CY_NOISE)$(CY_MEM_CALC)
+endif
+
+#
+# Identify the phony targets
+#
+.PHONY: memcalc

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/bin_to_resource_c.pl

@@ -0,0 +1,107 @@
+#!/usr/bin/perl
+
+#
+# Copyright 2019, Cypress Semiconductor Corporation or a subsidiary of
+# Cypress Semiconductor Corporation. All Rights Reserved.
+#
+# This software, including source code, documentation and related
+# materials ("Software"), is owned by Cypress Semiconductor Corporation
+# or one of its subsidiaries ("Cypress") and is protected by and subject to
+# worldwide patent protection (United States and foreign),
+# United States copyright laws and international treaty provisions.
+# Therefore, you may use this Software only as provided in the license
+# agreement accompanying the software package from which you
+# obtained this Software ("EULA").
+# If no EULA applies, Cypress hereby grants you a personal, non-exclusive,
+# non-transferable license to copy, modify, and compile the Software
+# source code solely for use in connection with Cypress's
+# integrated circuit products. Any reproduction, modification, translation,
+# compilation, or representation of this Software except as specified
+# above is prohibited without the express written permission of Cypress.
+#
+# Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress
+# reserves the right to make changes to the Software without notice. Cypress
+# does not assume any liability arising out of the application or use of the
+# Software or any product or circuit described in the Software. Cypress does
+# not authorize its products for use in any products where a malfunction or
+# failure of the Cypress product may reasonably be expected to result in
+# significant property damage, injury or death ("High Risk Product"). By
+# including Cypress's product in a High Risk Product, the manufacturer
+# of such system or application assumes all risk of such use and in doing
+# so agrees to indemnify Cypress against all liability.
+#
+
+if (! $ARGV[0] )
+{
+    print "Usage ./bin_to_resource_c.pl  <MEM|FILESYS> <variable name> <text file>";
+    exit;
+}
+
+# Print start of output
+my $location = shift @ARGV;
+my $variable_name = shift @ARGV;
+my $original_variable_name = $variable_name;
+my $file = shift @ARGV;
+
+#open the file
+open INFILE, "<:raw", $file or die "cant open " . $file;
+@file_cont_array = <INFILE>;
+close INFILE;
+$file_cont = join('',@file_cont_array);
+
+
+print "#include \"cy_abs_resource.h\"\n";
+print "\n";
+$name = $file;
+$name=~s/^.+\/(.*?)/$1/;
+
+if ( $location ne "MEM" )
+{
+    print "const cy_resource_handle_t ${variable_name} = { CY_RESOURCE_IN_FILESYSTEM,  " . (length( $file_cont )) . ", {.fs = { 0, \"$name\" } }};\n";
+    print "\n";
+}
+else
+{
+    print "const uint8_t ${variable_name}_data[" . (length( $file_cont )) . "] = {\n";
+    my @vals = unpack( "C*", $file_cont );
+
+    my $linepos;
+    my $firstval = 1;
+
+    foreach $val (@vals)
+    {
+        my $valsize = 1;
+        if ( ( $val >= 10 ) && ( $val < 100 ) )
+        {
+            $valsize = 2;
+        }
+        elsif ( $val >= 100 )
+        {
+            $valsize = 3;
+        }
+
+        if ( $firstval == 1 )
+        {
+            print "        $val";
+            $linepos = 8 + $valsize;
+            $firstval = 0;
+        }
+        elsif ( $linepos + 5 >= 79 )
+        {
+            print ",\n        $val";
+            $linepos = 8 + $valsize;
+        }
+        else
+        {
+            print ", $val";
+            $linepos += 2 + $valsize;
+        }
+    }
+
+    print "\n};\n";
+    print "const cy_resource_handle_t ${variable_name} = { CY_RESOURCE_IN_MEMORY, " . (length( $file_cont )) . ", {.mem_data = ${variable_name}_data }};\n";
+    print "\n";
+}
+

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/eclipse/Attach (JLink).xml

@@ -0,0 +1,78 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<booleanAttribute key="com.cypress.studio.launch.hide" value="true"/>
+<stringAttribute key="com.cypress.studio.launch.mode" value="debug"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="false"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value="2"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="swd"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="&&CY_JLINK_CFG_DEBUG&&"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="auto"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2334"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun -strict -timeout 0 -nogui"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2335"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2336"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="auto"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value="2"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="&&CY_SVD_PATH&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="&&CY_PROG_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2334"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="&&CY_SYM_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="&&CY_SYM_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="&&CY_APPNAME&&"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/&&CY_APPNAME&&"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/eclipse/Attach (KitProg3).xml

@@ -0,0 +1,59 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<booleanAttribute key="com.cypress.studio.launch.hide" value="true"/>
+<stringAttribute key="com.cypress.studio.launch.mode" value="debug"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set remotetimeout 15"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-s &quot;${openocd_path}/../scripts&quot;&#13;&#10;-c &quot;set ENABLE_ACQUIRE 0&quot;&#13;&#10;&&CY_OPENOCD_CM0_FLAG&&-c &quot;source [find interface/kitprog3.cfg]&quot;&#13;&#10;-c &quot;puts stderr {Started by GNU MCU Eclipse}&quot;&#13;&#10;-c &quot;source [find target/&&CY_OPENOCD_CFG&&]&quot;&#13;&#10;-c &quot;&&CY_OPENOCD_CHIP&&.cpu.cm4 configure -rtos auto -rtos-wipe-on-reset-halt 1&quot;&#13;&#10;&&CY_OPENOCD_PORT_SELECT&&"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value="flushregs&#13;&#10;mon gdb_sync&#13;&#10;stepi"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="run"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="&&CY_SVD_PATH&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="&&CY_PROG_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="&&CY_SYM_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="&&CY_SYM_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="&&CY_APPNAME&&"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/&&CY_APPNAME&&"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/eclipse/Debug (JLink).xml

@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<stringAttribute key="com.cypress.studio.launch.mode" value="debug"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="false"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value="2"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="swd"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="&&CY_JLINK_CFG_DEBUG&&"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="auto"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2334"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun -strict -timeout 0 -nogui"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2335"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2336"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="auto"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value="monitor reset 0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value="2"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="&&CY_SVD_PATH&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value="&&CY_PROG_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2334"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="&&CY_SYM_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="&&CY_SYM_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="&&CY_APPNAME&&"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/&&CY_APPNAME&&"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
+<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/eclipse/Debug (KitProg3).xml

@@ -0,0 +1,61 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<stringAttribute key="com.cypress.studio.launch.mode" value="debug"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off&#13;&#10;set remotetimeout 15"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-s &quot;${openocd_path}/../scripts&quot;&#13;&#10;-s &quot;&&CY_QSPI_CFG_PATH&&&quot;&#13;&#10;-c &quot;source [find interface/kitprog3.cfg]&quot;&#13;&#10;&&CY_OPENOCD_CM0_FLAG&&-c &quot;puts stderr {Started by GNU MCU Eclipse}&quot;&#13;&#10;-c &quot;source [find target/&&CY_OPENOCD_CFG&&]&quot;&#13;&#10;-c &quot;&&CY_OPENOCD_CHIP&&.cpu.cm4 configure -rtos auto -rtos-wipe-on-reset-halt 1&quot;&#13;&#10;&&CY_OPENOCD_PORT_SELECT&&-c &quot;psoc6 sflash_restrictions 1&quot;&#13;&#10;-c &quot;init; reset init&quot;"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value="&&CY_OPENOCD_OTHER_RUN_CMD&&flushregs&#13;&#10;mon gdb_sync&#13;&#10;stepi"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="&&CY_OPENOCD_SECOND_RESET&&"/>
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+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
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+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value="&&CY_SYM_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="true"/>
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
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+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="&&CY_APPNAME&&"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/&&CY_APPNAME&&"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
+<listEntry value="org.eclipse.debug.ui.launchGroup.debug"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/eclipse/Erase (JLink).xml

@@ -0,0 +1,78 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+<booleanAttribute key="com.cypress.studio.launch.hide" value="true"/>
+<stringAttribute key="com.cypress.studio.launch.mode" value="run"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="false"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="swd"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="&&CY_JLINK_CFG_PROGRAM&&"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="auto"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
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+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
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+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="&&CY_APPNAME&&"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="false"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/&&CY_APPNAME&&"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/eclipse/Erase (KitProg3).xml

@@ -0,0 +1,59 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<booleanAttribute key="com.cypress.studio.launch.hide" value="true"/>
+<stringAttribute key="com.cypress.studio.launch.mode" value="run"/>
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+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="false"/>
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+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value=""/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
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+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
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+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
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+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="&&CY_APPNAME&&"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/&&CY_APPNAME&&"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/eclipse/Program (JLink).xml

@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
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+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="&&CY_PROG_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="&&CY_APPNAME&&"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/&&CY_APPNAME&&"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
+<listEntry value="org.eclipse.debug.ui.launchGroup.run"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/eclipse/Program (KitProg3).xml

@@ -0,0 +1,61 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.openocd.launchConfigurationType">
+<stringAttribute key="com.cypress.studio.launch.mode" value="run"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doContinue" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doFirstReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doSecondReset" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbCLient" value="false"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
+<booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.enableSemihosting" value="false"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="${openocd_path}/${openocd_executable}"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerOther" value="-s &quot;${openocd_path}/../scripts&quot;&#13;&#10;-s &quot;&&CY_QSPI_CFG_PATH&&&quot;&#13;&#10;-c &quot;source [find interface/kitprog3.cfg]&quot;&#13;&#10;&&CY_OPENOCD_CM0_FLAG&&-c &quot;source [find target/&&CY_OPENOCD_CFG&&]&quot;&#13;&#10;-c &quot;psoc6 sflash_restrictions 1&quot;&#13;&#10;-c &quot;if [catch {program &&CY_PROG_FILE&&} ] { echo {** Program operation failed **} } else { echo {** Program operation completed successfully **} }&quot;&#13;&#10;-c &quot;reset_config srst_only;reset run;&&CY_OPENOCD_CHIP&&.dap dpreg 0x04 0x00;shutdown&quot;"/>
+<intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.openocd.secondResetType" value="run"/>
+<stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="&&CY_SVD_PATH&&"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU OpenOCD"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="false"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cy_tools_path:gcc-7.2.1}/bin/arm-none-eabi-gdb"/>
+<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="&&CY_PROG_FILE&&"/>
+<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="&&CY_APPNAME&&"/>
+<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+<listEntry value="/&&CY_APPNAME&&"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+<listEntry value="4"/>
+</listAttribute>
+<listAttribute key="org.eclipse.debug.ui.favoriteGroups">
+<listEntry value="org.eclipse.debug.ui.launchGroup.run"/>
+</listAttribute>
+</launchConfiguration>

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/gdbinit

@@ -0,0 +1,32 @@
+# CM4 port
+target remote:3333
+
+# Open all memory
+set mem inaccessible-by-default off
+
+# Enable semihosting
+monitor arm semihosting enable
+
+# Load the executable
+# load <LOCATION OF ELF FILE>
+
+# Reset device
+monitor reset run
+
+# Halt device
+monitor halt
+
+# Reset device via dedicated reset method
+monitor psoc6 reset_halt sysresetreq
+flushregs
+mon gdb_sync
+stepi
+
+# Set temporary breakpoint at main
+tbreak main
+
+# Print registers
+monitor reg
+
+# Continue program execution
+continue

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/gdbinit_secure

@@ -0,0 +1,34 @@
+# CM4 port
+target remote:3333
+
+# Open all memory
+set mem inaccessible-by-default off
+
+# Target acquisition timeout
+set remotetimeout 15
+
+# Enable semihosting
+monitor arm semihosting enable
+
+# Load the executable
+# load <LOCATION OF ELF FILE>
+
+# Reset device
+monitor reset init
+
+# Halt device
+monitor halt
+
+# Synchronize client and server
+flushregs
+mon gdb_sync
+stepi
+
+# Set temporary breakpoint at main
+tbreak main
+
+# Print registers
+monitor reg
+
+# Continue program execution
+continue

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/genresources.bash

@@ -0,0 +1,177 @@
+#!/bin/bash 
+(set -o igncr) 2>/dev/null && set -o igncr; # this comment is required
+set -$-ue${DEBUG+x}
+
+#######################################################################################################################
+# This script is designed to process resource files that are necessary for a single component. It converts each
+# resource file into a binary object and then stores that into an array in a .c file. The .c file can then be compiled
+# with and linked into an application image.
+#
+# Once all resources files have been converted it will generate a header file that references each of them.
+#
+# usage:
+#	genresources.bash <RECIPE_DIR> <SCRIPTS_DIR> <RESOURCE_FILE> <PROJECT_DIR> <TARGET_DIR> <FILESYSTEM|MEM> [s]
+#
+#######################################################################################################################
+
+RECIPE_DIR=$1				#eg: ./tools
+RESOURCE_FILE=$2		    #eg: ./generated/temp.cyrsc
+PROJECT_DIR=$3				#eg: ./project_mainapp
+TARGET_DIR=$4				#eg: ./project_resources
+RESOURCE_TYPE=$5			#eg: FILESYSTEM or MEM
+
+echo Script: genresources.bash
+echo "    1: Recipe Dir     : '"$RECIPE_DIR"'"
+echo "    3: Resource Files : '"$RESOURCE_FILE"'"
+echo "    4: Project Dir    : '"$PROJECT_DIR"'"
+echo "    5: Target Dir     : '"$TARGET_DIR"'"
+echo "    6: Resource Type  : '"$RESOURCE_TYPE"'"
+
+#
+# File in the target directory
+#
+RES_FILE="$TARGET_DIR/cy_resources.h"
+
+# array of c source files parsed for declarations to generate resources.h
+declare SOURCE_ARRAY=()
+
+#
+# Print nice error messages
+#
+function error() {
+    echo "ERROR: $1"
+    shift
+
+    while (( $# > 0 )); do
+        echo "     : $1:"
+        shift
+    done
+
+    echo "—ABORTING--"
+    exit 1
+}
+
+#
+# Checks if the value $1 is in the array $element
+#
+array_contains () {
+    local seeking=$1; shift
+    local in=0
+    for element; do
+        if [[ $element == $seeking ]]; then
+            in=1
+            break
+        fi
+    done
+    echo $in
+}
+
+#
+# Prepares the resource file for outputing as c-file
+#
+convert_resource_name() {
+    local input=$1
+    local result=${input//\//_DIR_} #replace '/' with '_DIR_'
+    result=${result//./_} #replace '.' with '_'
+    result=${result//-/_} #replace '-' with '_'
+    result=${result//resources_DIR/resources} #replace 'resources_DIR' with 'resources'
+    echo $result
+}
+
+#
+# Process the resources listed in the .cyrsc file by converting them to .c and creating
+# a list of files for the resource header script
+#
+processResources() {
+    local TEXT_FILTERS=(html htm txt eml js css dat cer pem json xml py key)
+    local BINARY_FILTERS=(jpg jpeg png ico gif bin flac wav clm_blob gz mp3 wmfw)
+
+    local TEXT_TO_RES="$RECIPE_DIR/text_to_resource_c.pl"
+    local BIN_TO_RES="$RECIPE_DIR/bin_to_resource_c.pl"
+
+    local resourceList=($(<$1))
+    
+    # Parse through each element in the .cyrsc file
+    for ((i = 0; i < ${#resourceList[@]}; i++)); do
+
+        # Evaluate the file
+        local resourceFile="${resourceList[$i]}"
+        local filename="${resourceFile##*/}"
+        local extension="${filename##*.}"
+
+        # only process the file if it exists
+        if [ -f "$resourceFile" ]; then
+
+            local resourceName=$(convert_resource_name "$resourceFile")
+            local outputFile="$TARGET_DIR/$(convert_resource_name $filename).c"
+
+            SOURCE_ARRAY+=("$TARGET_DIR/$(convert_resource_name $filename).c")
+
+            local script
+            local isText=$(array_contains $extension "${TEXT_FILTERS[@]}")
+            if [ "1" == "$isText" ]; then
+                script=$TEXT_TO_RES
+            fi
+
+            local isBinary=$(array_contains $extension "${BINARY_FILTERS[@]}")
+            if [ "1" == "$isBinary" ]; then
+                script=$BIN_TO_RES
+            fi
+
+            local outputFileTmp="$TARGET_DIR/$(convert_resource_name $filename).c"
+            perl "$script" "$RESOURCE_TYPE" "$resourceName" "$resourceFile" > "$outputFileTmp"
+        else
+            error  "Listed resource $resourceFile does not exist"
+        fi
+    done
+}
+
+#
+# Remove stale files from previous run
+#
+cleanStale() {
+    local staleList=($(find $TARGET_DIR -name "*.c"))
+    local resourceList=($(<$1))
+    local fileFound=0
+
+    for ((j = 0; j < ${#staleList[@]}; j++)); do
+        for ((i = 0; i < ${#resourceList[@]}; i++)); do
+            local file="${resourceList[$i]}"
+            local filename="${file##*/}"
+            local outputFile="$TARGET_DIR/$(convert_resource_name $filename).c"
+
+            if [[  $(basename $outputFile) ==  $(basename "${staleList[$j]}") ]]; then
+                fileFound=1
+            fi
+        done
+        if [[ $fileFound == 0 ]]; then
+            rm -rf "${staleList[$j]}"
+        fi
+        fileFound=0
+    done
+}
+
+#
+# Call the perl script that creates resources.h
+#
+generateResourceHeader() {
+    perl "$RECIPE_DIR/resources_header.pl" ${SOURCE_ARRAY[*]} > "$RES_FILE"
+}
+
+#######################################################################################################################
+
+#
+# Clean files from previous run that aren't in the current list
+#
+cleanStale $RESOURCE_FILE
+
+#
+# Process all the resources in the cyrsc file
+#
+processResources $RESOURCE_FILE
+
+#
+# Create the resource header
+#
+generateResourceHeader
+

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/memcalc.bash

@@ -0,0 +1,78 @@
+#!/bin/bash 
+(set -o igncr) 2>/dev/null && set -o igncr; # this comment is required
+set -$-ue${DEBUG+xv}
+
+#######################################################################################################################
+# This script processes the memory consumption of an application and prints it out to the console.
+#
+# usage:
+#	memcalc.bash <READELFFILE> <AVAILABLEFLASH> <AVAILABLESRAM> <STARTFLASH> <STARTSRAM>
+#
+#######################################################################################################################
+
+READELFFILE=$1              # file location of readelf output
+AVAILABLEFLASH=$2           # Max available internal flash
+AVAILABLESRAM=$3            # Max available internal SRAM
+STARTFLASH=$4               # Start of internal flash
+STARTSRAM=$5                # Start of internal SRAM
+
+ENDFLASH=$((STARTFLASH + AVAILABLEFLASH))
+ENDSRAM=$((STARTSRAM + AVAILABLESRAM))
+
+# Gather the numbers
+memcalc() {
+    local internalFlash=0
+    local internalSram=0
+
+    printf "   -------------------------------------------------- \n"
+    printf "  | %-20s |  %-10s   |  %-8s | \n" 'Section Name' 'Address' 'Size'
+    printf "   -------------------------------------------------- \n"
+
+    while IFS=$' \t\n\r' read -r line; do
+        local lineArray=($line)
+        local numElem=${#lineArray[@]}
+        
+        # Only look at potentially valid lines
+        if [[ $numElem -ge 6 ]]; then
+            # Section headers
+            if [[ ${lineArray[0]} == "["* ]]; then
+                local sectionElement=NULL
+                local addrElement=00000000
+                local sizeElement=000000
+                for (( idx = 0 ; idx <= $numElem-4 ; idx = $idx+1 ));
+                do
+                    if [[ ${lineArray[$idx]} == *"]" ]]; then
+                        sectionElement=${lineArray[$idx+1]}
+                    fi
+                    # Look for regions with SHF_ALLOC = A
+                    if [[ ${#lineArray[idx]} -eq 8 ]] && [[ ${#lineArray[idx+1]} -eq 6 ]] && [[ ${#lineArray[idx+2]} -eq 6 ]] \
+                       && [[ ${lineArray[$idx+4]} == *"A"* ]] ; then
+                        addrElement=${lineArray[$idx]}
+                        sizeElement=${lineArray[$idx+2]}
+                    fi
+                done
+                # Only consider non-zero size sections
+                if [[ $addrElement != "00000000" ]]; then
+                    printf "  | %-20s |  0x%-10s |  %-8s | \n" $sectionElement $addrElement $((16#$sizeElement))
+                    # Use the section headers for SRAM tally
+                    if [[ "0x$addrElement" -ge "$STARTSRAM" ]] && [[ "0x$addrElement" -lt "$ENDSRAM" ]]; then
+                        internalSram=$((internalSram+$((16#$sizeElement))))
+                    fi
+                fi
+            # Program headers
+            elif [[ ${lineArray[1]} == "0x"* ]] && [[ ${lineArray[2]} == "0x"* ]] && [[ ${lineArray[3]} == "0x"* ]] && [[ ${lineArray[4]} == "0x"* ]]\
+                && [[ ${lineArray[3]} -ge "$STARTFLASH" ]] && [[ ${lineArray[3]} -lt "$ENDFLASH" ]]; then
+                # Use the program headers for Flash tally
+                internalFlash=$((internalFlash+${lineArray[4]}))
+            fi
+        fi
+    done < "$READELFFILE"
+
+    printf "   -------------------------------------------------- \n\n"
+    printf "  %-41s %-8s \n" 'Total Internal Flash (Available)' $AVAILABLEFLASH
+    printf "  %-41s %-8s \n\n" 'Total Internal Flash (Utilized)' $internalFlash
+    printf "  %-41s %-8s \n" 'Total Internal SRAM (Available)' $AVAILABLESRAM
+    printf "  %-41s %-8s \n" 'Total Internal SRAM (Utilized)' $internalSram
+}
+
+memcalc

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/resources_header.pl

@@ -0,0 +1,83 @@
+#!/usr/bin/perl
+
+#
+# Copyright 2019, Cypress Semiconductor Corporation or a subsidiary of
+# Cypress Semiconductor Corporation. All Rights Reserved.
+#
+# This software, including source code, documentation and related
+# materials ("Software"), is owned by Cypress Semiconductor Corporation
+# or one of its subsidiaries ("Cypress") and is protected by and subject to
+# worldwide patent protection (United States and foreign),
+# United States copyright laws and international treaty provisions.
+# Therefore, you may use this Software only as provided in the license
+# agreement accompanying the software package from which you
+# obtained this Software ("EULA").
+# If no EULA applies, Cypress hereby grants you a personal, non-exclusive,
+# non-transferable license to copy, modify, and compile the Software
+# source code solely for use in connection with Cypress's
+# integrated circuit products. Any reproduction, modification, translation,
+# compilation, or representation of this Software except as specified
+# above is prohibited without the express written permission of Cypress.
+#
+# Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress
+# reserves the right to make changes to the Software without notice. Cypress
+# does not assume any liability arising out of the application or use of the
+# Software or any product or circuit described in the Software. Cypress does
+# not authorize its products for use in any products where a malfunction or
+# failure of the Cypress product may reasonably be expected to result in
+# significant property damage, injury or death ("High Risk Product"). By
+# including Cypress's product in a High Risk Product, the manufacturer
+# of such system or application assumes all risk of such use and in doing
+# so agrees to indemnify Cypress against all liability.
+#
+
+if (! $ARGV[0] )
+{
+    print "Usage ./resources_header.pl  <C file 1> <C file 2> ...";
+    exit;
+}
+
+print "/* Auto-generated header file. Do not edit */\n";
+print "\n";
+print "#pragma once\n";
+print "\n";
+print "#include <stdint.h>\n";
+print "#include \"cy_abs_resource.h\"\n";
+print "\n";
+print "#ifdef __cplusplus\n";
+print "extern \"C\" {\n";
+print "#endif\n";
+print "\n";
+
+
+my $mem_resources = "";
+my $filesystem_resources = "";
+
+foreach $file (@ARGV)
+{
+    #open the file
+    open INFILE, $file or die "cant open " . $file;
+
+    @file_cont_array = <INFILE>;
+    close INFILE;
+    $file_cont = join('',@file_cont_array);
+
+    while ( $file_cont =~ m/(const cy_resource_handle_t \S+)/sgi )
+    {
+        $resources .= "extern $1;\n";
+    }
+    while ( $file_cont =~ m/(const uint8_t \S+\[\d+\])/sgi )
+    {
+        $resources .= "extern $1;\n";
+    }
+}
+
+print "\n";
+print "$resources";
+print "\n";
+print "/* @} */\n";
+print "#ifdef __cplusplus\n";
+print "} /*extern \"C\" */\n";
+print "#endif\n";

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/text_to_resource_c.pl

@@ -0,0 +1,132 @@
+#!/usr/bin/perl
+
+#
+# Copyright 2019, Cypress Semiconductor Corporation or a subsidiary of
+# Cypress Semiconductor Corporation. All Rights Reserved.
+#
+# This software, including source code, documentation and related
+# materials ("Software"), is owned by Cypress Semiconductor Corporation
+# or one of its subsidiaries ("Cypress") and is protected by and subject to
+# worldwide patent protection (United States and foreign),
+# United States copyright laws and international treaty provisions.
+# Therefore, you may use this Software only as provided in the license
+# agreement accompanying the software package from which you
+# obtained this Software ("EULA").
+# If no EULA applies, Cypress hereby grants you a personal, non-exclusive,
+# non-transferable license to copy, modify, and compile the Software
+# source code solely for use in connection with Cypress's
+# integrated circuit products. Any reproduction, modification, translation,
+# compilation, or representation of this Software except as specified
+# above is prohibited without the express written permission of Cypress.
+#
+# Disclaimer: THIS SOFTWARE IS PROVIDED AS-IS, WITH NO WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, NONINFRINGEMENT, IMPLIED
+# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress
+# reserves the right to make changes to the Software without notice. Cypress
+# does not assume any liability arising out of the application or use of the
+# Software or any product or circuit described in the Software. Cypress does
+# not authorize its products for use in any products where a malfunction or
+# failure of the Cypress product may reasonably be expected to result in
+# significant property damage, injury or death ("High Risk Product"). By
+# including Cypress's product in a High Risk Product, the manufacturer
+# of such system or application assumes all risk of such use and in doing
+# so agrees to indemnify Cypress against all liability.
+#
+
+if (! $ARGV[0] )
+{
+    print "Usage ./text_to_resource__c.pl  <MEM|FILESYS> <variable name> <text file>";
+    exit;
+}
+
+# Print start of output
+my $location = shift @ARGV;
+my $variable_name = shift @ARGV;
+my $original_variable_name = $variable_name;
+my $file = shift @ARGV;
+
+#open the file
+open INFILE, "<:raw", $file or die "cant open " . $file;
+@file_cont_array = <INFILE>;
+close INFILE;
+$file_cont = join('',@file_cont_array);
+
+
+print "#include \"cy_abs_resource.h\"\n";
+print "\n";
+
+my $pos = 0;
+
+if ( ( $file =~ m/\.html$/sgi ) ||
+     ( $file =~ m/\.txt$/sgi ) )
+{
+  while ( $file_cont =~ s/^(.*?)\r?\n?\<WICED\:section\s+suffix=\"(\S+)\"\s*\/\>\r?\n?(.*)$/$3/sgi )
+  {
+    my $substr = $1;
+    my $variable_suffix = $2;
+    my $nextpos = $-[3];
+
+    print "\n";
+    if ( $location ne "MEM" )
+    {
+        $name = $file;
+        $name=~s/^.+\/(.*?)/$1/;
+        print "const cy_resource_handle_t ${variable_name} = { CY_RESOURCE_IN_FILESYSTEM, " . (length( $substr )) . ", { .fs = { $pos, \"$name\" }}};\n";
+        print "\n";
+    }
+    else
+    {
+        print "const uint8_t ${variable_name}_data[" . (length( $substr )+1) . "] = ";
+        my $section_length = length( $substr );
+        while ( $substr =~ s/^(.*?\n)(.*)$/$2/sgi )
+        {
+            print "\"" . escape_string( $1 ) . "\" \\\n";
+        }
+        print "\"" . escape_string( $substr ) . "\";\n";
+
+        print "const cy_resource_handle_t ${variable_name} = { CY_RESOURCE_IN_MEMORY, $section_length, { .mem_data = ${variable_name}_data}};";
+        print "\n";
+    }
+
+    $variable_name = $original_variable_name . $variable_suffix;
+    $pos += $nextpos;
+  }
+}
+
+if ( $location ne "MEM" )
+{
+    print "\n";
+    $name = $file;
+    $name=~s/^.+\/(.*?)/$1/;
+    print "const cy_resource_handle_t ${variable_name} = { CY_RESOURCE_IN_FILESYSTEM, " . (length( $file_cont )) . ", { .fs = { $pos, \"$name\" }}};\n";
+    print "\n";
+}
+else
+{
+    print "const uint8_t ${variable_name}_data[" . (length( $file_cont ) + 1) . "] = ";
+    my $section_length = length( $file_cont );
+    while ( $file_cont =~ s/^(.*?\n)(.*)$/$2/sgi )
+    {
+        print "\"" . escape_string( $1 ) . "\" \\\n";
+    }
+    print "\"" . escape_string( $file_cont ) . "\";\n";
+    print "const cy_resource_handle_t ${variable_name} = { CY_RESOURCE_IN_MEMORY, $section_length, { .mem_data = ${variable_name}_data }};";
+    print "\n";
+}
+
+sub escape_string( $escstring )
+{
+  my $escstring = shift;
+  # Escape characters for C string
+  $escstring =~ s/\\/\\\\/sgi; # backslash
+  $escstring =~ s/\a/\\a/sgi;  # bell
+  $escstring =~ s/\x8/\\b/sgi; # backspace
+  $escstring =~ s/\f/\\f/sgi;  # formfeed
+  $escstring =~ s/\n/\\n/sgi;  # linefeed
+  $escstring =~ s/\r/\\r/sgi;  # carriage return
+  $escstring =~ s/\t/\\t/sgi;  # tab
+  $escstring =~ s/\xB/\\v/sgi; # vertical tab
+  $escstring =~ s/\'/\\'/sgi;  # single quote
+  $escstring =~ s/\"/\\"/sgi;  # double quote
+  return $escstring;
+}

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/vscode/c_cpp_properties_GCC_ARM.json

@@ -0,0 +1,71 @@
+{
+    "configurations": [
+        {
+            "name": "Win32",
+            "includePath": [
+	        &&JSONINCLUDELIST&&
+                "&&MODUSTOOLCHAIN&&/lib/gcc/arm-none-eabi/&&MODUSTOOLCHAINVERSION&&/include",
+                "&&MODUSTOOLCHAIN&&/lib/gcc/arm-none-eabi/&&MODUSTOOLCHAINVERSION&&/include-fixed",
+                "&&MODUSTOOLCHAIN&&/arm-none-eabi/include",
+                "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&",
+                "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&/arm-none-eabi/thumb/v7e-m/fpv4-sp/hard",
+                "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&/backward"
+            ],
+            "browse": {
+                "path": [
+	            &&JSONINCLUDELIST&&
+                    "&&MODUSTOOLCHAIN&&/lib/gcc/arm-none-eabi/&&MODUSTOOLCHAINVERSION&&/include",
+                    "&&MODUSTOOLCHAIN&&/lib/gcc/arm-none-eabi/&&MODUSTOOLCHAINVERSION&&/include-fixed",
+                    "&&MODUSTOOLCHAIN&&/arm-none-eabi/include",
+                    "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&",
+                    "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&/arm-none-eabi/thumb/v7e-m/fpv4-sp/hard",
+                    "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&/backward"
+                ],
+                "limitSymbolsToIncludedHeaders": true,
+                "databaseFilename": ""
+            },
+            "defines": [
+	      &&JSONDEFINELIST&&
+		"EMPTY_ENTRY"
+            ],
+            "intelliSenseMode": "clang-x64",
+            "compilerPath": "&&MODUSTOOLCHAIN&&/bin/arm-none-eabi-gcc.exe -mcpu=cortex-m4 -mthumb -mfloat-abi=soft",
+            "cStandard": "c99",
+            "cppStandard": "c++11"
+        },
+        {
+            "name": "macOS",
+            "includePath": [
+	        &&JSONINCLUDELIST&&
+                "&&MODUSTOOLCHAIN&&/lib/gcc/arm-none-eabi/&&MODUSTOOLCHAINVERSION&&/include",
+                "&&MODUSTOOLCHAIN&&/lib/gcc/arm-none-eabi/&&MODUSTOOLCHAINVERSION&&/include-fixed",
+                "&&MODUSTOOLCHAIN&&/arm-none-eabi/include",
+                "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&",
+                "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&/arm-none-eabi/thumb/v7e-m/fpv4-sp/hard",
+                "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&/backward"
+            ],
+            "browse": {
+                "path": [
+	            &&JSONINCLUDELIST&&
+                    "&&MODUSTOOLCHAIN&&/lib/gcc/arm-none-eabi/&&MODUSTOOLCHAINVERSION&&/include",
+                    "&&MODUSTOOLCHAIN&&/lib/gcc/arm-none-eabi/&&MODUSTOOLCHAINVERSION&&/include-fixed",
+                    "&&MODUSTOOLCHAIN&&/arm-none-eabi/include",
+                    "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&",
+                    "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&/arm-none-eabi/thumb/v7e-m/fpv4-sp/hard",
+                    "&&MODUSTOOLCHAIN&&/arm-none-eabi/include/c++/&&MODUSTOOLCHAINVERSION&&/backward"
+                ],
+                "limitSymbolsToIncludedHeaders": true,
+                "databaseFilename": ""
+            },
+            "defines": [
+	        &&JSONDEFINELIST&&
+		  "EMPTY_ENTRY"
+            ],
+            "intelliSenseMode": "clang-x64",
+            "compilerPath": "&&MODUSTOOLCHAIN&&/bin/arm-none-eabi-gcc.exe -mcpu=cortex-m4 -mthumb -mfloat-abi=soft",
+            "cStandard": "c99",
+            "cppStandard": "c++11"
+        }            
+    ],
+    "version": 4
+}

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/vscode/launch.json

@@ -0,0 +1,138 @@
+{
+    "version": "0.2.0",
+    "configurations": [
+        {
+            "name": "Launch PSoC6 CM4 (OpenOCD)",
+            "type": "cortex-debug",
+            "request": "launch",
+            "cwd": "${workspaceRoot}",
+            "executable": "&&DEBUGTARGET&&",
+            "servertype": "openocd",
+            "searchDir": [
+                "${workspaceRoot}",
+                "&&MODUSOPENCOD&&/scripts/"
+            ],
+            "configFiles": [
+                "openocd.tcl"
+            ],
+            "overrideLaunchCommands": [
+                "set mem inaccessible-by-default off",
+                "-enable-pretty-printing",
+                "monitor reset init",
+                "-target-download",             // Comment this out if you don't want to reload program
+                "monitor reset run",
+                "monitor sleep 200",
+                "monitor psoc6 reset_halt sysresetreq"
+            ],
+            "postStartSessionCommands": [       // Needed if runToMain is false
+                /*
+                // Following two commands are needed to get gdb and openocd and HW all in sync.
+                // Or, execution context (PC, stack, registers, etc.) look like they are from before reset.
+                // The stepi, is a pretend instruction that does not actually do a stepi, but MUST be done
+                // Its a documented workaround in openocd. Do a 'monitor help' to see more info
+                //
+                // An alternative command to use is "continue" instead of the following two
+                */
+                "monitor gdb_sync",
+                "stepi"
+            ],
+            "overrideRestartCommands": [
+                "monitor reset init",
+                "monitor reset run",
+                "monitor sleep 200",
+                "monitor psoc6 reset_halt sysresetreq"
+            ],
+            "postRestartSessionCommands": [
+                "monitor gdb_sync",
+                "stepi"
+            ],
+            // svdFile is optional, it can be very large.
+            "svdFile": "&&SVDFILENAME&&",
+            "runToMain": true,          // if true, program will halt at main. Not used for a restart
+            "preLaunchTask": "",        // Set this to run a task from tasks.json before starting a debug session
+            "showDevDebugOutput": false,// Shows output of GDB, helpful when something is not working right
+        },
+        // When using 'attach', make sure your program is running on the board and that your executable matches
+        // the image in the chip exactly, or else strange things can happen with breakpoint, variables, etc.
+        {
+            "name": "Attach PSoC6 CM4 (OpenOCD)",
+            "type": "cortex-debug",
+            "request": "attach",
+            "cwd": "${workspaceRoot}",
+            "executable": "&&DEBUGTARGET&&",
+            "servertype": "openocd",
+            "searchDir": [
+                "${workspaceRoot}",
+                "&&MODUSOPENCOD&&/scripts/"
+            ],
+            "openOCDPreConfigLaunchCommands": [
+                "set ENABLE_ACQUIRE 0"
+            ],
+            "configFiles": [
+                "openocd.tcl"
+            ],
+            "overrideAttachCommands": [
+                "set mem inaccessible-by-default off",
+                "-enable-pretty-printing",
+                "monitor halt"
+            ],
+            "overrideRestartCommands": [
+                "monitor reset init",
+                "monitor reset run",
+                "monitor sleep 200",
+                "monitor psoc6 reset_halt sysresetreq"
+            ],
+            "postRestartSessionCommands": [
+                "monitor gdb_sync",
+                "stepi"
+            ],
+            // svdFile is optional, it can be very large.
+            "svdFile": "&&SVDFILENAME&&",
+            "showDevDebugOutput": false,// Shows output of GDB, helpful when something is not working right
+        },
+        {
+            "name": "Erase (OpenOCD)",
+            "type": "cortex-debug",
+            "request": "launch",
+            "cwd": "${workspaceRoot}",
+            "executable": "&&DEBUGTARGET&&",
+            "servertype": "openocd",
+            "searchDir": [
+                "${workspaceRoot}",
+                "&&MODUSOPENCOD&&/scripts/"
+            ],
+            "configFiles": [
+                "openocd.tcl"
+            ],
+            "overrideLaunchCommands": [
+                "monitor reset init",
+                "monitor psoc6 sflash_restrictions 1",
+                "monitor erase_all",
+                "-gdb-exit"
+            ]
+        },
+        {
+            "name": "Program (OpenOCD)",
+            "type": "cortex-debug",
+            "request": "launch",
+            "cwd": "${workspaceRoot}",
+            "executable": "&&DEBUGTARGET&&",
+            "servertype": "openocd",
+            "searchDir": [
+                "${workspaceRoot}",
+                "&&MODUSOPENCOD&&/scripts/"
+            ],
+            "configFiles": [
+                "openocd.tcl"
+            ],
+            "overrideLaunchCommands": [
+                "monitor psoc6 sflash_restrictions 1",
+                "monitor program {&&DEBUGTARGET&&}",
+                "monitor reset_config srst_only",
+                "monitor reset run",
+                "monitor psoc6.dap dpreg 0x04 0x00",
+                "-gdb-exit"
+            ],
+        }
+    ]
+}

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/vscode/openocd.tcl

@@ -0,0 +1,4 @@
+source [find interface/kitprog3.cfg]
+source [find target/&&OPENOCDFILE&&]
+${TARGET}.cm0 configure -gdb-port disabled
+${TARGET}.cm4 configure -rtos auto -rtos-wipe-on-reset-halt 1

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/vscode/settings.json

@@ -0,0 +1,5 @@
+{
+    "cortex-debug.armToolchainPath": "&&MODUSTOOLCHAIN&&/bin",
+    "cortex-debug.openocdPath": "&&MODUSOPENCOD&&/bin/openocd",
+    "cortex-debug.JLinkGDBServerPath": "",
+}

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/scripts/vscode/tasks.json

@@ -0,0 +1,325 @@
+{
+    // See https://go.microsoft.com/fwlink/?LinkId=733558
+    // for the documentation about the tasks.json format
+    "version": "2.0.0",
+    "tasks": [
+        {
+            "label": "GetLibs",
+            "type": "shell",
+            "windows" : {
+                "command": "&&MODUSSHELL&&/bin/bash.exe" ,
+                "args": [
+                    "--norc",
+                    "-c",
+                    "export PATH=/bin:/usr/bin ; &&MODUSSHELL&&/bin/make.exe getlibs"
+                ]
+            },
+            "linux" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make getlibs"
+                ]
+            },
+            "osx" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make getlibs"
+                ]
+            },            
+            "problemMatcher": []
+        },
+        {
+            "label": "Refresh",
+            "type": "shell",
+            "windows" : {
+                "command": "&&MODUSSHELL&&/bin/bash.exe" ,
+                "args": [
+                    "--norc",
+                    "-c",
+                    "export PATH=/bin:/usr/bin ; &&MODUSSHELL&&/bin/make.exe vscode"
+                ]
+            },
+            "linux" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make vscode"
+                ]
+            },
+            "osx" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make vscode"
+                ]
+            },            
+            "problemMatcher": []
+        },        
+        {
+            "label": "Build Debug",
+            "type": "shell",
+
+            "windows" : {
+                "command": "&&MODUSSHELL&&/bin/bash.exe" ,
+                "args": [
+                    "--norc",
+                    "-c",
+                    "export PATH=/bin:/usr/bin ; &&MODUSSHELL&&/bin/make.exe -j CONFIG=Debug build"
+                ]
+            },
+            "linux" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Debug build"
+                ]
+            },
+            "osx" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Debug build"
+                ]
+            },             
+            "problemMatcher": "$gcc",
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }
+        },
+        {
+            "label": "Rebuild Debug",
+            "type": "shell",
+
+            "windows" : {
+                "command": "&&MODUSSHELL&&/bin/bash.exe" ,
+                "args": [
+                    "--norc",
+                    "-c",
+                    "export PATH=/bin:/usr/bin ; &&MODUSSHELL&&/bin/make.exe -j CONFIG=Debug clean ; &&MODUSSHELL&&/bin/make.exe -j CONFIG=Debug build"
+                ]
+            },
+            "linux" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Debug clean ; make -j CONFIG=Debug build"
+                ]
+            },
+            "osx" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Debug clean ; make -j CONFIG=Debug build"
+                ]
+            },             
+            "problemMatcher": "$gcc",
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }
+        },        
+        {
+            "label": "Clean Debug",
+            "type": "shell",
+
+            "windows" : {
+                "command": "&&MODUSSHELL&&/bin/bash.exe" ,
+                "args": [
+                    "--norc",
+                    "-c",
+                    "export PATH=/bin:/usr/bin ; &&MODUSSHELL&&/bin/make.exe -j CONFIG=Debug clean"
+                ]
+            },
+            "linux" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Debug clean"
+                ]
+            },
+            "osx" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Debug clean"
+                ]
+            },             
+            "problemMatcher": "$gcc",
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }
+        },        
+        {
+            "label": "Build Release",
+            "type": "shell",
+            "windows" : {
+                "command": "&&MODUSSHELL&&/bin/bash.exe" ,
+                "args": [
+                    "--norc",
+                    "-c",
+                    "export PATH=/bin:/usr/bin ; &&MODUSSHELL&&/bin/make.exe -j CONFIG=Release build"
+                ]
+            },
+            "linux" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Release build"
+                ]
+            },
+            "osx" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Release build"
+                ]
+            },              
+            "problemMatcher": "$gcc",
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }            
+        },
+        {
+            "label": "Rebuild Release",
+            "type": "shell",
+            "windows" : {
+                "command": "&&MODUSSHELL&&/bin/bash.exe" ,
+                "args": [
+                    "--norc",
+                    "-c",
+                    "export PATH=/bin:/usr/bin ; &&MODUSSHELL&&/bin/make.exe -j CONFIG=Release clean ; &&MODUSSHELL&&/bin/make.exe -j CONFIG=Release build"
+                ]
+            },
+            "linux" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Release clean ; make -j CONFIG=Release build"
+                ]
+            },
+            "osx" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Release clean ; make -j CONFIG=Release build"
+                ]
+            },              
+            "problemMatcher": "$gcc",
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }            
+        },        
+        {
+            "label": "Clean Release",
+            "type": "shell",
+            "windows" : {
+                "command": "&&MODUSSHELL&&/bin/bash.exe" ,
+                "args": [
+                    "--norc",
+                    "-c",
+                    "export PATH=/bin:/usr/bin ; &&MODUSSHELL&&/bin/make.exe -j CONFIG=Release clean"
+                ]
+            },
+            "linux" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Release clean"
+                ]
+            },
+            "osx" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make -j CONFIG=Release clean"
+                ]
+            },              
+            "problemMatcher": "$gcc",
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }            
+        },        
+        {
+            "label": "Base Configurator",
+            "type": "shell",
+            "windows" : {
+                "command": "&&MODUSSHELL&&/bin/bash.exe" ,
+                "args": [
+                    "--norc",
+                    "-c",
+                    "export PATH=/bin:/usr/bin ; &&MODUSSHELL&&/bin/make.exe config"
+                ]
+            },
+            "linux" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make config"
+                ]
+            },
+            "osx" : {
+                "command": "bash",
+                "args": [
+                    "--norc",
+                    "-c",
+                    "make config"
+                ]
+            },              
+            "problemMatcher": "$gcc"
+        },
+        {
+            "label": "Library Manager",
+            "type": "shell",
+            "windows" : {
+                "command": "&&MODUSLIBMANAGER&&/library-manager.exe",
+                "args" : [
+                    "-d",
+                    "${workspaceRoot}"
+                ]                
+            },
+            "linux" : {
+                "command": "&&MODUSLIBMANAGER&&/library-manager",
+                "args" : [
+                    "-d",
+                    "${workspaceRoot}"
+                ]                
+            },
+            "osx" : {
+                "command": "&&MODUSLIBMANAGER&&/library-manager -d  ${workspaceRoot}",
+                "args" : [
+                    "-d",
+                    "${workspaceRoot}"
+                ]
+            },              
+            "problemMatcher": "$gcc",
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }            
+        }                
+    ]
+}

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/toolchains/ARM.mk

@@ -0,0 +1,168 @@
+############################################################################### 
+# \file ARM.mk
+# \version 1.0
+#
+# \brief
+# ARM Compiler (Clang) toolchain configuration.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+#
+# The base path to the ARM Compiler (Clang) cross compilation executables
+#
+ifeq ($(CY_COMPILER_PATH),)
+CY_CROSSPATH=$(CY_COMPILER_ARM_DIR)/bin
+else
+CY_CROSSPATH=$(CY_COMPILER_PATH)/bin
+endif
+
+#
+# Build tools
+#
+CC=$(CY_CROSSPATH)/armclang
+CXX=$(CC)
+AS=$(CY_CROSSPATH)/armasm
+AR=$(CY_CROSSPATH)/armar
+LD=$(CY_CROSSPATH)/armlink
+
+#
+# DEBUG/NDEBUG selection
+#
+ifeq ($(CONFIG),Debug)
+CY_TOOLCHAIN_DEBUG_FLAG=-DDEBUG
+CY_TOOLCHAIN_OPTIMIZATION=-O1
+else 
+ifeq ($(CONFIG),Release)
+CY_TOOLCHAIN_DEBUG_FLAG=-DNDEBUG
+CY_TOOLCHAIN_OPTIMIZATION=-Oz
+else
+CY_TOOLCHAIN_DEBUG_FLAG=
+CY_TOOLCHAIN_OPTIMIZATION=
+endif
+endif
+
+#
+# Flags common to compile and link
+#
+CY_TOOLCHAIN_COMMON_FLAGS=--target=arm-arm-none-eabi
+
+#
+# CPU core specifics
+#
+ifeq ($(CORE),CM0P)
+CY_TOOLCHAIN_CFLAGS_CORE=-mcpu=cortex-m0plus
+CY_TOOLCHAIN_FLAGS_CORE=--cpu=Cortex-M0plus
+CY_TOOLCHAIN_VFP_FLAGS=
+else
+CY_TOOLCHAIN_CFLAGS_CORE=-mcpu=cortex-m4
+CY_TOOLCHAIN_FLAGS_CORE=--cpu=Cortex-M4
+ifeq ($(VFP_SELECT),hardfp)
+CY_TOOLCHAIN_VFP_CFLAGS=-mfloat-abi=hard -mfpu=fpv4-sp-d16
+CY_TOOLCHAIN_VFP_FLAGS=--fpu=FPv4-SP
+else
+CY_TOOLCHAIN_VFP_CFLAGS=-mfloat-abi=softfp -mfpu=fpv4-sp-d16
+CY_TOOLCHAIN_VFP_FLAGS=--fpu=SoftVFP+FPv4-SP
+endif
+endif
+
+#
+# Command line flags for c-files
+#
+CY_TOOLCHAIN_CFLAGS=\
+	-c\
+	$(CY_TOOLCHAIN_CFLAGS_CORE)\
+	$(CY_TOOLCHAIN_OPTIMIZATION)\
+	$(CY_TOOLCHAIN_VFP_CFLAGS)\
+	$(CY_TOOLCHAIN_COMMON_FLAGS)\
+	-g\
+	-fshort-enums\
+	-fshort-wchar
+
+#
+# Command line flags for cpp-files
+#
+CY_TOOLCHAIN_CXXFLAGS=$(CY_TOOLCHAIN_CFLAGS)
+
+#
+# Command line flags for s-files
+#
+CY_TOOLCHAIN_ASFLAGS=\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_VFP_FLAGS)
+
+#
+# Command line flags for linking
+#
+CY_TOOLCHAIN_LDFLAGS=\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_VFP_FLAGS)\
+	--info=totals\
+	--stdlib=libc++
+
+#
+# Command line flags for archiving
+#
+CY_TOOLCHAIN_ARFLAGS=-rvs
+
+#
+# Toolchain-specific suffixes
+#
+CY_TOOLCHAIN_SUFFIX_S=S
+CY_TOOLCHAIN_SUFFIX_s=s
+CY_TOOLCHAIN_SUFFIX_C=c
+CY_TOOLCHAIN_SUFFIX_H=h
+CY_TOOLCHAIN_SUFFIX_CPP=cpp
+CY_TOOLCHAIN_SUFFIX_HPP=hpp
+CY_TOOLCHAIN_SUFFIX_O=o
+CY_TOOLCHAIN_SUFFIX_A=ar
+CY_TOOLCHAIN_SUFFIX_D=d
+CY_TOOLCHAIN_SUFFIX_LS=sct
+CY_TOOLCHAIN_SUFFIX_MAP=map
+CY_TOOLCHAIN_SUFFIX_TARGET=elf
+CY_TOOLCHAIN_SUFFIX_ARCHIVE=ar
+
+#
+# Toolchain specific flags
+#
+CY_TOOLCHAIN_OUTPUT_OPTION=-o
+CY_TOOLCHAIN_MAPFILE=--map --list 
+CY_TOOLCHAIN_LSFLAGS=--scatter 
+CY_TOOLCHAIN_INCRSPFILE=@
+CY_TOOLCHAIN_INCRSPFILE_ASM=--via 
+CY_TOOLCHAIN_OBJRSPFILE=--via 
+
+#
+# Produce a makefile dependency rule for each input file
+#
+CY_TOOLCHAIN_DEPENDENCIES=-MMD -MP -MF "$(subst .$(CY_TOOLCHAIN_SUFFIX_O),.$(CY_TOOLCHAIN_SUFFIX_D),$@)" -MT "$@"
+
+#
+# Additional includes in the compilation process based on this
+# toolchain
+#
+CY_TOOLCHAIN_INCLUDES=
+
+#
+# Additional libraries in the link process based on this toolchain
+#
+CY_TOOLCHAIN_DEFINES=

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/toolchains/A_Clang.mk

@@ -0,0 +1,218 @@
+################################################################################
+# \file AppleClang.mk
+# \version 1.0
+#
+# \brief
+# Apple Clang toolchain configuration
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+#
+# The base path to the Clang cross compilation executables
+#
+ifeq ($(CY_COMPILER_PATH),)
+CY_CROSSPATH=$(CY_COMPILER_A_Clang_DIR)
+else
+CY_CROSSPATH=$(CY_COMPILER_PATH)
+endif
+
+#
+# Build tools
+#
+CC=clang
+CXX=$(CC)
+AS=$(CC)
+AR=libtool
+LD=ld
+
+#
+# DEBUG/NDEBUG selection
+#
+ifeq ($(CONFIG),Debug)
+CY_TOOLCHAIN_DEBUG_FLAG=-DDEBUG
+CY_TOOLCHAIN_OPTIMIZATION=-Og
+else ifeq ($(CONFIG),Release)
+CY_TOOLCHAIN_DEBUG_FLAG=-DNDEBUG
+CY_TOOLCHAIN_OPTIMIZATION=-Os
+else
+CY_TOOLCHAIN_DEBUG_FLAG=
+CY_TOOLCHAIN_OPTIMIZATION=
+endif
+
+#
+# Flags common to compile and link
+#
+CY_TOOLCHAIN_COMMON_FLAGS=\
+	-mthumb\
+	-ffunction-sections\
+	-fdata-sections\
+	-g\
+	-Wall
+
+#
+# CPU core specifics
+#
+ifeq ($(CORE),CM0P)
+CY_TOOLCHAIN_FLAGS_CORE=\
+	-arch armv6m\
+	-mcpu=cortex-m0plus\
+	--target=arm-none-macho
+CY_TOOLCHAIN_LDFLAGS_CORE=\
+	-arch armv6m\
+	-lclang_rt.soft_static
+CY_TOOLCHAIN_VFP_FLAGS=
+else
+ifeq ($(VFP_SELECT),hardfp)
+CY_TOOLCHAIN_LD_VFP_FLAGS=-lclang_rt.hard_static
+CY_TOOLCHAIN_VFP_FLAGS=-mfloat-abi=hard -mfpu=fpv4-sp-d16
+else
+CY_TOOLCHAIN_LD_VFP_FLAGS=-lclang_rt.soft_static
+CY_TOOLCHAIN_VFP_FLAGS=-mfloat-abi=softfp -mfpu=fpv4-sp-d16
+endif # ($(VFP_SELECT),hardfp)
+CY_TOOLCHAIN_FLAGS_CORE=\
+	-arch armv7em\
+	-mcpu=cortex-m4\
+	--target=armv7m-none-macho
+CY_TOOLCHAIN_LDFLAGS_CORE=\
+	-arch armv7em\
+	$(CY_TOOLCHAIN_LD_VFP_FLAGS)
+endif # ($(CORE),CM0P)
+
+#
+# Command line flags for c-files
+#
+CY_TOOLCHAIN_CFLAGS=\
+	-c\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_OPTIMIZATION)\
+	$(CY_TOOLCHAIN_VFP_FLAGS)\
+	$(CY_TOOLCHAIN_COMMON_FLAGS)\
+	--no-standard-includes\
+	-fasm-blocks\
+	-integrated-as\
+	-Wall\
+	-Wno-int-to-pointer-cast\
+	-static\
+	-fno-stack-protector\
+	-fno-common\
+	-ffreestanding\
+	-mlong-calls
+
+#
+# Command line flags for cpp-files
+#
+CY_TOOLCHAIN_CXXFLAGS=$(CY_TOOLCHAIN_CFLAGS)
+
+#
+# Command line flags for s-files
+#
+CY_TOOLCHAIN_ASFLAGS=\
+	-c\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_COMMON_FLAGS)\
+	-fasm-blocks\
+	-integrated-as\
+	-Wall\
+	-Wno-int-to-pointer-cast\
+	-static\
+	-fno-stack-protector\
+	-fno-common\
+	-ffreestanding\
+	-mlong-calls
+
+#
+# Command line flags for linking
+#
+CY_TOOLCHAIN_LDFLAGS=\
+	$(CY_TOOLCHAIN_LDFLAGS_CORE)\
+	$(CY_TOOLCHAIN_LD_VFP_FLAGS)\
+	-static\
+	-segalign 4\
+	-e Reset_Handler\
+	-merge_zero_fill_sections\
+	-pagezero_size 0\
+	-ios_version_min 4.3\
+	-preload\
+	-v\
+	-read_only_relocs suppress\
+	-dead_strip\
+	-dead_strip_dylibs\
+	-no_branch_islands\
+	-no_zero_fill_sections\
+	-L$(CY_CROSSPATH)/lib/macho_embedded
+
+#
+# Command line flags for archiving
+#
+CY_TOOLCHAIN_ARFLAGS=rvs
+
+#
+# Toolchain-specific suffixes
+#
+CY_TOOLCHAIN_SUFFIX_S=S
+CY_TOOLCHAIN_SUFFIX_s=s
+CY_TOOLCHAIN_SUFFIX_C=c
+CY_TOOLCHAIN_SUFFIX_H=h
+CY_TOOLCHAIN_SUFFIX_CPP=cpp
+CY_TOOLCHAIN_SUFFIX_HPP=hpp
+CY_TOOLCHAIN_SUFFIX_O=o
+CY_TOOLCHAIN_SUFFIX_A=a
+CY_TOOLCHAIN_SUFFIX_D=d
+CY_TOOLCHAIN_SUFFIX_LS=mk
+CY_TOOLCHAIN_SUFFIX_MAP=map
+CY_TOOLCHAIN_SUFFIX_TARGET=mach_o
+CY_TOOLCHAIN_SUFFIX_ARCHIVE=a
+
+#
+# Toolchain specific flags
+#
+CY_TOOLCHAIN_OUTPUT_OPTION=-o
+CY_TOOLCHAIN_MAPFILE=-map 
+CY_TOOLCHAIN_LSFLAGS=
+CY_TOOLCHAIN_INCRSPFILE=@
+CY_TOOLCHAIN_INCRSPFILE_ASM=@
+CY_TOOLCHAIN_OBJRSPFILE=-filelist 
+
+#
+# Produce a makefile dependency rule for each input file
+#
+CY_TOOLCHAIN_DEPENDENCIES=-MMD -MP -MF "$(subst .$(CY_TOOLCHAIN_SUFFIX_O),.$(CY_TOOLCHAIN_SUFFIX_D),$@)" -MT "$@"
+
+#
+# Additional includes in the compilation process based on this
+# toolchain
+#
+CY_TOOLCHAIN_INCLUDES=\
+	$(CY_COMPILER_GCC_ARM_DIR)/arm-none-eabi/include\
+	$(CY_COMPILER_GCC_ARM_DIR)/lib/gcc/arm-none-eabi/7.2.1/include\
+	$(CY_COMPILER_GCC_ARM_DIR)/lib/gcc/arm-none-eabi/7.2.1/include-fixed
+
+#
+# Additional libraries in the link process based on this toolchain
+#
+CY_TOOLCHAIN_DEFINES=
+
+#
+# M2BIN tool is used to convert Mach-O to binary
+#
+CY_TOOLCHAIN_M2BIN=$(CY_BASELIB_PATH)/make/scripts/m2bin

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/toolchains/GCC_ARM.mk

@@ -0,0 +1,174 @@
+################################################################################
+# \file GCC_ARM.mk
+# \version 1.0
+#
+# \brief
+# GCC ARM toolchain configuration.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+#
+# The base path to the GCC cross compilation executables
+#
+ifeq ($(CY_COMPILER_PATH),)
+CY_CROSSPATH=$(CY_COMPILER_GCC_ARM_DIR)/bin
+else
+CY_CROSSPATH=$(CY_COMPILER_PATH)/bin
+endif
+
+#
+# Build tools
+#
+CC=$(CY_CROSSPATH)/arm-none-eabi-gcc
+CXX=$(CY_CROSSPATH)/arm-none-eabi-g++
+AS=$(CC)
+AR=$(CY_CROSSPATH)/arm-none-eabi-ar
+LD=$(CXX)
+
+#
+# DEBUG/NDEBUG selection
+#
+ifeq ($(CONFIG),Debug)
+CY_TOOLCHAIN_DEBUG_FLAG=-DDEBUG
+CY_TOOLCHAIN_OPTIMIZATION=-Og
+else ifeq ($(CONFIG),Release)
+CY_TOOLCHAIN_DEBUG_FLAG=-DNDEBUG
+CY_TOOLCHAIN_OPTIMIZATION=-Os
+else
+CY_TOOLCHAIN_DEBUG_FLAG=
+CY_TOOLCHAIN_OPTIMIZATION=
+endif
+
+#
+# Flags common to compile and link
+#
+CY_TOOLCHAIN_COMMON_FLAGS=\
+	-mthumb\
+	-ffunction-sections\
+	-fdata-sections\
+	-ffat-lto-objects\
+	-g\
+	-Wall
+    
+#
+# CPU core specifics
+#
+ifeq ($(CORE),CM0P)
+CY_TOOLCHAIN_FLAGS_CORE=-mcpu=cortex-m0plus
+CY_TOOLCHAIN_VFP_FLAGS=
+else
+CY_TOOLCHAIN_FLAGS_CORE=-mcpu=cortex-m4
+ifeq ($(VFP_SELECT),hardfp)
+CY_TOOLCHAIN_VFP_FLAGS=-mfloat-abi=hard -mfpu=fpv4-sp-d16
+else
+CY_TOOLCHAIN_VFP_FLAGS=-mfloat-abi=softfp -mfpu=fpv4-sp-d16
+endif
+endif
+
+#
+# Command line flags for c-files
+#
+CY_TOOLCHAIN_CFLAGS=\
+	-c\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_OPTIMIZATION)\
+	$(CY_TOOLCHAIN_VFP_FLAGS)\
+	$(CY_TOOLCHAIN_COMMON_FLAGS)
+
+#
+# Command line flags for cpp-files
+#
+CY_TOOLCHAIN_CXXFLAGS=\
+	$(CY_TOOLCHAIN_CFLAGS)\
+	-fno-rtti\
+	-fno-exceptions
+
+#
+# Command line flags for s-files
+#
+CY_TOOLCHAIN_ASFLAGS=\
+	-c\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_COMMON_FLAGS)
+
+#
+# Command line flags for linking
+#
+CY_TOOLCHAIN_LDFLAGS=\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_VFP_FLAGS)\
+	$(CY_TOOLCHAIN_COMMON_FLAGS)\
+	--enable-objc-gc\
+	--specs=nano.specs\
+	-Wl,--gc-sections
+
+#
+# Command line flags for archiving
+#
+CY_TOOLCHAIN_ARFLAGS=rvs
+
+#
+# Toolchain-specific suffixes
+#
+CY_TOOLCHAIN_SUFFIX_S=S
+CY_TOOLCHAIN_SUFFIX_s=s
+CY_TOOLCHAIN_SUFFIX_C=c
+CY_TOOLCHAIN_SUFFIX_H=h
+CY_TOOLCHAIN_SUFFIX_CPP=cpp
+CY_TOOLCHAIN_SUFFIX_HPP=hpp
+CY_TOOLCHAIN_SUFFIX_O=o
+CY_TOOLCHAIN_SUFFIX_A=a
+CY_TOOLCHAIN_SUFFIX_D=d
+CY_TOOLCHAIN_SUFFIX_LS=ld
+CY_TOOLCHAIN_SUFFIX_MAP=map
+CY_TOOLCHAIN_SUFFIX_TARGET=elf
+CY_TOOLCHAIN_SUFFIX_ARCHIVE=a
+
+#
+# Toolchain specific flags
+#
+CY_TOOLCHAIN_OUTPUT_OPTION=-o
+CY_TOOLCHAIN_MAPFILE=-Wl,-Map,
+CY_TOOLCHAIN_STARTGROUP=-Wl,--start-group
+CY_TOOLCHAIN_ENDGROUP=-Wl,--end-group
+CY_TOOLCHAIN_LSFLAGS=-T
+CY_TOOLCHAIN_INCRSPFILE=@
+CY_TOOLCHAIN_INCRSPFILE_ASM=@
+CY_TOOLCHAIN_OBJRSPFILE=@
+
+#
+# Produce a makefile dependency rule for each input file
+#
+CY_TOOLCHAIN_DEPENDENCIES=-MMD -MP -MF "$(subst .$(CY_TOOLCHAIN_SUFFIX_O),.$(CY_TOOLCHAIN_SUFFIX_D),$@)" -MT "$@"
+
+#
+# Additional includes in the compilation process based on this
+# toolchain
+#
+CY_TOOLCHAIN_INCLUDES=
+
+#
+# Additional libraries in the link process based on this toolchain
+#
+CY_TOOLCHAIN_DEFINES=
+

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/toolchains/IAR.mk

@@ -0,0 +1,187 @@
+################################################################################
+# \file IAR.mk
+# \version 1.0
+#
+# \brief
+# IAR toolchain configuration.
+#
+################################################################################
+# \copyright
+# Copyright 2018-2019 Cypress Semiconductor Corporation
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+################################################################################
+
+ifeq ($(WHICHFILE),true)
+$(info Processing $(lastword $(MAKEFILE_LIST)))
+endif
+
+#
+# The base path to the IAR cross compilation executables
+#
+ifeq ($(CY_COMPILER_PATH),)
+CY_CROSSPATH=$(CY_COMPILER_IAR_DIR)/bin
+else
+CY_CROSSPATH=$(CY_COMPILER_PATH)/bin
+endif
+
+#
+# Build tools
+#
+CC=$(CY_CROSSPATH)/iccarm.exe
+CXX=$(CC)
+AS=$(CY_CROSSPATH)/iasmarm.exe
+AR=$(CY_CROSSPATH)/iarchive.exe
+LD=$(CY_CROSSPATH)/ilinkarm.exe
+
+#
+# DEBUG/NDEBUG selection
+#
+ifeq ($(CONFIG),Debug)
+CY_TOOLCHAIN_DEBUG_FLAG=-DDEBUG
+CY_TOOLCHAIN_OPTIMIZATION=-Ol
+else 
+ifeq ($(CONFIG),Release)
+CY_TOOLCHAIN_DEBUG_FLAG=-DNDEBUG
+CY_TOOLCHAIN_OPTIMIZATION=-Ohs
+else
+CY_TOOLCHAIN_DEBUG_FLAG=
+CY_TOOLCHAIN_OPTIMIZATION=
+endif
+endif
+
+#
+# Flags common to compile and link
+#
+ifneq ($(VERBOSE),)
+CY_TOOLCHAIN_SILENT_CFLAGS=
+CY_TOOLCHAIN_SILENT_SFLAGS=
+else
+CY_TOOLCHAIN_SILENT_CFLAGS=--silent
+CY_TOOLCHAIN_SILENT_SFLAGS=-S
+endif
+
+#
+# CPU core specifics
+#
+ifeq ($(CORE),CM0P)
+CY_TOOLCHAIN_FLAGS_CORE=--cpu Cortex-M0+
+CY_TOOLCHAIN_VFP_FLAGS=
+else
+CY_TOOLCHAIN_FLAGS_CORE=--cpu Cortex-M4
+CY_TOOLCHAIN_VFP_FLAGS=--fpu FPv4-SP
+ifeq ($(VFP_SELECT),hardfp)
+CY_TOOLCHAIN_VFP_CFLAGS=$(CY_TOOLCHAIN_VFP_FLAGS) --aapcs vfp
+else
+CY_TOOLCHAIN_VFP_CFLAGS=$(CY_TOOLCHAIN_VFP_FLAGS) --aapcs std
+endif
+endif
+
+#
+# Command line flags for c-files
+#
+CY_TOOLCHAIN_CFLAGS=\
+	-c\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_OPTIMIZATION)\
+	$(CY_TOOLCHAIN_VFP_CFLAGS)\
+	$(CY_TOOLCHAIN_SILENT_CFLAGS)\
+	--endian=little\
+	-e\
+	--enable_restrict\
+	--no_wrap_diagnostics
+
+ifeq ($(CONFIG),Debug)
+CY_TOOLCHAIN_CFLAGS+=--debug
+endif
+
+#
+# Command line flags for cpp-files
+#
+CY_TOOLCHAIN_CXXFLAGS=\
+	$(CY_TOOLCHAIN_CFLAGS)\
+	--c++\
+	--no_rtti\
+	--no_exceptions
+
+#
+# Command line flags for s-files
+#
+CY_TOOLCHAIN_ASFLAGS=\
+	-c\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_VFP_FLAGS)\
+	$(CY_TOOLCHAIN_SILENT_SFLAGS)\
+	-s+\
+	-w+\
+	-r
+
+#
+# Command line flags for linking
+#
+CY_TOOLCHAIN_LDFLAGS=\
+	$(CY_TOOLCHAIN_FLAGS_CORE)\
+	$(CY_TOOLCHAIN_VFP_FLAGS)\
+	$(CY_TOOLCHAIN_SILENT_CFLAGS)\
+
+#
+# Command line flags for archiving
+#
+CY_TOOLCHAIN_ARFLAGS=\
+	--create\
+	--verbose
+
+#
+# Toolchain-specific suffixes
+#
+CY_TOOLCHAIN_SUFFIX_S=S
+CY_TOOLCHAIN_SUFFIX_s=s
+CY_TOOLCHAIN_SUFFIX_C=c
+CY_TOOLCHAIN_SUFFIX_H=h
+CY_TOOLCHAIN_SUFFIX_CPP=cpp
+CY_TOOLCHAIN_SUFFIX_HPP=hpp
+CY_TOOLCHAIN_SUFFIX_O=o
+CY_TOOLCHAIN_SUFFIX_A=a
+CY_TOOLCHAIN_SUFFIX_D=d
+CY_TOOLCHAIN_SUFFIX_LS=icf
+CY_TOOLCHAIN_SUFFIX_MAP=map
+CY_TOOLCHAIN_SUFFIX_TARGET=elf
+CY_TOOLCHAIN_SUFFIX_ARCHIVE=a
+
+#
+# Toolchain specific flags
+#
+CY_TOOLCHAIN_OUTPUT_OPTION=-o
+CY_TOOLCHAIN_MAPFILE=--map=
+CY_TOOLCHAIN_LSFLAGS=--config=
+CY_TOOLCHAIN_INCRSPFILE=-f 
+CY_TOOLCHAIN_INCRSPFILE_ASM=-f 
+CY_TOOLCHAIN_OBJRSPFILE=-f 
+
+#
+# Produce a makefile dependency rule for each input file
+#
+CY_TOOLCHAIN_DEPENDENCIES=--dependencies=m "$(subst .$(CY_TOOLCHAIN_SUFFIX_O),.$(CY_TOOLCHAIN_SUFFIX_D),$@)"
+
+#
+# Additional includes in the compilation process based on this
+# toolchain
+#
+CY_TOOLCHAIN_INCLUDES=
+
+#
+# Additional libraries in the link process based on this toolchain
+#
+CY_TOOLCHAIN_DEFINES=
+

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/make/udd/features.mk

@@ -0,0 +1,45 @@
+# This file defines variables for various sets of devices. Each variable is a 
+# list of the MPNs that have that capability or feature.
+
+# Major device capabilities.
+CY_DEVICES_WITH_M0P=CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72 
+CY_DEVICES_WITH_BLE=CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_UDBS=CY8C6116BZI-F54 CY8C6136BZI-F34 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6316BZI-BLF53 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C6247FDI-D32 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6316BZI-BLF54 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_FS_USB=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C637BZI-MD76 CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-D54 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72 
+CY_DEVICES_WITH_CAPSENSE=CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245W-S3D72 
+CY_DEVICES_WITH_CRYPTO=CY8C6116BZI-F54 CY8C6137BZI-F54 CY8C6247BZI-D44 CY8C6247BZI-D54 CY8C6316BZI-BLF53 CY8C6347BZI-BLD43 CY8C6347BZI-BLD53 CY8C6347FMI-BLD43 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6347BZI-BUD43 CY8C6347BZI-BUD53 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6316BZI-BLF54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD43 CY8C6137WI-F54 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245W-S3D72 
+
+# Different classifications of devices.
+CY_DEVICES_WITH_DIE_PSOC6ABLE2=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_DIE_PSOC6A2M=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
+CY_DEVICES_WITH_DIE_PSOC6A512K=CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72 
+
+CY_DEVICES_WITH_FLASH_KB_512=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6246BZI-D04 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6336BZI-BUD13 CY8C6136FDI-F42 CY8C6136FTI-F42 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72 
+CY_DEVICES_WITH_FLASH_KB_1024=CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CY8C6347LQI-BLD52 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
+CY_DEVICES_WITH_FLASH_KB_832=CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54
+CY_DEVICES_WITH_FLASH_KB_2048=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C624ALQI-D42 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14
+CY_DEVICES_WITH_FLASH_KB_1856=CYB0644ABZI-S2D44
+
+CY_DEVICES_WITH_SRAM_KB_128=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6246BZI-D04 CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6336BZI-BUD13 CY8C6136FDI-F42 CY8C6136FTI-F42 CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42
+CY_DEVICES_WITH_SRAM_KB_288=CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6247FDI-D52 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_SRAM_KB_1024=CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14
+CY_DEVICES_WITH_SRAM_KB_512=CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43
+CY_DEVICES_WITH_SRAM_KB_256=CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72 
+
+CY_DEVICES_WITH_MAX_SPEED_MHZ_150=CY8C6036BZI-F04 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C6336BZI-BLF03 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637BZI-MD76 CY8C637BZI-BLD74 CY8C637FMI-BLD73 CY8C68237BZ-BLE CY8C68237FM-BLE CY8C6137FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53 CY8C6337BZI-BLF13 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52 CY8C6247BZI-AUD54 CY8C6336BZI-BLF04 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CY8C6247BFI-D54 CYBLE-416045-02 CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33 CY8C6137WI-F54 CY8C6247WI-D54 CYB06447BZI-BLD54 CYB06447BZI-BLD53 CYB06447BZI-D54 CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52 CY8C624ABZI-D44 CY8C624AAZI-D44 CY8C624AFNI-D43 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248BZI-D44 CY8C6248AZI-D44 CY8C6248FNI-D43 CY8C624ALQI-D42 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624AAZI-S2D44 CY8C624AFNI-S2D43 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248BZI-S2D44 CY8C6248AZI-S2D44 CY8C6248FNI-S2D43 CY8C6245AZI-S3D72 CY8C6245LQI-S3D72 CY8C6245FNI-S3D71 CY8C6245AZI-S3D62 CY8C6245LQI-S3D62 CY8C6245AZI-S3D42 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245FNI-S3D41 CY8C6245AZI-S3D12 CY8C6245LQI-S3D12 CY8C6245FNI-S3D11 CY8C6245AZI-S3D02 CY8C6245LQI-S3D02 CY8C6245W-S3D72 
+CY_DEVICES_WITH_MAX_SPEED_MHZ_50=CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6117BZI-F34 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6117FDI-F02 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6117WI-F34
+
+CY_DEVICES_WITH_PACKAGE_124-BGA=CY8C6036BZI-F04 CY8C6016BZI-F04 CY8C6116BZI-F54 CY8C6136BZI-F14 CY8C6136BZI-F34 CY8C6137BZI-F14 CY8C6137BZI-F34 CY8C6137BZI-F54 CY8C6117BZI-F34 CY8C6246BZI-D04 CY8C6247BZI-D44 CY8C6247BZI-D34 CY8C6247BZI-D54 CY8C637BZI-MD76 CY8C6247BZI-AUD54 CY8C6247BFI-D54 CY8C6137WI-F54 CY8C6117WI-F34 CY8C6247WI-D54 CYB06447BZI-D54 CY8C624ABZI-D44 CY8C624ABZI-D04 CY8C624ABZI-D14 CY8C6248BZI-D44 CYB0644ABZI-S2D44 CY8C624ABZI-S2D44A0 CY8C624ABZI-S2D44 CY8C624ABZI-S2D04 CY8C624ABZI-S2D14 CY8C6248BZI-S2D44
+CY_DEVICES_WITH_PACKAGE_116-BGA-BLE=CY8C6336BZI-BLF03 CY8C6316BZI-BLF03 CY8C6316BZI-BLF53 CY8C6336BZI-BLD13 CY8C6347BZI-BLD43 CY8C6347BZI-BLD33 CY8C6347BZI-BLD53 CY8C637BZI-BLD74 CY8C68237BZ-BLE CY8C6337BZI-BLF13 CYB06447BZI-BLD53
+CY_DEVICES_WITH_PACKAGE_104-M-CSP-BLE=CY8C6347FMI-BLD13 CY8C6347FMI-BLD43 CY8C6347FMI-BLD33 CY8C6347FMI-BLD53 CY8C637FMI-BLD73 CY8C68237FM-BLE
+CY_DEVICES_WITH_PACKAGE_80-WLCSP=CY8C6137FDI-F02 CY8C6117FDI-F02 CY8C6247FDI-D02 CY8C6247FDI-D32 CY8C6136FDI-F42 CY8C6247FDI-D52 CY8C6136FTI-F42 CY8C6247FTI-D52
+CY_DEVICES_WITH_PACKAGE_116-BGA-USB=CY8C6336BZI-BUD13 CY8C6347BZI-BUD43 CY8C6347BZI-BUD33 CY8C6347BZI-BUD53
+CY_DEVICES_WITH_PACKAGE_124-BGA-SIP=CY8C6336BZI-BLF04 CY8C6316BZI-BLF04 CY8C6316BZI-BLF54 CY8C6336BZI-BLD14 CY8C6347BZI-BLD44 CY8C6347BZI-BLD34 CY8C6347BZI-BLD54 CYB06447BZI-BLD54
+CY_DEVICES_WITH_PACKAGE_43-SMT=CYBLE-416045-02
+CY_DEVICES_WITH_PACKAGE_104-M-CSP-BLE-USB=CY8C6347FMI-BUD53 CY8C6347FMI-BUD13 CY8C6347FMI-BUD43 CY8C6347FMI-BUD33
+CY_DEVICES_WITH_PACKAGE_68-QFN-BLE=CY8C6336LQI-BLF02 CY8C6336LQI-BLF42 CY8C6347LQI-BLD52
+CY_DEVICES_WITH_PACKAGE_128-TQFP=CY8C624AAZI-D44 CY8C624AAZI-D14 CY8C6248AZI-D14 CY8C6248AZI-D44 CY8C624AAZI-S2D44 CY8C624AAZI-S2D14 CY8C6248AZI-S2D14 CY8C6248AZI-S2D44
+CY_DEVICES_WITH_PACKAGE_100-WLCSP=CY8C624AFNI-D43 CY8C6248FNI-D43 CY8C624AFNI-S2D43 CY8C6248FNI-S2D43
+CY_DEVICES_WITH_PACKAGE_68-QFN=CY8C624ALQI-D42 CY8C6245LQI-S3D72 CY8C6245LQI-S3D62 CY8C6245LQI-S3D42 CYB06445LQI-S3D42 CY8C6245LQI-S3D12 CY8C6245LQI-S3D02
+CY_DEVICES_WITH_PACKAGE_100-TQFP=CY8C6245AZI-S3D72 CY8C6245AZI-S3D62 CY8C6245AZI-S3D42 CY8C6245AZI-S3D12 CY8C6245AZI-S3D02 CY8C6245W-S3D72 
+CY_DEVICES_WITH_PACKAGE_49-WLCSP=CY8C6245FNI-S3D71 CY8C6245FNI-S3D41 CY8C6245FNI-S3D11

bsp/cypress/psoc6-pioneerkit_modus/libs/psoc6make/version.xml

@@ -0,0 +1 @@
+<version>1.0.1.8025</version>

bsp/cypress/psoc6-pioneerkit_modus/makefile.init

@@ -0,0 +1,2 @@
+export MAKE=make
+export PATH:=/usr/bin:$(PATH)

bsp/cypress/psoc6-pioneerkit_modus/rtconfig.h

@@ -0,0 +1,156 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Project Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 16
+#define RT_ALIGN_SIZE 4
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 100
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDEL_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 1024
+#define RT_USING_TIMER_SOFT
+#define RT_TIMER_THREAD_PRIO 4
+#define RT_TIMER_THREAD_STACK_SIZE 512
+#define RT_DEBUG
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+#define RT_USING_SIGNALS
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_MEMHEAP
+#define RT_USING_SMALL_MEM
+#define RT_USING_MEMTRACE
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 256
+#define RT_CONSOLE_DEVICE_NAME "uart0"
+#define RT_VER_NUM 0x40000
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+
+/* Command shell */
+
+#define RT_USING_FINSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_CMD_SIZE 80
+#define FINSH_USING_MSH
+#define FINSH_USING_MSH_DEFAULT
+#define FINSH_ARG_MAX 10
+
+/* Device virtual file system */
+
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
+#define RT_USING_SERIAL
+#define RT_SERIAL_USING_DMA
+#define RT_USING_PIN
+
+/* Using WiFi */
+
+
+/* Using USB */
+
+
+/* POSIX layer and C standard library */
+
+#define RT_USING_LIBC
+
+/* Network */
+
+/* Socket abstraction layer */
+
+
+/* light weight TCP/IP stack */
+
+
+/* Modbus master and slave stack */
+
+
+/* AT commands */
+
+
+/* VBUS(Virtual Software BUS) */
+
+
+/* Utilities */
+
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+
+/* Wiced WiFi */
+
+
+/* IoT Cloud */
+
+
+/* security packages */
+
+
+/* language packages */
+
+
+/* multimedia packages */
+
+
+/* tools packages */
+
+
+/* system packages */
+
+
+/* peripheral libraries and drivers */
+
+
+/* miscellaneous packages */
+
+
+/* samples: kernel and components samples */
+
+#define RT_USING_UART0
+
+#endif