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@@ -1,7 +1,7 @@
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/*
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* File : usart.c
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* This file is part of RT-Thread RTOS
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- * COPYRIGHT (C) 2009, RT-Thread Development Team
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+ * COPYRIGHT (C) 2006-2013, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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@@ -11,335 +11,365 @@
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* Date Author Notes
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* 2009-01-05 Bernard the first version
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* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
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+ * 2013-05-13 aozima update for kehong-lingtai.
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*/
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+#include "stm32f10x.h"
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#include "usart.h"
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-#include <serial.h>
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-#include <stm32f10x_dma.h>
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+#include "board.h"
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-/*
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- * Use UART1 as console output and finsh input
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- * interrupt Rx and poll Tx (stream mode)
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- *
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- * Use UART2 with interrupt Rx and poll Tx
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- * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2
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- *
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- * USART DMA setting on STM32
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- * USART1 Tx --> DMA Channel 4
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- * USART1 Rx --> DMA Channel 5
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- * USART2 Tx --> DMA Channel 7
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- * USART2 Rx --> DMA Channel 6
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- * USART3 Tx --> DMA Channel 2
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- * USART3 Rx --> DMA Channel 3
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- */
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+#include <rtdevice.h>
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-#ifdef RT_USING_UART1
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-struct stm32_serial_int_rx uart1_int_rx;
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-struct stm32_serial_device uart1 =
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+/* USART1 */
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+#define UART1_GPIO_TX GPIO_Pin_9
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+#define UART1_GPIO_RX GPIO_Pin_10
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+#define UART1_GPIO GPIOA
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+
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+/* USART2 */
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+#define UART2_GPIO_TX GPIO_Pin_2
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+#define UART2_GPIO_RX GPIO_Pin_3
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+#define UART2_GPIO GPIOA
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+
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+/* USART3_REMAP[1:0] = 00 */
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+#define UART3_GPIO_TX GPIO_Pin_10
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+#define UART3_GPIO_RX GPIO_Pin_11
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+#define UART3_GPIO GPIOB
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+
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+/* STM32 uart driver */
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+struct stm32_uart
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{
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- USART1,
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- &uart1_int_rx,
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- RT_NULL
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+ USART_TypeDef* uart_device;
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+ IRQn_Type irq;
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};
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-struct rt_device uart1_device;
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-#endif
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-#ifdef RT_USING_UART2
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-struct stm32_serial_int_rx uart2_int_rx;
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-struct stm32_serial_device uart2 =
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+static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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- USART2,
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- &uart2_int_rx,
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- RT_NULL
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-};
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-struct rt_device uart2_device;
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-#endif
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+ struct stm32_uart* uart;
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+ USART_InitTypeDef USART_InitStructure;
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-#ifdef RT_USING_UART3
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-struct stm32_serial_int_rx uart3_int_rx;
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-struct stm32_serial_dma_tx uart3_dma_tx;
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-struct stm32_serial_device uart3 =
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+ RT_ASSERT(serial != RT_NULL);
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+ RT_ASSERT(cfg != RT_NULL);
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+
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+ uart = (struct stm32_uart *)serial->parent.user_data;
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+
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+ USART_InitStructure.USART_BaudRate = cfg->baud_rate;
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+
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+ if (cfg->data_bits == DATA_BITS_8)
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+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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+
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+ if (cfg->stop_bits == STOP_BITS_1)
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+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
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+ else if (cfg->stop_bits == STOP_BITS_2)
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+ USART_InitStructure.USART_StopBits = USART_StopBits_2;
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+
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+ USART_InitStructure.USART_Parity = USART_Parity_No;
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+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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+ USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
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+ USART_Init(uart->uart_device, &USART_InitStructure);
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+
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+ /* Enable USART */
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+ USART_Cmd(uart->uart_device, ENABLE);
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+ /* enable interrupt */
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+ USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
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+
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+ return RT_EOK;
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+}
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+
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+static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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- USART3,
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- &uart3_int_rx,
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- &uart3_dma_tx
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-};
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-struct rt_device uart3_device;
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-#endif
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+ struct stm32_uart* uart;
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+
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+ RT_ASSERT(serial != RT_NULL);
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+ uart = (struct stm32_uart *)serial->parent.user_data;
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+
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+ switch (cmd)
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+ {
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+ case RT_DEVICE_CTRL_CLR_INT:
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+ /* disable rx irq */
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+ UART_DISABLE_IRQ(uart->irq);
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+ break;
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+ case RT_DEVICE_CTRL_SET_INT:
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+ /* enable rx irq */
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+ UART_ENABLE_IRQ(uart->irq);
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+ break;
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+ }
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+
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+ return RT_EOK;
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+}
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-#define USART1_DR_Base 0x40013804
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-#define USART2_DR_Base 0x40004404
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-#define USART3_DR_Base 0x40004804
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+static int stm32_putc(struct rt_serial_device *serial, char c)
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+{
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+ struct stm32_uart* uart;
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-/* USART1_REMAP = 0 */
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-#define UART1_GPIO_TX GPIO_Pin_9
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-#define UART1_GPIO_RX GPIO_Pin_10
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-#define UART1_GPIO GPIOA
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-#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
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-#define UART1_TX_DMA DMA1_Channel4
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-#define UART1_RX_DMA DMA1_Channel5
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-
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-#if defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL)
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-#define UART2_GPIO_TX GPIO_Pin_5
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-#define UART2_GPIO_RX GPIO_Pin_6
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-#define UART2_GPIO GPIOD
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-#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
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-#else /* for STM32F10X_HD */
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-/* USART2_REMAP = 0 */
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-#define UART2_GPIO_TX GPIO_Pin_2
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-#define UART2_GPIO_RX GPIO_Pin_3
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-#define UART2_GPIO GPIOA
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-#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
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-#define UART2_TX_DMA DMA1_Channel7
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-#define UART2_RX_DMA DMA1_Channel6
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-#endif
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+ RT_ASSERT(serial != RT_NULL);
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+ uart = (struct stm32_uart *)serial->parent.user_data;
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-/* USART3_REMAP[1:0] = 00 */
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-#define UART3_GPIO_RX GPIO_Pin_11
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-#define UART3_GPIO_TX GPIO_Pin_10
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-#define UART3_GPIO GPIOB
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-#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
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-#define UART3_TX_DMA DMA1_Channel2
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-#define UART3_RX_DMA DMA1_Channel3
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+ while (!(uart->uart_device->SR & USART_FLAG_TXE));
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+ uart->uart_device->DR = c;
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-static void RCC_Configuration(void)
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+ return 1;
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+}
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+
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+static int stm32_getc(struct rt_serial_device *serial)
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{
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- RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
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+ int ch;
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+ struct stm32_uart* uart;
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-#ifdef RT_USING_UART1
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- /* Enable USART1 and GPIOA clocks */
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- RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
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-#endif
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+ RT_ASSERT(serial != RT_NULL);
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+ uart = (struct stm32_uart *)serial->parent.user_data;
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-#ifdef RT_USING_UART2
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+ ch = -1;
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+ if (uart->uart_device->SR & USART_FLAG_RXNE)
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+ {
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+ ch = uart->uart_device->DR & 0xff;
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+ }
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-#if (defined(STM32F10X_LD) || defined(STM32F10X_MD) || defined(STM32F10X_CL))
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- /* Enable AFIO and GPIOD clock */
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- RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOD, ENABLE);
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+ return ch;
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+}
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- /* Enable the USART2 Pins Software Remapping */
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- GPIO_PinRemapConfig(GPIO_Remap_USART2, ENABLE);
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-#else
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- /* Enable AFIO and GPIOA clock */
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- RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO | RCC_APB2Periph_GPIOA, ENABLE);
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-#endif
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+static const struct rt_uart_ops stm32_uart_ops =
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+{
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+ stm32_configure,
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+ stm32_control,
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+ stm32_putc,
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+ stm32_getc,
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+};
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- /* Enable USART2 clock */
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- RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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-#endif
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+#if defined(RT_USING_UART1)
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+/* UART1 device driver structure */
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+struct serial_ringbuffer uart1_int_rx;
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+struct stm32_uart uart1 =
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+{
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+ USART1,
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+ USART1_IRQn,
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+};
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+struct rt_serial_device serial1;
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-#ifdef RT_USING_UART3
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- RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
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- /* Enable USART3 clock */
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- RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
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+void USART1_IRQHandler(void)
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+{
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+ struct stm32_uart* uart;
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+
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+ uart = &uart1;
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+
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+ if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
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+ {
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+ rt_hw_serial_isr(&serial1);
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+ /* clear interrupt */
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+ USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
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+ }
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+ if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
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+ {
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+ /* clear interrupt */
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+ USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
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+ }
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+#endif /* RT_USING_UART1 */
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+
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+#if defined(RT_USING_UART2)
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+/* UART1 device driver structure */
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+struct serial_ringbuffer uart2_int_rx;
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+struct stm32_uart uart2 =
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+{
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+ USART2,
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+ USART2_IRQn,
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+};
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+struct rt_serial_device serial2;
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- /* DMA clock enable */
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- RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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-#endif
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+void USART2_IRQHandler(void)
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+{
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+ struct stm32_uart* uart;
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+
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+ uart = &uart2;
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+
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+ if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
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+ {
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+ rt_hw_serial_isr(&serial2);
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+ /* clear interrupt */
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+ USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
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+ }
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+ if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
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+ {
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+ /* clear interrupt */
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+ USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
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+ }
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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}
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+#endif /* RT_USING_UART2 */
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-static void GPIO_Configuration(void)
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+#if defined(RT_USING_UART3)
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+/* UART1 device driver structure */
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+struct serial_ringbuffer uart3_int_rx;
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+struct stm32_uart uart3 =
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+{
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+ USART3,
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+ USART3_IRQn,
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+};
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+struct rt_serial_device serial3;
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+
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+void USART3_IRQHandler(void)
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{
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- GPIO_InitTypeDef GPIO_InitStructure;
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+ struct stm32_uart* uart;
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+
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+ uart = &uart3;
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+
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+ if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
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+ {
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+ rt_hw_serial_isr(&serial3);
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+ /* clear interrupt */
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+ USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
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+ }
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+ if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
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+ {
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+ /* clear interrupt */
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+ USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
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+ }
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+#endif /* RT_USING_UART3 */
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+static void RCC_Configuration(void)
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+{
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#ifdef RT_USING_UART1
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- /* Configure USART1 Rx (PA.10) as input floating */
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- GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
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- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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- GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
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-
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- /* Configure USART1 Tx (PA.09) as alternate function push-pull */
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- GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
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- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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- GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
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-#endif
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+ /* Enable UART GPIO clocks */
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+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
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+ /* Enable UART clock */
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+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
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+#endif /* RT_USING_UART1 */
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#ifdef RT_USING_UART2
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- /* Configure USART2 Rx as input floating */
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- GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
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- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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- GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
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-
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- /* Configure USART2 Tx as alternate function push-pull */
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- GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
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- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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- GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
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-#endif
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+ /* Enable UART GPIO clocks */
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+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
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+ /* Enable UART clock */
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+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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+#endif /* RT_USING_UART2 */
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#ifdef RT_USING_UART3
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- /* Configure USART3 Rx as input floating */
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- GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
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- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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- GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
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-
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- /* Configure USART3 Tx as alternate function push-pull */
|
|
|
- GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
|
|
|
- GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
|
|
- GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|
|
- GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
|
|
|
-#endif
|
|
|
+ /* Enable UART GPIO clocks */
|
|
|
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
|
|
+ /* Enable UART clock */
|
|
|
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
|
|
|
+#endif /* RT_USING_UART3 */
|
|
|
}
|
|
|
|
|
|
-static void NVIC_Configuration(void)
|
|
|
+static void GPIO_Configuration(void)
|
|
|
{
|
|
|
- NVIC_InitTypeDef NVIC_InitStructure;
|
|
|
+ GPIO_InitTypeDef GPIO_InitStructure;
|
|
|
+
|
|
|
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
|
|
|
|
|
|
#ifdef RT_USING_UART1
|
|
|
- /* Enable the USART1 Interrupt */
|
|
|
- NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
|
|
- NVIC_Init(&NVIC_InitStructure);
|
|
|
-#endif
|
|
|
+ /* Configure USART Rx/tx PIN */
|
|
|
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
|
|
+ GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
|
|
|
+ GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
|
|
|
+
|
|
|
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
|
|
+ GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
|
|
|
+ GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
|
|
|
+#endif /* RT_USING_UART1 */
|
|
|
|
|
|
#ifdef RT_USING_UART2
|
|
|
- /* Enable the USART2 Interrupt */
|
|
|
- NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
|
|
- NVIC_Init(&NVIC_InitStructure);
|
|
|
-#endif
|
|
|
+ /* Configure USART Rx/tx PIN */
|
|
|
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
|
|
+ GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
|
|
|
+ GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
|
|
|
+
|
|
|
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
|
|
+ GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
|
|
|
+ GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
|
|
|
+#endif /* RT_USING_UART2 */
|
|
|
|
|
|
#ifdef RT_USING_UART3
|
|
|
- /* Enable the USART3 Interrupt */
|
|
|
- NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
|
|
- NVIC_Init(&NVIC_InitStructure);
|
|
|
-
|
|
|
- /* Enable the DMA1 Channel2 Interrupt */
|
|
|
- NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
|
|
- NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
|
|
- NVIC_Init(&NVIC_InitStructure);
|
|
|
-#endif
|
|
|
+ /* Configure USART Rx/tx PIN */
|
|
|
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
|
|
+ GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
|
|
|
+ GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
|
|
|
+
|
|
|
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
|
|
+ GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
|
|
|
+ GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
|
|
|
+#endif /* RT_USING_UART3 */
|
|
|
}
|
|
|
|
|
|
-static void DMA_Configuration(void)
|
|
|
+static void NVIC_Configuration(struct stm32_uart* uart)
|
|
|
{
|
|
|
-#if defined (RT_USING_UART3)
|
|
|
- DMA_InitTypeDef DMA_InitStructure;
|
|
|
-
|
|
|
- /* fill init structure */
|
|
|
- DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
|
|
- DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
|
|
|
- DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
|
|
|
- DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
|
|
|
- DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
|
|
|
- DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
|
|
|
- DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
|
|
|
-
|
|
|
- /* DMA1 Channel5 (triggered by USART3 Tx event) Config */
|
|
|
- DMA_DeInit(UART3_TX_DMA);
|
|
|
- DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base;
|
|
|
- DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
|
|
|
- /* As we will set them before DMA actually enabled, the DMA_MemoryBaseAddr
|
|
|
- * and DMA_BufferSize are meaningless. So just set them to proper values
|
|
|
- * which could make DMA_Init happy.
|
|
|
- */
|
|
|
- DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0;
|
|
|
- DMA_InitStructure.DMA_BufferSize = 1;
|
|
|
- DMA_Init(UART3_TX_DMA, &DMA_InitStructure);
|
|
|
- DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE);
|
|
|
- DMA_ClearFlag(DMA1_FLAG_TC2);
|
|
|
-#endif
|
|
|
+ NVIC_InitTypeDef NVIC_InitStructure;
|
|
|
+
|
|
|
+ /* Enable the USART1 Interrupt */
|
|
|
+ NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
|
|
|
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
|
|
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
|
|
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
|
|
+ NVIC_Init(&NVIC_InitStructure);
|
|
|
}
|
|
|
|
|
|
-/*
|
|
|
- * Init all related hardware in here
|
|
|
- * rt_hw_serial_init() will register all supported USART device
|
|
|
- */
|
|
|
-void rt_hw_usart_init()
|
|
|
+void rt_hw_usart_init(void)
|
|
|
{
|
|
|
- USART_InitTypeDef USART_InitStructure;
|
|
|
- USART_ClockInitTypeDef USART_ClockInitStructure;
|
|
|
+ struct stm32_uart* uart;
|
|
|
+ struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
|
|
|
|
|
- RCC_Configuration();
|
|
|
+ RCC_Configuration();
|
|
|
+ GPIO_Configuration();
|
|
|
|
|
|
- GPIO_Configuration();
|
|
|
+#ifdef RT_USING_UART1
|
|
|
+ uart = &uart1;
|
|
|
+ config.baud_rate = BAUD_RATE_115200;
|
|
|
|
|
|
- NVIC_Configuration();
|
|
|
+ serial1.ops = &stm32_uart_ops;
|
|
|
+ serial1.int_rx = &uart1_int_rx;
|
|
|
+ serial1.config = config;
|
|
|
|
|
|
- DMA_Configuration();
|
|
|
+ NVIC_Configuration(&uart1);
|
|
|
|
|
|
- /* uart init */
|
|
|
-#ifdef RT_USING_UART1
|
|
|
- USART_InitStructure.USART_BaudRate = 115200;
|
|
|
- USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
|
|
- USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
|
|
- USART_InitStructure.USART_Parity = USART_Parity_No;
|
|
|
- USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
|
|
- USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
|
|
- USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
|
|
|
- USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
|
|
|
- USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
|
|
|
- USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
|
|
|
- USART_Init(USART1, &USART_InitStructure);
|
|
|
- USART_ClockInit(USART1, &USART_ClockInitStructure);
|
|
|
-
|
|
|
- /* register uart1 */
|
|
|
- rt_hw_serial_register(&uart1_device, "uart1",
|
|
|
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
|
|
|
- &uart1);
|
|
|
-
|
|
|
- /* enable interrupt */
|
|
|
- USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
|
|
|
-#endif
|
|
|
+ /* register UART1 device */
|
|
|
+ rt_hw_serial_register(&serial1, "uart1",
|
|
|
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
|
|
|
+ uart);
|
|
|
+#endif /* RT_USING_UART1 */
|
|
|
|
|
|
#ifdef RT_USING_UART2
|
|
|
- USART_InitStructure.USART_BaudRate = 115200;
|
|
|
- USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
|
|
- USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
|
|
- USART_InitStructure.USART_Parity = USART_Parity_No;
|
|
|
- USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
|
|
- USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
|
|
- USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
|
|
|
- USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
|
|
|
- USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
|
|
|
- USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
|
|
|
- USART_Init(USART2, &USART_InitStructure);
|
|
|
- USART_ClockInit(USART2, &USART_ClockInitStructure);
|
|
|
-
|
|
|
- /* register uart2 */
|
|
|
- rt_hw_serial_register(&uart2_device, "uart2",
|
|
|
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
|
|
|
- &uart2);
|
|
|
-
|
|
|
- /* Enable USART2 DMA Rx request */
|
|
|
- USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
|
|
|
-#endif
|
|
|
+ uart = &uart2;
|
|
|
+
|
|
|
+ config.baud_rate = BAUD_RATE_115200;
|
|
|
+ serial2.ops = &stm32_uart_ops;
|
|
|
+ serial2.int_rx = &uart2_int_rx;
|
|
|
+ serial2.config = config;
|
|
|
+
|
|
|
+ NVIC_Configuration(&uart2);
|
|
|
+
|
|
|
+ /* register UART1 device */
|
|
|
+ rt_hw_serial_register(&serial2, "uart2",
|
|
|
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
|
|
+ uart);
|
|
|
+#endif /* RT_USING_UART2 */
|
|
|
|
|
|
#ifdef RT_USING_UART3
|
|
|
- USART_InitStructure.USART_BaudRate = 115200;
|
|
|
- USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
|
|
- USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
|
|
- USART_InitStructure.USART_Parity = USART_Parity_No;
|
|
|
- USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
|
|
- USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
|
|
- USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
|
|
|
- USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
|
|
|
- USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
|
|
|
- USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
|
|
|
- USART_Init(USART3, &USART_InitStructure);
|
|
|
- USART_ClockInit(USART3, &USART_ClockInitStructure);
|
|
|
-
|
|
|
- uart3_dma_tx.dma_channel= UART3_TX_DMA;
|
|
|
-
|
|
|
- /* register uart3 */
|
|
|
- rt_hw_serial_register(&uart3_device, "uart3",
|
|
|
- RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX,
|
|
|
- &uart3);
|
|
|
-
|
|
|
- /* Enable USART3 DMA Tx request */
|
|
|
- USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE);
|
|
|
-
|
|
|
- /* enable interrupt */
|
|
|
- USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
|
|
|
-#endif
|
|
|
+ uart = &uart3;
|
|
|
+
|
|
|
+ config.baud_rate = BAUD_RATE_115200;
|
|
|
+
|
|
|
+ serial3.ops = &stm32_uart_ops;
|
|
|
+ serial3.int_rx = &uart3_int_rx;
|
|
|
+ serial3.config = config;
|
|
|
+
|
|
|
+ NVIC_Configuration(&uart3);
|
|
|
+
|
|
|
+ /* register UART1 device */
|
|
|
+ rt_hw_serial_register(&serial3, "uart3",
|
|
|
+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
|
|
+ uart);
|
|
|
+#endif /* RT_USING_UART3 */
|
|
|
}
|
aozima