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@@ -20,47 +20,47 @@ struct lpc_adc
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*/
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static rt_err_t lpc_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
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{
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- struct lpc_adc *adc;
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+ struct lpc_adc *adc;
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RT_ASSERT(device != RT_NULL);
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adc = (struct lpc_adc *)device->parent.user_data;
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-
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- //enabled ADC
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- if(enabled == RT_FALSE) adc->ADC->CR &= ~(1<<21);
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- else adc->ADC->CR |= (1<<21);
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-
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- //Select the channel
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- adc->ADC->CR |= (1<<channel);
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+
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+ //enabled ADC
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+ if(enabled == RT_FALSE) adc->ADC->CR &= ~(1<<21);
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+ else adc->ADC->CR |= (1<<21);
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+
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+ //Select the channel
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+ adc->ADC->CR |= (1<<channel);
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return RT_EOK;
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}
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static rt_err_t lpc_adc_convert(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
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{
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- rt_uint32_t data;
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+ rt_uint32_t data;
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- struct lpc_adc *adc;
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+ struct lpc_adc *adc;
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RT_ASSERT(device != RT_NULL);
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adc = (struct lpc_adc *)device->parent.user_data;
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-
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- adc->ADC->CR = (LPC_ADC->CR & 0x00FFFF00) | (1<<channel) | (1 << 24);
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- while ((adc->ADC->GDR & 0x80000000) == 0);
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- adc->ADC->CR = adc->ADC->CR | (1 << 24);
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- while ((adc->ADC->GDR & 0x80000000) == 0);
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-
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- data = adc->ADC->GDR;
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- data = (data >> 4) & 0xFFF;
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-
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- *value = data;
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-
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- return RT_EOK;
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+
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+ adc->ADC->CR = (LPC_ADC->CR & 0x00FFFF00) | (1<<channel) | (1 << 24);
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+ while ((adc->ADC->GDR & 0x80000000) == 0);
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+ adc->ADC->CR = adc->ADC->CR | (1 << 24);
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+ while ((adc->ADC->GDR & 0x80000000) == 0);
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+
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+ data = adc->ADC->GDR;
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+ data = (data >> 4) & 0xFFF;
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+
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+ *value = data;
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+
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+ return RT_EOK;
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}
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static const struct rt_adc_ops lpc_adc_ops =
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{
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- lpc_adc_enabled,
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- lpc_adc_convert,
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+ lpc_adc_enabled,
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+ lpc_adc_convert,
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};
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struct lpc_adc lpc_adc0 =
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@@ -72,16 +72,16 @@ struct rt_adc_device adc0;
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int rt_hw_adc_init(void)
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{
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- rt_err_t ret = RT_EOK;
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- struct lpc_adc *adc;
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-
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- adc = &lpc_adc0;
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-
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- adc0.ops = &lpc_adc_ops;
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- adc0.parent.user_data = adc;
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-
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- //ADC port
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- LPC_IOCON->P0_23 = 0x01; //ADC0[0]
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+ rt_err_t ret = RT_EOK;
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+ struct lpc_adc *adc;
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+
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+ adc = &lpc_adc0;
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+
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+ adc0.ops = &lpc_adc_ops;
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+ adc0.parent.user_data = adc;
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+
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+ //ADC port
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+ LPC_IOCON->P0_23 = 0x01; //ADC0[0]
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LPC_IOCON->P0_24 = 0x01; //ADC0[1]
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LPC_IOCON->P0_25 = 0x01; //ADC0[2]
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LPC_IOCON->P0_26 = 0x01; //ADC0[3]
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@@ -89,12 +89,12 @@ int rt_hw_adc_init(void)
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LPC_IOCON->P1_31 = 0x03; //ADC0[5]
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LPC_IOCON->P0_12 = 0x03; //ADC0[6]
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LPC_IOCON->P0_13 = 0x03; //ADC0[7]
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-
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-
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- //clock
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- LPC_SC->PCONP |= (1U << 12);
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- //config
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- LPC_ADC->CR = 0;
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+
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+
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+ //clock
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+ LPC_SC->PCONP |= (1U << 12);
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+ //config
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+ LPC_ADC->CR = 0;
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LPC_ADC->CR = (1 << 0)| // SEL
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((PeripheralClock / 1000000 - 1) << 8) | // CLKDIV = Fpclk / 1000000 - 1
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(0 << 16)| // BURST
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@@ -103,12 +103,12 @@ int rt_hw_adc_init(void)
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(0 << 22)| // TEST1
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(1 << 24)| // START
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(0 << 27); // EDGE
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- //waiting
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+ //waiting
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while ((LPC_ADC->GDR & 0x80000000) == 0);
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- ret = rt_hw_adc_register(&adc0,"adc0",&lpc_adc_ops,adc);
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-
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- return ret;
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+ ret = rt_hw_adc_register(&adc0,"adc0",&lpc_adc_ops,adc);
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+
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+ return ret;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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