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@@ -19,23 +19,32 @@
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* Change Logs:
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* Date Author Notes
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* 2017-08-08 Yang the first version
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+ * 2018-03-24 LaiYiKeTang add hardware iic
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*/
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-
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+
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "fsl_gpio.h"
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#include "fsl_lpi2c.h"
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+#include "drv_i2c.h"
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//#define DRV_I2C_DEBUG
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#ifdef RT_USING_I2C
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-#ifdef RT_USING_I2C_BITOPS
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+#define I2C1BUS_NAME "i2c1"
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+#define I2C2BUS_NAME "i2c2"
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+#define I2C3BUS_NAME "i2c3"
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+#define I2C4BUS_NAME "i2c4"
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+
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+/* Get frequency of lpi2c clock */
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+#define LPI2C_CLOCK_FREQUENCY ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (LPI2C_CLOCK_SOURCE_DIVIDER + 1U))
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-#define I2CBUS_NAME "i2c0"
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+#if defined(RT_USING_I2C_BITOPS) && (defined(RT_USING_I2C1_BITOPS) || defined(RT_USING_I2C2_BITOPS) || \
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+ defined(RT_USING_I2C3_BITOPS) || defined(RT_USING_I2C4_BITOPS))
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-struct stm32_i2c_bit_data
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+struct rt1052_i2c_bit_data
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{
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struct
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{
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@@ -49,24 +58,24 @@ static void gpio_udelay(rt_uint32_t us)
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volatile rt_int32_t i;
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for (; us > 0; us--)
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{
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- i = 1000;
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+ i = 100;
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while (i--);
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}
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}
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-static void gpio_set_input(GPIO_Type* base, uint32_t pin)
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+static void gpio_set_input(GPIO_Type *base, uint32_t pin)
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{
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- if (base->GDIR & (1 << pin)) //output mode
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+ if (base->GDIR & (1 << pin))
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{
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base->GDIR &= ~(1 << pin);
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gpio_udelay(5);
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}
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}
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-static void gpio_set_output(GPIO_Type* base, uint32_t pin)
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+static void gpio_set_output(GPIO_Type *base, uint32_t pin)
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{
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- if (!(base->GDIR & (1 << pin))) //input mode
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- {
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+ if (!(base->GDIR & (1 << pin)))
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+ {
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base->GDIR |= (1 << pin);
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gpio_udelay(5);
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}
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@@ -74,26 +83,26 @@ static void gpio_set_output(GPIO_Type* base, uint32_t pin)
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static void gpio_set_sda(void *data, rt_int32_t state)
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{
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- struct stm32_i2c_bit_data *bd = data;
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-
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+ struct rt1052_i2c_bit_data *bd = data;
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+
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gpio_set_output(bd->sda.base, bd->sda.pin);
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-
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+
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GPIO_PinWrite(bd->sda.base, bd->sda.pin, !!state);
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}
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static void gpio_set_scl(void *data, rt_int32_t state)
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{
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- struct stm32_i2c_bit_data *bd = data;
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-
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+ struct rt1052_i2c_bit_data *bd = data;
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+
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gpio_set_output(bd->scl.base, bd->scl.pin);
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-
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+
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GPIO_PinWrite(bd->scl.base, bd->scl.pin, !!state);
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}
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static rt_int32_t gpio_get_sda(void *data)
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{
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- struct stm32_i2c_bit_data *bd = data;
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-
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+ struct rt1052_i2c_bit_data *bd = data;
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+
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gpio_set_input(bd->sda.base, bd->sda.pin);
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return GPIO_ReadPinInput(bd->sda.base, bd->sda.pin);
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@@ -101,89 +110,434 @@ static rt_int32_t gpio_get_sda(void *data)
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static rt_int32_t gpio_get_scl(void *data)
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{
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- struct stm32_i2c_bit_data *bd = data;
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-
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+ struct rt1052_i2c_bit_data *bd = data;
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+
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gpio_set_input(bd->scl.base, bd->scl.pin);
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return GPIO_ReadPinInput(bd->scl.base, bd->scl.pin);
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}
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+#endif
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-#else /* RT_USING_I2C_BITOPS */
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- // todo : add hardware i2c
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-#endif /* RT_USING_I2C_BITOPS */
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+#ifdef RT_USING_I2C1
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+#ifdef RT_USING_I2C1_BITOPS
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-int rt_hw_i2c_init(void)
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+#else
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+static struct rt1052_i2c_bus lpi2c1 =
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+{
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+ .I2C = LPI2C1,
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+ .device_name = I2C1BUS_NAME,
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+};
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+#endif /* RT_USING_I2C1_BITOPS */
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+#endif /* RT_USING_I2C1 */
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+
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+#ifdef RT_USING_I2C2
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+#ifdef RT_USING_I2C2_BITOPS
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+
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+#else
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+static struct rt1052_i2c_bus lpi2c2 =
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+{
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+ .I2C = LPI2C2,
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+ .device_name = I2C2BUS_NAME,
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+};
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+#endif /* RT_USING_I2C2_BITOPS */
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+#endif /* RT_USING_I2C2 */
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+
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+#ifdef RT_USING_I2C3
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+#ifdef RT_USING_I2C3_BITOPS
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+
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+#else
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+static struct rt1052_i2c_bus lpi2c3 =
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+{
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+ .I2C = LPI2C3,
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+ .device_name = I2C3BUS_NAME,
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+};
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+
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+#endif /* RT_USING_I2C3_BITOPS */
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+#endif /* RT_USING_I2C3 */
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+
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+#ifdef RT_USING_I2C4
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+
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+#ifdef RT_USING_I2C4_BITOPS
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+
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+#else
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+static struct rt1052_i2c_bus lpi2c4 =
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+{
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+ .I2C = LPI2C4,
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+ .device_name = I2C4BUS_NAME,
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+};
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+#endif /* RT_USING_I2C1_BITOPS */
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+
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+#endif /* RT_USING_I2C4 */
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+
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+#if (defined(RT_USING_I2C1) || defined(RT_USING_I2C2) || \
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+ defined(RT_USING_I2C3) || defined(RT_USING_I2C4))
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+
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+static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
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+ struct rt_i2c_msg msgs[],
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+ rt_uint32_t num);
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+static rt_size_t imxrt_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
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+ struct rt_i2c_msg msgs[],
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+ rt_uint32_t num);
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+static rt_err_t imxrt_i2c_bus_control(struct rt_i2c_bus_device *bus,
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+ rt_uint32_t,
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+ rt_uint32_t);
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+
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+static const struct rt_i2c_bus_device_ops imxrt_i2c_ops =
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+{
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+ imxrt_i2c_mst_xfer,
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+ imxrt_i2c_slv_xfer,
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+ imxrt_i2c_bus_control,
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+};
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+
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+#if !defined(RT_USING_I2C_BITOPS) || (!defined(RT_USING_I2C1_BITOPS) || !defined(RT_USING_I2C2_BITOPS) || \
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+ !defined(RT_USING_I2C3_BITOPS) || !defined(RT_USING_I2C4_BITOPS))
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+
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+void imxrt_lpi2c_gpio_init(struct rt1052_i2c_bus *bus)
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{
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-#ifdef RT_USING_I2C_BITOPS
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- /* register I2C1: SCL/P0_20 SDA/P0_19 */
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+ if (bus->I2C == LPI2C1)
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{
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- static struct rt_i2c_bus_device i2c_device;
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL,
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+ 1U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA,
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+ 1U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_00_LPI2C1_SCL,
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+ 0xD8B0u);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_01_LPI2C1_SDA,
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+ 0xD8B0u);
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+ }
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+ else if (bus->I2C == LPI2C2)
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+ {
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_B0_04_LPI2C2_SCL,
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+ 1U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_B0_05_LPI2C2_SDA,
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+ 1U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_B0_04_LPI2C2_SCL,
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+ 0xD8B0u);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_B0_05_LPI2C2_SDA,
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+ 0xD8B0u);
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+ }
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+ else if (bus->I2C == LPI2C3)
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+ {
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL,
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+ 1U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA,
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+ 1U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL,
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+ 0xD8B0u);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA,
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+ 0xD8B0u);
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+ }
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+ else if (bus->I2C == LPI2C4)
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+ {
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_EMC_12_LPI2C4_SCL,
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+ 1U);
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+ IOMUXC_SetPinMux(
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+ IOMUXC_GPIO_EMC_11_LPI2C4_SDA,
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+ 1U);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_EMC_12_LPI2C4_SCL,
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+ 0xD8B0u);
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+ IOMUXC_SetPinConfig(
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+ IOMUXC_GPIO_EMC_11_LPI2C4_SDA,
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+ 0xD8B0u);
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+ }
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+ else
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+ {
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+ RT_ASSERT(RT_NULL);
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+ }
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+}
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- static const struct stm32_i2c_bit_data _i2c_bdata =
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- {
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- /* SCL */ {GPIO1, 16},
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- /* SDA */ {GPIO1, 17},
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- };
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+static rt_err_t imxrt_lpi2c_configure(struct rt1052_i2c_bus *bus, lpi2c_master_config_t *cfg)
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+{
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+ RT_ASSERT(bus != RT_NULL);
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+ RT_ASSERT(cfg != RT_NULL);
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+
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+ imxrt_lpi2c_gpio_init(bus);
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+ bus->parent.ops = &imxrt_i2c_ops;
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+ LPI2C_MasterInit(bus->I2C, cfg, LPI2C_CLOCK_FREQUENCY);
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+ return RT_EOK;
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+}
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- static const struct rt_i2c_bit_ops _i2c_bit_ops =
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+#endif
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+
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+static rt_size_t imxrt_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
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+ struct rt_i2c_msg msgs[],
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+ rt_uint32_t num)
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+{
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+ struct rt1052_i2c_bus *rt1052_i2c;
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+ rt_uint32_t numbak;
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+ rt_uint16_t i;
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+ RT_ASSERT(bus != RT_NULL);
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+ rt1052_i2c = (struct rt1052_i2c_bus *) bus;
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+
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+ rt1052_i2c->msg = msgs;
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+ rt1052_i2c->msg_ptr = 0;
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+ rt1052_i2c->msg_cnt = num;
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+ rt1052_i2c->dptr = 0;
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+
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+ for (i = 0; i < num; i++)
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+ {
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+ if (rt1052_i2c->msg[i].flags & RT_I2C_RD)
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{
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- (void*)&_i2c_bdata,
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- gpio_set_sda,
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- gpio_set_scl,
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- gpio_get_sda,
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- gpio_get_scl,
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-
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- gpio_udelay,
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-
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- 50,
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- 1000
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- };
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-
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- gpio_pin_config_t pin_config = {
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- kGPIO_DigitalOutput, 0,
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- };
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-
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- CLOCK_EnableClock(kCLOCK_Iomuxc);
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-
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- IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_GPIO1_IO16, 1U);
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- IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_00_GPIO1_IO16,
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- 0xD8B0u); /* Slew Rate Field: Slow Slew Rate
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- Drive Strength Field: R0/6
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- Speed Field: medium(100MHz)
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- Open Drain Enable Field: Open Drain Enabled
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- Pull / Keep Enable Field: Pull/Keeper Enabled
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- Pull / Keep Select Field: Keeper
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- Pull Up / Down Config. Field: 22K Ohm Pull Up
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- Hyst. Enable Field: Hysteresis Disabled */
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- IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_GPIO1_IO17, 1U);
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- IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_01_GPIO1_IO17,
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- 0xD8B0u); /* Slew Rate Field: Slow Slew Rate
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- Drive Strength Field: R0/6
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- Speed Field: medium(100MHz)
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- Open Drain Enable Field: Open Drain Enabled
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- Pull / Keep Enable Field: Pull/Keeper Enabled
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- Pull / Keep Select Field: Keeper
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- Pull Up / Down Config. Field: 22K Ohm Pull Up
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- Hyst. Enable Field: Hysteresis Disabled */
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- /* Enable touch panel controller */
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- GPIO_PinInit(_i2c_bdata.sda.base, _i2c_bdata.sda.pin, &pin_config);
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- GPIO_PinInit(_i2c_bdata.scl.base, _i2c_bdata.scl.pin, &pin_config);
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-
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- GPIO_PortSet(_i2c_bdata.sda.base, _i2c_bdata.sda.pin);
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- GPIO_PortSet(_i2c_bdata.scl.base, _i2c_bdata.scl.pin);
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-
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- //RT_ASSERT(gpio_get_scl(&_i2c_bdata) != 0);
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- //RT_ASSERT(gpio_get_sda(&_i2c_bdata) != 0);
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-
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- i2c_device.priv = (void *)&_i2c_bit_ops;
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- rt_i2c_bit_add_bus(&i2c_device, I2CBUS_NAME);
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- } /* register I2C */
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-
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-#else /* RT_USING_I2C_BITOPS */
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- // Todo : add hardware i2c
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-
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-#endif /* RT_USING_I2C_BITOPS */
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+ LPI2C_MasterStart(rt1052_i2c->I2C, rt1052_i2c->msg[i].addr, kLPI2C_Read);
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+ if (LPI2C_MasterReceive(rt1052_i2c->I2C, rt1052_i2c->msg->buf, rt1052_i2c->msg->len) == kStatus_LPI2C_Nak)
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+ {
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+ i = 0;
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+ break;
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+ }
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+ }
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+ else
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+ {
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+ LPI2C_MasterStart(rt1052_i2c->I2C, rt1052_i2c->msg[i].addr, kLPI2C_Write);
|
|
|
+ if (LPI2C_MasterSend(rt1052_i2c->I2C, rt1052_i2c->msg->buf, rt1052_i2c->msg->len) == kStatus_LPI2C_Nak)
|
|
|
+ {
|
|
|
+ i = 0;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ i2c_dbg("send stop condition\n");
|
|
|
+ LPI2C_MasterStop(rt1052_i2c->I2C);
|
|
|
+
|
|
|
+ numbak = i;
|
|
|
+ rt1052_i2c->msg = RT_NULL;
|
|
|
+ rt1052_i2c->msg_ptr = 0;
|
|
|
+ rt1052_i2c->msg_cnt = 0;
|
|
|
+ rt1052_i2c->dptr = 0;
|
|
|
+ return numbak;
|
|
|
+}
|
|
|
+static rt_size_t imxrt_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
|
|
|
+ struct rt_i2c_msg msgs[],
|
|
|
+ rt_uint32_t num)
|
|
|
+{
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+static rt_err_t imxrt_i2c_bus_control(struct rt_i2c_bus_device *bus,
|
|
|
+ rt_uint32_t cmd,
|
|
|
+ rt_uint32_t arg)
|
|
|
+{
|
|
|
+ return RT_ERROR;
|
|
|
+}
|
|
|
+
|
|
|
+#endif
|
|
|
+
|
|
|
+int rt_hw_i2c_init(void)
|
|
|
+{
|
|
|
+#if !defined(RT_USING_I2C_BITOPS) || (!defined(RT_USING_I2C1_BITOPS) || !defined(RT_USING_I2C2_BITOPS) || \
|
|
|
+ !defined(RT_USING_I2C3_BITOPS) || !defined(RT_USING_I2C4_BITOPS))
|
|
|
+
|
|
|
+ lpi2c_master_config_t masterConfig = {0};
|
|
|
+
|
|
|
+ /*Clock setting for LPI2C*/
|
|
|
+ CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
|
|
|
+ CLOCK_SetDiv(kCLOCK_Lpi2cDiv, LPI2C_CLOCK_SOURCE_DIVIDER);
|
|
|
+
|
|
|
+#endif
|
|
|
+
|
|
|
+#if defined(RT_USING_I2C_BITOPS) && (defined(RT_USING_I2C1_BITOPS) || defined(RT_USING_I2C2_BITOPS) || \
|
|
|
+ defined(RT_USING_I2C3_BITOPS) || defined(RT_USING_I2C4_BITOPS))
|
|
|
+ gpio_pin_config_t pin_config =
|
|
|
+ {
|
|
|
+ kGPIO_DigitalOutput,
|
|
|
+ 0,
|
|
|
+ };
|
|
|
+#endif /* RT_USING_I2C_BITOPS= RT_USING_I2C1_BITOPS RT_USING_I2C2_BITOPS RT_USING_I2C3_BITOPS RT_USING_I2C4_BITOPS */
|
|
|
+#if defined(RT_USING_I2C1) && defined(RT_USING_I2C1_BITOPS)
|
|
|
+
|
|
|
+ static struct rt_i2c_bus_device i2c1_device;
|
|
|
+
|
|
|
+ static const struct rt1052_i2c_bit_data _i2c1_bdata =
|
|
|
+ {
|
|
|
+ /* SCL */ {GPIO1, 16},
|
|
|
+ /* SDA */ {GPIO1, 17},
|
|
|
+ };
|
|
|
+
|
|
|
+ static const struct rt_i2c_bit_ops _i2c1_bit_ops =
|
|
|
+ {
|
|
|
+ (void *) &_i2c1_bdata,
|
|
|
+ gpio_set_sda,
|
|
|
+ gpio_set_scl,
|
|
|
+ gpio_get_sda,
|
|
|
+ gpio_get_scl,
|
|
|
+
|
|
|
+ gpio_udelay,
|
|
|
+
|
|
|
+ 50,
|
|
|
+ 1000
|
|
|
+ };
|
|
|
+
|
|
|
+ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_00_GPIO1_IO16, 1U);
|
|
|
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_00_GPIO1_IO16, 0xD8B0u);
|
|
|
+ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_01_GPIO1_IO17, 1U);
|
|
|
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_01_GPIO1_IO17, 0xD8B0u);
|
|
|
+
|
|
|
+ /* Enable touch panel controller */
|
|
|
+ GPIO_PinInit(_i2c1_bdata.sda.base, _i2c1_bdata.sda.pin, &pin_config);
|
|
|
+ GPIO_PinInit(_i2c1_bdata.scl.base, _i2c1_bdata.scl.pin, &pin_config);
|
|
|
+
|
|
|
+ GPIO_PortSet(_i2c1_bdata.sda.base, _i2c1_bdata.sda.pin);
|
|
|
+ GPIO_PortSet(_i2c1_bdata.scl.base, _i2c1_bdata.scl.pin);
|
|
|
+
|
|
|
+ i2c1_device.priv = (void *) &_i2c1_bit_ops;
|
|
|
+ rt_i2c_bit_add_bus(&i2c1_device, I2C1BUS_NAME);
|
|
|
+
|
|
|
+#elif defined(RT_USING_I2C1) && !defined(RT_USING_I2C1_BITOPS)
|
|
|
+ LPI2C_MasterGetDefaultConfig(&masterConfig);
|
|
|
+ imxrt_lpi2c_configure(&lpi2c1, &masterConfig);
|
|
|
+ rt_i2c_bus_device_register(&lpi2c1.parent, lpi2c1.device_name);
|
|
|
+#endif
|
|
|
+#if defined(RT_USING_I2C2) && defined(RT_USING_I2C2_BITOPS)
|
|
|
+
|
|
|
+ static struct rt_i2c_bus_device i2c2_device;
|
|
|
+
|
|
|
+ static const struct rt1052_i2c_bit_data _i2c2_bdata =
|
|
|
+ {
|
|
|
+ /* SCL */ {GPIO2, 4},
|
|
|
+ /* SDA */ {GPIO2, 5},
|
|
|
+ };
|
|
|
+
|
|
|
+ static const struct rt_i2c_bit_ops _i2c2_bit_ops =
|
|
|
+ {
|
|
|
+ (void *) &_i2c2_bdata,
|
|
|
+ gpio_set_sda,
|
|
|
+ gpio_set_scl,
|
|
|
+ gpio_get_sda,
|
|
|
+ gpio_get_scl,
|
|
|
+
|
|
|
+ gpio_udelay,
|
|
|
+
|
|
|
+ 50,
|
|
|
+ 1000
|
|
|
+ };
|
|
|
+
|
|
|
+ IOMUXC_SetPinMux(IOMUXC_GPIO_B0_04_GPIO2_IO04, 1U);
|
|
|
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_04_GPIO2_IO04, 0xD8B0u);
|
|
|
+ IOMUXC_SetPinMux(IOMUXC_GPIO_B0_05_GPIO2_IO05, 1U);
|
|
|
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_05_GPIO2_IO05, 0xD8B0u);
|
|
|
+
|
|
|
+ /* Enable touch panel controller */
|
|
|
+ GPIO_PinInit(_i2c2_bdata.sda.base, _i2c2_bdata.sda.pin, &pin_config);
|
|
|
+ GPIO_PinInit(_i2c2_bdata.scl.base, _i2c2_bdata.scl.pin, &pin_config);
|
|
|
+
|
|
|
+ GPIO_PortSet(_i2c2_bdata.sda.base, _i2c2_bdata.sda.pin);
|
|
|
+ GPIO_PortSet(_i2c2_bdata.scl.base, _i2c2_bdata.scl.pin);
|
|
|
+
|
|
|
+
|
|
|
+ i2c2_device.priv = (void *) &_i2c2_bit_ops;
|
|
|
+ rt_i2c_bit_add_bus(&i2c2_device, I2C2BUS_NAME);
|
|
|
+
|
|
|
+#elif defined(RT_USING_I2C2) && !defined(RT_USING_I2C2_BITOPS)
|
|
|
+ LPI2C_MasterGetDefaultConfig(&masterConfig);
|
|
|
+ imxrt_lpi2c_configure(&lpi2c2, &masterConfig);
|
|
|
+ rt_i2c_bus_device_register(&lpi2c2.parent, lpi2c2.device_name);
|
|
|
+#endif
|
|
|
+#if defined(RT_USING_I2C3) && defined(RT_USING_I2C3_BITOPS)
|
|
|
+
|
|
|
+ static struct rt_i2c_bus_device i2c3_device;
|
|
|
+
|
|
|
+ static const struct rt1052_i2c_bit_data _i2c3_bdata =
|
|
|
+ {
|
|
|
+ /* SCL */ {GPIO1, 23},
|
|
|
+ /* SDA */ {GPIO1, 22},
|
|
|
+ };
|
|
|
+
|
|
|
+ static const struct rt_i2c_bit_ops _i2c3_bit_ops =
|
|
|
+ {
|
|
|
+ (void *) &_i2c3_bdata,
|
|
|
+ gpio_set_sda,
|
|
|
+ gpio_set_scl,
|
|
|
+ gpio_get_sda,
|
|
|
+ gpio_get_scl,
|
|
|
+
|
|
|
+ gpio_udelay,
|
|
|
+
|
|
|
+ 50,
|
|
|
+ 1000
|
|
|
+ };
|
|
|
+
|
|
|
+ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_GPIO1_IO23, 1U);
|
|
|
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_07_GPIO1_IO23, 0xD8B0u);
|
|
|
+ IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, 1U);
|
|
|
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, 0xD8B0u);
|
|
|
+
|
|
|
+ /* Enable touch panel controller */
|
|
|
+ GPIO_PinInit(_i2c3_bdata.sda.base, _i2c3_bdata.sda.pin, &pin_config);
|
|
|
+ GPIO_PinInit(_i2c3_bdata.scl.base, _i2c3_bdata.scl.pin, &pin_config);
|
|
|
+
|
|
|
+ GPIO_PortSet(_i2c3_bdata.sda.base, _i2c3_bdata.sda.pin);
|
|
|
+ GPIO_PortSet(_i2c3_bdata.scl.base, _i2c3_bdata.scl.pin);
|
|
|
+
|
|
|
+
|
|
|
+ i2c3_device.priv = (void *) &_i2c3_bit_ops;
|
|
|
+ rt_i2c_bit_add_bus(&i2c3_device, I2C3BUS_NAME);
|
|
|
+
|
|
|
+#elif defined(RT_USING_I2C3) && !defined(RT_USING_I2C3_BITOPS)
|
|
|
+ LPI2C_MasterGetDefaultConfig(&masterConfig);
|
|
|
+ imxrt_lpi2c_configure(&lpi2c3, &masterConfig);
|
|
|
+ rt_i2c_bus_device_register(&lpi2c3.parent, lpi2c3.device_name);
|
|
|
+#endif
|
|
|
+#if defined(RT_USING_I2C4) && defined(RT_USING_I2C4_BITOPS)
|
|
|
+
|
|
|
+ static struct rt_i2c_bus_device i2c4_device;
|
|
|
+
|
|
|
+ static const struct rt1052_i2c_bit_data _i2c4_bdata =
|
|
|
+ {
|
|
|
+ /* SCL */ {GPIO4, 12},
|
|
|
+ /* SDA */ {GPIO4, 11},
|
|
|
+ };
|
|
|
+
|
|
|
+ static const struct rt_i2c_bit_ops _i2c4_bit_ops =
|
|
|
+ {
|
|
|
+ (void *) &_i2c4_bdata,
|
|
|
+ gpio_set_sda,
|
|
|
+ gpio_set_scl,
|
|
|
+ gpio_get_sda,
|
|
|
+ gpio_get_scl,
|
|
|
+
|
|
|
+ gpio_udelay,
|
|
|
+
|
|
|
+ 50,
|
|
|
+ 1000
|
|
|
+ };
|
|
|
+
|
|
|
+ IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_12_GPIO4_IO12, 1U);
|
|
|
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_12_GPIO4_IO12, 0xD8B0u);
|
|
|
+ IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_11_GPIO4_IO11, 1U);
|
|
|
+ IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_11_GPIO4_IO11, 0xD8B0u);
|
|
|
+
|
|
|
+ /* Enable touch panel controller */
|
|
|
+ GPIO_PinInit(_i2c4_bdata.sda.base, _i2c4_bdata.sda.pin, &pin_config);
|
|
|
+ GPIO_PinInit(_i2c4_bdata.scl.base, _i2c4_bdata.scl.pin, &pin_config);
|
|
|
+
|
|
|
+ GPIO_PortSet(_i2c4_bdata.sda.base, _i2c4_bdata.sda.pin);
|
|
|
+ GPIO_PortSet(_i2c4_bdata.scl.base, _i2c4_bdata.scl.pin);
|
|
|
+
|
|
|
+
|
|
|
+ i2c4_device.priv = (void *) &_i2c4_bit_ops;
|
|
|
+ rt_i2c_bit_add_bus(&i2c4_device, I2C4BUS_NAME);
|
|
|
+
|
|
|
+#elif defined(RT_USING_I2C4) && !defined(RT_USING_I2C4_BITOPS)
|
|
|
+ LPI2C_MasterGetDefaultConfig(&masterConfig);
|
|
|
+ imxrt_lpi2c_configure(&lpi2c4, &masterConfig);
|
|
|
+ rt_i2c_bus_device_register(&lpi2c4.parent, lpi2c4.device_name);
|
|
|
+#endif
|
|
|
+
|
|
|
+
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
@@ -197,7 +551,7 @@ static rt_device_t _i2c_find(const char *name)
|
|
|
rt_device_t dev;
|
|
|
|
|
|
dev = rt_device_find(name);
|
|
|
- if (!dev)
|
|
|
+ if (!dev)
|
|
|
{
|
|
|
rt_kprintf("search device failed: %s\n", name);
|
|
|
return RT_NULL;
|
|
@@ -210,7 +564,7 @@ static rt_device_t _i2c_find(const char *name)
|
|
|
}
|
|
|
|
|
|
rt_kprintf("open i2c bus: %s\n", name);
|
|
|
-
|
|
|
+
|
|
|
return dev;
|
|
|
}
|
|
|
|
|
@@ -231,7 +585,7 @@ static void _search_i2c_device(rt_device_t dev, uint8_t cmd)
|
|
|
for (int i = 0; i <= 0x7f; i++)
|
|
|
{
|
|
|
int len;
|
|
|
-
|
|
|
+
|
|
|
msgs[0].addr = i;
|
|
|
msgs[1].addr = i;
|
|
|
len = rt_i2c_transfer((struct rt_i2c_bus_device *)dev, msgs, 2);
|
|
@@ -239,9 +593,9 @@ static void _search_i2c_device(rt_device_t dev, uint8_t cmd)
|
|
|
{
|
|
|
count++;
|
|
|
rt_kprintf("add:%02X transfer success, id: %02X\n", i, buf);
|
|
|
- }
|
|
|
+ }
|
|
|
}
|
|
|
-
|
|
|
+
|
|
|
rt_kprintf("i2c device: %d\n", count);
|
|
|
}
|
|
|
|
|
@@ -253,14 +607,16 @@ static int i2c_test(const char *name, uint8_t cmd)
|
|
|
rt_kprintf("search i2c device faild\n");
|
|
|
return -1;
|
|
|
}
|
|
|
-
|
|
|
+
|
|
|
_search_i2c_device(dev, cmd);
|
|
|
-
|
|
|
+
|
|
|
rt_device_close(dev);
|
|
|
-
|
|
|
+
|
|
|
return 0;
|
|
|
}
|
|
|
-FINSH_FUNCTION_EXPORT(i2c_test, e.g: i2c_test("i2c0", 0xA3));
|
|
|
+FINSH_FUNCTION_EXPORT(i2c_test, e.g: i2c_test("i2c1", 0xA3));
|
|
|
#endif
|
|
|
|
|
|
#endif /* RT_USING_I2C */
|
|
|
+
|
|
|
+
|