Browse Source

eliminate compile warning

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1524 bbd45198-f89e-11dd-88c7-29a3b14d5316
qiuyiuestc@gmail.com 14 years ago
parent
commit
1eca19cb01
3 changed files with 10 additions and 5 deletions
  1. 3 3
      components/finsh/SConscript
  2. 1 1
      libcpu/arm/s3c24x0/start_rvds.S
  3. 6 1
      src/SConscript

+ 3 - 3
components/finsh/SConscript

@@ -5,10 +5,10 @@ from building import *
 src	= Glob('*.c')
 CPPPATH = [RTT_ROOT + '/components/finsh']
 if rtconfig.CROSS_TOOL == 'keil':
-    LINKFLAGS = ' --keep __fsym_* --keep __vsym_*'
+    LINKFLAGS = ' --keep __fsym_* --keep __vsym_* '
 else:
-    LINKFLAGS = ''
+    LINKFLAGS = '' 
 
-group = DefineGroup('finsh', src, depend = ['RT_USING_FINSH'], CPPPATH = CPPPATH, LINKFLAGS = LINKFLAGS)
+group = DefineGroup('finsh', src, depend = ['RT_USING_FINSH'], CPPPATH = CPPPATH, LINKFLAGS = LINKFLAGS, LIBRARY = '')
 
 Return('group')

+ 1 - 1
libcpu/arm/s3c24x0/start_rvds.S

@@ -1137,7 +1137,7 @@ rt_hw_context_switch_interrupt_do   PROC
                 MRS     r3,  spsr       ; get cpsr of interrupt thread
 
                 ; switch to SVC mode and no interrupt
-                MSR     cpsr_c, #I_Bit|F_Bit|Mode_SVC
+				MSR 	cpsr_c, #I_Bit:OR:F_Bit:OR:Mode_SVC
 
                 STMFD   sp!, {r2}       ; push old task's pc
                 STMFD   sp!, {r4-r12,lr}; push old task's lr,r12-r4

+ 6 - 1
src/SConscript

@@ -1,8 +1,13 @@
 Import('RTT_ROOT')
+Import('rtconfig')
 from building import *
 
 src     = Glob('*.c')
 CPPPATH = [RTT_ROOT + '/include']
-group   = DefineGroup('Kernel', src, depend = [''], CPPPATH = CPPPATH)
+if rtconfig.CROSS_TOOL == 'keil' and GetDepend('RT_USING_MODULE') == True:
+    LINKFLAGS = ' --keep __rtmsym_* '
+else:
+    LINKFLAGS = '' 
+group   = DefineGroup('Kernel', src, depend = [''], CPPPATH = CPPPATH, LINKFLAGS = LINKFLAGS)
 
 Return('group')