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@@ -71,6 +71,23 @@ void rt_hw_board_init(void)
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rt_kprintf("current sr: 0x%08x\n", read_c0_status());
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}
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+#define __raw_out_put(unr) \
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+ while (*ptr) \
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+ { \
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+ if (*ptr == '\n') \
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+ { \
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+ /* FIFO status, contain valid data */ \
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+ while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
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+ /* write data */ \
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+ UART_DAT(UART##unr##_BASE) = '\r'; \
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+ } \
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+ /* FIFO status, contain valid data */ \
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+ while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
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+ /* write data */ \
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+ UART_DAT(UART##unr##_BASE) = *ptr; \
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+ ptr ++; \
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+ }
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+
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/* UART line status register value */
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#define UARTLSR_ERROR (1 << 7)
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#define UARTLSR_TE (1 << 6)
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@@ -82,24 +99,13 @@ void rt_hw_board_init(void)
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#define UARTLSR_DR (1 << 0)
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void rt_hw_console_output(const char *ptr)
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{
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- /* stream mode */
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- while (*ptr)
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- {
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- if (*ptr == '\n')
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- {
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- /* FIFO status, contain valid data */
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- while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
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- /* write data */
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- UART_DAT(UART0_BASE) = '\r';
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- }
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-
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- /* FIFO status, contain valid data */
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- while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
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- /* write data */
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- UART_DAT(UART0_BASE) = *ptr;
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-
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- ptr ++;
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- }
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+#if defined(RT_USING_UART0)
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+ __raw_out_put(0);
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+#elif defined(RT_USING_UART1)
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+ __raw_out_put(1);
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+#elif defined(RT_USING_UART3)
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+ __raw_out_put(3);
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+#endif
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}
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/*@}*/
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