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+/*
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+ * Copyright (c) 2006-2023, RT-Thread Development Team
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ *
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+ * Change Logs:
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+ * Date Author Notes
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+ * 2009-02-05 Bernard first version
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+ * 2009-10-25 Bernard fix rt_serial_read bug when there is no data
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+ * in the buffer.
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+ * 2010-03-29 Bernard cleanup code.
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+ * 2010-03-30 Kyle Ported from STM32 to AVR32.
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+ * 2023-10-13 Raman Gopalan UART driver for at32uc3b: Initial version
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+ */
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+
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+#include <rthw.h>
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+#include <rtthread.h>
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+#include <rtdevice.h>
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+#include "drv_uart.h"
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+
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+#ifdef RT_USING_SERIAL
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+
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+#include "compiler.h"
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+#include "usart.h"
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+#include "gpio.h"
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+#include "intc.h"
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+
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+#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1)
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+ #error "Please define at least one BSP_USING_UARTx"
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+ /* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
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+#endif
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+
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+#ifdef BSP_USING_UART0
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+ void avr32uc3b_uart0_isr(void);
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+#endif
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+
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+#ifdef BSP_USING_UART1
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+ void avr32uc3b_uart1_isr(void);
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+#endif
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+
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+#ifdef BSP_USING_UART2
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+ void avr32uc3b_uart2_isr(void);
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+#endif
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+
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+/* AVR32UC3B uart driver */
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+struct avr32uc3b_uart_dev
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+{
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+ rt_serial_t parent;
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+ avr32_usart_t *instance;
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+ rt_uint32_t irqno;
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+ rt_uint32_t irq_level;
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+ rt_uint32_t tx_pin;
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+ rt_uint32_t tx_pin_function;
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+ rt_uint32_t rx_pin;
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+ rt_uint32_t rx_pin_function;
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+ void (*uart_isr)(void);
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+};
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+
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+static struct avr32uc3b_uart_dev uart_dev[] =
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+{
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+#ifdef BSP_USING_UART0
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+ {
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+ .instance = (avr32_usart_t *)&AVR32_USART0,
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+ .irqno = AVR32_USART0_IRQ,
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+ .irq_level = AVR32_INTC_INT0,
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+ .tx_pin = BSP_UART0_TX_PIN,
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+ .tx_pin_function = BSP_UART0_TX_PIN_FUNCTION,
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+ .rx_pin = BSP_UART0_RX_PIN,
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+ .rx_pin_function = BSP_UART0_RX_PIN_FUNCTION,
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+ .uart_isr = avr32uc3b_uart0_isr,
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+ },
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+#endif
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+
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+#ifdef BSP_USING_UART1
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+ {
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+ .instance = (avr32_usart_t *)&AVR32_USART1,
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+ .irqno = AVR32_USART1_IRQ,
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+ .irq_level = AVR32_INTC_INT0,
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+ .tx_pin = BSP_UART1_TX_PIN,
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+ .tx_pin_function = BSP_UART1_TX_PIN_FUNCTION,
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+ .rx_pin = BSP_UART1_RX_PIN,
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+ .rx_pin_function = BSP_UART1_RX_PIN_FUNCTION,
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+ .uart_isr = avr32uc3b_uart1_isr,
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+ },
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+#endif
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+
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+#ifdef BSP_USING_UART2
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+ {
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+ .instance = (avr32_usart_t *)&AVR32_USART2,
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+ .irqno = AVR32_USART2_IRQ,
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+ .irq_level = AVR32_INTC_INT0,
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+ .tx_pin = BSP_UART2_TX_PIN,
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+ .tx_pin_function = BSP_UART2_TX_PIN_FUNCTION,
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+ .rx_pin = BSP_UART2_RX_PIN,
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+ .rx_pin_function = BSP_UART2_RX_PIN_FUNCTION,
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+ .uart_isr = avr32uc3b_uart2_isr,
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+ },
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+#endif
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+};
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+
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+enum
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+{
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+#ifdef BSP_USING_UART0
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+ UART0_INDEX,
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+#endif
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+
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+#ifdef BSP_USING_UART1
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+ UART1_INDEX,
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+#endif
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+
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+#ifdef BSP_USING_UART2
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+ UART2_INDEX,
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+#endif
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+};
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+
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+#ifdef BSP_USING_UART0
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+void avr32uc3b_uart0_isr(void)
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+{
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+ rt_interrupt_enter();
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+ /* read interrupt status and clear it */
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+ if (usart_test_hit(&AVR32_USART0)) /* rx ind */
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+ {
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+ rt_hw_serial_isr(&uart_dev[UART0_INDEX].parent, RT_SERIAL_EVENT_RX_IND);
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+ }
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+
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+ rt_interrupt_leave();
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+}
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+#endif
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+
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+#ifdef BSP_USING_UART1
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+void avr32uc3b_uart1_isr(void)
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+{
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+ rt_interrupt_enter();
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+ /* read interrupt status and clear it */
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+ if (usart_test_hit(&AVR32_USART1)) /* rx ind */
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+ {
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+ rt_hw_serial_isr(&uart_dev[UART1_INDEX].parent, RT_SERIAL_EVENT_RX_IND);
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+ }
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+
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+ rt_interrupt_leave();
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+}
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+#endif
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+
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+#ifdef BSP_USING_UART2
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+void avr32uc3b_uart2_isr(void)
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+{
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+ rt_interrupt_enter();
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+ /* read interrupt status and clear it */
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+ if (usart_test_hit(&AVR32_USART2)) /* rx ind */
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+ {
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+ rt_hw_serial_isr(&uart_dev[UART2_INDEX].parent, RT_SERIAL_EVENT_RX_IND);
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+ }
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+
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+ rt_interrupt_leave();
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+}
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+#endif
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+
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+/**
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+ * @addtogroup AVR32UC3
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+ */
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+/*@{*/
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+
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+static rt_err_t avr32uc3b_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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+{
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+ struct avr32uc3b_uart_dev *uart = RT_NULL;
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+ unsigned char l_parity;
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+ unsigned short l_stop;
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+ unsigned long l_baud;
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+ unsigned char l_data_bits;
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+
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+ RT_ASSERT(serial != RT_NULL);
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+ RT_ASSERT(cfg != RT_NULL);
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+
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+ uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
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+ // Set the TX and RX pins by using the function select on the GPIO
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+ // Set datasheet for more information on function select
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+ gpio_enable_module_pin(uart->tx_pin, uart->tx_pin_function);
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+ gpio_enable_module_pin(uart->rx_pin, uart->rx_pin_function);
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+
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+ /* Parity settings */
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+ if (cfg->parity == PARITY_ODD)
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+ l_parity = USART_ODD_PARITY;
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+ else if (cfg->parity == PARITY_EVEN)
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+ l_parity = USART_EVEN_PARITY;
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+ else
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+ l_parity = USART_NO_PARITY;
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+
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+ /* Stopbit settings */
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+ if (cfg->stop_bits == STOP_BITS_1)
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+ l_stop = USART_1_STOPBIT;
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+ else
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+ l_stop = USART_2_STOPBITS;
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+
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+ l_baud = cfg->baud_rate;
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+ l_data_bits = cfg->data_bits;
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+
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+ /* Populate */
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+ usart_options_t usart_options = {
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+ .baudrate = l_baud,
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+ .charlength = l_data_bits,
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+ .paritytype = l_parity,
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+ .stopbits = l_stop,
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+ .channelmode = USART_NORMAL_CHMODE
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+ };
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+
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+ usart_init_rs232(uart->instance, &usart_options, FCPU);
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+
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+ return RT_EOK;
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+}
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+
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+static rt_err_t avr32uc3b_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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+{
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+ struct avr32uc3b_uart_dev *uart = RT_NULL;
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+ RT_ASSERT(serial != RT_NULL);
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+ uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
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+
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+ switch (cmd)
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+ {
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+ /* enable interrupt */
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+ case RT_DEVICE_CTRL_SET_INT:
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+ // Set up a RX interrupt
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+ // We need to set up the handler first
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+ // And set up and enable the interrupt handlers
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+ //INTC_init_interrupts();
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+ INTC_register_interrupt(uart->uart_isr, uart->irqno, uart->irq_level);
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+ //*(uart->instance)->ier = AVR32_USART_IER_RXRDY_MASK;
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+ AVR32_USART1.ier = AVR32_USART_IER_RXRDY_MASK;
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+ break;
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+ }
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+ return RT_EOK;
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+}
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+
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+static int avr32uc3b_uart_putc(struct rt_serial_device *serial, char c)
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+{
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+ struct avr32uc3b_uart_dev *uart = RT_NULL;
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+ RT_ASSERT(serial != RT_NULL);
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+ uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
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+ usart_putchar(uart->instance, c);
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+
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+ return 1;
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+}
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+
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+static int avr32uc3b_uart_getc(struct rt_serial_device *serial)
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+{
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+ struct avr32uc3b_uart_dev *uart = RT_NULL;
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+ RT_ASSERT(serial != RT_NULL);
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+ uart = rt_container_of(serial, struct avr32uc3b_uart_dev, parent);
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+
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+ int ch;
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+ if (usart_read_char(uart->instance, &ch) == USART_SUCCESS)
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+ return ch;
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+
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+ return -1;
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+}
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+
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+const static struct rt_uart_ops _uart_ops =
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+{
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+ avr32uc3b_uart_configure,
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+ avr32uc3b_uart_control,
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+ avr32uc3b_uart_putc,
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+ avr32uc3b_uart_getc,
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+ RT_NULL,
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+};
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+
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+/*
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+ * UART Initiation
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+ */
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+int rt_hw_uart_init(void)
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+{
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+ rt_err_t ret = RT_EOK;
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+
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+ struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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+
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+#ifdef BSP_USING_UART0
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+ uart_dev[UART0_INDEX].parent.ops = &_uart_ops;
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+ uart_dev[UART0_INDEX].parent.config = config;
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+
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+ ret = rt_hw_serial_register(&uart_dev[UART0_INDEX].parent,
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+ "uart0",
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+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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+ &uart_dev[UART0_INDEX]);
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+ RT_ASSERT(ret == RT_EOK);
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+#endif
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+
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+#ifdef BSP_USING_UART1
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+ uart_dev[UART1_INDEX].parent.ops = &_uart_ops;
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+ uart_dev[UART1_INDEX].parent.config = config;
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+
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+ ret = rt_hw_serial_register(&uart_dev[UART1_INDEX].parent,
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+ "uart1",
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+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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+ &uart_dev[UART1_INDEX]);
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+ RT_ASSERT(ret == RT_EOK);
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+#endif
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+
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+#ifdef BSP_USING_UART2
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+ uart_dev[UART2_INDEX].parent.ops = &_uart_ops;
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+ uart_dev[UART2_INDEX].parent.config = config;
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+
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+ ret = rt_hw_serial_register(&uart_dev[UART2_INDEX].parent,
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+ "uart2",
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+ RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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+ &uart_dev[UART2_INDEX]);
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+ RT_ASSERT(ret == RT_EOK);
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+#endif
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+
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+
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+ return ret;
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+}
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+
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+#endif /* RT_USING_SERIAL */
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+
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+/*@}*/
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