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@@ -7,6 +7,7 @@
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* Date Author Notes
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* Date Author Notes
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* 2020-10-14 wangqiang the first version
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* 2020-10-14 wangqiang the first version
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* 2022-08-29 xjy198903 add rt1170 support
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* 2022-08-29 xjy198903 add rt1170 support
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+ * 2024-04-18 Jiading add a parameter passed into rt_phy_ops APIs
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*/
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*/
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#include <rtthread.h>
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#include <rtthread.h>
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@@ -140,7 +141,7 @@ static rt_phy_status rt_phy_init(void *object, rt_uint32_t phy_addr, rt_uint32_t
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/* Initialization after PHY stars to work. */
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/* Initialization after PHY stars to work. */
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while ((id_reg != PHY_CONTROL_ID1) && (counter != 0))
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while ((id_reg != PHY_CONTROL_ID1) && (counter != 0))
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{
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{
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- phy_ksz8081.ops->read(PHY_ID1_REG, &id_reg);
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+ phy_ksz8081.ops->read(NULL, PHY_ID1_REG, &id_reg);
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counter--;
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counter--;
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}
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}
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@@ -151,17 +152,17 @@ static rt_phy_status rt_phy_init(void *object, rt_uint32_t phy_addr, rt_uint32_t
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/* Reset PHY. */
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/* Reset PHY. */
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counter = PHY_TIMEOUT_COUNT;
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counter = PHY_TIMEOUT_COUNT;
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- result = phy_ksz8081.ops->write(PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK);
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+ result = phy_ksz8081.ops->write(NULL, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK);
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if (PHY_STATUS_OK == result)
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if (PHY_STATUS_OK == result)
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{
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{
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#if defined(FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE)
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#if defined(FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE)
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rt_uint32_t data = 0;
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rt_uint32_t data = 0;
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- result = phy_ksz8081.ops->read(PHY_CONTROL2_REG, &data);
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+ result = phy_ksz8081.ops->read(NULL, PHY_CONTROL2_REG, &data);
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if (PHY_STATUS_FAIL == result)
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if (PHY_STATUS_FAIL == result)
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{
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{
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return PHY_STATUS_FAIL;
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return PHY_STATUS_FAIL;
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}
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}
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- result = phy_ksz8081.ops->write(PHY_CONTROL2_REG, (data | PHY_CTL2_REFCLK_SELECT_MASK));
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+ result = phy_ksz8081.ops->write(NULL, PHY_CONTROL2_REG, (data | PHY_CTL2_REFCLK_SELECT_MASK));
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if (PHY_STATUS_FAIL == result)
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if (PHY_STATUS_FAIL == result)
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{
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{
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return PHY_STATUS_FAIL;
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return PHY_STATUS_FAIL;
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@@ -169,21 +170,21 @@ static rt_phy_status rt_phy_init(void *object, rt_uint32_t phy_addr, rt_uint32_t
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#endif /* FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE */
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#endif /* FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE */
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/* Set the negotiation. */
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/* Set the negotiation. */
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- result = phy_ksz8081.ops->write(PHY_AUTONEG_ADVERTISE_REG,
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+ result = phy_ksz8081.ops->write(NULL, PHY_AUTONEG_ADVERTISE_REG,
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(PHY_100BASETX_FULLDUPLEX_MASK | PHY_100BASETX_HALFDUPLEX_MASK |
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(PHY_100BASETX_FULLDUPLEX_MASK | PHY_100BASETX_HALFDUPLEX_MASK |
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PHY_10BASETX_FULLDUPLEX_MASK | PHY_10BASETX_HALFDUPLEX_MASK | 0x1U));
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PHY_10BASETX_FULLDUPLEX_MASK | PHY_10BASETX_HALFDUPLEX_MASK | 0x1U));
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if (PHY_STATUS_OK == result)
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if (PHY_STATUS_OK == result)
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{
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{
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- result = phy_ksz8081.ops->write(PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK));
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+ result = phy_ksz8081.ops->write(NULL, PHY_BASICCONTROL_REG, (PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK));
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if (PHY_STATUS_OK == result)
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if (PHY_STATUS_OK == result)
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{
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{
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/* Check auto negotiation complete. */
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/* Check auto negotiation complete. */
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while (counter--)
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while (counter--)
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{
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{
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- result = phy_ksz8081.ops->read(PHY_BASICSTATUS_REG, &bss_reg);
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+ result = phy_ksz8081.ops->read(NULL, PHY_BASICSTATUS_REG, &bss_reg);
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if (PHY_STATUS_OK == result)
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if (PHY_STATUS_OK == result)
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{
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{
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- phy_ksz8081.ops->read(PHY_CONTROL1_REG, &ctl_reg);
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+ phy_ksz8081.ops->read(NULL, PHY_CONTROL1_REG, &ctl_reg);
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if (((bss_reg & PHY_BSTATUS_AUTONEGCOMP_MASK) != 0) && (ctl_reg & PHY_LINK_READY_MASK))
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if (((bss_reg & PHY_BSTATUS_AUTONEGCOMP_MASK) != 0) && (ctl_reg & PHY_LINK_READY_MASK))
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{
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{
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/* Wait a moment for Phy status stable. */
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/* Wait a moment for Phy status stable. */
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@@ -208,7 +209,7 @@ static rt_phy_status rt_phy_init(void *object, rt_uint32_t phy_addr, rt_uint32_t
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}
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}
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-static rt_phy_status rt_phy_read(rt_uint32_t reg, rt_uint32_t *data)
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+static rt_phy_status rt_phy_read(rt_phy_t *phy, rt_uint32_t reg, rt_uint32_t *data)
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{
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{
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rt_mdio_t *mdio_bus = phy_ksz8081.bus;
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rt_mdio_t *mdio_bus = phy_ksz8081.bus;
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rt_uint32_t device_id = phy_ksz8081.addr;
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rt_uint32_t device_id = phy_ksz8081.addr;
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@@ -220,7 +221,7 @@ static rt_phy_status rt_phy_read(rt_uint32_t reg, rt_uint32_t *data)
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return PHY_STATUS_FAIL;
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return PHY_STATUS_FAIL;
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}
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}
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-static rt_phy_status rt_phy_write(rt_uint32_t reg, rt_uint32_t data)
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+static rt_phy_status rt_phy_write(rt_phy_t *phy, rt_uint32_t reg, rt_uint32_t data)
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{
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{
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rt_mdio_t *mdio_bus = phy_ksz8081.bus;
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rt_mdio_t *mdio_bus = phy_ksz8081.bus;
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rt_uint32_t device_id = phy_ksz8081.addr;
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rt_uint32_t device_id = phy_ksz8081.addr;
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@@ -232,7 +233,7 @@ static rt_phy_status rt_phy_write(rt_uint32_t reg, rt_uint32_t data)
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return PHY_STATUS_FAIL;
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return PHY_STATUS_FAIL;
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}
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}
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-static rt_phy_status rt_phy_loopback(rt_uint32_t mode, rt_uint32_t speed, rt_bool_t enable)
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+static rt_phy_status rt_phy_loopback(rt_phy_t *phy, rt_uint32_t mode, rt_uint32_t speed, rt_bool_t enable)
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{
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{
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rt_uint32_t data = 0;
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rt_uint32_t data = 0;
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rt_phy_status result;
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rt_phy_status result;
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@@ -250,15 +251,15 @@ static rt_phy_status rt_phy_loopback(rt_uint32_t mode, rt_uint32_t speed, rt_boo
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{
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{
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data = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK;
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data = PHY_BCTL_DUPLEX_MASK | PHY_BCTL_LOOP_MASK;
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}
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}
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- return phy_ksz8081.ops->write(PHY_BASICCONTROL_REG, data);
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+ return phy_ksz8081.ops->write(NULL, PHY_BASICCONTROL_REG, data);
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}
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}
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else
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else
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{
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{
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/* First read the current status in control register. */
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/* First read the current status in control register. */
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- result = phy_ksz8081.ops->read(PHY_CONTROL2_REG, &data);
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+ result = phy_ksz8081.ops->read(NULL, PHY_CONTROL2_REG, &data);
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if (PHY_STATUS_OK == result)
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if (PHY_STATUS_OK == result)
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{
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{
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- return phy_ksz8081.ops->write(PHY_CONTROL2_REG, (data | PHY_CTL2_REMOTELOOP_MASK));
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+ return phy_ksz8081.ops->write(NULL, PHY_CONTROL2_REG, (data | PHY_CTL2_REMOTELOOP_MASK));
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}
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}
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}
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}
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}
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}
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@@ -268,33 +269,33 @@ static rt_phy_status rt_phy_loopback(rt_uint32_t mode, rt_uint32_t speed, rt_boo
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if (PHY_LOCAL_LOOP == mode)
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if (PHY_LOCAL_LOOP == mode)
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{
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{
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/* First read the current status in control register. */
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/* First read the current status in control register. */
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- result = phy_ksz8081.ops->read(PHY_BASICCONTROL_REG, &data);
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+ result = phy_ksz8081.ops->read(NULL, PHY_BASICCONTROL_REG, &data);
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if (PHY_STATUS_OK == result)
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if (PHY_STATUS_OK == result)
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{
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{
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data &= ~PHY_BCTL_LOOP_MASK;
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data &= ~PHY_BCTL_LOOP_MASK;
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- return phy_ksz8081.ops->write(PHY_BASICCONTROL_REG, (data | PHY_BCTL_RESTART_AUTONEG_MASK));
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+ return phy_ksz8081.ops->write(NULL, PHY_BASICCONTROL_REG, (data | PHY_BCTL_RESTART_AUTONEG_MASK));
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}
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}
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}
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}
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else
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else
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{
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{
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/* First read the current status in control one register. */
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/* First read the current status in control one register. */
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- result = phy_ksz8081.ops->read(PHY_CONTROL2_REG, &data);
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+ result = phy_ksz8081.ops->read(NULL, PHY_CONTROL2_REG, &data);
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if (PHY_STATUS_OK == result)
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if (PHY_STATUS_OK == result)
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{
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{
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- return phy_ksz8081.ops->write(PHY_CONTROL2_REG, (data & ~PHY_CTL2_REMOTELOOP_MASK));
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+ return phy_ksz8081.ops->write(NULL, PHY_CONTROL2_REG, (data & ~PHY_CTL2_REMOTELOOP_MASK));
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}
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}
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}
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}
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}
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}
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return result;
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return result;
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}
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}
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-static rt_phy_status get_link_status(rt_bool_t *status)
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+static rt_phy_status get_link_status(rt_phy_t *phy, rt_bool_t *status)
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{
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{
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rt_phy_status result;
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rt_phy_status result;
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rt_uint32_t data;
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rt_uint32_t data;
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/* Read the basic status register. */
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/* Read the basic status register. */
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- result = phy_ksz8081.ops->read(PHY_BASICSTATUS_REG, &data);
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+ result = phy_ksz8081.ops->read(NULL, PHY_BASICSTATUS_REG, &data);
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if (PHY_STATUS_OK == result)
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if (PHY_STATUS_OK == result)
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{
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{
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if (!(PHY_BSTATUS_LINKSTATUS_MASK & data))
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if (!(PHY_BSTATUS_LINKSTATUS_MASK & data))
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@@ -310,13 +311,13 @@ static rt_phy_status get_link_status(rt_bool_t *status)
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}
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}
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return result;
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return result;
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}
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}
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-static rt_phy_status get_link_speed_duplex(rt_uint32_t *speed, rt_uint32_t *duplex)
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+static rt_phy_status get_link_speed_duplex(rt_phy_t *phy, rt_uint32_t *speed, rt_uint32_t *duplex)
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{
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{
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rt_phy_status result = PHY_STATUS_OK;
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rt_phy_status result = PHY_STATUS_OK;
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rt_uint32_t data, ctl_reg;
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rt_uint32_t data, ctl_reg;
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/* Read the control two register. */
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/* Read the control two register. */
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- result = phy_ksz8081.ops->read(PHY_CONTROL1_REG, &ctl_reg);
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+ result = phy_ksz8081.ops->read(NULL, PHY_CONTROL1_REG, &ctl_reg);
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if (PHY_STATUS_OK == result)
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if (PHY_STATUS_OK == result)
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{
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{
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data = ctl_reg & PHY_CTL1_SPEEDUPLX_MASK;
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data = ctl_reg & PHY_CTL1_SPEEDUPLX_MASK;
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