[libcpu/arm]add __rt_ffs() for armclang in CORTEX M3/4/7

libcpu/arm/cortex-m3/cpuport.c

@@ -11,6 +11,7 @@
  * 2012-12-23   aozima      stack addr align to 8byte.
  * 2012-12-29   Bernard     Add exception hook.
  * 2013-07-09   aozima      enhancement hard fault exception handler.
+ * 2019-07-03   yangjie     add __rt_ffs() for armclang.
  */
 
 #include <rtthread.h>
@@ -382,6 +383,25 @@ __asm int __rt_ffs(int value)
 exit
     BX      lr
 }
+#elif defined(__CLANG_ARM)
+int __rt_ffs(int value)
+{
+    __asm volatile(
+        "CMP     r0, #0x00            \n"
+        "BEQ     exit                 \n"
+
+        "RBIT    r0, r0               \n"
+        "CLZ     r0, r0               \n"
+        "ADDS    r0, r0, #0x01        \n"
+
+        "exit:                        \n"
+        "BX      lr                   \n"
+
+        : "=r"(value)
+        : "r"(value)
+    );
+    return value;
+}
 #elif defined(__IAR_SYSTEMS_ICC__)
 int __rt_ffs(int value)
 {

libcpu/arm/cortex-m4/cpuport.c

@@ -14,6 +14,7 @@
  * 2012-12-29     Bernard      Add exception hook.
  * 2013-06-23     aozima       support lazy stack optimized.
  * 2018-07-24     aozima       enhancement hard fault exception handler.
+ * 2019-07-03     yangjie      add __rt_ffs() for armclang.
  */
 
 #include <rtthread.h>
@@ -453,7 +454,7 @@ RT_WEAK void rt_hw_cpu_reset(void)
  * @return return the index of the first bit set. If value is 0, then this function
  * shall return 0.
  */
-#if defined(__CC_ARM) || defined(__CLANG_ARM)
+#if defined(__CC_ARM) 
 __asm int __rt_ffs(int value)
 {
     CMP     r0, #0x00
@@ -466,6 +467,25 @@ __asm int __rt_ffs(int value)
 exit
     BX      lr
 }
+#elif defined(__CLANG_ARM)
+int __rt_ffs(int value)
+{
+    __asm volatile(
+        "CMP     r0, #0x00            \n"
+        "BEQ     exit                 \n"
+
+        "RBIT    r0, r0               \n"
+        "CLZ     r0, r0               \n"
+        "ADDS    r0, r0, #0x01        \n"
+
+        "exit:                        \n"
+        "BX      lr                   \n"
+
+        : "=r"(value)
+        : "r"(value)
+    );
+    return value;
+}
 #elif defined(__IAR_SYSTEMS_ICC__)
 int __rt_ffs(int value)
 {

libcpu/arm/cortex-m7/cpuport.c

@@ -14,6 +14,7 @@
  * 2012-12-29     Bernard      Add exception hook.
  * 2013-06-23     aozima       support lazy stack optimized.
  * 2018-07-24     aozima       enhancement hard fault exception handler.
+ * 2019-07-03     yangjie      add __rt_ffs() for armclang.
  */
 
 #include <rtthread.h>
@@ -453,7 +454,7 @@ RT_WEAK void rt_hw_cpu_reset(void)
  * @return return the index of the first bit set. If value is 0, then this function
  * shall return 0.
  */
-#if defined(__CC_ARM) || defined(__CLANG_ARM)
+#if defined(__CC_ARM)
 __asm int __rt_ffs(int value)
 {
     CMP     r0, #0x00
@@ -466,6 +467,25 @@ __asm int __rt_ffs(int value)
 exit
     BX      lr
 }
+#elif defined(__CLANG_ARM)
+int __rt_ffs(int value)
+{
+    __asm volatile(
+        "CMP     r0, #0x00            \n"
+        "BEQ     exit                 \n"
+
+        "RBIT    r0, r0               \n"
+        "CLZ     r0, r0               \n"
+        "ADDS    r0, r0, #0x01        \n"
+
+        "exit:                        \n"
+        "BX      lr                   \n"
+
+        : "=r"(value)
+        : "r"(value)
+    );
+    return value;
+}
 #elif defined(__IAR_SYSTEMS_ICC__)
 int __rt_ffs(int value)
 {