add sep4020 porting

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@776 bbd45198-f89e-11dd-88c7-29a3b14d5316

bsp/sep4020/Ext_SDRAM.ini

@@ -0,0 +1,40 @@
+/******************************************************************************/
+/* Ext_RAM.INI: External RAM (SDRAM) Initialization File                      */
+/******************************************************************************/
+// <<< Use Configuration Wizard in Context Menu >>>                           // 
+/******************************************************************************/
+/* This file is part of the uVision/ARM development tools.                    */
+/* Copyright (c) 2005-2008 Keil Software. All rights reserved.                */
+/* This software may only be used under the terms of a valid, current,        */
+/* end user licence from KEIL for a compatible version of KEIL software       */
+/* development tools. Nothing else gives you the right to use this software.  */
+/******************************************************************************/
+
+
+FUNC void SetupForStart (void) {
+
+// <o> Program Entry Point
+  PC = 0x30000000;
+}
+
+
+FUNC void Init (void) {
+
+  _WDWORD(0x1000200C, 0x00000000);      // Disable Watchdog
+
+                                        // Clock Setup 
+                                        
+  _WDWORD(0x10001000, 0x00fa00fa);      // 
+  _WDWORD(0x10001014, 0x00000001);      // 
+  _WDWORD(0x10001004, 0x00004009);      // 
+  _WDWORD(0x10001004, 0x0000C009);       // 
+  _WDWORD(0x11000018, 0x1E104177);      // 
+  _WDWORD(0x1100001c, 0x80001860);      // 
+
+
+}
+
+Init();                                 // Initialize memory
+LOAD build\rtthread-sep4020.axf INCREMENTAL         // Download program
+SetupForStart();                        // Setup for Running
+g, main                                 // Goto Main

bsp/sep4020/Memory.ini

@@ -0,0 +1,14 @@
+/******************************************************************************/
+/* MEMORY.INI: Memory Debug Initialization File                               */
+/******************************************************************************/
+/* This file is part of the uVision/ARM development tools.                    */
+/* Copyright (c) 2005-2006 Keil Software. All rights reserved.                */
+/* This software may only be used under the terms of a valid, current,        */
+/* end user licence from KEIL for a compatible version of KEIL software       */
+/* development tools. Nothing else gives you the right to use this software.  */
+/******************************************************************************/
+
+MAP 0x00000000,0x0000FFFF READ EXEC    // External ROM
+MAP 0x30000000,0x31FFFFFF READ WRITE   // External RAM
+MAP 0x10000000,0x11000000 READ WRITE
+MAP 0x11000000,0x12000000 READ WRITE

bsp/sep4020/application.c

@@ -0,0 +1,86 @@
+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-05     Bernard      the first version
+ */
+
+/**
+ * @addtogroup SEP4020
+ */
+/*@{*/
+
+#include <rtthread.h>
+#include "board.h"
+
+static void rt_thread_entry_led1(void* parameter)
+{
+    /* init led configuration */
+    /* rt_hw_led_init(); */  
+
+    while (1)
+    {
+        /* led on */
+        //rt_kprintf("led1 on\r\n");
+        GPIO_PORTE_DATA |= 0x1<<3;
+        rt_thread_delay(50); /* sleep 0.5 second and switch to other thread */
+
+        /* led off */
+        //rt_kprintf("led1 off\r\n");
+        GPIO_PORTE_DATA &= ~(0x1<<3);
+        rt_thread_delay(50);
+    }
+}
+
+char thread_led2_stack[1024];
+struct rt_thread thread_led2;
+void rt_thread_entry_led2(void* parameter)
+{
+    unsigned int count=0;
+    while (1)
+    {
+        /* led on */
+        //rt_kprintf("led2 on,count : %d\r\n",count);
+        count++;
+        GPIO_PORTE_DATA |= 0x1<<4;
+        rt_thread_delay(RT_TICK_PER_SECOND);
+
+        /* led off */
+        //rt_kprintf("led2 off\r\n");
+        GPIO_PORTE_DATA &= ~(0x1<<4);
+        rt_thread_delay(RT_TICK_PER_SECOND);
+    }
+}
+
+int rt_application_init()
+{
+    rt_thread_t thread;
+
+    /* create led1 thread */
+    thread = rt_thread_create("led1",
+                              rt_thread_entry_led1, RT_NULL,
+                              512,
+                              20, 5);
+    if (thread != RT_NULL)
+        rt_thread_startup(thread);
+
+    //------- init led2 thread
+    rt_thread_init(&thread_led2,
+                   "led2",
+                   rt_thread_entry_led2,
+                   RT_NULL,
+                   &thread_led2_stack[0],
+                   sizeof(thread_led2_stack),10,10);
+    rt_thread_startup(&thread_led2);
+
+    return 0;
+}
+
+/*@}*/

bsp/sep4020/board.c

@@ -0,0 +1,140 @@
+/*
+ * File      : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2006-08-23     Bernard      first implementation
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+
+#include <sep4020.h>
+#include "board.h"
+#include "serial.h"
+
+/**
+ * @addtogroup sep4020
+ */
+/*@{*/
+
+extern rt_uint32_t rt_hw_get_clock(void);
+
+/* uart0 */
+#define UART0	((struct uartport *)UART0BASE)
+struct serial_int_rx uart0_int_rx;
+struct serial_device uart0 =
+{
+	UART0,
+	&uart0_int_rx,
+	RT_NULL
+};
+struct rt_device uart0_device;
+/**
+ * This is the timer interrupt service routine.
+ * @param vector the irq number for timer
+ */
+void rt_hw_timer_handler(int vector)
+{
+    /* clear interrupt */        
+    TIMER_T1ISCR;
+	/* increase a tick */
+	rt_tick_increase();
+}
+
+/**
+ * This is the uart0 interrupt service routine.
+ * @param vector the irq number for uart0
+ */
+void rt_serial_handler(int vector)
+{
+	rt_hw_serial_isr(&uart0_device);
+}
+
+/**
+ * This function will handle init uart.
+ */
+void rt_hw_uart_init(void)
+{
+    rt_uint32_t baud;
+    rt_uint32_t sysclock;
+
+    sysclock = rt_hw_get_clock();
+    /* caculate baud rate register */
+    baud = sysclock/16/BR;
+
+	/* LCR  */
+	uart0.uart_device->lcr = 0x83;
+	/* DLBH, IER  */
+	uart0.uart_device->dlbh_ier = (baud>>8)&0xff;;
+	/* DLBL */
+	uart0.uart_device->dlbl_rxfifo_txfifo = baud&0xff;
+	/* LCR */
+	uart0.uart_device->lcr = 0x03;
+	/* IER */
+	uart0.uart_device->dlbh_ier = 0x01;
+	/* FCR */
+	uart0.uart_device->iir_fcr = 0x00;
+
+ 	rt_hw_serial_register(&uart0_device, "uart0",
+		RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+		&uart0);
+	/* install uart isr */
+	INTC_IER  |= (1<<INT_UART0);
+
+	rt_hw_interrupt_install(INT_UART0, rt_serial_handler, RT_NULL);
+	rt_hw_interrupt_umask(INT_UART0);
+}
+/** 
+ * This function will init led on the board
+ */
+static void rt_hw_board_led_init(void)
+{
+  /* PE3 PE4 PE5 for led */
+  GPIO_PORTE_SEL |=0x38; /* GPIO */
+  
+  GPIO_PORTE_DIR &= ~0x38; /* output*/
+
+  GPIO_PORTE_DATA &= ~0x38;  /* low */
+}
+
+/**
+ * This function will init timer1 for system ticks
+ */
+ static void rt_hw_timer_init(void)
+ {
+	TIMER_T1CR = 0x06;	                    /* reload mode and interrupt enable   */
+	TIMER_T1LCR = 0xAFC80;	                /* 10ms under 72MHz 0xAFC80=720000    */
+
+    INTC_IER  |= (1<<INT_TIMER1);           /* interrupt enable                   */
+
+    rt_hw_interrupt_install(INT_TIMER1, rt_hw_timer_handler, RT_NULL);
+	rt_hw_interrupt_umask(INT_TIMER1);
+
+    TIMER_T1CR |= 0x01;                     /* enable the timer 1                 */
+ }
+
+/**
+ * This function will initial sam7x board.
+ */
+void rt_hw_board_init()
+{
+	
+	/* init hardware uart */
+	rt_hw_uart_init();
+	rt_console_set_device("uart0");
+
+	/* init led */
+	rt_hw_board_led_init();
+
+	/* init timer for tick */
+    rt_hw_timer_init();
+	
+}
+/*@}*/

bsp/sep4020/board.h

@@ -0,0 +1,26 @@
+/*
+ * File      : board.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2006-10-08     Bernard      add board.h to this bsp
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+#include <sep4020.h>
+
+#define BR    	115200			/* Baud Rate */
+
+void rt_hw_board_init(void);
+
+#endif

bsp/sep4020/project.uvopt

@@ -0,0 +1,2957 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>RT-Thread/SEP4020</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>14745600</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>1</RunSim>
+        <RunTarget>0</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DllOpt>
+        <SimDllName>SARM.DLL</SimDllName>
+        <SimDllArguments></SimDllArguments>
+        <SimDlgDllName>DARMSH.DLL</SimDlgDllName>
+        <SimDlgDllArguments></SimDlgDllArguments>
+        <TargetDllName>SARM.DLL</TargetDllName>
+        <TargetDllArguments></TargetDllArguments>
+        <TargetDlgDllName>TARMSH.DLL</TargetDlgDllName>
+        <TargetDlgDllArguments></TargetDlgDllArguments>
+      </DllOpt>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>0</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
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+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile>.\Memory.ini</sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile>.\Ext_SDRAM.ini</tIfile>
+        <pMon>Segger\JLTAgdi.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
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+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JLTAgdi</Key>
+          <Name></Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>1</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
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+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>bsp</GroupName>
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bsp/sep4020/project.uvproj

@@ -0,0 +1,1007 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>RT-Thread/SEP4020</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>SEP4020</Device>
+          <Vendor>SeuIC</Vendor>
+          <Cpu>IRAM(0x60000000-0x60007FFF) CLOCK(14745600) CPUTYPE(ARM7TDMI)</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll></FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath>Atmel\SAM7X\</RegisterFilePath>
+          <DBRegisterFilePath>Atmel\SAM7X\</DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\</OutputDirectory>
+          <OutputName>rtthread-sep4020</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\build\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
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+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+          </BeforeCompile>
+          <BeforeMake>
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+          </BeforeMake>
+          <AfterMake>
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+            <UserProg1Name>fromelf.exe --bin -o ./build/SEP4020.bin ./build/*.axf</UserProg1Name>
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+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARM.DLL</SimDllName>
+          <SimDllArguments></SimDllArguments>
+          <SimDlgDll>DARMSH.DLL</SimDlgDll>
+          <SimDlgDllArguments></SimDlgDllArguments>
+          <TargetDllName>SARM.DLL</TargetDllName>
+          <TargetDllArguments></TargetDllArguments>
+          <TargetDlgDll>TARMSH.DLL</TargetDlgDll>
+          <TargetDlgDllArguments></TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
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+          </OPTHX>
+          <Simulator>
+            <UseSimulator>0</UseSimulator>
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+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>1</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+            <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+          </Simulator>
+          <Target>
+            <UseTarget>1</UseTarget>
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+            <RestoreBreakpoints>0</RestoreBreakpoints>
+            <RestoreWatchpoints>1</RestoreWatchpoints>
+            <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+            <RestoreFunctions>0</RestoreFunctions>
+            <RestoreToolbox>1</RestoreToolbox>
+          </Target>
+          <RunDebugAfterBuild>0</RunDebugAfterBuild>
+          <TargetSelection>6</TargetSelection>
+          <SimDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile>.\Memory.ini</InitializationFile>
+          </SimDlls>
+          <TargetDlls>
+            <CpuDll></CpuDll>
+            <CpuDllArguments></CpuDllArguments>
+            <PeripheralDll></PeripheralDll>
+            <PeripheralDllArguments></PeripheralDllArguments>
+            <InitializationFile>.\Ext_SDRAM.ini</InitializationFile>
+            <Driver>Segger\JLTAgdi.dll</Driver>
+          </TargetDlls>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>0</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4100</DriverSelection>
+          </Flash1>
+          <Flash2>Segger\JLTAgdi.dll</Flash2>
+          <Flash3></Flash3>
+          <Flash4></Flash4>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
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+              <FilePath>..\..\net\lwip\src\api\netbuf.c</FilePath>
+            </File>
+            <File>
+              <FileName>netdb.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\api\netdb.c</FilePath>
+            </File>
+            <File>
+              <FileName>netifapi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\api\netifapi.c</FilePath>
+            </File>
+            <File>
+              <FileName>tcpip.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\api\tcpip.c</FilePath>
+            </File>
+            <File>
+              <FileName>etharp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\netif\etharp.c</FilePath>
+            </File>
+            <File>
+              <FileName>ethernetif.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\netif\ethernetif.c</FilePath>
+            </File>
+            <File>
+              <FileName>loopif.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\netif\loopif.c</FilePath>
+            </File>
+            <File>
+              <FileName>sys_arch_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\arch\sys_arch_init.c</FilePath>
+            </File>
+            <File>
+              <FileName>sys_arch.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\arch\sys_arch.c</FilePath>
+            </File>
+            <File>
+              <FileName>sockets.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\api\sockets.c</FilePath>
+            </File>
+            <File>
+              <FileName>memp.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\net\lwip\src\core\memp.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>filesystem</GroupName>
+          <GroupOption>
+            <CommonProperty>
+              <UseCPPCompiler>0</UseCPPCompiler>
+              <RVCTCodeConst>0</RVCTCodeConst>
+              <RVCTZI>0</RVCTZI>
+              <RVCTOtherData>0</RVCTOtherData>
+              <ModuleSelection>0</ModuleSelection>
+              <IncludeInBuild>0</IncludeInBuild>
+              <AlwaysBuild>0</AlwaysBuild>
+              <GenerateAssemblyFile>2</GenerateAssemblyFile>
+              <AssembleAssemblyFile>2</AssembleAssemblyFile>
+              <PublicsOnly>2</PublicsOnly>
+              <StopOnExitCode>11</StopOnExitCode>
+              <CustomArgument></CustomArgument>
+              <IncludeLibraryModules></IncludeLibraryModules>
+            </CommonProperty>
+            <GroupArmAds>
+              <Cads>
+                <interw>2</interw>
+                <Optim>0</Optim>
+                <oTime>2</oTime>
+                <SplitLS>2</SplitLS>
+                <OneElfS>2</OneElfS>
+                <Strict>2</Strict>
+                <EnumInt>2</EnumInt>
+                <PlainCh>2</PlainCh>
+                <Ropi>2</Ropi>
+                <Rwpi>2</Rwpi>
+                <wLevel>0</wLevel>
+                <uThumb>2</uThumb>
+                <VariousControls>
+                  <MiscControls></MiscControls>
+                  <Define></Define>
+                  <Undefine></Undefine>
+                  <IncludePath></IncludePath>
+                </VariousControls>
+              </Cads>
+              <Aads>
+                <interw>2</interw>
+                <Ropi>2</Ropi>
+                <Rwpi>2</Rwpi>
+                <thumb>2</thumb>
+                <SplitLS>2</SplitLS>
+                <SwStkChk>2</SwStkChk>
+                <NoWarn>2</NoWarn>
+                <VariousControls>
+                  <MiscControls></MiscControls>
+                  <Define></Define>
+                  <Undefine></Undefine>
+                  <IncludePath></IncludePath>
+                </VariousControls>
+              </Aads>
+            </GroupArmAds>
+          </GroupOption>
+          <Files>
+            <File>
+              <FileName>dfs_util.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\src\dfs_util.c</FilePath>
+            </File>
+            <File>
+              <FileName>dfs_cache.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\src\dfs_cache.c</FilePath>
+            </File>
+            <File>
+              <FileName>dfs_fs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\src\dfs_fs.c</FilePath>
+            </File>
+            <File>
+              <FileName>dfs_init.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\src\dfs_init.c</FilePath>
+            </File>
+            <File>
+              <FileName>dfs_raw.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\src\dfs_raw.c</FilePath>
+            </File>
+            <File>
+              <FileName>dfs_posix.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\src\dfs_posix.c</FilePath>
+            </File>
+            <File>
+              <FileName>plibc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c</FilePath>
+            </File>
+            <File>
+              <FileName>efs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c</FilePath>
+            </File>
+            <File>
+              <FileName>extract.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c</FilePath>
+            </File>
+            <File>
+              <FileName>partition.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c</FilePath>
+            </File>
+            <File>
+              <FileName>ui.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c</FilePath>
+            </File>
+            <File>
+              <FileName>dir.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c</FilePath>
+            </File>
+            <File>
+              <FileName>fat.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c</FilePath>
+            </File>
+            <File>
+              <FileName>file.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c</FilePath>
+            </File>
+            <File>
+              <FileName>fs.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c</FilePath>
+            </File>
+            <File>
+              <FileName>ls.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c</FilePath>
+            </File>
+            <File>
+              <FileName>time.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+</Project>

bsp/sep4020/rtconfig.h

@@ -0,0 +1,150 @@
+/* RT-Thread config file */
+#ifndef __RTTHREAD_CFG_H__
+#define __RTTHREAD_CFG_H__
+
+/* RT_NAME_MAX*/
+#define RT_NAME_MAX	8
+
+/* RT_ALIGN_SIZE*/
+#define RT_ALIGN_SIZE	4
+
+/* PRIORITY_MAX*/
+#define RT_THREAD_PRIORITY_MAX	32
+
+/* Tick per Second*/
+#define RT_TICK_PER_SECOND	100
+
+/* SECTION: RT_DEBUG */
+/* Thread Debug*/
+/* #define RT_THREAD_DEBUG */
+
+/* Using Hook*/
+#define RT_USING_HOOK
+
+/* SECTION: IPC */
+/* Using Semaphore*/
+#define RT_USING_SEMAPHORE
+
+/* Using Mutex*/
+#define RT_USING_MUTEX
+
+/* Using Event*/
+#define RT_USING_EVENT
+
+/* Using Faset Event*/
+/* #define RT_USING_FASTEVENT */
+
+/* Using MailBox*/
+#define RT_USING_MAILBOX
+
+/* Using Message Queue*/
+#define RT_USING_MESSAGEQUEUE
+
+/* SECTION: Memory Management */
+/* Using Memory Pool Management*/
+#define RT_USING_MEMPOOL
+
+/* Using Dynamic Heap Management*/
+#define RT_USING_HEAP
+
+/* Using Small MM*/
+#define RT_USING_SMALL_MEM
+#define RT_MEM_STATS
+
+/* Using SLAB Allocator*/
+/* #define RT_USING_SLAB */
+
+/* SECTION: Device System */
+/* Using Device System*/
+#define RT_USING_DEVICE
+#define RT_USING_UART1
+#define RT_UART_RX_BUFFER_SIZE	128
+
+/* SECTION: Console options */
+/* the buffer size of console*/
+#define RT_CONSOLEBUF_SIZE	128
+
+/* SECTION: FinSH shell options */
+/* Using FinSH as Shell*/
+#define RT_USING_FINSH
+/* use symbol table */
+#define FINSH_USING_SYMTAB
+#define FINSH_USING_DESCRIPTION
+
+/* SECTION: a mini libc */
+/* Using mini libc library*/
+/* #define RT_USING_MINILIBC */
+
+/* SECTION: C++ support */
+/* Using C++ support*/
+/* #define RT_USING_CPLUSPLUS */
+
+/* SECTION: lwip, a lighwight TCP/IP protocol stack */
+/* Using lighweight TCP/IP protocol stack*/
+//#define RT_USING_LWIP
+
+/* Trace LwIP protocol*/
+/* #define RT_LWIP_DEBUG */
+
+/* LwIP tcp thread option */
+#define RT_LWIP_TCPTHREAD_PRIORITY	8
+#define RT_LWIP_TCPTHREAD_STACKSIZE	4096
+#define RT_LWIP_TCPTHREAD_MBOX_SIZE	32
+
+/* LwIP eth thread option */
+#define RT_LWIP_ETHTHREAD_PRIORITY	15
+#define RT_LWIP_ETHTHREAD_STACKSIZE	1024
+#define RT_LWIP_ETHTHREAD_MBOX_SIZE	8
+
+/* Enable ICMP protocol*/
+#define RT_LWIP_ICMP
+
+/* Enable IGMP protocol*/
+#define RT_LWIP_IGMP
+
+/* Enable UDP protocol*/
+#define RT_LWIP_UDP
+
+/* Enable TCP protocol*/
+#define RT_LWIP_TCP
+
+/* the number of simulatenously active TCP connections*/
+#define RT_LWIP_TCP_PCB_NUM	5
+
+/* TCP sender buffer space*/
+#define RT_LWIP_TCP_SND_BUF	1500
+
+/* Enable SNMP protocol*/
+/* #define RT_LWIP_SNMP */
+
+/* Using DHCP*/
+/* #define RT_LWIP_DHCP */
+
+/* ip address of target*/
+#define RT_LWIP_IPADDR0	192
+#define RT_LWIP_IPADDR1	168
+#define RT_LWIP_IPADDR2	1
+#define RT_LWIP_IPADDR3	30
+
+/* gateway address of target*/
+#define RT_LWIP_GWADDR0	192
+#define RT_LWIP_GWADDR1	168
+#define RT_LWIP_GWADDR2	1
+#define RT_LWIP_GWADDR3	1
+
+/* mask address of target*/
+#define RT_LWIP_MSKADDR0	255
+#define RT_LWIP_MSKADDR1	255
+#define RT_LWIP_MSKADDR2	255
+#define RT_LWIP_MSKADDR3	0
+
+/* SECTION: DFS options */
+//#define RT_USING_DFS
+/* the max number of mounted filesystem */
+#define DFS_FILESYSTEMS_MAX			1
+/* the max number of opened files 		*/
+#define DFS_FD_MAX					2
+/* the max number of cached sector 		*/
+#define DFS_CACHE_MAX_NUM   		4
+
+#endif

bsp/sep4020/rtthread-sep4020-rom.sct

@@ -0,0 +1,15 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_ROM1 0x00000000 0x00200000  {    ; load region size_region
+  ER_ROM1 0x00000000 0x00200000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+  RW_RAM1 0x30000000 0x32000000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+

bsp/sep4020/rtthread-sep4020-sdram.sct

@@ -0,0 +1,15 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_ROM1 0x30000000 0x02000000  {    ; load region size_region
+  ER_ROM1 0x30000000 0x02000000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   }
+   RW_RAM1 0x31000000{
+   .ANY (+RW +ZI)
+  }
+}
+

bsp/sep4020/sep4020.h

@@ -0,0 +1,637 @@
+/*************************************************************************************
+ *
+ *	File name:	sep4020.h
+ *
+ * Change Logs:
+ * Date           Author       Notes	        
+ * 2010-03-17     zchong      first version		      	
+ **************************************************************************************/
+
+#ifndef __SEP4020_H__
+#define __SEP4020_H__
+
+/*************************************
+	macros for INTC
+*************************************/
+
+/*interrupt resources */
+
+#define     INTGLOBAL		        32
+
+#define		INT_RTC					31		        
+#define		INT_DMAC				30	                
+#define		INT_EMI					29              
+#define		INT_MAC		  			28                  
+#define		INT_TIMER1				27                  
+#define		INT_TIMER2				26              
+#define 	INT_TIMER3 				25              
+#define		INT_UART0				24              
+#define		INT_UART1				23              
+#define		INT_UART2				22              
+#define		INT_UART3			    21              
+#define		INT_PWM					20	                
+#define		INT_LCDC	   			19	            
+#define		INT_I2S			    	18              
+#define		INT_SSI 				17	            
+#define		INT_NOTUSED16			16
+#define		INT_USB 				15              
+#define		INT_SMC0				14				
+#define		INT_SMC1				13              
+#define		INT_SDIO				12              
+#define		INT_EXINT10				11              
+#define		INT_EXINT9 				10              
+#define		INT_EXINT8 				9               
+#define		INT_EXINT7 				8               
+#define		INT_EXINT6 				7               
+#define		INT_EXINT5 				6               
+#define		INT_EXINT4 				5               
+#define		INT_EXINT3 				4               
+#define		INT_EXINT2 				3               
+#define		INT_EXINT1 				2               
+#define		INT_EXINT0				1
+#define		INT_NOTUSED0			0
+
+/******************************************************************************************
+ *  INTC模块
+ *  基址: 0x10000000
+ ******************************************************************************************/
+
+#define INTC_IER        (*(volatile unsigned *)0x10000000)  /* IRQ interrupt enable register    */
+#define INTC_IMR        (*(volatile unsigned *)0x10000008)  /* IRQ interrupt mask register      */
+#define INTC_IFR        (*(volatile unsigned *)0x10000010)  /* IRQ软件强制中断寄存器    */
+#define INTC_IRSR       (*(volatile unsigned *)0x10000018)  /* IRQ未处理中断状态寄存器  */
+#define INTC_ISR        (*(volatile unsigned *)0x10000020)  /* IRQ中断状态寄存器        */
+#define INTC_IMSR       (*(volatile unsigned *)0x10000028)  /* IRQ屏蔽中断状态寄存器    */
+#define INTC_IFSR       (*(volatile unsigned *)0x10000030)  /* IRQ中断最终状态寄存器    */
+#define INTC_FIER       (*(volatile unsigned *)0x100000C0)  /* FIQ中断允许寄存器        */
+#define INTC_FIMR       (*(volatile unsigned *)0x100000C4)  /* FIQ中断屏蔽寄存器        */
+#define INTC_FIFR       (*(volatile unsigned *)0x100000C8)  /* FIQ软件强制中断寄存器    */
+#define INTC_FIRSR      (*(volatile unsigned *)0x100000CC)  /* FIQ未处理中断状态寄存器  */
+#define INTC_FISR       (*(volatile unsigned *)0x100000D0)  /* FIQ中断状态寄存器        */
+#define INTC_FIFSR      (*(volatile unsigned *)0x100000D4)  /* FIQ中断最终状态寄存器    */
+#define INTC_IPLR       (*(volatile unsigned *)0x100000D8)  /* IRQ中断优先级寄存器      */
+#define INTC_ICR1       (*(volatile unsigned *)0x100000DC)  /* IRQ内部中断优先级控制寄存器1 */
+#define INTC_ICR2       (*(volatile unsigned *)0x100000E0)  /* IRQ内部中断优先级控制寄存器2 */
+#define INTC_EXICR1     (*(volatile unsigned *)0x100000E4)  /* IRQ外部中断优先级控制寄存器1 */
+#define INTC_EXICR2     (*(volatile unsigned *)0x100000E8)  /* IRQ外部中断优先级控制寄存器2 */
+
+
+/******************************************************************************************
+ *  PMC模块
+ *  基址: 0x10001000
+ ******************************************************************************************/
+
+#define PMC_PLTR        (*(volatile unsigned *)0x10001000)  /* PLL的稳定过渡时间 */
+#define PMC_PMCR        (*(volatile unsigned *)0x10001004)  /* 系统主时钟PLL的控制寄存器 */
+#define PMC_PUCR        (*(volatile unsigned *)0x10001008)  /* USB时钟PLL的控制寄存器 */
+#define PMC_PCSR        (*(volatile unsigned *)0x1000100C)  /* 内部模块时钟源供给的控制寄存器 */
+#define PMC_PDSLOW      (*(volatile unsigned *)0x10001010)  /* SLOW状态下时钟的分频因子 */
+#define PMC_PMDR        (*(volatile unsigned *)0x10001014)  /* 芯片工作模式寄存器 */
+#define PMC_RCTR        (*(volatile unsigned *)0x10001018)  /* Reset控制寄存器 */
+#define PMC_CLRWAKUP    (*(volatile unsigned *)0x1000101C)  /* WakeUp清除寄存器 */
+
+
+/******************************************************************************************
+ *  RTC模块
+ *  基址: 0x10002000
+ ******************************************************************************************/
+
+#define RTC_STA_YMD         (*(volatile unsigned *)0x10002000)  /* 年, 月, 日计数寄存器 */
+#define RTC_STA_HMS         (*(volatile unsigned *)0x10002004)  /* 小时, 分钟, 秒寄存器 */
+#define RTC_ALARM_ALL       (*(volatile unsigned *)0x10002008)  /* 定时月, 日, 时, 分寄存器 */
+#define RTC_CTR             (*(volatile unsigned *)0x1000200C)  /* 控制寄存器 */
+#define RTC_INT_EN          (*(volatile unsigned *)0x10002010)  /* 中断使能寄存器 */
+#define RTC_INT_STS         (*(volatile unsigned *)0x10002014)  /* 中断状态寄存器 */
+#define RTC_SAMP            (*(volatile unsigned *)0x10002018)  /* 采样周期寄存器 */
+#define RTC_WD_CNT          (*(volatile unsigned *)0x1000201C)  /* Watch-Dog计数值寄存器 */
+#define RTC_WD_SEV          (*(volatile unsigned *)0x10002020)  /* Watch-Dog服务寄存器 */ 
+#define RTC_CONFIG_CHECK    (*(volatile unsigned *)0x10002024)  /* 配置时间确认寄存器 (在配置时间之前先写0xaaaaaaaa) */
+#define RTC_SOFTRESET       (*(volatile unsigned *)0x10002028)  /* 软件复位控制寄存器, 4020中被去掉了 */
+#define RTC_KEY0            (*(volatile unsigned *)0x1000202C)  /* 密钥寄存器0, 4020中只有这一个寄存器 */
+#define RTC_KEY1            (*(volatile unsigned *)0x10002030)  /* 密钥寄存器1 */
+#define RTC_KEY2            (*(volatile unsigned *)0x10002034)  /* 密钥寄存器2 */
+#define RTC_KEY3            (*(volatile unsigned *)0x10002038)  /* 密钥寄存器3 */
+#define RTC_KEY4            (*(volatile unsigned *)0x1000203C)  /* 密钥寄存器4 */
+#define RTC_KEY5            (*(volatile unsigned *)0x10002040)  /* 密钥寄存器5 */
+
+
+/******************************************************************************************
+ *  TIMER模块
+ *  基址: 0x10003000
+ ******************************************************************************************/
+
+#define TIMER_T1LCR         (*(volatile unsigned *)0x10003000)  /* 通道1加载计数寄存器 */
+#define TIMER_T1CCR         (*(volatile unsigned *)0x10003004)  /* 通道1当前计数值寄存器 */
+#define TIMER_T1CR          (*(volatile unsigned *)0x10003008)  /* 通道1控制寄存器 */
+#define TIMER_T1ISCR        (*(volatile unsigned *)0x1000300C)  /* 通道1中断状态清除寄存器 */
+#define TIMER_T1IMSR        (*(volatile unsigned *)0x10003010)  /* 通道1中断屏蔽状态寄存器 */
+#define TIMER_T2LCR         (*(volatile unsigned *)0x10003020)  /* 通道2加载计数寄存器 */
+#define TIMER_T2CCR         (*(volatile unsigned *)0x10003024)  /* 通道2当前计数值寄存器 */
+#define TIMER_T2CR          (*(volatile unsigned *)0x10003028)  /* 通道2控制寄存器 */
+#define TIMER_T2ISCR        (*(volatile unsigned *)0x1000302C)  /* 通道2中断状态清除寄存器 */
+#define TIMER_T2IMSR        (*(volatile unsigned *)0x10003030)  /* 通道2中断屏蔽状态寄存器 */
+#define TIMER_T3LCR         (*(volatile unsigned *)0x10003040)  /* 通道3加载计数寄存器 */
+#define TIMER_T3CCR         (*(volatile unsigned *)0x10003044)  /* 通道3当前计数值寄存器 */
+#define TIMER_T3CR          (*(volatile unsigned *)0x10003048)  /* 通道3控制寄存器 */
+#define TIMER_T3ISCR        (*(volatile unsigned *)0x1000304C)  /* 通道3中断状态清除寄存器 */
+#define TIMER_T3IMSR        (*(volatile unsigned *)0x10003050)  /* 通道3中断屏蔽状态寄存器 */
+#define TIMER_T3CAPR        (*(volatile unsigned *)0x10003054)  /* 通道3捕获寄存器 */
+#define TIMER_T4LCR         (*(volatile unsigned *)0x10003060)  /* 通道4加载计数寄存器 */
+#define TIMER_T4CCR         (*(volatile unsigned *)0x10003064)  /* 通道4当前计数值寄存器 */
+#define TIMER_T4CR          (*(volatile unsigned *)0x10003068)  /* 通道4控制寄存器 */
+#define TIMER_T4ISCR        (*(volatile unsigned *)0x1000306C)  /* 通道4中断状态清除寄存器 */
+#define TIMER_T4IMSR        (*(volatile unsigned *)0x10003070)  /* 通道4中断屏蔽状态寄存器 */
+#define TIMER_T4CAPR        (*(volatile unsigned *)0x10003074)  /* 通道4捕获寄存器 */
+#define TIMER_T5LCR         (*(volatile unsigned *)0x10003080)  /* 通道5加载计数寄存器 */
+#define TIMER_T5CCR         (*(volatile unsigned *)0x10003084)  /* 通道5当前计数值寄存器 */
+#define TIMER_T5CR          (*(volatile unsigned *)0x10003088)  /* 通道5控制寄存器 */
+#define TIMER_T5ISCR        (*(volatile unsigned *)0x1000308C)  /* 通道5中断状态清除寄存器 */
+#define TIMER_T5IMSR        (*(volatile unsigned *)0x10003090)  /* 通道5中断屏蔽状态寄存器 */
+#define TIMER_T5CAPR        (*(volatile unsigned *)0x10003094)  /* 通道5捕获寄存器 */
+#define TIMER_T6LCR         (*(volatile unsigned *)0x100030A0)  /* 通道6加载计数寄存器 */
+#define TIMER_T6CCR         (*(volatile unsigned *)0x100030A4)  /* 通道6当前计数值寄存器 */
+#define TIMER_T6CR          (*(volatile unsigned *)0x100030A8)  /* 通道6控制寄存器 */
+#define TIMER_T6ISCR        (*(volatile unsigned *)0x100030AC)  /* 通道6中断状态清除寄存器 */
+#define TIMER_T6IMSR        (*(volatile unsigned *)0x100030B0)  /* 通道6中断屏蔽状态寄存器 */
+#define TIMER_T6CAPR        (*(volatile unsigned *)0x100030B4)  /* 通道6捕获寄存器 */
+#define TIMER_T7LCR         (*(volatile unsigned *)0x100030C0)  /* 通道7加载计数寄存器 */
+#define TIMER_T7CCR         (*(volatile unsigned *)0x100030C4)  /* 通道7当前计数值寄存器 */
+#define TIMER_T7CR          (*(volatile unsigned *)0x100030C8)  /* 通道7控制寄存器 */
+#define TIMER_T7ISCR        (*(volatile unsigned *)0x100030CC)  /* 通道7中断状态清除寄存器 */
+#define TIMER_T7IMSR        (*(volatile unsigned *)0x100030D0)  /* 通道7中断屏蔽状态寄存器 */
+#define TIMER_T8LCR         (*(volatile unsigned *)0x100030E0)  /* 通道8加载计数寄存器 */
+#define TIMER_T8CCR         (*(volatile unsigned *)0x100030E4)  /* 通道8当前计数值寄存器 */
+#define TIMER_T8CR          (*(volatile unsigned *)0x100030E8)  /* 通道8控制寄存器 */
+#define TIMER_T8ISCR        (*(volatile unsigned *)0x100030EC)  /* 通道8中断状态清除寄存器 */
+#define TIMER_T8IMSR        (*(volatile unsigned *)0x100030F0)  /* 通道8中断屏蔽状态寄存器 */
+#define TIMER_T9LCR         (*(volatile unsigned *)0x10003100)  /* 通道9加载计数寄存器 */
+#define TIMER_T9CCR         (*(volatile unsigned *)0x10003104)  /* 通道9当前计数值寄存器 */
+#define TIMER_T9CR          (*(volatile unsigned *)0x10003108)  /* 通道9控制寄存器 */
+#define TIMER_T9ISCR        (*(volatile unsigned *)0x1000310C)  /* 通道9中断状态清除寄存器 */
+#define TIMER_T9IMSR        (*(volatile unsigned *)0x10003110)  /* 通道9中断屏蔽状态寄存器 */
+#define TIMER_T10LCR        (*(volatile unsigned *)0x10003120)  /* 通道10加载计数寄存器 */
+#define TIMER_T10CCR        (*(volatile unsigned *)0x10003124)  /* 通道10当前计数值寄存器 */
+#define TIMER_T10CR         (*(volatile unsigned *)0x10003128)  /* 通道10控制寄存器 */
+#define TIMER_T10ISCR       (*(volatile unsigned *)0x1000312C)  /* 通道10中断状态清除寄存器 */
+#define TIMER_T10IMSR       (*(volatile unsigned *)0x10003130)  /* 通道10中断屏蔽状态寄存器 */
+#define TIMER_TIMSR         (*(volatile unsigned *)0x10003140)  /* TIMER中断屏蔽状态寄存器 */
+#define TIMER_TISCR         (*(volatile unsigned *)0x10003144)  /* TIMER中断状态清除寄存器 */
+#define TIMER_TISR          (*(volatile unsigned *)0x10003148)  /* TIMER中断状态寄存器 */
+
+
+/******************************************************************************************
+ *  PWM模块
+ *  基址: 0x10004000
+ ******************************************************************************************/
+
+#define PWM1_CTRL           (*(volatile unsigned *)0x10004000)  /* PWM1控制寄存器 */
+#define PWM1_DIV            (*(volatile unsigned *)0x10004004)  /* PWM1分频寄存器 */
+#define PWM1_PERIOD         (*(volatile unsigned *)0x10004008)  /* PWM1周期寄存器 */
+#define PWM1_DATA           (*(volatile unsigned *)0x1000400C)  /* PWM1数据寄存器 */
+#define PWM1_CNT            (*(volatile unsigned *)0x10004010)  /* PWM1计数寄存器 */
+#define PWM1_STATUS         (*(volatile unsigned *)0x10004014)  /* PWM1状态寄存器 */
+#define PWM2_CTRL           (*(volatile unsigned *)0x10004020)  /* PWM2控制寄存器 */
+#define PWM2_DIV            (*(volatile unsigned *)0x10004024)  /* PWM2分频寄存器 */
+#define PWM2_PERIOD         (*(volatile unsigned *)0x10004028)  /* PWM2周期寄存器 */
+#define PWM2_DATA           (*(volatile unsigned *)0x1000402C)  /* PWM2数据寄存器 */
+#define PWM2_CNT            (*(volatile unsigned *)0x10004030)  /* PWM2计数寄存器 */
+#define PWM2_STATUS         (*(volatile unsigned *)0x10004034)  /* PWM2状态寄存器 */
+#define PWM3_CTRL           (*(volatile unsigned *)0x10004040)  /* PWM3控制寄存器 */
+#define PWM3_DIV            (*(volatile unsigned *)0x10004044)  /* PWM3分频寄存器 */
+#define PWM3_PERIOD         (*(volatile unsigned *)0x10004048)  /* PWM3周期寄存器 */
+#define PWM3_DATA           (*(volatile unsigned *)0x1000404C)  /* PWM3数据寄存器 */
+#define PWM3_CNT            (*(volatile unsigned *)0x10004050)  /* PWM3计数寄存器 */
+#define PWM3_STATUS         (*(volatile unsigned *)0x10004054)  /* PWM3状态寄存器 */
+#define PWM4_CTRL           (*(volatile unsigned *)0x10004060)  /* PWM4控制寄存器 */
+#define PWM4_DIV            (*(volatile unsigned *)0x10004064)  /* PWM4分频寄存器 */
+#define PWM4_PERIOD         (*(volatile unsigned *)0x10004068)  /* PWM4周期寄存器 */
+#define PWM4_DATA           (*(volatile unsigned *)0x1000406C)  /* PWM4数据寄存器 */
+#define PWM4_CNT            (*(volatile unsigned *)0x10004070)  /* PWM4计数寄存器 */
+#define PWM4_STATUS         (*(volatile unsigned *)0x10004074)  /* PWM4状态寄存器 */
+#define PWM_INTMASK         (*(volatile unsigned *)0x10004080)  /* PWM中断屏蔽寄存器 */
+#define PWM_INT             (*(volatile unsigned *)0x10004084)  /* PWM中断寄存器 */
+#define PWM_ENABLE          (*(volatile unsigned *)0x10004088)    /* PWM使能寄存器 */
+
+
+/******************************************************************************************
+ *  UART0模块
+ *  基址: 0x10005000
+ ******************************************************************************************/
+#define UART0BASE            ((volatile unsigned *)0x10005000)
+#define UART0_DLBL          (*(volatile unsigned char*)0x10005000)  /* 波特率设置低八位寄存器 */
+#define UART0_RXFIFO        (*(volatile unsigned char*)0x10005000)  /* 接收FIFO */
+#define UART0_TXFIFO        (*(volatile unsigned char*)0x10005000)  /* 发送FIFO */
+#define UART0_DLBH          (*(volatile unsigned char*)0x10005004)  /* 波特率设置高八位寄存器 */
+#define UART0_IER           (*(volatile unsigned char*)0x10005004)  /* 中断使能寄存器 */
+#define UART0_IIR           (*(volatile unsigned *)0x10005008)  /* 中断识别寄存器 */
+#define UART0_FCR           (*(volatile unsigned *)0x10005008)  /* FIFO控制寄存器 */
+#define UART0_LCR           (*(volatile unsigned *)0x1000500C)  /* 行控制寄存器 */
+#define UART0_MCR           (*(volatile unsigned *)0x10005010)  /* Modem控制寄存器 */
+#define UART0_LSR           (*(volatile unsigned *)0x10005014)  /* 行状态寄存器 */
+#define UART0_MSR           (*(volatile unsigned *)0x10005018)  /* Modem状态寄存器 */
+
+
+/******************************************************************************************
+ *  UART1模块
+ *  基址: 0x10006000
+ ******************************************************************************************/
+ #define UART1BASE            ((volatile unsigned *)0x10006000)
+#define UART1_DLBL          (*(volatile unsigned *)0x10006000)  /* 波特率设置低八位寄存器 */
+#define UART1_RXFIFO        (*(volatile unsigned *)0x10006000)  /* 接收FIFO */
+#define UART1_TXFIFO        (*(volatile unsigned *)0x10006000)  /* 发送FIFO */
+#define UART1_DLBH          (*(volatile unsigned *)0x10006004)  /* 波特率设置高八位寄存器 */
+#define UART1_IER           (*(volatile unsigned *)0x10006004)  /* 中断使能寄存器 */
+#define UART1_IIR           (*(volatile unsigned *)0x10006008)  /* 中断识别寄存器 */
+#define UART1_FCR           (*(volatile unsigned *)0x10006008)  /* FIFO控制寄存器 */
+#define UART1_LCR           (*(volatile unsigned *)0x1000600C)  /* 行控制寄存器 */
+#define UART1_MCR           (*(volatile unsigned *)0x10006010)  /* Modem控制寄存器 */
+#define UART1_LSR           (*(volatile unsigned *)0x10006014)  /* 行状态寄存器 */
+#define UART1_MSR           (*(volatile unsigned *)0x10006018)  /* Modem状态寄存器 */
+
+
+/******************************************************************************************
+ *  UART2模块
+ *  基址: 0x10007000
+ ******************************************************************************************/
+#define UART2BASE            ((volatile unsigned *)0x10007000)
+#define UART2_DLBL          (*(volatile unsigned *)0x10007000)  /* 波特率设置低八位寄存器 */
+#define UART2_RXFIFO        (*(volatile unsigned *)0x10007000)  /* 接收FIFO */
+#define UART2_TXFIFO        (*(volatile unsigned *)0x10007000)  /* 发送FIFO */
+#define UART2_DLBH          (*(volatile unsigned *)0x10007004)  /* 波特率设置高八位寄存器 */
+#define UART2_IER           (*(volatile unsigned *)0x10007004)  /* 中断使能寄存器 */
+#define UART2_IIR           (*(volatile unsigned *)0x10007008)  /* 中断识别寄存器 */
+#define UART2_FCR           (*(volatile unsigned *)0x10007008)  /* FIFO控制寄存器 */
+#define UART2_LCR           (*(volatile unsigned *)0x1000700C)  /* 行控制寄存器 */
+#define UART2_MCR           (*(volatile unsigned *)0x10007010)  /* Modem控制寄存器 */
+#define UART2_LSR           (*(volatile unsigned *)0x10007014)  /* 行状态寄存器 */
+#define UART2_MSR           (*(volatile unsigned *)0x10007018)  /* Modem状态寄存器 */
+
+
+/******************************************************************************************
+ *  UART3模块
+ *  基址: 0x10008000
+ ******************************************************************************************/
+#define UART3BASE            ((volatile unsigned *)0x10008000)
+#define UART3_DLBL          (*(volatile unsigned *)0x10008000)  /* 波特率设置低八位寄存器 */
+#define UART3_RXFIFO        (*(volatile unsigned *)0x10008000)  /* 接收FIFO */
+#define UART3_TXFIFO        (*(volatile unsigned *)0x10008000)  /* 发送FIFO */
+#define UART3_DLBH          (*(volatile unsigned *)0x10008004)  /* 波特率设置高八位寄存器 */
+#define UART3_IER           (*(volatile unsigned *)0x10008004)  /* 中断使能寄存器 */
+#define UART3_IIR           (*(volatile unsigned *)0x10008008)  /* 中断识别寄存器 */
+#define UART3_FCR           (*(volatile unsigned *)0x10008008)  /* FIFO控制寄存器 */
+#define UART3_LCR           (*(volatile unsigned *)0x1000800C)  /* 行控制寄存器 */
+#define UART3_MCR           (*(volatile unsigned *)0x10008010)  /* Modem控制寄存器 */
+#define UART3_LSR           (*(volatile unsigned *)0x10008014)  /* 行状态寄存器 */
+#define UART3_MSR           (*(volatile unsigned *)0x10008018)  /* Modem状态寄存器 */
+
+
+/******************************************************************************************
+ *  SSI模块
+ *  基址: 0x10009000
+ ******************************************************************************************/
+
+#define SSI_CONTROL0        (*(volatile unsigned *)0x10009000)  /* 控制寄存器0 */
+#define SSI_CONTROL1        (*(volatile unsigned *)0x10009004)  /* 控制寄存器1 */
+#define SSI_SSIENR          (*(volatile unsigned *)0x10009008)  /* SSI使能寄存器 */
+#define SSI_MWCR            (*(volatile unsigned *)0x1000900C)  /* Microwire控制寄存器 */
+#define SSI_SER             (*(volatile unsigned *)0x10009010)  /* 从设备使能寄存器 */
+#define SSI_BAUDR           (*(volatile unsigned *)0x10009014)  /* 波特率设置寄存器 */
+#define SSI_TXFTLR          (*(volatile unsigned *)0x10009018)  /* 发送FIFO阈值寄存器 */
+#define SSI_RXFTLR          (*(volatile unsigned *)0x1000901C)  /* 接收FIFO阈值寄存器 */
+#define SSI_TXFLR           (*(volatile unsigned *)0x10009020)  /* 发送FIFO状态寄存器 */
+#define SSI_RXFLR           (*(volatile unsigned *)0x10009024)  /* 接收FIFO状态寄存器 */
+#define SSI_SR              (*(volatile unsigned *)0x10009028)  /* 状态寄存器 */
+#define SSI_IMR             (*(volatile unsigned *)0x1000902C)  /* 中断屏蔽寄存器 */
+#define SSI_ISR             (*(volatile unsigned *)0x10009030)  /* 中断最终状态寄存器 */
+#define SSI_RISR            (*(volatile unsigned *)0x10009034)  /* 中断原始状态寄存器 */
+#define SSI_TXOICR          (*(volatile unsigned *)0x10009038)  /* 发送FIFO上溢中断清除寄存器 */
+#define SSI_RXOICR          (*(volatile unsigned *)0x1000903C)  /* 接收FIFO上溢中断清除寄存器 */
+#define SSI_RXUICR          (*(volatile unsigned *)0x10009040)  /* 接收FIFO下溢中断清除寄存器 */
+#define SSI_ICR             (*(volatile unsigned *)0x1000902C)  /* 中断清除寄存器 */
+#define SSI_DMACR           (*(volatile unsigned *)0x1000904C)  /* DMA控制寄存器 */
+#define SSI_DMATDLR         (*(volatile unsigned *)0x10009050)  /* DMA发送状态寄存器 */
+#define SSI_DMARDLR         (*(volatile unsigned *)0x10009054)  /* DMA接收状态寄存器 */
+#define SSI_DR              (*(volatile unsigned *)0x10009060)  /* 数据寄存器 */
+
+
+/******************************************************************************************
+ *  I2S模块
+ *  基址: 0x1000A000
+ ******************************************************************************************/
+
+#define I2S_CTRL            (*(volatile unsigned *)0x1000A000)  /* I2S控制寄存器 */
+#define I2S_DATA            (*(volatile unsigned *)0x1000A004)  /* I2S数据寄存器 */
+#define I2S_INT             (*(volatile unsigned *)0x1000A008)  /* I2S中断寄存器 */
+#define I2S_STATUS          (*(volatile unsigned *)0x1000A00C)  /* I2S状态寄存器 */
+
+
+/******************************************************************************************
+ *  GPIO模块
+ *  基址: 0x1000F000
+ ******************************************************************************************/
+
+#define GPIO_DBCLK_DIV      (*(volatile unsigned *)0x1000F000)  /* 去毛刺采用时钟分频比配置寄存器 */
+#define GPIO_PORTA_DIR      (*(volatile unsigned *)0x1000F004)  /* A组端口输入输出方向配置寄存器 */
+#define GPIO_PORTA_SEL      (*(volatile unsigned *)0x1000F008)  /* A组端口通用用途选择配置寄存器 */
+#define GPIO_PORTA_INCTL    (*(volatile unsigned *)0x1000F00C)  /* A组端口通用用途输入时类型配置寄存器 */
+#define GPIO_PORTA_INTRCTL  (*(volatile unsigned *)0x1000F010)  /* A组端口中断触发类型配置寄存器 */
+#define GPIO_PORTA_INTRCLR  (*(volatile unsigned *)0x1000F014)  /* A组端口通用用途中断清除配置寄存器 */
+#define GPIO_PORTA_DATA     (*(volatile unsigned *)0x1000F018)  /* A组端口通用用途数据配置寄存器 */
+#define GPIO_PORTB_DIR      (*(volatile unsigned *)0x1000F01C)  /* B组端口输入输出方向配置寄存器 */
+#define GPIO_PORTB_SEL      (*(volatile unsigned *)0x1000F020)  /* B组端口通用用途选择配置寄存器 */
+#define GPIO_PORTB_DATA     (*(volatile unsigned *)0x1000F024)  /* B组端口通用用途数据配置寄存器 */
+#define GPIO_PORTC_DIR      (*(volatile unsigned *)0x1000F028)  /* C组端口输入输出方向配置寄存器 */
+#define GPIO_PORTC_SEL      (*(volatile unsigned *)0x1000F02C)  /* C组端口通用用途选择配置寄存器 */
+#define GPIO_PORTC_DATA     (*(volatile unsigned *)0x1000F030)  /* C组端口通用用途数据配置寄存器 */
+#define GPIO_PORTD_DIR      (*(volatile unsigned *)0x1000F034)  /* D组端口输入输出方向配置寄存器 */
+#define GPIO_PORTD_SEL      (*(volatile unsigned *)0x1000F038)  /* D组端口通用用途选择配置寄存器 */
+#define GPIO_PORTD_SPECII   (*(volatile unsigned *)0x1000F03C)  /* D组端口专用用途2选择配置寄存器 */
+#define GPIO_PORTD_DATA     (*(volatile unsigned *)0x1000F040)  /* D组端口通用用途数据配置寄存器 */
+#define GPIO_PORTE_DIR      (*(volatile unsigned *)0x1000F044)  /* E组端口输入输出方向配置寄存器 */
+#define GPIO_PORTE_SEL      (*(volatile unsigned *)0x1000F048)  /* E组端口通用用途选择配置寄存器 */
+#define GPIO_PORTE_DATA     (*(volatile unsigned *)0x1000F04C)  /* E组端口通用用途数据配置寄存器 */
+#define GPIO_PORTF_DIR      (*(volatile unsigned *)0x1000F050)  /* F组端口输入输出方向配置寄存器 */
+#define GPIO_PORTF_SEL      (*(volatile unsigned *)0x1000F054)  /* F组端口通用用途选择配置寄存器 */
+#define GPIO_PORTF_INCTL    (*(volatile unsigned *)0x1000F058)  /* F组端口通用用途输入时类型配置寄存器 */
+#define GPIO_PORTF_INTRCTL  (*(volatile unsigned *)0x1000F05C)  /* F组端口中断触发类型配置寄存器 */
+#define GPIO_PORTF_INTRCLR  (*(volatile unsigned *)0x1000F060)  /* F组端口通用用途中断清除配置寄存器 */
+#define GPIO_PORTF_DATA     (*(volatile unsigned *)0x1000F064)  /* F组端口通用用途数据配置寄存器 */
+#define GPIO_PORTG_DIR      (*(volatile unsigned *)0x1000F068)  /* G组端口输入输出方向配置寄存器 */
+#define GPIO_PORTG_SEL      (*(volatile unsigned *)0x1000F06C)  /* G组端口通用用途选择配置寄存器 */
+#define GPIO_PORTG_DATA     (*(volatile unsigned *)0x1000F070)  /* G组端口通用用途数据配置寄存器 */
+#define GPIO_PORTH_DIR      (*(volatile unsigned *)0x1000F074)  /* H组端口输入输出方向配置寄存器 */
+#define GPIO_PORTH_SEL      (*(volatile unsigned *)0x1000F078)  /* H组端口通用用途选择配置寄存器 */
+#define GPIO_PORTH_DATA     (*(volatile unsigned *)0x1000F07c)  /* H组端口通用用途数据配置寄存器 */
+#define GPIO_PORTI_DIR      (*(volatile unsigned *)0x1000F080)  /* I组端口输入输出方向配置寄存器 */
+#define GPIO_PORTI_SEL      (*(volatile unsigned *)0x1000F084)  /* I组端口通用用途选择配置寄存器 */
+#define GPIO_PORTI_DATA     (*(volatile unsigned *)0x1000F088)  /* I组端口通用用途数据配置寄存器 */
+
+
+/******************************************************************************************
+ *  SMC0模块
+ *  基址: 0x1000C000
+ ******************************************************************************************/
+
+#define SMC0_CTRL           (*(volatile unsigned *)0x1000C000)  /* SMC0控制寄存器 */
+#define SMC0_INT            (*(volatile unsigned *)0x1000C004)  /* SMC0中断寄存器 */
+#define SMC0_FD             (*(volatile unsigned *)0x1000C008)  /* SMC0基本单元时间寄存器 */
+#define SMC0_CT             (*(volatile unsigned *)0x1000C00C)  /* SMC0字符传输时间寄存器 */
+#define SMC0_BT             (*(volatile unsigned *)0x1000C010)  /* SMC0块传输时间寄存器 */
+
+
+/******************************************************************************************
+ *  SMC1模块
+ *  基址: 0x1000D000
+ ******************************************************************************************/
+
+#define SMC1_CTRL           (*(volatile unsigned *)0x1000D000)  /* SMC1控制寄存器 */
+#define SMC1_INT            (*(volatile unsigned *)0x1000D004)  /* SMC1中断寄存器 */
+#define SMC1_FD             (*(volatile unsigned *)0x1000D008)  /* SMC1基本单元时间寄存器 */
+#define SMC1_CT             (*(volatile unsigned *)0x1000D00C)  /* SMC1字符传输时间寄存器 */
+#define SMC1_BT             (*(volatile unsigned *)0x1000D010)  /* SMC1块传输时间寄存器 */
+
+
+/******************************************************************************************
+ *  USBD模块
+ *  基址: 0x1000E000
+ ******************************************************************************************/
+
+#define USBD_PROTOCOLINTR           (*(volatile unsigned *)0x1000E000)  /* USB协议中断寄存器 */
+#define USBD_INTRMASK               (*(volatile unsigned *)0x1000E004)  /* USB中断屏蔽寄存器 */
+#define USBD_INTRCTRL               (*(volatile unsigned *)0x1000E008)  /* USB中断类型控制寄存器 */
+#define USBD_EPINFO                 (*(volatile unsigned *)0x1000E00C)  /* USB活动端点状态寄存器 */
+#define USBD_BCONFIGURATIONVALUE    (*(volatile unsigned *)0x1000E010)  /* SET_CCONFIGURATION记录 */
+#define USBD_BMATTRIBUTES           (*(volatile unsigned *)0x1000E014)  /* 当前配置属性寄存器 */
+#define USBD_DEVSPEED               (*(volatile unsigned *)0x1000E018)  /* 当前设备工作速度寄存器 */
+#define USBD_FRAMENUMBER            (*(volatile unsigned *)0x1000E01C)  /* 记录当前SOF包内的帧号 */
+#define USBD_EPTRANSACTIONS0        (*(volatile unsigned *)0x1000E020)  /* 记录下次要求的传输次数 */
+#define USBD_EPTRANSACTIONS1        (*(volatile unsigned *)0x1000E024)  /* 记录下次要求的传输次数 */
+#define USBD_APPIFUPDATE            (*(volatile unsigned *)0x1000E028)  /* 接口号快速更新寄存器 */
+#define USBD_CFGINTERFACE0          (*(volatile unsigned *)0x1000E02c)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE1          (*(volatile unsigned *)0x1000E030)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE2          (*(volatile unsigned *)0x1000E034)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE3          (*(volatile unsigned *)0x1000E038)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE4          (*(volatile unsigned *)0x1000E03c)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE5          (*(volatile unsigned *)0x1000E040)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE6          (*(volatile unsigned *)0x1000E044)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE7          (*(volatile unsigned *)0x1000E048)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE8          (*(volatile unsigned *)0x1000E04c)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE9          (*(volatile unsigned *)0x1000E050)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE10         (*(volatile unsigned *)0x1000E054)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE11         (*(volatile unsigned *)0x1000E058)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE12         (*(volatile unsigned *)0x1000E05c)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE13         (*(volatile unsigned *)0x1000E060)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE14         (*(volatile unsigned *)0x1000E064)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE15         (*(volatile unsigned *)0x1000E068)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE16         (*(volatile unsigned *)0x1000E06c)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE17         (*(volatile unsigned *)0x1000E070)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE18         (*(volatile unsigned *)0x1000E074)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE19         (*(volatile unsigned *)0x1000E078)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE20         (*(volatile unsigned *)0x1000E07c)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE21         (*(volatile unsigned *)0x1000E080)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE22         (*(volatile unsigned *)0x1000E084)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE23         (*(volatile unsigned *)0x1000E088)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE24         (*(volatile unsigned *)0x1000E08c)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE25         (*(volatile unsigned *)0x1000E090)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE26         (*(volatile unsigned *)0x1000E094)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE27         (*(volatile unsigned *)0x1000E098)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE28         (*(volatile unsigned *)0x1000E09c)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE29         (*(volatile unsigned *)0x1000E0a0)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE30         (*(volatile unsigned *)0x1000E0a4)  /* 记录接口的值 */
+#define USBD_CFGINTERFACE31         (*(volatile unsigned *)0x1000E0a8)  /* 记录接口的值 */
+#define USBD_PKTPASSEDCTRL          (*(volatile unsigned *)0x1000E0ac)  /* 记录成功接收的包数 */
+#define USBD_PKTDROPPEDCTRL         (*(volatile unsigned *)0x1000E0b0)  /* 记录丢失的包数 */
+#define USBD_CRCERRCTRL             (*(volatile unsigned *)0x1000E0b4)  /* 记录CRC错误的包数 */
+#define USBD_BITSTUFFERRCTRL        (*(volatile unsigned *)0x1000E0b8)  /* 记录位填充错误的包数 */
+#define USBD_PIDERRCTRL             (*(volatile unsigned *)0x1000E0bc)  /* 记录PID错误的包数 */
+#define USBD_FRAMINGERRCTL          (*(volatile unsigned *)0x1000E0c0)  /* 记录有SYNC和EOP的包数 */
+#define USBD_TXPKTCTRL              (*(volatile unsigned *)0x1000E0c4)  /* 记录发送包的数量 */
+#define USBD_STATCTRLOV             (*(volatile unsigned *)0x1000E0c8)  /* 记录统计寄存器溢出情况 */
+#define USBD_TXLENGTH               (*(volatile unsigned *)0x1000E0cc)  /* 记录每次IN传输事务包长度 */
+#define USBD_RXLENGTH               (*(volatile unsigned *)0x1000E0d0)  /* 记录OUT传输事务包长度 */
+#define USBD_RESUME                 (*(volatile unsigned *)0x1000E0d4)  /* USB唤醒寄存器 */
+#define USBD_READFLAG               (*(volatile unsigned *)0x1000E0d8)  /* 读异步状态寄存器标志 */
+#define USBD_RECEIVETYPE            (*(volatile unsigned *)0x1000E0dc)  /* 传输状态寄存器 */
+#define USBD_APPLOCK                (*(volatile unsigned *)0x1000E0e0)  /* 锁信号寄存器 */
+#define USBD_EP0OUTADDR             (*(volatile unsigned *)0x1000E100)  /* 端点0端点号和方向 */
+#define USBD_EP0OUTBMATTR           (*(volatile unsigned *)0x1000E104)  /* 端点0类型寄存器 */
+#define USBD_EP0OUTMAXPKTSIZE       (*(volatile unsigned *)0x1000E108)  /* 端点0最大包尺寸寄存器 */
+#define USBD_EP0OUTIFNUM            (*(volatile unsigned *)0x1000E10c)  /* 端点0接口号寄存器 */
+#define USBD_EP0OUTSTAT             (*(volatile unsigned *)0x1000E110)  /* 端点0状态寄存器 */
+#define USBD_EP0OUTBMREQTYPE        (*(volatile unsigned *)0x1000E114)  /* 端点0 SETUP事务请求类 */
+#define USBD_EP0OUTBREQUEST         (*(volatile unsigned *)0x1000E118)  /* 端点0 SETUP事务请求内容 */
+#define USBD_EP0OUTWVALUE           (*(volatile unsigned *)0x1000E11c)  /* 端点0 SETUP事务请求值 */
+#define USBD_EP0OUTWINDEX           (*(volatile unsigned *)0x1000E120)  /* 端点0 SETUP事务请求索引 */
+#define USBD_EP0OUTWLENGTH          (*(volatile unsigned *)0x1000E120)  /* 端点0 SETUP事务请求长度 */
+#define USBD_EP0OUTSYNCHFRAME       (*(volatile unsigned *)0x1000E128)  /* 端点0同步包帧号 */
+#define USBD_EP1OUTADDR             (*(volatile unsigned *)0x1000E12c)  /* 端点1输出端点号和方向 */
+#define USBD_EP1OUTBMATTR           (*(volatile unsigned *)0x1000E130)  /* 端点1输出类型寄存器 */
+#define USBD_EP1OUTMAXPKTSIZE       (*(volatile unsigned *)0x1000E134)  /* 端点1输出最大包尺寸寄存器 */
+#define USBD_EP1OUTIFNUM            (*(volatile unsigned *)0x1000E138)  /* 端点1输出接口号寄存器 */
+#define USBD_EP1OUTSTAT             (*(volatile unsigned *)0x1000E13c)  /* 端点1输出状态寄存器 */
+#define USBD_EP1OUTBMREQTYPE        (*(volatile unsigned *)0x1000E140)  /* 端点1输出SETUP事务请求类型 */
+#define USBD_EP1OUTBREQUEST         (*(volatile unsigned *)0x1000E144)  /* 端点1输出SETUP事务请求内容 */
+#define USBD_EP1OUTWVALUE           (*(volatile unsigned *)0x1000E148)  /* 端点1输出SETUP事务请求值 */
+#define USBD_EP1OUTWINDX            (*(volatile unsigned *)0x1000E14c)  /* 端点1输出SETUP事务请求索引 */
+#define USBD_EP1OUTWLENGH           (*(volatile unsigned *)0x1000E150)  /* 端点1输出SETUP事务请求域长度 */
+#define USBD_EP1OUTSYNCHFRAME       (*(volatile unsigned *)0x1000E154)  /* 端点1输出同步包帧号 */
+#define USBD_EP1INADDR              (*(volatile unsigned *)0x1000E158)  /* 端点1输入端点号和方向 */
+#define USBD_EP1INBMATTR            (*(volatile unsigned *)0x1000E15c)  /* 端点1输入类型寄存器 */
+#define USBD_EP1INMAXPKTSIZE        (*(volatile unsigned *)0x1000E160)  /* 端点1输入最大包尺寸寄存器 */
+#define USBD_EP1INIFNUM             (*(volatile unsigned *)0x1000E164)  /* 端点1输入接口号寄存器 */
+#define USBD_EP1INSTAT              (*(volatile unsigned *)0x1000E168)  /* 端点1输入状态寄存器 */
+#define USBD_EP1INBMREQTYPE         (*(volatile unsigned *)0x1000E16c)  /* 端点1输入SETUP事务请求类型 */
+#define USBD_EP1INBREQUEST          (*(volatile unsigned *)0x1000E170)  /* 端点1输入SETUP事务请求内容 */
+#define USBD_EP1INWVALUE            (*(volatile unsigned *)0x1000E174)  /* 端点1输入SETUP事务请求值 */
+#define USBD_EP1INWINDEX            (*(volatile unsigned *)0x1000E178)  /* 端点1输入SETUP事务请求索引 */
+#define USBD_EP1INWLENGTH           (*(volatile unsigned *)0x1000E17c)  /* 端点1输入SETUP事务请求域长度 */
+#define USBD_EP1INSYNCHFRAME        (*(volatile unsigned *)0x1000E180)  /* 端点1输入同步包帧号 */
+#define USBD_EP2OUTADDR             (*(volatile unsigned *)0x1000E184)  /* 端点2输出端点号和方向 */
+#define USBD_EP2OUTBMATTR           (*(volatile unsigned *)0x1000E188)  /* 端点2输出类型寄存器 */
+#define USBD_EP2OUTMAXPKTSIZE       (*(volatile unsigned *)0x1000E18c)  /* 端点2输出最大包尺寸寄存器 */
+#define USBD_EP2OUTIFNUM            (*(volatile unsigned *)0x1000E190)  /* 端点2输出接口号寄存器 */
+#define USBD_EP2OUTSTAT             (*(volatile unsigned *)0x1000E194)  /* 端点2输出状态寄存器 */
+#define USBD_EP2OUTBMREQTYPE        (*(volatile unsigned *)0x1000E198)  /* 端点2输出SETUP事务请求类型 */
+#define USBD_EP2OUTBREQUEST         (*(volatile unsigned *)0x1000E19c)  /* 端点2输出SETUP事务请求内容 */
+#define USBD_EP2OUTWVALUE           (*(volatile unsigned *)0x1000E1a0)  /* 端点2输出SETUP事务请求值 */
+#define USBD_EP2OUTWINDEX           (*(volatile unsigned *)0x1000E1a4)  /* 端点2输出SETUP事务请求索引 */
+#define USBD_EP2OUTWLENGTH          (*(volatile unsigned *)0x1000E1a8)  /* 端点2输出SETUP事务请求域长度 */
+#define USBD_EP2OUTSYNCHFRAME       (*(volatile unsigned *)0x1000E1ac)  /* 端点2输出同步包帧号 */
+#define USBD_EP2INADDR              (*(volatile unsigned *)0x1000E1b0)  /* 端点2输入端点号和方向 */
+#define USBD_EP2INBMATTR            (*(volatile unsigned *)0x1000E1b4)  /* 端点2输入类型寄存器 */
+#define USBD_EP2INMAXPKTSIZE        (*(volatile unsigned *)0x1000E1b8)  /* 端点2输入最大包尺寸寄存器 */
+#define USBD_EP2INIFNUM             (*(volatile unsigned *)0x1000E1bc)  /* 端点2输入接口号寄存器 */
+#define USBD_EP2INSTAT              (*(volatile unsigned *)0x1000E1c0)  /* 端点2输入状态寄存器 */
+#define USBD_EP2INBMREQTYPE         (*(volatile unsigned *)0x1000E1c4)  /* 端点2输入SETUP事务请求类型 */
+#define USBD_EP2INBREQUEST          (*(volatile unsigned *)0x1000E1c8)  /* 端点2输入SETUP事务请求内容 */
+#define USBD_EP2INWVALUE            (*(volatile unsigned *)0x1000E1cc)  /* 端点2输入SETUP事务请求值 */
+#define USBD_EP2INWINDEX            (*(volatile unsigned *)0x1000E1d0)  /* 端点2输入SETUP事务请求索引 */
+#define USBD_EP2INWLENGTH           (*(volatile unsigned *)0x1000E1d4)  /* 端点2输入SETUP事务请求域长度 */
+#define USBD_EP2INSYNCHFRAME        (*(volatile unsigned *)0x1000E1d8)  /* 端点2输入同步包帧号 */
+#define USBD_RXFIFO                 (*(volatile unsigned *)0x1000E200)  /* 接受FIFO */
+#define USBD_TXFIFO                 (*(volatile unsigned *)0x1000E300)  /* 发送FIFO */
+
+
+/******************************************************************************************
+ *  EMI模块
+ *  基址: 0x11000000
+ ******************************************************************************************/
+
+#define EMI_CSACONF                 (*(volatile unsigned *)0x11000000)  /* CSA参数配置寄存器 */
+#define EMI_CSBCONF                 (*(volatile unsigned *)0x11000004)  /* CSB参数配置寄存器 */
+#define EMI_CSCCONF                 (*(volatile unsigned *)0x11000008)  /* CSC参数配置寄存器 */
+#define EMI_CSDCONF                 (*(volatile unsigned *)0x1100000c)  /* CSD参数配置寄存器 */
+#define EMI_CSECONF                 (*(volatile unsigned *)0x11000010)  /* CSE参数配置寄存器 */
+#define EMI_CSFCONF                 (*(volatile unsigned *)0x11000014)  /* CSF参数配置寄存器 */
+#define EMI_SDCONF1                 (*(volatile unsigned *)0x11000018)  /* SDRAM时序配置寄存器1 */
+#define EMI_SDCONF2                 (*(volatile unsigned *)0x1100001c)  /* SDRAM时序配置寄存器2, SDRAM初始化用到的配置信息 */
+#define EMI_REMAPCONF               (*(volatile unsigned *)0x11000020)  /* 片选空间及地址映射REMAP配置寄存器 */
+#define EMI_NAND_ADDR1              (*(volatile unsigned *)0x11000100)  /* NAND FLASH的地址寄存器1 */
+#define EMI_NAND_COM                (*(volatile unsigned *)0x11000104)  /* NAND FLASH的控制字寄存器 */
+#define EMI_NAND_STA                (*(volatile unsigned *)0x1100010c)  /* NAND FLASH的状态寄存器 */
+#define EMI_ERR_ADDR1               (*(volatile unsigned *)0x11000110)  /* 读操作出错的地址寄存器1 */
+#define EMI_ERR_ADDR2               (*(volatile unsigned *)0x11000114)  /* 读操作出错的地址寄存器2 */
+#define EMI_NAND_CONF1              (*(volatile unsigned *)0x11000118)  /* NAND FLASH的配置器存器1 */
+#define EMI_NAND_INTR               (*(volatile unsigned *)0x1100011c)  /* NAND FLASH中断寄存器 */
+#define EMI_NAND_ECC                (*(volatile unsigned *)0x11000120)  /* ECC校验完成寄存器 */
+#define EMI_NAND_IDLE               (*(volatile unsigned *)0x11000124)  /* NAND FLASH空闲寄存器 */
+#define EMI_NAND_CONF2              (*(volatile unsigned *)0x11000128)  /* NAND FLASH的配置器存器2 */
+#define EMI_NAND_ADDR2              (*(volatile unsigned *)0x1100012c)  /* NAND FLASH的地址寄存器2 */
+#define EMI_NAND_ID                 (*(volatile unsigned *)0x11000130)  /* NAND FLASH的ID寄存器*/
+#define EMI_NAND_DATA               (*(volatile unsigned *)0x11000200)  /* NAND FLASH的数据寄存器 */
+
+
+/******************************************************************************************
+ *  DMAC模块
+ *  基址: 0x11001000
+ ******************************************************************************************/
+
+#define DMAC_INTSTATUS              (*(volatile unsigned *)0x11001020)  /* DAMC中断状态寄存器。 */
+#define DMAC_INTTCSTATUS            (*(volatile unsigned *)0x11001050)  /* DMAC传输完成中断状态寄存器 */
+#define DMAC_INTTCCLEAR             (*(volatile unsigned *)0x11001060)  /* DMAC传输完成中断状态清除寄存器 */
+#define DMAC_INTERRORSTATUS         (*(volatile unsigned *)0x11001080)  /* DMAC传输错误中断状态寄存器 */
+#define DMAC_INTERRCLR              (*(volatile unsigned *)0x11001090)  /* DMAC传输错误中断状态清除寄存器 */
+#define DMAC_ENBLDCHNS              (*(volatile unsigned *)0x110010b0)  /* DMAC通道使能状态寄存器 */
+#define DMAC_C0SRCADDR              (*(volatile unsigned *)0x11001000)  /* DMAC道0源地址寄存器 */
+#define DMAC_C0DESTADD              (*(volatile unsigned *)0x11001004)  /* DMAC道0目的地址寄存器 */
+#define DMAC_C0CONTROL              (*(volatile unsigned *)0x1100100c)  /* DMAC道0控制寄存器 */
+#define DMAC_C0CONFIGURATION        (*(volatile unsigned *)0x11001010)  /* DMAC道0配置寄存器 */
+#define DMAC_C0DESCRIPTOR           (*(volatile unsigned *)0x11001014)  /* DMAC道0链表地址寄存器 */
+#define DMAC_C1SRCADDR              (*(volatile unsigned *)0x11001100)  /* DMAC道1源地址寄存器 */
+#define DMAC_C1DESTADDR             (*(volatile unsigned *)0x11001104)  /* DMAC道1目的地址寄存器 */
+#define DMAC_C1CONTROL              (*(volatile unsigned *)0x1100110c)  /* DMAC道1控制寄存器 */
+#define DMAC_C1CONFIGURATION        (*(volatile unsigned *)0x11001110)  /* DMAC道1配置寄存器 */
+#define DMAC_C1DESCRIPTOR           (*(volatile unsigned *)0x11001114)  /* DMAC道1链表地址寄存器 */
+#define DMAC_C2SRCADDR              (*(volatile unsigned *)0x11001200)  /* DMAC道2源地址寄存器 */
+#define DMAC_C2DESTADDR             (*(volatile unsigned *)0x11001204)  /* DMAC道2目的地址寄存器 */
+#define DMAC_C2CONTROL              (*(volatile unsigned *)0x1100120c)  /* DMAC道2控制寄存器 */
+#define DMAC_C2CONFIGURATION        (*(volatile unsigned *)0x11001210)  /* DMAC道2配置寄存器 */
+#define DMAC_C2DESCRIPTOR           (*(volatile unsigned *)0x11001214)  /* DMAC道2链表地址寄存器 */
+#define DMAC_C3SRCADDR              (*(volatile unsigned *)0x11001300)  /* DMAC道3源地址寄存器 */
+#define DMAC_C3DESTADDR             (*(volatile unsigned *)0x11001304)  /* DMAC道3目的地址寄存器 */
+#define DMAC_C3CONTROL              (*(volatile unsigned *)0x1100130c)  /* DMAC道3控制寄存器 */
+#define DMAC_C3CONFIGURATION        (*(volatile unsigned *)0x11001310)  /* DMAC道3配置寄存器 */
+#define DMAC_C3DESCRIPTOR           (*(volatile unsigned *)0x11001314)  /* DMAC道3链表地址寄存器 */
+#define DMAC_C4SRCADDR              (*(volatile unsigned *)0x11001400)  /* DMAC道4源地址寄存器 */
+#define DMAC_C4DESTADDR             (*(volatile unsigned *)0x11001404)  /* DMAC道4目的地址寄存器 */
+#define DMAC_C4CONTROL              (*(volatile unsigned *)0x1100140c)  /* DMAC道4控制寄存器 */
+#define DMAC_C4CONFIGURATION        (*(volatile unsigned *)0x11001410)  /* DMAC道4配置寄存器 */
+#define DMAC_C4DESCRIPTOR           (*(volatile unsigned *)0x11001414)  /* DMAC道4链表地址寄存器 */
+#define DMAC_C5SRCADDR              (*(volatile unsigned *)0x11001500)  /* DMAC道5源地址寄存器 */
+#define DMAC_C5DESTADDR             (*(volatile unsigned *)0x11001504)  /* DMAC道5目的地址寄存器 */
+#define DMAC_C5CONTROL              (*(volatile unsigned *)0x1100150c)  /* DMAC道5控制寄存器 */
+#define DMAC_C5CONFIGURATION        (*(volatile unsigned *)0x11001510)  /* DMAC道5配置寄存器 */
+#define DMAC_C5DESCRIPTOR           (*(volatile unsigned *)0x11001514)  /* DMAC道5链表地址寄存器 */
+
+
+/******************************************************************************************
+ *  LCDC模块
+ *  基址: 0x11002000
+ ******************************************************************************************/
+
+#define LCDC_SSA                    (*(volatile unsigned *)0x11002000)  /* 屏幕起始地址寄存器 */
+#define LCDC_SIZE                   (*(volatile unsigned *)0x11002004)  /* 屏幕尺寸寄存器 */
+#define LCDC_PCR                    (*(volatile unsigned *)0x11002008)  /* 面板配置寄存器 */
+#define LCDC_HCR                    (*(volatile unsigned *)0x1100200c)  /* 水平配置寄存器 */
+#define LCDC_VCR                    (*(volatile unsigned *)0x11002010)  /* 垂直配置寄存器 */
+#define LCDC_PWMR                   (*(volatile unsigned *)0x11002014)  /* PWM对比度控制寄存器 */
+#define LCDC_LECR                   (*(volatile unsigned *)0x11002018)  /* 使能控制寄存器 */
+#define LCDC_DMACR                  (*(volatile unsigned *)0x1100201c)  /* DMA控制寄存器 */
+#define LCDC_LCDISREN               (*(volatile unsigned *)0x11002020)  /* 中断使能寄存器 */
+#define LCDC_LCDISR                 (*(volatile unsigned *)0x11002024)  /* 中断状态寄存器 */
+#define LCDC_LGPMR                  (*(volatile unsigned *)0x11002040)  /* 灰度调色映射寄存器组 */
+                                                                        /*(0x40-0x7c 16个32bit寄存器) */
+
+
+/******************************************************************************************
+ *  MAC模块
+ *  基址: 0x11003000
+ ******************************************************************************************/
+
+#define MAC_CTRL                    (*(volatile unsigned *)0x11003000)  /* MAC控制寄存器 */
+#define MAC_INTSRC                  (*(volatile unsigned *)0x11003004)  /* MAC中断源寄存器 */
+#define MAC_INTMASK                 (*(volatile unsigned *)0x11003008)  /* MAC中断屏蔽寄存器 */
+#define MAC_IPGT                    (*(volatile unsigned *)0x1100300c)  /* 连续帧间隔寄存器 */
+#define MAC_IPGR1                   (*(volatile unsigned *)0x11003010)  /* 等待窗口寄存器 */
+#define MAC_IPGR2                   (*(volatile unsigned *)0x11003014)  /* 等待窗口寄存器 */
+#define MAC_PACKETLEN               (*(volatile unsigned *)0x11003018)  /* 帧长度寄存器 */
+#define MAC_COLLCONF                (*(volatile unsigned *)0x1100301c)  /* 碰撞重发寄存器 */
+#define MAC_TXBD_NUM                (*(volatile unsigned *)0x11003020)  /* 发送描述符寄存器 */
+#define MAC_FLOWCTRL                (*(volatile unsigned *)0x11003024)  /* 流控寄存器 */
+#define MAC_MII_CTRL                (*(volatile unsigned *)0x11003028)  /* PHY控制寄存器 */
+#define MAC_MII_CMD                 (*(volatile unsigned *)0x1100302c)  /* PHY命令寄存器 */
+#define MAC_MII_ADDRESS             (*(volatile unsigned *)0x11003030)  /* PHY地址寄存器 */
+#define MAC_MII_TXDATA              (*(volatile unsigned *)0x11003034)  /* PHY写数据寄存器 */
+#define MAC_MII_RXDATA              (*(volatile unsigned *)0x11003038)  /* PHY读数据寄存器 */
+#define MAC_MII_STATUS              (*(volatile unsigned *)0x1100303c)  /* PHY状态寄存器 */
+#define MAC_ADDR0                   (*(volatile unsigned *)0x11003040)  /* MAC地址寄存器 */
+#define MAC_ADDR1                   (*(volatile unsigned *)0x11003044)  /* MAC地址寄存器 */
+#define MAC_HASH0                   (*(volatile unsigned *)0x11003048)  /* MAC HASH寄存器 */
+#define MAC_HASH1                   (*(volatile unsigned *)0x1100304c)  /* MAC HASH寄存器 */
+#define MAC_TXPAUSE                 (*(volatile unsigned *)0x11003050)  /* MAC控制帧寄存器 */
+#define MAC_BD                      /* 0x4*/
+
+
+#endif
+
+/*******************END OF FILE*************************/

bsp/sep4020/startup.c

@@ -0,0 +1,132 @@
+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2006-08-31     Bernard      first implementation
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+
+/**
+ * @addtogroup STM32
+ */
+
+/*@{*/
+
+extern int  rt_application_init(void);
+
+#ifdef RT_USING_FINSH
+extern void finsh_system_init(void);
+extern void finsh_set_device(const char* device);
+#endif
+
+#ifdef __CC_ARM
+extern int Image$$RW_RAM1$$ZI$$Limit;
+#elif __ICCARM__
+#pragma section="HEAP"
+#else
+extern int __bss_end;
+#endif
+
+#ifdef  DEBUG
+/*******************************************************************************
+* Function Name  : assert_failed
+* Description    : Reports the name of the source file and the source line number
+*                  where the assert error has occurred.
+* Input          : - file: pointer to the source file name
+*                  - line: assert error line source number
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void assert_failed(u8* file, u32 line)
+{
+	rt_kprintf("\n\r Wrong parameter value detected on\r\n");
+	rt_kprintf("       file  %s\r\n", file);
+	rt_kprintf("       line  %d\r\n", line);
+
+	while (1) ;
+}
+#endif
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+void rtthread_startup(void)
+{
+	/* init hardware interrupt */
+	rt_hw_interrupt_init();
+	/* init board */
+	rt_hw_board_init();
+
+	/* show version */
+	rt_show_version();
+
+	/* init tick */
+	rt_system_tick_init();
+
+	/* init kernel object */
+	rt_system_object_init();
+
+	/* init timer system */
+	rt_system_timer_init();
+
+#ifdef RT_USING_HEAP
+	#ifdef __CC_ARM
+		rt_system_heap_init((void*)&Image$$RW_RAM1$$ZI$$Limit, (void*)0x32000000);
+	#elif __ICCARM__
+	    rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
+	#else
+		/* init memory system */
+		rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
+	#endif
+#endif
+
+	/* init scheduler system */
+	rt_system_scheduler_init();
+     
+	/* init all device */
+	rt_device_init_all();
+
+	/* init application */
+	rt_application_init();
+
+#ifdef RT_USING_FINSH
+    /* init finsh */
+    finsh_system_init();
+    finsh_set_device("uart0");
+#endif
+
+	/* init idle thread */
+	rt_thread_idle_init();
+
+	/* start scheduler */
+	rt_system_scheduler_start();
+
+	/* never reach here */
+	return ;
+}
+
+int main(void)
+{
+	rt_uint32_t UNUSED level;
+
+	/* disable interrupt first */
+	level = rt_hw_interrupt_disable();
+
+	/* startup RT-Thread RTOS */
+	rtthread_startup();
+
+	return 0;
+}
+
+/*@}*/

libcpu/arm/sep4020/clk.c

@@ -0,0 +1,112 @@
+/*
+ * File      : clock.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2010-03-20     zchong      first version
+ */
+
+#include <rtthread.h>
+#include "sep4020.h"
+
+#define	CLK_IN	        4000000		/* Fin = 4.00MHz  */
+#define SYSCLK		    72000000	/* system clock we want */
+
+#define CLK_ESRAM		0
+#define CLK_LCDC		1
+#define CLK_PWM			2
+#define CLK_DMAC		3
+#define CLK_EMI			4
+#define CLK_MMCSD		5
+#define CLK_SSI			7
+#define CLK_UART0		8
+#define CLK_UART1		9
+#define CLK_UART2		10
+#define CLK_UART3		11
+#define CLK_USB			12
+#define CLK_MAC			13
+#define CLK_SMC			14
+#define CLK_I2C			15
+#define CLK_GPT			16
+
+static void rt_hw_set_system_clock(void)
+{
+	rt_uint8_t pv;
+
+	/* pv value*/
+	pv  = SYSCLK/2/CLK_IN;
+	/* go to normal mode*/
+	PMC_PMDR = 0x01;
+	/* set the clock */
+	PMC_PMCR = 0x4000 | pv;
+	/* trige configurate*/
+	PMC_PMCR = 0xc000 | pv;
+}
+
+static void rt_hw_set_usb_clock(void)
+{
+	/* set the clock */
+	PMC_PUCR = 0x000c;
+	/* trige configurate*/
+	PMC_PMCR = 0x800c;
+
+}
+
+/**
+ * @brief System Clock Configuration
+ */
+void rt_hw_clock_init(void)
+{
+	/* set system clock */
+	rt_hw_set_system_clock();
+	/* set usb clock */
+	rt_hw_set_usb_clock();
+}
+
+/**
+ * @brief Get system clock
+ */
+rt_uint32_t rt_hw_get_clock(void)
+{
+	rt_uint32_t val;
+	rt_uint8_t pv, pd, npd;
+
+	/* get PMCR value */
+	val = PMC_PMCR;
+	/* get NPD */
+	npd = (val >> 14) & 0x01;
+	/* get PD  */
+	pd  = (val >> 10) & 0x0f;
+	/* get PV  */
+	pv  = val & 0x7f;
+	/* caculate the system clock */
+	if(npd)
+		val = 2 * CLK_IN * pv;
+	else
+		val = CLK_IN * pv / (pd + 1);
+
+    return(val);
+}
+
+/**
+ * @brief Enable module clock
+ */
+ void rt_hw_enable_module_clock(rt_uint8_t module)
+ {
+
+ }
+
+/**
+ * @brief Disable module clock
+ */
+  void rt_hw_disable_module_clock(rt_uint8_t module)
+ {
+
+ }
+

libcpu/arm/sep4020/context_rvds.S

@@ -0,0 +1,107 @@
+;/*
+; * File      : context_rvds.S
+; * This file is part of RT-Thread RTOS
+; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; *
+; * The license and distribution terms for this file may be
+; * found in the file LICENSE in this distribution or at
+; * http://www.rt-thread.org/license/LICENSE
+; *
+; * Change Logs:
+; * Date           Author       Notes
+; * 2009-01-20     Bernard      first version
+; */
+
+NOINT	EQU		0xc0	; disable interrupt in psr
+
+	AREA |.text|, CODE, READONLY, ALIGN=2
+	ARM
+	REQUIRE8
+	PRESERVE8
+
+;/*
+; * rt_base_t rt_hw_interrupt_disable();
+; */
+rt_hw_interrupt_disable	PROC
+	EXPORT rt_hw_interrupt_disable
+	MRS r0, cpsr
+	ORR r1, r0, #NOINT
+	MSR cpsr_c, r1
+	BX	lr
+	ENDP
+
+;/*
+; * void rt_hw_interrupt_enable(rt_base_t level);
+; */
+rt_hw_interrupt_enable	PROC
+	EXPORT rt_hw_interrupt_enable
+	MSR cpsr_c, r0
+	BX	lr
+	ENDP
+
+;/*
+; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
+; * r0 --> from
+; * r1 --> to
+; */
+rt_hw_context_switch	PROC
+	EXPORT rt_hw_context_switch
+	STMFD	sp!, {lr}			; push pc (lr should be pushed in place of PC)
+	STMFD	sp!, {r0-r12, lr}	; push lr & register file
+
+	MRS		r4, cpsr
+	STMFD	sp!, {r4}			; push cpsr
+	MRS		r4, spsr
+	STMFD	sp!, {r4}			; push spsr
+
+	STR	sp, [r0]				; store sp in preempted tasks TCB
+	LDR	sp, [r1]				; get new task stack pointer
+
+	LDMFD	sp!, {r4}			; pop new task spsr
+	MSR	spsr_cxsf, r4
+	LDMFD	sp!, {r4}			; pop new task cpsr
+	MSR	cpsr_cxsf, r4
+
+	LDMFD	sp!, {r0-r12, lr, pc}	; pop new task r0-r12, lr & pc
+	ENDP
+
+;/*
+; * void rt_hw_context_switch_to(rt_uint32 to);
+; * r0 --> to
+; */
+rt_hw_context_switch_to	PROC
+	EXPORT rt_hw_context_switch_to
+	LDR	sp, [r0]				; get new task stack pointer
+
+	LDMFD	sp!, {r4}			; pop new task spsr
+	MSR	spsr_cxsf, r4
+	LDMFD	sp!, {r4}			; pop new task cpsr
+	MSR	cpsr_cxsf, r4
+
+	LDMFD	sp!, {r0-r12, lr, pc}	; pop new task r0-r12, lr & pc
+	ENDP
+
+;/*
+; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
+; */
+	IMPORT rt_thread_switch_interrput_flag
+	IMPORT rt_interrupt_from_thread
+	IMPORT rt_interrupt_to_thread
+
+rt_hw_context_switch_interrupt	PROC
+	EXPORT rt_hw_context_switch_interrupt
+	LDR r2, =rt_thread_switch_interrput_flag
+	LDR r3, [r2]
+	CMP r3, #1
+	BEQ _reswitch
+	MOV r3, #1							; set rt_thread_switch_interrput_flag to 1
+	STR r3, [r2]
+	LDR r2, =rt_interrupt_from_thread	; set rt_interrupt_from_thread
+	STR r0, [r2]
+_reswitch
+	LDR r2, =rt_interrupt_to_thread		; set rt_interrupt_to_thread
+	STR r1, [r2]
+	BX	lr
+	ENDP
+
+	END

libcpu/arm/sep4020/cpu.c

@@ -0,0 +1,42 @@
+/*
+ * File      : cpu.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2006-08-23     Bernard      first version
+ */
+
+#include <rtthread.h>
+
+
+/**
+ * @addtogroup AT91SAM7X
+ */
+/*@{*/
+
+/**
+ * this function will reset CPU
+ *
+ */
+void rt_hw_cpu_reset()
+{
+}
+
+/**
+ * this function will shutdown CPU
+ *
+ */
+void rt_hw_cpu_shutdown()
+{
+	rt_kprintf("shutdown...\n");
+
+	while (1);
+}
+
+/*@}*/

libcpu/arm/sep4020/interrupt.c

@@ -0,0 +1,107 @@
+/*
+ * File      : trap.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2006-08-23     Bernard      first version
+ * 2010-03-17     zchong       SEP4020
+ */
+
+#include <rtthread.h>
+#include "sep4020.h"
+
+#define MAX_HANDLERS	32
+
+extern rt_uint32_t rt_interrupt_nest;
+
+/* exception and interrupt handler table */
+rt_isr_handler_t isr_table[MAX_HANDLERS];
+rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
+rt_uint32_t rt_thread_switch_interrput_flag;
+
+/**
+ * @addtogroup SEP4020
+ */
+/*@{*/
+
+void rt_hw_interrupt_handler(int vector)
+{
+	rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
+}
+
+/**
+ * This function will initialize hardware interrupt
+ */
+void rt_hw_interrupt_init()
+{
+	register rt_uint32_t idx;
+
+    /* disable all interrupts */
+    INTC_IER = 0x0;
+
+    /* mask all interrupts */
+    INTC_IMR = 0xFFFFFFFF;
+
+	/* init exceptions table */
+	for(idx=0; idx < MAX_HANDLERS; idx++)
+	{
+		isr_table[idx] = (rt_isr_handler_t)rt_hw_interrupt_handler;
+	}
+
+	/* init interrupt nest, and context in thread sp */
+	rt_interrupt_nest = 0;
+	rt_interrupt_from_thread = 0;
+	rt_interrupt_to_thread = 0;
+	rt_thread_switch_interrput_flag = 0;
+}
+
+/**
+ * This function will mask a interrupt.
+ * @param vector the interrupt number
+ */
+void rt_hw_interrupt_mask(int vector)
+{
+    INTC_IMR |= 1 << vector;
+}
+
+/**
+ * This function will un-mask a interrupt.
+ * @param vector the interrupt number
+ */
+void rt_hw_interrupt_umask(int vector)
+{
+	/* un-mask interrupt */
+	if ((vector == INT_NOTUSED0) || (vector == INT_NOTUSED16))
+	{
+		rt_kprintf("Interrupt vec %d is not used!\n", vector);
+		// while(1);
+	}
+	else if (vector == INTGLOBAL)
+		INTC_IMR = 0x0;
+	else
+		INTC_IMR &= ~(1 << vector);
+
+}
+
+/**
+ * This function will install a interrupt service routine to a interrupt.
+ * @param vector the interrupt number
+ * @param new_handler the interrupt service routine to be installed
+ * @param old_handler the old interrupt service routine
+ */
+void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_handler_t *old_handler)
+{
+	if(vector >= 0 && vector < MAX_HANDLERS)
+	{
+		if (*old_handler != RT_NULL) *old_handler = isr_table[vector];
+		if (new_handler != RT_NULL) isr_table[vector] = new_handler;
+	}
+}
+
+/*@}*/

libcpu/arm/sep4020/serial.c

@@ -0,0 +1,281 @@
+/*
+ * File      : serial.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2009, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-02-05     Bernard      first version
+ * 2009-10-25     Bernard      fix rt_serial_read bug when there is no data
+ *                             in the buffer.
+ * 2010-03-29     Bernard      cleanup code.
+ * 2010-06-14     zchong       for sep4020
+ */
+
+#include "serial.h"
+
+/**
+ * @addtogroup SEP4020
+ */
+/*@{*/
+
+/* RT-Thread Device Interface */
+static rt_err_t rt_serial_init (rt_device_t dev)
+{
+	struct serial_device* uart = (struct serial_device*) dev->private;
+
+	if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
+	{
+
+		if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+		{
+			rt_memset(uart->int_rx->rx_buffer, 0, 
+				sizeof(uart->int_rx->rx_buffer));
+			uart->int_rx->read_index = uart->int_rx->save_index = 0;
+		}
+		
+		if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+		{
+			rt_memset(uart->int_tx->tx_buffer, 0, 
+				sizeof(uart->int_tx->tx_buffer));
+			uart->int_tx->write_index = uart->int_tx->save_index = 0;
+		}
+
+		dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
+	}
+
+	return RT_EOK;
+}
+
+static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
+{
+	return RT_EOK;
+}
+
+static rt_err_t rt_serial_close(rt_device_t dev)
+{
+	return RT_EOK;
+}
+
+static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
+{
+	rt_uint8_t* ptr;
+	rt_err_t err_code;
+	struct serial_device* uart;
+
+	ptr = buffer;
+	err_code = RT_EOK;
+	uart = (struct serial_device*)dev->private;
+
+	if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+	{
+		/* interrupt mode Rx */
+		while (size)
+		{
+			rt_base_t level;
+
+			/* disable interrupt */
+			level = rt_hw_interrupt_disable();
+
+			if (uart->int_rx->read_index != uart->int_rx->save_index)
+			{
+				/* read a character */
+				*ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
+				size--;
+
+				/* move to next position */
+				uart->int_rx->read_index ++;
+				if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+					uart->int_rx->read_index = 0;
+			}
+			else
+			{
+				/* set error code */
+				err_code = -RT_EEMPTY;
+
+				/* enable interrupt */
+				rt_hw_interrupt_enable(level);
+				break;
+			}
+
+			/* enable interrupt */
+			rt_hw_interrupt_enable(level);
+		}
+	}
+	else
+	{
+		/* polling mode */
+		while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
+		{
+			while (uart->uart_device->lsr & USTAT_RCV_READY)
+			{
+				*ptr = uart->uart_device->dlbl_rxfifo_txfifo & 0xff;
+				ptr ++;
+			}
+		}
+	}
+
+	/* set error code */
+	rt_set_errno(err_code);
+	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+}
+
+
+static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
+{
+	rt_uint8_t* ptr;
+	rt_err_t err_code;
+	struct serial_device* uart;
+	
+	err_code = RT_EOK;
+	ptr = (rt_uint8_t*)buffer;
+	uart = (struct serial_device*)dev->private;
+
+	if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+	{
+		/* interrupt mode Tx */
+		while (uart->int_tx->save_index != uart->int_tx->write_index)
+		{
+			/* save on tx buffer */
+			uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
+			
+			-- size;
+
+			/* move to next position */
+			uart->int_tx->save_index ++;
+			
+			/* wrap save index */
+			if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
+				uart->int_tx->save_index = 0;
+		}
+		
+		/* set error code */
+		if (size > 0)
+			err_code = -RT_EFULL;
+	}
+	else
+	{
+		/* polling mode */
+		while (size)
+		{
+			/*
+			 * to be polite with serial console add a line feed
+			 * to the carriage return character
+			 */
+			if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM))
+			{
+				while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
+				uart->uart_device->dlbl_rxfifo_txfifo = '\r';
+			}
+
+			while (!(uart->uart_device->lsr & USTAT_TXB_EMPTY));
+			uart->uart_device->dlbl_rxfifo_txfifo = (*ptr & 0x1FF);
+
+			++ptr; --size;
+		}
+	}	
+
+	/* set error code */
+	rt_set_errno(err_code);
+	
+	return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+}
+
+static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
+{
+//	struct serial_device* uart;
+
+	RT_ASSERT(dev != RT_NULL);
+
+//	uart = (struct serial_device*)dev->private;
+	switch (cmd)
+	{
+	case RT_DEVICE_CTRL_SUSPEND:
+		/* suspend device */
+		dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
+		break;
+
+	case RT_DEVICE_CTRL_RESUME:
+		/* resume device */
+		dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
+		break;
+	}
+
+	return RT_EOK;
+}
+
+/*
+ * serial register for SEP4020
+ */
+rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial)
+{
+	RT_ASSERT(device != RT_NULL);
+
+
+	device->type 		= RT_Device_Class_Char;
+	device->rx_indicate = RT_NULL;
+	device->tx_complete = RT_NULL;
+	device->init 		= rt_serial_init;
+	device->open		= rt_serial_open;
+	device->close		= rt_serial_close;
+	device->read 		= rt_serial_read;
+	device->write 		= rt_serial_write;
+	device->control 	= rt_serial_control;
+	device->private		= serial;
+
+	/* register a character device */
+	return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
+}
+
+/* ISR for serial interrupt */
+void rt_hw_serial_isr(rt_device_t device)
+{
+	rt_base_t level;
+	struct serial_device* uart = (struct serial_device*) device->private;
+	
+	/* interrupt mode receive */	
+	RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
+
+	/* save on rx buffer */
+	while (uart->uart_device->lsr & USTAT_RCV_READY)
+	{
+		/* disable interrupt */
+		level = rt_hw_interrupt_disable();
+
+		uart->int_rx->rx_buffer[uart->int_rx->save_index] = uart->uart_device->dlbl_rxfifo_txfifo & 0xff;
+		uart->int_rx->save_index ++;
+		if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
+			uart->int_rx->save_index = 0;
+	
+		/* if the next position is read index, discard this 'read char' */
+		if (uart->int_rx->save_index == uart->int_rx->read_index)
+		{
+			uart->int_rx->read_index ++;
+			if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
+				uart->int_rx->read_index = 0;
+		}
+
+		/* enable interrupt */
+		rt_hw_interrupt_enable(level);
+	}
+
+	/* invoke callback */
+	if (device->rx_indicate != RT_NULL)
+	{
+		rt_size_t rx_length;
+		
+		/* get rx length */
+		rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
+			UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
+			uart->int_rx->save_index - uart->int_rx->read_index;
+
+		device->rx_indicate(device, rx_length);
+	}	
+}
+
+
+/*@}*/

libcpu/arm/sep4020/serial.h

@@ -0,0 +1,56 @@
+#ifndef __RT_SERIAL_H__
+#define __RT_SERIAL_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+
+
+#define	USTAT_RCV_READY			0x01   	/* receive data ready */ 
+#define	USTAT_TXB_EMPTY			0x20   	/* tx buffer empty */
+#define BPS						115200	/* serial baudrate */
+
+#define UART_RX_BUFFER_SIZE		64
+#define UART_TX_BUFFER_SIZE		64
+
+struct serial_int_rx
+{
+	rt_uint8_t  rx_buffer[UART_RX_BUFFER_SIZE];
+	rt_uint32_t read_index, save_index;
+};
+
+struct serial_int_tx
+{
+	rt_uint8_t  tx_buffer[UART_TX_BUFFER_SIZE];
+	rt_uint32_t write_index, save_index;
+};
+
+/* serial port registers */
+typedef struct uartport
+{
+	rt_uint32_t dlbl_rxfifo_txfifo;
+	rt_uint32_t dlbh_ier;
+	rt_uint32_t iir_fcr;
+	rt_uint32_t lcr;
+	rt_uint32_t mcr;
+	rt_uint32_t lsr;
+	rt_uint32_t msr;
+}uartport;
+
+struct serial_device
+{
+	/* uart hardware registers */
+	uartport* uart_device;
+	
+	/* rx structure */
+	struct serial_int_rx* int_rx;
+
+	/* tx structure */
+	struct serial_int_tx* int_tx;
+};
+
+rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct serial_device *serial);
+
+void rt_hw_serial_isr(rt_device_t device);
+
+#endif
+

libcpu/arm/sep4020/stack.c

@@ -0,0 +1,61 @@
+/*
+ * File      : stack.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2006-08-23     Bernard      the first version
+ */
+#include <rtthread.h>
+
+#define SVCMODE				0x13
+
+/**
+ * @addtogroup AT91SAM7
+ */
+/*@{*/
+
+/**
+ * This function will initialize thread stack
+ *
+ * @param tentry the entry of thread
+ * @param parameter the parameter of entry
+ * @param stack_addr the beginning stack address
+ * @param texit the function will be called when thread exit
+ *
+ * @return stack address
+ */
+rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
+	rt_uint8_t *stack_addr, void *texit)
+{
+	unsigned long *stk;
+
+	stk 	 = (unsigned long *)stack_addr;
+	*(stk) 	 = (unsigned long)tentry;		/* entry point */
+	*(--stk) = (unsigned long)texit;		/* lr */
+	*(--stk) = 0;							/* r12 */
+	*(--stk) = 0;							/* r11 */
+	*(--stk) = 0;							/* r10 */
+	*(--stk) = 0;							/* r9 */
+	*(--stk) = 0;							/* r8 */
+	*(--stk) = 0;							/* r7 */
+	*(--stk) = 0;							/* r6 */
+	*(--stk) = 0;							/* r5 */
+	*(--stk) = 0;							/* r4 */
+	*(--stk) = 0;							/* r3 */
+	*(--stk) = 0;							/* r2 */
+	*(--stk) = 0;							/* r1 */
+	*(--stk) = (unsigned long)parameter;	/* r0 : argument */
+	*(--stk) = SVCMODE;						/* cpsr */
+	*(--stk) = SVCMODE;						/* spsr */
+
+	/* return task's current stack address */
+	return (rt_uint8_t *)stk;
+}
+
+/*@}*/

libcpu/arm/sep4020/start_rvds.S

@@ -0,0 +1,374 @@
+;==============================================================================================
+;	star_rvds.s	for Keil MDK 4.10
+;
+;   SEP4020 start up code
+;
+; Change Logs:
+; Date           Author       Notes
+; 2010-03-17     zchong 
+;=============================================================================================
+
+;
+
+PMU_PLTR        EQU     0x10001000     	; PLL的稳定过渡时间
+PMU_PMCR        EQU     0x10001004      ; 系统主时钟PLL的控制寄存器
+PMU_PUCR        EQU     0x10001008      ; USB时钟PLL的控制寄存器
+PMU_PCSR        EQU     0x1000100C      ; 内部模块时钟源供给的控制寄存器
+PMU_PDSLOW      EQU     0x10001010      ; SLOW状态下时钟的分频因子
+PMU_PMDR        EQU     0x10001014      ; 芯片工作模式寄存器
+PMU_RCTR        EQU     0x10001018      ; Reset控制寄存器
+PMU_CLRWAKUP    EQU     0x1000101C      ; WakeUp清除寄存器
+
+RTC_CTR			EQU	 	0x1000200C		; RTC控制寄存器
+
+INTC_IER		EQU		0x10000000		; IRQ中断允许寄存器
+INTC_IMR		EQU		0x10000008		; IRQ中断屏蔽寄存器
+INTC_IFSR		EQU		0x10000030		; IRQ中断最终状态寄存器
+INTC_FIER		EQU 	0x100000C0		; FIQ中断允许寄存器
+INTC_FIMR		EQU		0x100000C4		; FIQ中断屏蔽寄存器
+
+EMI_CSACONF     EQU     0x11000000     	; CSA参数配置寄存器
+EMI_CSECONF     EQU     0x11000010      ; CSE参数配置寄存器
+EMI_CSFCONF     EQU     0x11000014      ; CSF参数配置寄存器
+EMI_SDCONF1     EQU     0x11000018      ; SDRAM时序配置寄存器1
+EMI_SDCONF2     EQU     0x1100001C      ; SDRAM时序配置寄存器2, SDRAM初始化用到的配置信息
+EMI_REMAPCONF   EQU     0x11000020      ; 片选空间及地址映射REMAP配置寄存器
+
+Mode_USR        EQU     0x10
+Mode_FIQ        EQU     0x11
+Mode_IRQ        EQU     0x12
+Mode_SVC        EQU     0x13
+Mode_ABT        EQU     0x17
+Mode_UND        EQU     0x1B
+Mode_SYS        EQU     0x1F
+
+I_Bit           EQU     0x80            ; when I bit is set, IRQ is disabled
+F_Bit           EQU     0x40            ; when F bit is set, FIQ is disabled
+NOINT     		EQU     0xc0
+MASK_MODE		EQU		0x0000003F
+MODE_SVC32		EQU		0x00000013
+
+; Internal Memory Base Addresses
+FLASH_BASE      EQU     0x20000000   
+RAM_BASE        EQU     0x04000000
+
+; Stack
+UND_Stack_Size  EQU     0x00000000
+SVC_Stack_Size  EQU     0x00000400
+ABT_Stack_Size  EQU     0x00000000
+FIQ_Stack_Size  EQU     0x00000000
+IRQ_Stack_Size  EQU     0x00000100
+USR_Stack_Size  EQU     0x00000000
+
+ISR_Stack_Size  EQU     (UND_Stack_Size + SVC_Stack_Size + ABT_Stack_Size + \
+                         FIQ_Stack_Size + IRQ_Stack_Size)
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+
+Stack_Mem       SPACE   USR_Stack_Size
+__initial_sp    SPACE   ISR_Stack_Size
+Stack_Top
+
+; Heap
+Heap_Size       EQU     0x00000000
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+
+                PRESERVE8
+                
+; Area Definition and Entry Point
+;  Startup Code must be linked first at Address at which it expects to run.
+
+                AREA    RESET, CODE, READONLY
+                ARM
+
+; Exception Vectors
+;  Mapped to Address 0.
+;  Absolute addressing mode must be used.
+;  Dummy Handlers are implemented as infinite loops which can be modified.
+
+Vectors         LDR     PC,Reset_Addr         
+                LDR     PC,Undef_Addr
+                LDR     PC,SWI_Addr
+                LDR     PC,PAbt_Addr
+                LDR     PC,DAbt_Addr
+                NOP                            ; Reserved Vector
+                LDR     PC,IRQ_Addr
+                LDR     PC,FIQ_Addr
+
+Reset_Addr      DCD     Reset_Handler
+Undef_Addr      DCD     Undef_Handler
+SWI_Addr        DCD     SWI_Handler
+PAbt_Addr       DCD     PAbt_Handler
+DAbt_Addr       DCD     DAbt_Handler
+                DCD     0                      ; Reserved Address
+IRQ_Addr        DCD     IRQ_Handler
+FIQ_Addr        DCD     FIQ_Handler
+
+Undef_Handler   B       Undef_Handler
+SWI_Handler     B       SWI_Handler
+PAbt_Handler    B       PAbt_Handler
+DAbt_Handler    B       DAbt_Handler
+FIQ_Handler     B       FIQ_Handler
+
+
+; Reset Handler
+
+                EXPORT  Reset_Handler
+Reset_Handler   
+
+;****************************************************************
+;* 关闭看门狗
+;****************************************************************
+		LDR		R0,=RTC_CTR	
+		LDR		R1,=0x0			
+		STR		R1,[R0]	
+
+;****************************************************************
+;* 关中断
+;****************************************************************	
+		MRS		R0, CPSR
+		BIC		R0, R0, #MASK_MODE
+		ORR		R0, R0, #MODE_SVC32
+		ORR 	R0, R0, #I_Bit
+		ORR 	R0, R0, #F_Bit
+		MSR		CPSR_c, r0
+	
+		LDR		R0,=INTC_IER			
+		LDR		R1,=0x0 	
+		STR		R1,[R0]
+		LDR		R0,=INTC_IMR
+		LDR		R1,=0xFFFFFFFF			
+		STR		R1,[R0]	
+	
+		LDR		R0,=INTC_FIER			
+		LDR		R1,=0x0 	
+		STR		R1,[R0]
+		LDR		R0,=INTC_FIMR
+		LDR		R1,=0x0F				
+		STR		R1,[R0]
+
+;****************************************************************
+;* 初始化PMU模块, 配置系统时钟
+;****************************************************************
+		LDR	   	R4,    =PMU_PCSR        ; 打开所有模块时钟
+		LDR    	R5,    =0x0001ffff                 
+  	  	STR    	R5,    [ R4 ] 
+
+		LDR    	R4,    =PMU_PLTR        ; 配置PLL稳定过度时间为保守值50us*100M.
+		LDR    	R5,    =0x00fa00fa
+		STR    	R5,    [ R4 ] 
+   
+    	LDR    	R4,    =PMU_PMDR        ; 由SLOW模式进入NORMAL模式
+	   	LDR    	R5,    =0x00000001                
+    	STR    	R5,    [ R4 ] 
+    
+    	LDR    	R4,    =PMU_PMCR        ; 配置系统时钟为72MHz 2*Fin*9=2*4*9=72MHz
+    	LDR    	R5,    =0x00004009      ; MFCN 0->1 trigger PLL to reconfigure event when mode isn''t SLOW        
+    	STR    	R5,    [ R4 ]
+    	LDR    	R4,    =PMU_PMCR        ; 
+    	LDR    	R5,    =0x0000c009                 
+    	STR    	R5,    [ R4 ]
+    
+;****************************************************************
+;* 初始化EMI
+;****************************************************************
+;    	LDR    	R4,    =EMI_CSACONF     ; CSA片选时序参数配置
+;    	LDR    	R5,    =0x08a6a6a1                 
+;    	STR    	R5,    [ R4 ]     
+ 
+;    	LDR    	R4,    =EMI_CSECONF     ; CSE片选时序参数配置,最保守配置
+;    	LDR    	R5,    =0x8cfffff1                 
+;    	STR    	R5,    [ R4 ]
+ 
+;    	LDR    	R4,    =EMI_SDCONF1     ; SDRAM参数配置1
+;    	LDR    	R5,    =0x1E104177                 
+;    	STR    	R5,    [ R4 ] 
+
+;    	LDR    	R4,    =EMI_SDCONF2     ; SDRAM参数配置2
+;    	LDR   	R5,    =0x80001860                 
+;    	STR    	R5,    [ R4 ]
+
+
+; Copy Exception Vectors to Internal RAM
+
+	IF      :DEF:RAM_INTVEC
+		ADR     R8, 	Vectors         ; Source
+		LDR     R9, 	=RAM_BASE       ; Destination
+		LDMIA   R8!, 	{R0-R7}        	; Load Vectors 
+		STMIA   R9!, 	{R0-R7}        	; Store Vectors 
+		LDMIA   R8!, 	{R0-R7}        	; Load Handler Addresses 
+		STMIA   R9!, 	{R0-R7}        	; Store Handler Addresses
+	ENDIF
+
+
+; Remap on-chip RAM to address 0
+
+	IF      :DEF:REMAP
+		LDR     R0, 	=EMI_REMAPCONF
+		MOV     R1, 	#0x80000000
+		STR     R1, 	[R0, #0]   ; Remap
+	ENDIF
+
+
+; Setup Stack for each mode
+
+		LDR     R0, 	=Stack_Top
+
+;  Enter Undefined Instruction Mode and set its Stack Pointer
+		MSR     CPSR_c, #Mode_UND:OR:I_Bit:OR:F_Bit
+		MOV     SP, 	R0
+		SUB     R0, R0, #UND_Stack_Size
+
+;  Enter Abort Mode and set its Stack Pointer
+		MSR     CPSR_c, #Mode_ABT:OR:I_Bit:OR:F_Bit
+		MOV     SP, 	R0
+		SUB     R0, R0, #ABT_Stack_Size
+
+;  Enter FIQ Mode and set its Stack Pointer
+		MSR     CPSR_c, #Mode_FIQ:OR:I_Bit:OR:F_Bit
+		MOV     SP, 	R0
+		SUB     R0, R0, #FIQ_Stack_Size
+
+;  Enter IRQ Mode and set its Stack Pointer
+		MSR     CPSR_c, #Mode_IRQ:OR:I_Bit:OR:F_Bit
+		MOV     SP, 	R0
+		SUB     R0, R0, #IRQ_Stack_Size
+
+;  Enter Supervisor Mode and set its Stack Pointer
+		MSR     CPSR_c, #Mode_SVC:OR:I_Bit:OR:F_Bit
+		MOV     SP, 	R0
+	 	SUB     R0, R0, #SVC_Stack_Size
+
+;  Enter User Mode and set its Stack Pointer
+	; MSR     CPSR_c, #Mode_USR
+	IF      :DEF:__MICROLIB
+
+		EXPORT __initial_sp
+	
+	ELSE
+
+	; No usr mode stack here.
+	;MOV     SP, R0
+	;SUB     SL, SP, #USR_Stack_Size
+
+	ENDIF
+
+
+; Enter the C code
+
+		IMPORT  __main
+		LDR     R0, 	=__main
+		BX      R0
+
+	IMPORT rt_interrupt_enter
+	IMPORT rt_interrupt_leave
+	IMPORT rt_thread_switch_interrput_flag
+	IMPORT rt_interrupt_from_thread
+	IMPORT rt_interrupt_to_thread
+	IMPORT rt_hw_trap_irq
+	IMPORT rt_hw_trap_abort
+	IMPORT rt_interrupt_nest
+
+Abort_Handler	PROC
+		EXPORT	Abort_Handler
+		STMFD	SP!, 	{R0-R12,LR}
+		LDR		R0, 	=rt_interrupt_nest
+		LDR		R1, 	[R0]
+		CMP		R1, 	#0
+DeadLoop	BHI	DeadLoop    ; Abort happened in irq mode, halt system.
+		BL		rt_interrupt_enter
+		BL		rt_hw_trap_abort
+		BL		rt_interrupt_leave
+		B		SWITCH
+				ENDP
+				
+IRQ_Handler		PROC
+		EXPORT IRQ_Handler
+		STMFD	SP!,	{R0-R12,LR}
+		BL		rt_interrupt_enter
+		BL		rt_hw_trap_irq
+		BL		rt_interrupt_leave
+
+				; if rt_thread_switch_interrput_flag set, jump to
+				; rt_hw_context_switch_interrupt_do and don't return
+SWITCH			
+		LDR		R0, 	=rt_thread_switch_interrput_flag
+		LDR		R1, 	[R0]
+		CMP		R1, 	#1
+		BEQ		rt_hw_context_switch_interrupt_do
+
+		LDMFD	SP!, 	{R0-R12,LR}
+		SUBS	PC, 	LR, #4
+	ENDP
+
+; /*
+; * void rt_hw_context_switch_interrupt_do(rt_base_t flag)
+; */
+rt_hw_context_switch_interrupt_do	PROC
+		EXPORT rt_hw_context_switch_interrupt_do
+		MOV		r1,  #0			; clear flag
+		STR		r1,  [r0]
+
+		LDMFD	sp!, {r0-r12,lr}; reload saved registers
+		STMFD	sp!, {r0-r3}	; save r0-r3
+		MOV		r1,  sp
+		ADD		sp,  sp, #16	; restore sp
+		SUB		r2,  lr, #4		; save old task's pc to r2
+
+		MRS		r3,  spsr		; get cpsr of interrupt thread
+
+		; switch to SVC mode and no interrupt
+		MSR     cpsr_c, #I_Bit:OR:F_Bit:OR:Mode_SVC
+
+		STMFD	sp!, {r2}		; push old task's pc
+		STMFD	sp!, {r4-r12,lr}; push old task's lr,r12-r4
+		MOV		r4,  r1			; Special optimised code below
+		MOV		r5,  r3
+		LDMFD	r4!, {r0-r3}
+		STMFD	sp!, {r0-r3}	; push old task's r3-r0
+		STMFD	sp!, {r5}		; push old task's cpsr
+		MRS		r4,  spsr
+		STMFD	sp!, {r4}		; push old task's spsr
+
+		LDR		r4,  =rt_interrupt_from_thread
+		LDR		r5,  [r4]
+		STR		sp,  [r5]		; store sp in preempted tasks's TCB
+
+		LDR		r6,  =rt_interrupt_to_thread
+		LDR		r6,  [r6]
+		LDR		sp,  [r6]		; get new task's stack pointer
+			
+		LDMFD	sp!, {r4}		; pop new task's spsr
+		MSR		spsr_cxsf, r4
+		LDMFD	sp!, {r4}		; pop new task's psr
+		MSR		cpsr_cxsf, r4
+ 	
+		LDMFD	sp!, {r0-r12,lr,pc}	; pop new task's r0-r12,lr & pc
+		ENDP
+
+	IF      :DEF:__MICROLIB
+
+		EXPORT  __heap_base
+		EXPORT  __heap_limit
+
+	ELSE
+; User Initial Stack & Heap
+		AREA    |.text|, CODE, READONLY
+
+		IMPORT  __use_two_region_memory
+		EXPORT  __user_initial_stackheap
+__user_initial_stackheap
+
+		LDR     R0, =  Heap_Mem
+		LDR     R1, = (Stack_Mem + IRQ_Stack_Size)
+		LDR     R2, = (Heap_Mem +      Heap_Size)
+		LDR     R3, = Stack_Mem
+		BX      LR
+	ENDIF
+
+	END

libcpu/arm/sep4020/trap.c

@@ -0,0 +1,66 @@
+/*
+ * File      : trap.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://openlab.rt-thread.com/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2006-08-25     Bernard      first version
+ * 2010-03-18     zchong       for sep4020
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+
+#include "sep4020.h"
+
+/**
+ * @addtogroup SEP4020
+ */
+/*@{*/
+
+extern rt_isr_handler_t isr_table[];
+
+void rt_hw_trap_irq()
+{
+	rt_uint32_t intstat,intnum;
+    rt_uint8_t i = 0;
+	rt_isr_handler_t isr_func;
+    
+    /* get interrupt source */
+	intstat = INTC_IFSR;
+
+	intnum = intstat;
+    if (intstat == INTGLOBAL) return;
+
+	while(intnum != 0x00000001)
+	{
+		intnum = intnum>>1;
+		i++;
+	}
+	/* get interrupt service routine */
+	isr_func = isr_table[i];
+
+	/* turn to interrupt service routine */
+	isr_func(intstat);
+
+}
+
+void rt_hw_trap_fiq()
+{
+    rt_kprintf("fast interrupt request\n");
+}
+
+extern struct rt_thread* rt_current_thread;
+void rt_hw_trap_abort()
+{
+	rt_kprintf("Abort occured!!! Thread [%s] suspended.\n",rt_current_thread->name);
+	rt_thread_suspend(rt_current_thread);
+	rt_schedule();
+
+}
+/*@}*/