Merge pull request #2610 from jhbdream/stm32l4r9-bsp

add bsp for stm32l4r9

bsp/stm32/libraries/HAL_Drivers/SConscript

@@ -27,7 +27,8 @@ if GetDepend(['RT_USING_QSPI']):
     src += ['drv_qspi.c']
 
 if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
-    src += ['drv_soft_i2c.c']
+    if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'):
+        src += ['drv_soft_i2c.c']
 
 if GetDepend('RT_USING_LWIP'):
     src += ['drv_eth.c']

bsp/stm32/libraries/HAL_Drivers/drv_gpio.c

@@ -756,6 +756,9 @@ int rt_hw_pin_init(void)
 #endif
 
 #if defined(__HAL_RCC_GPIOG_CLK_ENABLE)
+    #ifdef SOC_SERIES_STM32L4
+        HAL_PWREx_EnableVddIO2();
+    #endif
     __HAL_RCC_GPIOG_CLK_ENABLE();
 #endif
 

bsp/stm32/libraries/STM32L4xx_HAL/SConscript

@@ -23,7 +23,6 @@ STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c
 STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c
 STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c
 STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rng.c
-STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sram.c
 ''')
 
 if GetDepend(['RT_USING_PIN']):
@@ -90,6 +89,24 @@ if GetDepend(['BSP_USING_ON_CHIP_FLASH']):
     src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c']
     src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c']
 
+if GetDepend(['BSP_USING_FMC']):
+    src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_fmc.c']
+	
+if GetDepend(['BSP_USING_GFXMMU']):
+    src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gfxmmu.c']
+
+if GetDepend(['BSP_USING_DSI']):
+    src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dsi.c']
+    src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma2d.c']
+    src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_ll_dma2d.c']
+    src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_ltdc.c']
+    src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_ltdc_ex.c']
+	
+if GetDepend(['BSP_USING_SRAM']):
+    src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_sram.c']	
+	
+	
+
 path = [cwd + '/STM32L4xx_HAL_Driver/Inc',
     cwd + '/CMSIS/Device/ST/STM32L4xx/Include',
     cwd + '/CMSIS/Include']

bsp/stm32/stm32l4r9-st-eval/.config

@@ -48,11 +48,11 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
 # Memory Management
 #
 CONFIG_RT_USING_MEMPOOL=y
-# CONFIG_RT_USING_MEMHEAP is not set
+CONFIG_RT_USING_MEMHEAP=y
 # CONFIG_RT_USING_NOHEAP is not set
-CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SMALL_MEM is not set
 # CONFIG_RT_USING_SLAB is not set
-# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
 CONFIG_RT_USING_HEAP=y
 
 #
@@ -119,7 +119,8 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_I2C=y
+CONFIG_RT_USING_I2C_BITOPS=y
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_PWM is not set
@@ -160,6 +161,11 @@ CONFIG_RT_USING_PIN=y
 #
 # CONFIG_RT_USING_SAL is not set
 
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
 #
 # light weight TCP/IP stack
 #
@@ -193,32 +199,20 @@ CONFIG_RT_USING_PIN=y
 # RT-Thread online packages
 #
 
-#
-# system packages
-#
-
-#
-# RT-Thread GUI Engine
-#
-# CONFIG_PKG_USING_GUIENGINE is not set
-# CONFIG_PKG_USING_PERSIMMON is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
-# CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_SQLITE is not set
-# CONFIG_PKG_USING_RTI is not set
-
 #
 # IoT - internet of things
 #
 # CONFIG_PKG_USING_PAHOMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_LJSON is not set
 # CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
-# CONFIG_PKG_USING_GAGENT_CLOUD is not set
 
 #
 # Wi-Fi
@@ -233,9 +227,23 @@ CONFIG_RT_USING_PIN=y
 # Wiced WiFi
 #
 # CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_WIZNET is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 
 #
 # security packages
@@ -247,6 +255,7 @@ CONFIG_RT_USING_PIN=y
 #
 # language packages
 #
+# CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
 
@@ -254,27 +263,86 @@ CONFIG_RT_USING_PIN=y
 # multimedia packages
 #
 # CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
 
 #
 # tools packages
 #
 # CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
-# CONFIG_PKG_USING_IPERF is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ADBD is not set
+
+#
+# system packages
+#
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_AHT10 is not set
+# CONFIG_PKG_USING_AP3216C is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_MPU6XXX is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AT24CXX is not set
 
 #
 # miscellaneous packages
 #
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
 
 #
-# example package: hello
+# samples: kernel and components samples
 #
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_NNOM is not set
 CONFIG_SOC_FAMILY_STM32=y
 CONFIG_SOC_SERIES_STM32L4=y
 
@@ -286,6 +354,13 @@ CONFIG_SOC_STM32L4R9AI=y
 #
 # Onboard Peripheral Drivers
 #
+CONFIG_BSP_USING_STLINK_TO_USART=y
+# CONFIG_BSP_USING_DSI is not set
+
+#
+# Enable Touch
+#
+# CONFIG_BSP_USING_TOUCH is not set
 
 #
 # On-chip Peripheral Drivers
@@ -293,6 +368,10 @@ CONFIG_SOC_STM32L4R9AI=y
 CONFIG_BSP_USING_GPIO=y
 CONFIG_BSP_USING_UART=y
 CONFIG_BSP_USING_UART3=y
+# CONFIG_BSP_USING_SRAM is not set
+# CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_GFXMMU is not set
+# CONFIG_BSP_USING_FMC is not set
 
 #
 # Board extended module Drivers

bsp/stm32/stm32l4r9-st-eval/README.md

@@ -2,7 +2,7 @@
 
 ## 简介
 
-STM32L4R9I-EVAL 开发板提供的 BSP (板级支持包) 说明。
+由 JHB 为 STM32L4R9I-EVAL 开发板提供的 BSP (板级支持包) 说明。
 
 主要内容如下：
 
@@ -34,12 +34,19 @@ STM32L4R9I-EVAL 开发板提供的 BSP (板级支持包) 说明。
 
 本 BSP 目前对外设的支持情况如下：
 
-| **板载外设**      | **支持情况** | **备注**                              |
-| :----------------- | :----------: | :------------------------------------- |
-| 板载 ST-LINK 转串口 |     支持     | PB10 PB11 USART3 |                                     |
-| **片上外设**      | **支持情况** | **备注**                              |
-| GPIO              |     支持     | PA0, PA1... PK15 ---> PIN: 0, 1...176 |
-| UART              |     支持     | USART3                             |
+| **板载外设**      		| **支持情况** 	| **备注**                              		|
+| :-----------------	| :----------: 	| :-----------------------------------------|
+| 板载 ST-LINK 转串口 	|     支持     	| PB10 PB11 USART3                      	|
+| LCD            		|     支持     	| DSI mode round lcd                        |
+| TOUCH            		|     支持     	| touch for round lcd                       |
+| SRAM              	|     支持     	|                              				|
+| **片上外设**     		| **支持情况** 	| **备注**                              		|
+| GPIO              	|     支持     	| 											|
+| UART              	|     支持     	| USART3                             		|
+
+
+
+
 
 ## 使用说明
 
@@ -99,12 +106,12 @@ msh >
 
 - 调试串口为串口3 映射到PB10 PB11
 
-- RAM 分为三部分
+- stm32L4R9 共有三块内部RAM区域 具体使用情况入如下
 
  ```
       RAM1 (rw) : ORIGIN = 0x20000000, LENGTH =  192k /* 192K sram 用于程序定义全局变量 静态变量存放*/
-      RAM2 (rw) : ORIGIN = 0x10000000, LENGTH =   64k /* 64K sram 用于程序定义全局变量 静态变量存放 */ 
-      RAM3 (rw) : ORIGIN = 0x20040000, LENGTH =  384k /* 384K sram 用于heap*/ 
+      RAM2 (rw) : ORIGIN = 0x10000000, LENGTH =   64k /* 64K sram  用于程序定义全局变量 静态变量存放 */ 
+      RAM3 (rw) : ORIGIN = 0x20040000, LENGTH =  384k /* 384K sram 用于heap空间*/ 
  ```
 
 

bsp/stm32/stm32l4r9-st-eval/board/CubeMX_Config/CubeMX_Config.ioc

@@ -1,22 +1,91 @@
 #MicroXplorer Configuration settings - do not modify
+DSIHOST_CKN.Mode=DSIHost_Standalone
+DSIHOST_CKN.Signal=DSIHOST_CKN
+DSIHOST_CKP.Mode=DSIHost_Standalone
+DSIHOST_CKP.Signal=DSIHOST_CKP
+DSIHOST_D0N.Mode=DSIHost_Standalone
+DSIHOST_D0N.Signal=DSIHOST_D0N
+DSIHOST_D0P.Mode=DSIHost_Standalone
+DSIHOST_D0P.Signal=DSIHOST_D0P
+DSIHOST_D1N.Mode=DSIHost_Standalone
+DSIHOST_D1N.Signal=DSIHOST_D1N
+DSIHOST_D1P.Mode=DSIHost_Standalone
+DSIHOST_D1P.Signal=DSIHOST_D1P
 File.Version=6
 KeepUserPlacement=false
 Mcu.Family=STM32L4
-Mcu.IP0=LTDC
-Mcu.IP1=NVIC
-Mcu.IP2=RCC
-Mcu.IP3=SYS
-Mcu.IP4=USART3
-Mcu.IPNb=5
+Mcu.IP0=DMA2D
+Mcu.IP1=DSIHOST
+Mcu.IP2=FMC
+Mcu.IP3=GFXMMU
+Mcu.IP4=LTDC
+Mcu.IP5=NVIC
+Mcu.IP6=RCC
+Mcu.IP7=SYS
+Mcu.IP8=USART3
+Mcu.IPNb=9
 Mcu.Name=STM32L4R9A(G-I)Ix
 Mcu.Package=UFBGA169
-Mcu.Pin0=PH0-OSC_IN (PH0)
-Mcu.Pin1=PB11
-Mcu.Pin2=PH1-OSC_OUT (PH1)
-Mcu.Pin3=PB10
-Mcu.Pin4=VP_LTDC_DSIMode
-Mcu.Pin5=VP_SYS_VS_Systick
-Mcu.PinsNb=6
+Mcu.Pin0=PE0
+Mcu.Pin1=PE1
+Mcu.Pin10=PF2
+Mcu.Pin11=PF1
+Mcu.Pin12=PF0
+Mcu.Pin13=PD7
+Mcu.Pin14=PC15-OSC32_OUT (PC15)
+Mcu.Pin15=PF3
+Mcu.Pin16=PF4
+Mcu.Pin17=PF5
+Mcu.Pin18=PG4
+Mcu.Pin19=PG3
+Mcu.Pin2=PD0
+Mcu.Pin20=PG5
+Mcu.Pin21=PH0-OSC_IN (PH0)
+Mcu.Pin22=PG1
+Mcu.Pin23=PE10
+Mcu.Pin24=PB11
+Mcu.Pin25=PD13
+Mcu.Pin26=PG2
+Mcu.Pin27=PD15
+Mcu.Pin28=PD14
+Mcu.Pin29=PH1-OSC_OUT (PH1)
+Mcu.Pin3=PD4
+Mcu.Pin30=PG0
+Mcu.Pin31=PE9
+Mcu.Pin32=PE15
+Mcu.Pin33=PD12
+Mcu.Pin34=PD11
+Mcu.Pin35=PD10
+Mcu.Pin36=DSIHOST_D1P
+Mcu.Pin37=DSIHOST_D1N
+Mcu.Pin38=PF15
+Mcu.Pin39=PE8
+Mcu.Pin4=PD1
+Mcu.Pin40=PE14
+Mcu.Pin41=PD9
+Mcu.Pin42=PD8
+Mcu.Pin43=DSIHOST_CKP
+Mcu.Pin44=DSIHOST_CKN
+Mcu.Pin45=PF14
+Mcu.Pin46=PE7
+Mcu.Pin47=PE13
+Mcu.Pin48=DSIHOST_D0P
+Mcu.Pin49=DSIHOST_D0N
+Mcu.Pin5=PE4
+Mcu.Pin50=PF13
+Mcu.Pin51=PE12
+Mcu.Pin52=PF12
+Mcu.Pin53=PE11
+Mcu.Pin54=PB10
+Mcu.Pin55=VP_DMA2D_VS_DMA2D
+Mcu.Pin56=VP_GFXMMU_VS_GFXMMU
+Mcu.Pin57=VP_LTDC_DSIMode
+Mcu.Pin58=VP_SYS_VS_Systick
+Mcu.Pin6=PE3
+Mcu.Pin7=PD5
+Mcu.Pin8=PE5
+Mcu.Pin9=PC14-OSC32_IN (PC14)
+Mcu.PinsNb=59
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32L4R9AIIx
@@ -38,6 +107,10 @@ PB10.Signal=USART3_TX
 PB11.Locked=true
 PB11.Mode=Asynchronous
 PB11.Signal=USART3_RX
+PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator
+PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN
+PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator
+PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT
 PCC.Checker=true
 PCC.Line=STM32L4R9/S9
 PCC.MCU=STM32L4R9A(G-I)Ix
@@ -46,6 +119,52 @@ PCC.Seq0=0
 PCC.Series=STM32L4
 PCC.Temperature=25
 PCC.Vdd=null
+PD0.Signal=FMC_D2_DA2
+PD1.Signal=FMC_D3_DA3
+PD10.Signal=FMC_D15_DA15
+PD11.Signal=FMC_A16_CLE
+PD12.Signal=FMC_A17_ALE
+PD13.Signal=FMC_A18
+PD14.Signal=FMC_D0_DA0
+PD15.Signal=FMC_D1_DA1
+PD4.Signal=FMC_NOE
+PD5.Signal=FMC_NWE
+PD7.Mode=NorPsramChipSelect1_1
+PD7.Signal=FMC_NE1
+PD8.Signal=FMC_D13_DA13
+PD9.Signal=FMC_D14_DA14
+PE0.Locked=true
+PE0.Signal=FMC_NBL0
+PE1.Locked=true
+PE1.Signal=FMC_NBL1
+PE10.Signal=FMC_D7_DA7
+PE11.Signal=FMC_D8_DA8
+PE12.Signal=FMC_D9_DA9
+PE13.Signal=FMC_D10_DA10
+PE14.Signal=FMC_D11_DA11
+PE15.Signal=FMC_D12_DA12
+PE3.Signal=FMC_A19
+PE4.Signal=FMC_A20
+PE5.Signal=FMC_A21
+PE7.Signal=FMC_D4_DA4
+PE8.Signal=FMC_D5_DA5
+PE9.Signal=FMC_D6_DA6
+PF0.Signal=FMC_A0
+PF1.Signal=FMC_A1
+PF12.Signal=FMC_A6
+PF13.Signal=FMC_A7
+PF14.Signal=FMC_A8
+PF15.Signal=FMC_A9
+PF2.Signal=FMC_A2
+PF3.Signal=FMC_A3
+PF4.Signal=FMC_A4
+PF5.Signal=FMC_A5
+PG0.Signal=FMC_A10
+PG1.Signal=FMC_A11
+PG2.Signal=FMC_A12
+PG3.Signal=FMC_A13
+PG4.Signal=FMC_A14
+PG5.Signal=FMC_A15
 PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
 PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
 PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator
@@ -78,7 +197,7 @@ ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=MDK-ARM V5
 ProjectManager.ToolChainLocation=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART3_UART_Init-USART3-false-HAL-true,4-MX_LTDC_Init-LTDC-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART3_UART_Init-USART3-false-HAL-true,4-MX_LTDC_Init-LTDC-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_DMA2D_Init-DMA2D-false-HAL-true,7-MX_DSIHOST_DSI_Init-DSIHOST-false-HAL-true,8-MX_GFXMMU_Init-GFXMMU-false-HAL-true
 RCC.ADCFreq_Value=64000000
 RCC.AHBFreq_Value=120000000
 RCC.APB1Freq_Value=120000000
@@ -88,9 +207,9 @@ RCC.APB2TimFreq_Value=120000000
 RCC.CRSFreq_Value=48000000
 RCC.CortexFreq_Value=120000000
 RCC.DFSDMFreq_Value=120000000
-RCC.DSIFreq_Value=40000000
-RCC.DSIRXEscFreq_Value=40000000
-RCC.DSITXEscFreq_Value=10000000
+RCC.DSIFreq_Value=20000000
+RCC.DSIRXEscFreq_Value=20000000
+RCC.DSITXEscFreq_Value=5000000
 RCC.FCLKCortexFreq_Value=120000000
 RCC.FamilyName=M
 RCC.HCLKFreq_Value=120000000
@@ -101,20 +220,21 @@ RCC.I2C1Freq_Value=120000000
 RCC.I2C2Freq_Value=120000000
 RCC.I2C3Freq_Value=120000000
 RCC.I2C4Freq_Value=120000000
-RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,DFSDMFreq_Value,DSIFreq_Value,DSIRXEscFreq_Value,DSITXEscFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,OCTOSPIMFreq_Value,PLLDSIFreq_Value,PLLDSIVCOFreq_Value,PLLM1,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2QoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
-RCC.LCDTFTFreq_Value=32000000
+RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,DFSDMFreq_Value,DSIFreq_Value,DSIRXEscFreq_Value,DSITXEscFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSI_VALUE,OCTOSPIMFreq_Value,PLLDSIFreq_Value,PLLDSIODF,PLLDSIVCOFreq_Value,PLLM1,PLLM3,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSAI2PoutputFreq_Value,PLLSAI2QoutputFreq_Value,PLLSAI2RoutputFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value,VCOSAI2OutputFreq_Value
+RCC.LCDTFTFreq_Value=16000000
 RCC.LPTIM1Freq_Value=120000000
 RCC.LPTIM2Freq_Value=120000000
 RCC.LPUART1Freq_Value=120000000
 RCC.LSCOPinFreq_Value=32000
-RCC.LSE_VALUE=32768
 RCC.LSI_VALUE=32000
 RCC.MCO1PinFreq_Value=120000000
 RCC.MSI_VALUE=4000000
 RCC.OCTOSPIMFreq_Value=120000000
-RCC.PLLDSIFreq_Value=320000000
+RCC.PLLDSIFreq_Value=160000000
+RCC.PLLDSIODF=DSI_PLL_OUT_DIV2
 RCC.PLLDSIVCOFreq_Value=640000000
 RCC.PLLM1=2
+RCC.PLLM3=2
 RCC.PLLN=30
 RCC.PLLPoutputFreq_Value=120000000
 RCC.PLLQoutputFreq_Value=120000000
@@ -122,9 +242,9 @@ RCC.PLLRCLKFreq_Value=120000000
 RCC.PLLSAI1PoutputFreq_Value=64000000
 RCC.PLLSAI1QoutputFreq_Value=64000000
 RCC.PLLSAI1RoutputFreq_Value=64000000
-RCC.PLLSAI2PoutputFreq_Value=64000000
-RCC.PLLSAI2QoutputFreq_Value=64000000
-RCC.PLLSAI2RoutputFreq_Value=64000000
+RCC.PLLSAI2PoutputFreq_Value=32000000
+RCC.PLLSAI2QoutputFreq_Value=32000000
+RCC.PLLSAI2RoutputFreq_Value=32000000
 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
 RCC.PWRFreq_Value=120000000
 RCC.RNGFreq_Value=64000000
@@ -140,13 +260,101 @@ RCC.USART2Freq_Value=120000000
 RCC.USART3Freq_Value=120000000
 RCC.USBFreq_Value=64000000
 RCC.VCOInput2Freq_Value=16000000
-RCC.VCOInput3Freq_Value=16000000
+RCC.VCOInput3Freq_Value=8000000
 RCC.VCOInputFreq_Value=8000000
 RCC.VCOOutputFreq_Value=240000000
 RCC.VCOSAI1OutputFreq_Value=128000000
-RCC.VCOSAI2OutputFreq_Value=128000000
+RCC.VCOSAI2OutputFreq_Value=64000000
+SH.FMC_A0.0=FMC_A0,22b-a1
+SH.FMC_A0.ConfNb=1
+SH.FMC_A1.0=FMC_A1,22b-a1
+SH.FMC_A1.ConfNb=1
+SH.FMC_A10.0=FMC_A10,22b-a1
+SH.FMC_A10.ConfNb=1
+SH.FMC_A11.0=FMC_A11,22b-a1
+SH.FMC_A11.ConfNb=1
+SH.FMC_A12.0=FMC_A12,22b-a1
+SH.FMC_A12.ConfNb=1
+SH.FMC_A13.0=FMC_A13,22b-a1
+SH.FMC_A13.ConfNb=1
+SH.FMC_A14.0=FMC_A14,22b-a1
+SH.FMC_A14.ConfNb=1
+SH.FMC_A15.0=FMC_A15,22b-a1
+SH.FMC_A15.ConfNb=1
+SH.FMC_A16_CLE.0=FMC_A16,22b-a1
+SH.FMC_A16_CLE.ConfNb=1
+SH.FMC_A17_ALE.0=FMC_A17,22b-a1
+SH.FMC_A17_ALE.ConfNb=1
+SH.FMC_A18.0=FMC_A18,22b-a1
+SH.FMC_A18.ConfNb=1
+SH.FMC_A19.0=FMC_A19,22b-a1
+SH.FMC_A19.ConfNb=1
+SH.FMC_A2.0=FMC_A2,22b-a1
+SH.FMC_A2.ConfNb=1
+SH.FMC_A20.0=FMC_A20,22b-a1
+SH.FMC_A20.ConfNb=1
+SH.FMC_A21.0=FMC_A21,22b-a1
+SH.FMC_A21.ConfNb=1
+SH.FMC_A3.0=FMC_A3,22b-a1
+SH.FMC_A3.ConfNb=1
+SH.FMC_A4.0=FMC_A4,22b-a1
+SH.FMC_A4.ConfNb=1
+SH.FMC_A5.0=FMC_A5,22b-a1
+SH.FMC_A5.ConfNb=1
+SH.FMC_A6.0=FMC_A6,22b-a1
+SH.FMC_A6.ConfNb=1
+SH.FMC_A7.0=FMC_A7,22b-a1
+SH.FMC_A7.ConfNb=1
+SH.FMC_A8.0=FMC_A8,22b-a1
+SH.FMC_A8.ConfNb=1
+SH.FMC_A9.0=FMC_A9,22b-a1
+SH.FMC_A9.ConfNb=1
+SH.FMC_D0_DA0.0=FMC_D0,16b-d1
+SH.FMC_D0_DA0.ConfNb=1
+SH.FMC_D10_DA10.0=FMC_D10,16b-d1
+SH.FMC_D10_DA10.ConfNb=1
+SH.FMC_D11_DA11.0=FMC_D11,16b-d1
+SH.FMC_D11_DA11.ConfNb=1
+SH.FMC_D12_DA12.0=FMC_D12,16b-d1
+SH.FMC_D12_DA12.ConfNb=1
+SH.FMC_D13_DA13.0=FMC_D13,16b-d1
+SH.FMC_D13_DA13.ConfNb=1
+SH.FMC_D14_DA14.0=FMC_D14,16b-d1
+SH.FMC_D14_DA14.ConfNb=1
+SH.FMC_D15_DA15.0=FMC_D15,16b-d1
+SH.FMC_D15_DA15.ConfNb=1
+SH.FMC_D1_DA1.0=FMC_D1,16b-d1
+SH.FMC_D1_DA1.ConfNb=1
+SH.FMC_D2_DA2.0=FMC_D2,16b-d1
+SH.FMC_D2_DA2.ConfNb=1
+SH.FMC_D3_DA3.0=FMC_D3,16b-d1
+SH.FMC_D3_DA3.ConfNb=1
+SH.FMC_D4_DA4.0=FMC_D4,16b-d1
+SH.FMC_D4_DA4.ConfNb=1
+SH.FMC_D5_DA5.0=FMC_D5,16b-d1
+SH.FMC_D5_DA5.ConfNb=1
+SH.FMC_D6_DA6.0=FMC_D6,16b-d1
+SH.FMC_D6_DA6.ConfNb=1
+SH.FMC_D7_DA7.0=FMC_D7,16b-d1
+SH.FMC_D7_DA7.ConfNb=1
+SH.FMC_D8_DA8.0=FMC_D8,16b-d1
+SH.FMC_D8_DA8.ConfNb=1
+SH.FMC_D9_DA9.0=FMC_D9,16b-d1
+SH.FMC_D9_DA9.ConfNb=1
+SH.FMC_NBL0.0=FMC_NBL0
+SH.FMC_NBL0.ConfNb=1
+SH.FMC_NBL1.0=FMC_NBL1
+SH.FMC_NBL1.ConfNb=1
+SH.FMC_NOE.0=FMC_NOE,Sram1
+SH.FMC_NOE.ConfNb=1
+SH.FMC_NWE.0=FMC_NWE,Sram1
+SH.FMC_NWE.ConfNb=1
 USART3.IPParameters=VirtualMode-Asynchronous
 USART3.VirtualMode-Asynchronous=VM_ASYNC
+VP_DMA2D_VS_DMA2D.Mode=DMA2D_Activate
+VP_DMA2D_VS_DMA2D.Signal=DMA2D_VS_DMA2D
+VP_GFXMMU_VS_GFXMMU.Mode=GFXMMU_Activate
+VP_GFXMMU_VS_GFXMMU.Signal=GFXMMU_VS_GFXMMU
 VP_LTDC_DSIMode.Mode=RGB888
 VP_LTDC_DSIMode.Signal=LTDC_DSIMode
 VP_SYS_VS_Systick.Mode=SysTick

bsp/stm32/stm32l4r9-st-eval/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h

@@ -57,17 +57,17 @@
 /*#define HAL_CRYP_MODULE_ENABLED   */
 /*#define HAL_DAC_MODULE_ENABLED   */
 /*#define HAL_DCMI_MODULE_ENABLED   */
-/*#define HAL_DMA2D_MODULE_ENABLED   */
+#define HAL_DMA2D_MODULE_ENABLED
 /*#define HAL_DFSDM_MODULE_ENABLED   */
-/*#define HAL_DSI_MODULE_ENABLED   */
+#define HAL_DSI_MODULE_ENABLED
 /*#define HAL_FIREWALL_MODULE_ENABLED   */
-/*#define HAL_GFXMMU_MODULE_ENABLED   */
+#define HAL_GFXMMU_MODULE_ENABLED
 /*#define HAL_HCD_MODULE_ENABLED   */
 /*#define HAL_HASH_MODULE_ENABLED   */
 /*#define HAL_I2S_MODULE_ENABLED   */
 /*#define HAL_IRDA_MODULE_ENABLED   */
 /*#define HAL_IWDG_MODULE_ENABLED   */
-/*#define HAL_LTDC_MODULE_ENABLED   */
+#define HAL_LTDC_MODULE_ENABLED
 /*#define HAL_LCD_MODULE_ENABLED   */
 /*#define HAL_LPTIM_MODULE_ENABLED   */
 /*#define HAL_NAND_MODULE_ENABLED   */
@@ -85,7 +85,7 @@
 /*#define HAL_SMBUS_MODULE_ENABLED   */
 /*#define HAL_SMARTCARD_MODULE_ENABLED   */
 /*#define HAL_SPI_MODULE_ENABLED   */
-/*#define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_SRAM_MODULE_ENABLED
 /*#define HAL_SWPMI_MODULE_ENABLED   */
 /*#define HAL_TIM_MODULE_ENABLED   */
 /*#define HAL_TSC_MODULE_ENABLED   */

bsp/stm32/stm32l4r9-st-eval/board/CubeMX_Config/Src/main.c

@@ -6,7 +6,7 @@
   ******************************************************************************
   ** This notice applies to any and all portions of this file
   * that are not between comment pairs USER CODE BEGIN and
-  * USER CODE END. Other portions of this file, whether 
+  * USER CODE END. Other portions of this file, whether
   * inserted by the user or by software development tools
   * are owned by their respective copyright owners.
   *
@@ -40,6 +40,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "main.h"
+#include "gfxmmu_lut.h"
 
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
@@ -62,8 +63,18 @@
 /* USER CODE END PM */
 
 /* Private variables ---------------------------------------------------------*/
+DMA2D_HandleTypeDef hdma2d;
+
+DSI_HandleTypeDef hdsi;
+
+GFXMMU_HandleTypeDef hgfxmmu;
+
+LTDC_HandleTypeDef hltdc;
+
 UART_HandleTypeDef huart3;
 
+SRAM_HandleTypeDef hsram1;
+
 /* USER CODE BEGIN PV */
 
 /* USER CODE END PV */
@@ -72,6 +83,11 @@ UART_HandleTypeDef huart3;
 void SystemClock_Config(void);
 static void MX_GPIO_Init(void);
 static void MX_USART3_UART_Init(void);
+static void MX_LTDC_Init(void);
+static void MX_FMC_Init(void);
+static void MX_DMA2D_Init(void);
+static void MX_DSIHOST_DSI_Init(void);
+static void MX_GFXMMU_Init(void);
 /* USER CODE BEGIN PFP */
 
 /* USER CODE END PFP */
@@ -87,42 +103,47 @@ static void MX_USART3_UART_Init(void);
   */
 int main(void)
 {
-  /* USER CODE BEGIN 1 */
+    /* USER CODE BEGIN 1 */
 
-  /* USER CODE END 1 */
+    /* USER CODE END 1 */
 
-  /* MCU Configuration--------------------------------------------------------*/
+    /* MCU Configuration--------------------------------------------------------*/
 
-  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
-  HAL_Init();
+    /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+    HAL_Init();
 
-  /* USER CODE BEGIN Init */
+    /* USER CODE BEGIN Init */
 
-  /* USER CODE END Init */
+    /* USER CODE END Init */
 
-  /* Configure the system clock */
-  SystemClock_Config();
+    /* Configure the system clock */
+    SystemClock_Config();
 
-  /* USER CODE BEGIN SysInit */
+    /* USER CODE BEGIN SysInit */
 
-  /* USER CODE END SysInit */
+    /* USER CODE END SysInit */
 
-  /* Initialize all configured peripherals */
-  MX_GPIO_Init();
-  MX_USART3_UART_Init();
-  /* USER CODE BEGIN 2 */
+    /* Initialize all configured peripherals */
+    MX_GPIO_Init();
+    MX_USART3_UART_Init();
+    MX_LTDC_Init();
+    MX_FMC_Init();
+    MX_DMA2D_Init();
+    MX_DSIHOST_DSI_Init();
+    MX_GFXMMU_Init();
+    /* USER CODE BEGIN 2 */
 
-  /* USER CODE END 2 */
+    /* USER CODE END 2 */
 
-  /* Infinite loop */
-  /* USER CODE BEGIN WHILE */
-  while (1)
-  {
-    /* USER CODE END WHILE */
+    /* Infinite loop */
+    /* USER CODE BEGIN WHILE */
+    while (1)
+    {
+        /* USER CODE END WHILE */
 
-    /* USER CODE BEGIN 3 */
-  }
-  /* USER CODE END 3 */
+        /* USER CODE BEGIN 3 */
+    }
+    /* USER CODE END 3 */
 }
 
 /**
@@ -131,50 +152,318 @@ int main(void)
   */
 void SystemClock_Config(void)
 {
-  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+    /**Configure the main internal regulator output voltage
+    */
+    if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /**Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLM = 2;
+    RCC_OscInitStruct.PLL.PLLN = 30;
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+    RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+    RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /**Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                                  |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_DSI
+                                         |RCC_PERIPHCLK_LTDC;
+    PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
+    PeriphClkInit.DsiClockSelection = RCC_DSICLKSOURCE_DSIPHY;
+    PeriphClkInit.LtdcClockSelection = RCC_LTDCCLKSOURCE_PLLSAI2_DIV2;
+    PeriphClkInit.PLLSAI2.PLLSAI2Source = RCC_PLLSOURCE_HSE;
+    PeriphClkInit.PLLSAI2.PLLSAI2M = 2;
+    PeriphClkInit.PLLSAI2.PLLSAI2N = 8;
+    PeriphClkInit.PLLSAI2.PLLSAI2P = RCC_PLLP_DIV2;
+    PeriphClkInit.PLLSAI2.PLLSAI2R = RCC_PLLR_DIV2;
+    PeriphClkInit.PLLSAI2.PLLSAI2Q = RCC_PLLQ_DIV2;
+    PeriphClkInit.PLLSAI2.PLLSAI2ClockOut = RCC_PLLSAI2_LTDCCLK;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
 
-  /**Configure the main internal regulator output voltage 
+/**
+  * @brief DMA2D Initialization Function
+  * @param None
+  * @retval None
   */
-  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Initializes the CPU, AHB and APB busses clocks 
+static void MX_DMA2D_Init(void)
+{
+
+    /* USER CODE BEGIN DMA2D_Init 0 */
+
+    /* USER CODE END DMA2D_Init 0 */
+
+    /* USER CODE BEGIN DMA2D_Init 1 */
+
+    /* USER CODE END DMA2D_Init 1 */
+    hdma2d.Instance = DMA2D;
+    hdma2d.Init.Mode = DMA2D_M2M;
+    hdma2d.Init.ColorMode = DMA2D_OUTPUT_ARGB8888;
+    hdma2d.Init.OutputOffset = 0;
+    hdma2d.Init.BytesSwap = DMA2D_BYTES_REGULAR;
+    hdma2d.Init.LineOffsetMode = DMA2D_LOM_PIXELS;
+    hdma2d.LayerCfg[1].InputOffset = 0;
+    hdma2d.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+    hdma2d.LayerCfg[1].AlphaMode = DMA2D_NO_MODIF_ALPHA;
+    hdma2d.LayerCfg[1].InputAlpha = 0;
+    hdma2d.LayerCfg[1].AlphaInverted = DMA2D_REGULAR_ALPHA;
+    hdma2d.LayerCfg[1].RedBlueSwap = DMA2D_RB_REGULAR;
+    if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_DMA2D_ConfigLayer(&hdma2d, 1) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /* USER CODE BEGIN DMA2D_Init 2 */
+
+    /* USER CODE END DMA2D_Init 2 */
+
+}
+
+/**
+  * @brief DSIHOST Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DSIHOST_DSI_Init(void)
+{
+
+    /* USER CODE BEGIN DSIHOST_Init 0 */
+
+    /* USER CODE END DSIHOST_Init 0 */
+
+    DSI_PLLInitTypeDef PLLInit = {0};
+    DSI_HOST_TimeoutTypeDef HostTimeouts = {0};
+    DSI_PHY_TimerTypeDef PhyTimings = {0};
+    DSI_LPCmdTypeDef LPCmd = {0};
+
+    /* USER CODE BEGIN DSIHOST_Init 1 */
+
+    /* USER CODE END DSIHOST_Init 1 */
+    hdsi.Instance = DSI;
+    hdsi.Init.AutomaticClockLaneControl = DSI_AUTO_CLK_LANE_CTRL_DISABLE;
+    hdsi.Init.TXEscapeCkdiv = 4;
+    hdsi.Init.NumberOfLanes = DSI_ONE_DATA_LANE;
+    PLLInit.PLLNDIV = 20;
+    PLLInit.PLLIDF = DSI_PLL_IN_DIV1;
+    PLLInit.PLLODF = DSI_PLL_OUT_DIV2;
+    if (HAL_DSI_Init(&hdsi, &PLLInit) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    HostTimeouts.TimeoutCkdiv = 1;
+    HostTimeouts.HighSpeedTransmissionTimeout = 0;
+    HostTimeouts.LowPowerReceptionTimeout = 0;
+    HostTimeouts.HighSpeedReadTimeout = 0;
+    HostTimeouts.LowPowerReadTimeout = 0;
+    HostTimeouts.HighSpeedWriteTimeout = 0;
+    HostTimeouts.HighSpeedWritePrespMode = DSI_HS_PM_DISABLE;
+    HostTimeouts.LowPowerWriteTimeout = 0;
+    HostTimeouts.BTATimeout = 0;
+    if (HAL_DSI_ConfigHostTimeouts(&hdsi, &HostTimeouts) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    PhyTimings.ClockLaneHS2LPTime = 17;
+    PhyTimings.ClockLaneLP2HSTime = 12;
+    PhyTimings.DataLaneHS2LPTime = 8;
+    PhyTimings.DataLaneLP2HSTime = 8;
+    PhyTimings.DataLaneMaxReadTime = 0;
+    PhyTimings.StopWaitTime = 0;
+
+    if (HAL_DSI_ConfigPhyTimer(&hdsi, &PhyTimings) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_DSI_ConfigFlowControl(&hdsi, DSI_FLOW_CONTROL_BTA) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_DSI_SetLowPowerRXFilter(&hdsi, 10000) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_DSI_ConfigErrorMonitor(&hdsi, HAL_DSI_ERROR_NONE) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    LPCmd.LPGenShortWriteNoP = DSI_LP_GSW0P_DISABLE;
+    LPCmd.LPGenShortWriteOneP = DSI_LP_GSW1P_DISABLE;
+    LPCmd.LPGenShortWriteTwoP = DSI_LP_GSW2P_DISABLE;
+    LPCmd.LPGenShortReadNoP = DSI_LP_GSR0P_DISABLE;
+    LPCmd.LPGenShortReadOneP = DSI_LP_GSR1P_DISABLE;
+    LPCmd.LPGenShortReadTwoP = DSI_LP_GSR2P_DISABLE;
+    LPCmd.LPGenLongWrite = DSI_LP_GLW_DISABLE;
+    LPCmd.LPDcsShortWriteNoP = DSI_LP_DSW0P_DISABLE;
+    LPCmd.LPDcsShortWriteOneP = DSI_LP_DSW1P_DISABLE;
+    LPCmd.LPDcsShortReadNoP = DSI_LP_DSR0P_DISABLE;
+    LPCmd.LPDcsLongWrite = DSI_LP_DLW_DISABLE;
+    LPCmd.LPMaxReadPacket = DSI_LP_MRDP_DISABLE;
+    LPCmd.AcknowledgeRequest = DSI_ACKNOWLEDGE_DISABLE;
+    if (HAL_DSI_ConfigCommand(&hdsi, &LPCmd) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /* USER CODE BEGIN DSIHOST_Init 2 */
+
+    /* USER CODE END DSIHOST_Init 2 */
+
+}
+
+/**
+  * @brief GFXMMU Initialization Function
+  * @param None
+  * @retval None
   */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = 2;
-  RCC_OscInitStruct.PLL.PLLN = 30;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
-  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Initializes the CPU, AHB and APB busses clocks 
+static void MX_GFXMMU_Init(void)
+{
+
+    /* USER CODE BEGIN GFXMMU_Init 0 */
+
+    /* USER CODE END GFXMMU_Init 0 */
+
+    /* USER CODE BEGIN GFXMMU_Init 1 */
+
+    /* USER CODE END GFXMMU_Init 1 */
+    hgfxmmu.Instance = GFXMMU;
+    hgfxmmu.Init.BlocksPerLine = GFXMMU_192BLOCKS;
+    hgfxmmu.Init.DefaultValue = 0;
+    hgfxmmu.Init.Buffers.Buf0Address = 0;
+    hgfxmmu.Init.Buffers.Buf1Address = 0;
+    hgfxmmu.Init.Buffers.Buf2Address = 0;
+    hgfxmmu.Init.Buffers.Buf3Address = 0;
+    hgfxmmu.Init.Interrupts.Activation = ENABLE;
+    if (HAL_GFXMMU_Init(&hgfxmmu) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_GFXMMU_ConfigLut(&hgfxmmu, GFXMMU_LUT_FIRST, GFXMMU_LUT_SIZE, (uint32_t)gfxmmu_lut_config) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /* USER CODE BEGIN GFXMMU_Init 2 */
+
+    /* USER CODE END GFXMMU_Init 2 */
+
+}
+
+/**
+  * @brief LTDC Initialization Function
+  * @param None
+  * @retval None
   */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3;
-  PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-  {
-    Error_Handler();
-  }
+static void MX_LTDC_Init(void)
+{
+
+    /* USER CODE BEGIN LTDC_Init 0 */
+
+    /* USER CODE END LTDC_Init 0 */
+
+    LTDC_LayerCfgTypeDef pLayerCfg = {0};
+    LTDC_LayerCfgTypeDef pLayerCfg1 = {0};
+
+    /* USER CODE BEGIN LTDC_Init 1 */
+
+    /* USER CODE END LTDC_Init 1 */
+    hltdc.Instance = LTDC;
+    hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+    hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+    hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+    hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+    hltdc.Init.HorizontalSync = 7;
+    hltdc.Init.VerticalSync = 3;
+    hltdc.Init.AccumulatedHBP = 14;
+    hltdc.Init.AccumulatedVBP = 5;
+    hltdc.Init.AccumulatedActiveW = 654;
+    hltdc.Init.AccumulatedActiveH = 485;
+    hltdc.Init.TotalWidth = 660;
+    hltdc.Init.TotalHeigh = 487;
+    hltdc.Init.Backcolor.Blue = 0;
+    hltdc.Init.Backcolor.Green = 0;
+    hltdc.Init.Backcolor.Red = 0;
+    if (HAL_LTDC_Init(&hltdc) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    pLayerCfg.WindowX0 = 0;
+    pLayerCfg.WindowX1 = 0;
+    pLayerCfg.WindowY0 = 0;
+    pLayerCfg.WindowY1 = 0;
+    pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
+    pLayerCfg.Alpha = 0;
+    pLayerCfg.Alpha0 = 0;
+    pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
+    pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
+    pLayerCfg.FBStartAdress = GFXMMU_VIRTUAL_BUFFER0_BASE;
+    pLayerCfg.ImageWidth = 0;
+    pLayerCfg.ImageHeight = 0;
+    pLayerCfg.Backcolor.Blue = 0;
+    pLayerCfg.Backcolor.Green = 0;
+    pLayerCfg.Backcolor.Red = 0;
+    if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    pLayerCfg1.WindowX0 = 0;
+    pLayerCfg1.WindowX1 = 0;
+    pLayerCfg1.WindowY0 = 0;
+    pLayerCfg1.WindowY1 = 0;
+    pLayerCfg1.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
+    pLayerCfg1.Alpha = 0;
+    pLayerCfg1.Alpha0 = 0;
+    pLayerCfg1.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
+    pLayerCfg1.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
+    pLayerCfg1.FBStartAdress = GFXMMU_VIRTUAL_BUFFER0_BASE;
+    pLayerCfg1.ImageWidth = 0;
+    pLayerCfg1.ImageHeight = 0;
+    pLayerCfg1.Backcolor.Blue = 0;
+    pLayerCfg1.Backcolor.Green = 0;
+    pLayerCfg1.Backcolor.Red = 0;
+    if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg1, 1) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_LTDC_SetPitch(&hltdc, 768, 0) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_LTDC_SetPitch(&hltdc, 768, 1) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /* USER CODE BEGIN LTDC_Init 2 */
+
+    /* USER CODE END LTDC_Init 2 */
+
 }
 
 /**
@@ -185,43 +474,87 @@ void SystemClock_Config(void)
 static void MX_USART3_UART_Init(void)
 {
 
-  /* USER CODE BEGIN USART3_Init 0 */
-
-  /* USER CODE END USART3_Init 0 */
-
-  /* USER CODE BEGIN USART3_Init 1 */
-
-  /* USER CODE END USART3_Init 1 */
-  huart3.Instance = USART3;
-  huart3.Init.BaudRate = 115200;
-  huart3.Init.WordLength = UART_WORDLENGTH_8B;
-  huart3.Init.StopBits = UART_STOPBITS_1;
-  huart3.Init.Parity = UART_PARITY_NONE;
-  huart3.Init.Mode = UART_MODE_TX_RX;
-  huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
-  huart3.Init.OverSampling = UART_OVERSAMPLING_16;
-  huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
-  huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
-  huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
-  if (HAL_UART_Init(&huart3) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /* USER CODE BEGIN USART3_Init 2 */
-
-  /* USER CODE END USART3_Init 2 */
+    /* USER CODE BEGIN USART3_Init 0 */
+
+    /* USER CODE END USART3_Init 0 */
+
+    /* USER CODE BEGIN USART3_Init 1 */
+
+    /* USER CODE END USART3_Init 1 */
+    huart3.Instance = USART3;
+    huart3.Init.BaudRate = 115200;
+    huart3.Init.WordLength = UART_WORDLENGTH_8B;
+    huart3.Init.StopBits = UART_STOPBITS_1;
+    huart3.Init.Parity = UART_PARITY_NONE;
+    huart3.Init.Mode = UART_MODE_TX_RX;
+    huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+    huart3.Init.OverSampling = UART_OVERSAMPLING_16;
+    huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+    huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
+    huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+    if (HAL_UART_Init(&huart3) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /* USER CODE BEGIN USART3_Init 2 */
+
+    /* USER CODE END USART3_Init 2 */
+
+}
+
+/* FMC initialization function */
+static void MX_FMC_Init(void)
+{
+    FMC_NORSRAM_TimingTypeDef Timing;
+
+    /** Perform the SRAM1 memory initialization sequence
+    */
+    hsram1.Instance = FMC_NORSRAM_DEVICE;
+    hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
+    /* hsram1.Init */
+    hsram1.Init.NSBank = FMC_NORSRAM_BANK1;
+    hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
+    hsram1.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
+    hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
+    hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
+    hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
+    hsram1.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
+    hsram1.Init.WriteOperation = FMC_WRITE_OPERATION_DISABLE;
+    hsram1.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
+    hsram1.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
+    hsram1.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
+    hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
+    hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
+    hsram1.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE;
+    hsram1.Init.NBLSetupTime = 0;
+    hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE;
+    /* Timing */
+    Timing.AddressSetupTime = 15;
+    Timing.AddressHoldTime = 15;
+    Timing.DataSetupTime = 255;
+    Timing.DataHoldTime = 0;
+    Timing.BusTurnAroundDuration = 15;
+    Timing.CLKDivision = 16;
+    Timing.DataLatency = 17;
+    Timing.AccessMode = FMC_ACCESS_MODE_A;
+    /* ExtTiming */
+
+    if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
+    {
+        Error_Handler( );
+    }
 
 }
 
@@ -233,9 +566,15 @@ static void MX_USART3_UART_Init(void)
 static void MX_GPIO_Init(void)
 {
 
-  /* GPIO Ports Clock Enable */
-  __HAL_RCC_GPIOH_CLK_ENABLE();
-  __HAL_RCC_GPIOB_CLK_ENABLE();
+    /* GPIO Ports Clock Enable */
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    HAL_PWREx_EnableVddIO2();
+    __HAL_RCC_GPIOH_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
 
 }
 
@@ -249,10 +588,10 @@ static void MX_GPIO_Init(void)
   */
 void Error_Handler(void)
 {
-  /* USER CODE BEGIN Error_Handler_Debug */
-  /* User can add his own implementation to report the HAL error return state */
+    /* USER CODE BEGIN Error_Handler_Debug */
+    /* User can add his own implementation to report the HAL error return state */
 
-  /* USER CODE END Error_Handler_Debug */
+    /* USER CODE END Error_Handler_Debug */
 }
 
 #ifdef  USE_FULL_ASSERT
@@ -264,11 +603,11 @@ void Error_Handler(void)
   * @retval None
   */
 void assert_failed(char *file, uint32_t line)
-{ 
-  /* USER CODE BEGIN 6 */
-  /* User can add his own implementation to report the file name and line number,
-     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
-  /* USER CODE END 6 */
+{
+    /* USER CODE BEGIN 6 */
+    /* User can add his own implementation to report the file name and line number,
+       tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+    /* USER CODE END 6 */
 }
 #endif /* USE_FULL_ASSERT */
 

bsp/stm32/stm32l4r9-st-eval/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c

@@ -11,7 +11,7 @@
   * inserted by the user or by software development tools
   * are owned by their respective copyright owners.
   *
-  * COPYRIGHT(c) 2019 STMicroelectronics
+  * COPYRIGHT(c) 2018 STMicroelectronics
   *
   * Redistribution and use in source and binary forms, with or without modification,
   * are permitted provided that the following conditions are met:
@@ -97,6 +97,194 @@ void HAL_MspInit(void)
   /* USER CODE END MspInit 1 */
 }
 
+/**
+* @brief DMA2D MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdma2d: DMA2D handle pointer
+* @retval None
+*/
+void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
+{
+
+  if(hdma2d->Instance==DMA2D)
+  {
+  /* USER CODE BEGIN DMA2D_MspInit 0 */
+
+  /* USER CODE END DMA2D_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DMA2D_CLK_ENABLE();
+  /* USER CODE BEGIN DMA2D_MspInit 1 */
+
+  /* USER CODE END DMA2D_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief DMA2D MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdma2d: DMA2D handle pointer
+* @retval None
+*/
+
+void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
+{
+
+  if(hdma2d->Instance==DMA2D)
+  {
+  /* USER CODE BEGIN DMA2D_MspDeInit 0 */
+
+  /* USER CODE END DMA2D_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DMA2D_CLK_DISABLE();
+  /* USER CODE BEGIN DMA2D_MspDeInit 1 */
+
+  /* USER CODE END DMA2D_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief DSI MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdsi: DSI handle pointer
+* @retval None
+*/
+void HAL_DSI_MspInit(DSI_HandleTypeDef* hdsi)
+{
+
+  if(hdsi->Instance==DSI)
+  {
+  /* USER CODE BEGIN DSI_MspInit 0 */
+
+  /* USER CODE END DSI_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DSI_CLK_ENABLE();
+  /* USER CODE BEGIN DSI_MspInit 1 */
+
+  /* USER CODE END DSI_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief DSI MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdsi: DSI handle pointer
+* @retval None
+*/
+
+void HAL_DSI_MspDeInit(DSI_HandleTypeDef* hdsi)
+{
+
+  if(hdsi->Instance==DSI)
+  {
+  /* USER CODE BEGIN DSI_MspDeInit 0 */
+
+  /* USER CODE END DSI_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DSI_CLK_DISABLE();
+  /* USER CODE BEGIN DSI_MspDeInit 1 */
+
+  /* USER CODE END DSI_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief GFXMMU MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hgfxmmu: GFXMMU handle pointer
+* @retval None
+*/
+void HAL_GFXMMU_MspInit(GFXMMU_HandleTypeDef* hgfxmmu)
+{
+
+  if(hgfxmmu->Instance==GFXMMU)
+  {
+  /* USER CODE BEGIN GFXMMU_MspInit 0 */
+
+  /* USER CODE END GFXMMU_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_GFXMMU_CLK_ENABLE();
+  /* USER CODE BEGIN GFXMMU_MspInit 1 */
+
+  /* USER CODE END GFXMMU_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief GFXMMU MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hgfxmmu: GFXMMU handle pointer
+* @retval None
+*/
+
+void HAL_GFXMMU_MspDeInit(GFXMMU_HandleTypeDef* hgfxmmu)
+{
+
+  if(hgfxmmu->Instance==GFXMMU)
+  {
+  /* USER CODE BEGIN GFXMMU_MspDeInit 0 */
+
+  /* USER CODE END GFXMMU_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_GFXMMU_CLK_DISABLE();
+  /* USER CODE BEGIN GFXMMU_MspDeInit 1 */
+
+  /* USER CODE END GFXMMU_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief LTDC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hltdc: LTDC handle pointer
+* @retval None
+*/
+void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
+{
+
+  if(hltdc->Instance==LTDC)
+  {
+  /* USER CODE BEGIN LTDC_MspInit 0 */
+
+  /* USER CODE END LTDC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_LTDC_CLK_ENABLE();
+  /* USER CODE BEGIN LTDC_MspInit 1 */
+
+  /* USER CODE END LTDC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief LTDC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hltdc: LTDC handle pointer
+* @retval None
+*/
+
+void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
+{
+
+  if(hltdc->Instance==LTDC)
+  {
+  /* USER CODE BEGIN LTDC_MspDeInit 0 */
+
+  /* USER CODE END LTDC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_LTDC_CLK_DISABLE();
+  /* USER CODE BEGIN LTDC_MspDeInit 1 */
+
+  /* USER CODE END LTDC_MspDeInit 1 */
+  }
+
+}
+
 /**
 * @brief UART MSP Initialization
 * This function configures the hardware resources used in this example
@@ -165,6 +353,207 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
 
 }
 
+static uint32_t FMC_Initialized = 0;
+
+static void HAL_FMC_MspInit(void){
+  /* USER CODE BEGIN FMC_MspInit 0 */
+
+  /* USER CODE END FMC_MspInit 0 */
+  GPIO_InitTypeDef GPIO_InitStruct;
+  if (FMC_Initialized) {
+    return;
+  }
+  FMC_Initialized = 1;
+  /* Peripheral clock enable */
+  __HAL_RCC_FMC_CLK_ENABLE();
+  
+  /** FMC GPIO Configuration  
+  PE0   ------> FMC_NBL0
+  PE1   ------> FMC_NBL1
+  PD0   ------> FMC_D2
+  PD4   ------> FMC_NOE
+  PD1   ------> FMC_D3
+  PE4   ------> FMC_A20
+  PE3   ------> FMC_A19
+  PD5   ------> FMC_NWE
+  PE5   ------> FMC_A21
+  PF2   ------> FMC_A2
+  PF1   ------> FMC_A1
+  PF0   ------> FMC_A0
+  PD7   ------> FMC_NE1
+  PF3   ------> FMC_A3
+  PF4   ------> FMC_A4
+  PF5   ------> FMC_A5
+  PG4   ------> FMC_A14
+  PG3   ------> FMC_A13
+  PG5   ------> FMC_A15
+  PG1   ------> FMC_A11
+  PE10   ------> FMC_D7
+  PD13   ------> FMC_A18
+  PG2   ------> FMC_A12
+  PD15   ------> FMC_D1
+  PD14   ------> FMC_D0
+  PG0   ------> FMC_A10
+  PE9   ------> FMC_D6
+  PE15   ------> FMC_D12
+  PD12   ------> FMC_A17
+  PD11   ------> FMC_A16
+  PD10   ------> FMC_D15
+  PF15   ------> FMC_A9
+  PE8   ------> FMC_D5
+  PE14   ------> FMC_D11
+  PD9   ------> FMC_D14
+  PD8   ------> FMC_D13
+  PF14   ------> FMC_A8
+  PE7   ------> FMC_D4
+  PE13   ------> FMC_D10
+  PF13   ------> FMC_A7
+  PE12   ------> FMC_D9
+  PF12   ------> FMC_A6
+  PE11   ------> FMC_D8
+  */
+  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_3 
+                          |GPIO_PIN_5|GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_15 
+                          |GPIO_PIN_8|GPIO_PIN_14|GPIO_PIN_7|GPIO_PIN_13 
+                          |GPIO_PIN_12|GPIO_PIN_11;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_4|GPIO_PIN_1|GPIO_PIN_5 
+                          |GPIO_PIN_7|GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_14 
+                          |GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_10|GPIO_PIN_9 
+                          |GPIO_PIN_8;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_1|GPIO_PIN_0|GPIO_PIN_3 
+                          |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_15|GPIO_PIN_14 
+                          |GPIO_PIN_13|GPIO_PIN_12;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_3|GPIO_PIN_5|GPIO_PIN_1 
+                          |GPIO_PIN_2|GPIO_PIN_0;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN FMC_MspInit 1 */
+
+  /* USER CODE END FMC_MspInit 1 */
+}
+
+void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){
+  /* USER CODE BEGIN SRAM_MspInit 0 */
+
+  /* USER CODE END SRAM_MspInit 0 */
+  HAL_FMC_MspInit();
+  /* USER CODE BEGIN SRAM_MspInit 1 */
+
+  /* USER CODE END SRAM_MspInit 1 */
+}
+
+static uint32_t FMC_DeInitialized = 0;
+
+static void HAL_FMC_MspDeInit(void){
+  /* USER CODE BEGIN FMC_MspDeInit 0 */
+
+  /* USER CODE END FMC_MspDeInit 0 */
+  if (FMC_DeInitialized) {
+    return;
+  }
+  FMC_DeInitialized = 1;
+  /* Peripheral clock enable */
+  __HAL_RCC_FMC_CLK_DISABLE();
+  
+  /** FMC GPIO Configuration  
+  PE0   ------> FMC_NBL0
+  PE1   ------> FMC_NBL1
+  PD0   ------> FMC_D2
+  PD4   ------> FMC_NOE
+  PD1   ------> FMC_D3
+  PE4   ------> FMC_A20
+  PE3   ------> FMC_A19
+  PD5   ------> FMC_NWE
+  PE5   ------> FMC_A21
+  PF2   ------> FMC_A2
+  PF1   ------> FMC_A1
+  PF0   ------> FMC_A0
+  PD7   ------> FMC_NE1
+  PF3   ------> FMC_A3
+  PF4   ------> FMC_A4
+  PF5   ------> FMC_A5
+  PG4   ------> FMC_A14
+  PG3   ------> FMC_A13
+  PG5   ------> FMC_A15
+  PG1   ------> FMC_A11
+  PE10   ------> FMC_D7
+  PD13   ------> FMC_A18
+  PG2   ------> FMC_A12
+  PD15   ------> FMC_D1
+  PD14   ------> FMC_D0
+  PG0   ------> FMC_A10
+  PE9   ------> FMC_D6
+  PE15   ------> FMC_D12
+  PD12   ------> FMC_A17
+  PD11   ------> FMC_A16
+  PD10   ------> FMC_D15
+  PF15   ------> FMC_A9
+  PE8   ------> FMC_D5
+  PE14   ------> FMC_D11
+  PD9   ------> FMC_D14
+  PD8   ------> FMC_D13
+  PF14   ------> FMC_A8
+  PE7   ------> FMC_D4
+  PE13   ------> FMC_D10
+  PF13   ------> FMC_A7
+  PE12   ------> FMC_D9
+  PF12   ------> FMC_A6
+  PE11   ------> FMC_D8
+  */
+  HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_3 
+                          |GPIO_PIN_5|GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_15 
+                          |GPIO_PIN_8|GPIO_PIN_14|GPIO_PIN_7|GPIO_PIN_13 
+                          |GPIO_PIN_12|GPIO_PIN_11);
+
+  HAL_GPIO_DeInit(GPIOD, GPIO_PIN_0|GPIO_PIN_4|GPIO_PIN_1|GPIO_PIN_5 
+                          |GPIO_PIN_7|GPIO_PIN_13|GPIO_PIN_15|GPIO_PIN_14 
+                          |GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_10|GPIO_PIN_9 
+                          |GPIO_PIN_8);
+
+  HAL_GPIO_DeInit(GPIOF, GPIO_PIN_2|GPIO_PIN_1|GPIO_PIN_0|GPIO_PIN_3 
+                          |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_15|GPIO_PIN_14 
+                          |GPIO_PIN_13|GPIO_PIN_12);
+
+  HAL_GPIO_DeInit(GPIOG, GPIO_PIN_4|GPIO_PIN_3|GPIO_PIN_5|GPIO_PIN_1 
+                          |GPIO_PIN_2|GPIO_PIN_0);
+
+  /* USER CODE BEGIN FMC_MspDeInit 1 */
+
+  /* USER CODE END FMC_MspDeInit 1 */
+}
+
+void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram){
+  /* USER CODE BEGIN SRAM_MspDeInit 0 */
+
+  /* USER CODE END SRAM_MspDeInit 0 */
+  HAL_FMC_MspDeInit();
+  /* USER CODE BEGIN SRAM_MspDeInit 1 */
+
+  /* USER CODE END SRAM_MspDeInit 1 */
+}
+
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */

bsp/stm32/stm32l4r9-st-eval/board/Kconfig

@@ -7,6 +7,39 @@ config SOC_STM32L4R9AI
 
 menu "Onboard Peripheral Drivers"
 
+    config BSP_USING_STLINK_TO_USART
+        bool "Enable STLINK TO USART (uart3)"
+        select BSP_USING_UART
+        select BSP_USING_UART3
+        default y
+
+    config BSP_USING_DSI
+        bool "Enable LCD"
+        select BSP_USING_SRAM
+        select BSP_USING_GFXMMU
+        default n
+		
+    menu "Enable Touch"
+        
+        config BSP_USING_TOUCH
+            bool "Enable Touch drivers"
+            select BSP_USING_I2C1
+            default n          
+            if BSP_USING_TOUCH       
+                config BSP_TOUCH_INT_PIN
+                    int "Touch interrupt pin"
+                    default 34
+                    config BSP_I2C1_NAME
+                    string "I2C1 Name for Touch"
+                    default i2c1			
+            endif
+
+        config TOUCH_IC_FT3X67
+        bool "FT3X67"
+        depends on BSP_USING_TOUCH
+        default n
+		
+    endmenu		
 endmenu
 
 menu "On-chip Peripheral Drivers"
@@ -21,10 +54,40 @@ menu "On-chip Peripheral Drivers"
         default y
         select RT_USING_SERIAL
         if BSP_USING_UART
-                config BSP_USING_UART3
-                bool "Enable UART3"
-                default y
+            config BSP_USING_UART3
+            bool "Enable UART3"
+            default y
         endif
+    
+    config BSP_USING_SRAM
+        bool "Enable SRAM"
+        select BSP_USING_FMC
+        default n
+		
+    menuconfig BSP_USING_I2C1
+    bool "Enable I2C1 BUS (software simulation)"
+        default n
+        select RT_USING_I2C
+        select RT_USING_I2C_BITOPS
+        select RT_USING_PIN
+        if BSP_USING_I2C1
+            config BSP_I2C1_SCL_PIN
+            int "i2c1 scl pin number"
+            range 1 216
+            default 116
+            config BSP_I2C1_SDA_PIN
+            int "I2C1 sda pin number"
+            range 1 216
+            default 117
+        endif
+
+    config BSP_USING_GFXMMU
+        bool
+        default n
+
+    config BSP_USING_FMC
+        bool
+        default n
 
 endmenu
 

bsp/stm32/stm32l4r9-st-eval/board/SConscript

@@ -12,8 +12,19 @@ board.c
 CubeMX_Config/Src/stm32l4xx_hal_msp.c
 ''')
 
+if GetDepend(['BSP_USING_DSI']):
+    src += Glob('ports/drv_lcd_dsi.c')
+
+if GetDepend(['BSP_USING_SRAM']):
+    src += Glob('ports/drv_sram.c')
+
+if GetDepend(['BSP_USING_TOUCH']):
+    src += Glob('ports/drv_touch.c')	
+    src += Glob('ports/drv_touch_ft.c')	
+
 path =  [cwd]
 path += [cwd + '/CubeMX_Config/Inc']
+path += [cwd + '/ports/include']
 
 startup_path_prefix = SDK_LIB
 

bsp/stm32/stm32l4r9-st-eval/board/board.c

@@ -6,54 +6,62 @@
  * Change Logs:
  * Date           Author       Notes
  * 2018-11-06     SummerGift   first version
- * 2019-04-09     jhb  
  */
 
 #include "board.h"
+
 void SystemClock_Config(void)
 {
-  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
-  /**Configure the main internal regulator output voltage 
-  */
-  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Initializes the CPU, AHB and APB busses clocks 
-  */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = 2;
-  RCC_OscInitStruct.PLL.PLLN = 30;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
-  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Initializes the CPU, AHB and APB busses clocks 
-  */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+    /**Configure the main internal regulator output voltage 
+    */
+    if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /**Initializes the CPU, AHB and APB busses clocks 
+    */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLM = 2;
+    RCC_OscInitStruct.PLL.PLLN = 30;
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+    RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+    RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /**Initializes the CPU, AHB and APB busses clocks 
+    */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3;
-  PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-  {
-    Error_Handler();
-  }
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_DSI|RCC_PERIPHCLK_LTDC;
+    PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
+    PeriphClkInit.DsiClockSelection = RCC_DSICLKSOURCE_DSIPHY;
+    PeriphClkInit.LtdcClockSelection = RCC_LTDCCLKSOURCE_PLLSAI2_DIV2;
+    PeriphClkInit.PLLSAI2.PLLSAI2Source = RCC_PLLSOURCE_HSE;
+    PeriphClkInit.PLLSAI2.PLLSAI2M = 2;
+    PeriphClkInit.PLLSAI2.PLLSAI2N = 8;
+    PeriphClkInit.PLLSAI2.PLLSAI2P = RCC_PLLP_DIV2;
+    PeriphClkInit.PLLSAI2.PLLSAI2R = RCC_PLLR_DIV2;
+    PeriphClkInit.PLLSAI2.PLLSAI2Q = RCC_PLLQ_DIV2;
+    PeriphClkInit.PLLSAI2.PLLSAI2ClockOut = RCC_PLLSAI2_LTDCCLK;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+        Error_Handler();
+    }	
 }

bsp/stm32/stm32l4r9-st-eval/board/ports/drv_lcd_dsi.c

@@ -0,0 +1,725 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-01-10     zylx         first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+#ifdef BSP_USING_DSI
+#include <lcd_port_dsi.h>
+#include <string.h>
+#include "drv_gpio.h"
+#include "gfxmmu_lut_390x390_24bpp.h"
+
+#define DRV_DEBUG
+#define LOG_TAG             "drv.lcd"
+#include <drv_log.h>
+
+static DSI_HandleTypeDef    DsiHandle;
+
+struct drv_lcd_dsi_device
+{
+    struct rt_device parent;
+
+    struct rt_device_graphic_info lcd_info;
+
+    struct rt_semaphore lcd_lock;
+
+    rt_uint8_t *front_buf;
+};
+
+struct drv_lcd_dsi_device _lcd;
+
+static DMA2D_HandleTypeDef   Dma2dHandle;
+static void CopyInVirtualBuffer(uint32_t *pSrc, uint32_t *pDst, uint16_t x, uint16_t y, uint16_t xsize, uint16_t ysize)
+{
+    uint32_t destination = (uint32_t)pDst + (y * 390 + x) * 4;
+    uint32_t source      = (uint32_t)pSrc;
+
+    Dma2dHandle.Instance          = DMA2D;
+
+    /*##-1- Configure the DMA2D Mode, Color Mode and output offset #############*/
+    Dma2dHandle.Init.Mode           = DMA2D_M2M_PFC;
+    Dma2dHandle.Init.ColorMode      = DMA2D_OUTPUT_RGB888;
+    Dma2dHandle.Init.OutputOffset   = 1024 - 390;
+    /* No Output Alpha Inversion */
+    Dma2dHandle.Init.AlphaInverted  = DMA2D_REGULAR_ALPHA;
+    /* No Output Red & Blue swap */
+    Dma2dHandle.Init.RedBlueSwap    = DMA2D_RB_REGULAR;
+    /* Regular output byte order */
+    Dma2dHandle.Init.BytesSwap      = DMA2D_BYTES_REGULAR;
+    /* Pixel mode */
+    Dma2dHandle.Init.LineOffsetMode = DMA2D_LOM_PIXELS;
+
+    /*##-2- Foreground Configuration ###########################################*/
+    Dma2dHandle.LayerCfg[1].InputColorMode = DMA2D_INPUT_ARGB8888;
+    Dma2dHandle.LayerCfg[1].InputOffset    = 0;
+    Dma2dHandle.LayerCfg[1].AlphaMode      = DMA2D_NO_MODIF_ALPHA;
+    /* Not used */
+    Dma2dHandle.LayerCfg[1].InputAlpha     = 0xFF;
+    /* No ForeGround Red/Blue swap */
+    Dma2dHandle.LayerCfg[1].RedBlueSwap    = DMA2D_RB_REGULAR;
+    /* No ForeGround Alpha inversion */
+    Dma2dHandle.LayerCfg[1].AlphaInverted  = DMA2D_REGULAR_ALPHA;
+
+    /* DMA2D Initialization */
+    if (HAL_DMA2D_Init(&Dma2dHandle) == HAL_OK)
+    {
+        if (HAL_DMA2D_ConfigLayer(&Dma2dHandle, 1) == HAL_OK)
+        {
+            if (HAL_DMA2D_Start(&Dma2dHandle, source, destination, xsize, ysize) == HAL_OK)
+            {
+                /* Polling For DMA transfer */
+                HAL_DMA2D_PollForTransfer(&Dma2dHandle, 100);
+            }
+        }
+    }
+}
+
+static rt_err_t drv_lcd_init(struct rt_device *device)
+{
+    struct drv_lcd_dsi_device *lcd = (struct drv_lcd_dsi_device *)device;
+    /* nothing, right now */
+    lcd = lcd;
+    return RT_EOK;
+}
+
+static rt_err_t drv_lcd_control(struct rt_device *device, int cmd, void *args)
+{
+    struct drv_lcd_dsi_device *lcd = (struct drv_lcd_dsi_device *)device;
+    rt_uint8_t color = 0;
+    switch (cmd)
+    {
+    case RTGRAPHIC_CTRL_RECT_UPDATE:
+    {
+        /* update */
+        rt_sem_take(&_lcd.lcd_lock, RT_TICK_PER_SECOND / 20);
+        CopyInVirtualBuffer((uint32_t *)_lcd.lcd_info.framebuffer, (uint32_t *)LAYER_ADDRESS, 0, 0, 390, 390);
+        HAL_DSI_Refresh(&DsiHandle);
+    }
+    break;
+
+    case RTGRAPHIC_CTRL_GET_INFO:
+    {
+        struct rt_device_graphic_info *info = (struct rt_device_graphic_info *)args;
+
+        RT_ASSERT(info != RT_NULL);
+        info->pixel_format  = lcd->lcd_info.pixel_format;
+        info->bits_per_pixel = 32;
+        info->width         = lcd->lcd_info.width;
+        info->height        = lcd->lcd_info.height;
+        info->framebuffer   = lcd->lcd_info.framebuffer;
+    }
+    break;
+    }
+
+    return RT_EOK;
+}
+
+LTDC_HandleTypeDef   LtdcHandle;
+rt_err_t stm32_lcd_init(struct drv_lcd_dsi_device *lcd)
+{
+    DSI_PLLInitTypeDef      dsiPllInit = {0};
+    DSI_PHY_TimerTypeDef    PhyTimings = {0};
+    DSI_HOST_TimeoutTypeDef HostTimeouts = {0};
+    DSI_LPCmdTypeDef        LPCmd = {0};
+    DSI_CmdCfgTypeDef       CmdCfg = {0};
+    GFXMMU_HandleTypeDef GfxmmuHandle = {0};
+    LTDC_LayerCfgTypeDef    LayerCfg = {0};
+
+    /* GFXMMU CONFIGURATION */
+    __HAL_GFXMMU_RESET_HANDLE_STATE(&GfxmmuHandle);
+    GfxmmuHandle.Instance = GFXMMU;
+    GfxmmuHandle.Init.BlocksPerLine                     = GFXMMU_192BLOCKS;
+    GfxmmuHandle.Init.DefaultValue                      = 0xFFFFFFFF;
+    GfxmmuHandle.Init.Buffers.Buf0Address               = (uint32_t)lcd->front_buf;
+    GfxmmuHandle.Init.Buffers.Buf1Address               = 0;
+    GfxmmuHandle.Init.Buffers.Buf2Address               = 0;
+    GfxmmuHandle.Init.Buffers.Buf3Address               = 0;
+    GfxmmuHandle.Init.Interrupts.Activation             = DISABLE;
+    GfxmmuHandle.Init.Interrupts.UsedInterrupts         = GFXMMU_AHB_MASTER_ERROR_IT;
+    if (HAL_OK != HAL_GFXMMU_Init(&GfxmmuHandle))
+    {
+        return -RT_ERROR;
+    }
+
+    /* Initialize LUT */
+    if (HAL_OK != HAL_GFXMMU_ConfigLut(&GfxmmuHandle, 0, 390, (uint32_t) gfxmmu_lut_config_rgb888))
+    {
+        return -RT_ERROR;
+    }
+
+    /* Disable non visible lines : from line 390 to 1023 (634 lines) */
+    if (HAL_OK != HAL_GFXMMU_DisableLutLines(&GfxmmuHandle, 390, 634))
+    {
+        return -RT_ERROR;
+    }
+
+    /**********************/
+    /* LTDC CONFIGURATION */
+    /**********************/
+    /* LTDC initialization */
+    __HAL_LTDC_RESET_HANDLE_STATE(&LtdcHandle);
+    LtdcHandle.Instance = LTDC;
+    LtdcHandle.Init.HSPolarity         = LTDC_HSPOLARITY_AL;
+    LtdcHandle.Init.VSPolarity         = LTDC_VSPOLARITY_AL;
+    LtdcHandle.Init.DEPolarity         = LTDC_DEPOLARITY_AL;
+    LtdcHandle.Init.PCPolarity         = LTDC_PCPOLARITY_IPC;
+    /* HSYNC width - 1 */
+    LtdcHandle.Init.HorizontalSync     = 0;
+    /* VSYNC width - 1 */
+    LtdcHandle.Init.VerticalSync       = 0;
+    /* HSYNC width + HBP - 1 */
+    LtdcHandle.Init.AccumulatedHBP     = 1;
+    /* VSYNC width + VBP - 1 */
+    LtdcHandle.Init.AccumulatedVBP     = 1;
+    /* HSYNC width + HBP + Active width - 1 */
+    LtdcHandle.Init.AccumulatedActiveW = 391;
+    /* VSYNC width + VBP + Active height - 1 */
+    LtdcHandle.Init.AccumulatedActiveH = 391;
+    /* HSYNC width + HBP + Active width + HFP - 1 */
+    LtdcHandle.Init.TotalWidth         = 392;
+    /* VSYNC width + VBP + Active height + VFP - 1 */
+    LtdcHandle.Init.TotalHeigh         = 392;
+    LtdcHandle.Init.Backcolor.Red      = 0;
+    LtdcHandle.Init.Backcolor.Green    = 0;
+    LtdcHandle.Init.Backcolor.Blue     = 0;
+    LtdcHandle.Init.Backcolor.Reserved = 0xFF;
+    if (HAL_LTDC_Init(&LtdcHandle) != HAL_OK)
+    {
+        return -RT_ERROR;
+    }
+
+    /* LTDC layer 1 configuration */
+    LayerCfg.WindowX0        = 0;
+    LayerCfg.WindowX1        = 390;
+    LayerCfg.WindowY0        = 0;
+    LayerCfg.WindowY1        = 390;
+    LayerCfg.PixelFormat     = LTDC_PIXEL_FORMAT_RGB888;
+    LayerCfg.Alpha           = 0xFF;
+    LayerCfg.Alpha0          = 0;
+    LayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_PAxCA;
+    LayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_PAxCA;
+    LayerCfg.FBStartAdress   = LAYER_ADDRESS;
+    /* virtual frame buffer contains 768 pixels per line for 24bpp */
+    /* (192 blocs * 16) / (24bpp/3) = 1024 pixels per ligne        */
+    LayerCfg.ImageWidth      = 1024;
+    LayerCfg.ImageHeight     = 390;
+    LayerCfg.Backcolor.Red   = 0;
+    LayerCfg.Backcolor.Green = 0;
+    LayerCfg.Backcolor.Blue  = 0;
+    LayerCfg.Backcolor.Reserved = 0xFF;
+    if (HAL_LTDC_ConfigLayer(&LtdcHandle, &LayerCfg, LTDC_LAYER_1) != HAL_OK)
+    {
+        return -RT_ERROR;
+    }
+
+    /*********************/
+    /* DSI CONFIGURATION */
+    /*********************/
+
+    /* DSI initialization */
+    __HAL_DSI_RESET_HANDLE_STATE(&DsiHandle);
+    DsiHandle.Instance = DSI;
+    DsiHandle.Init.AutomaticClockLaneControl = DSI_AUTO_CLK_LANE_CTRL_DISABLE;
+    /* We have 1 data lane at 500Mbps => lane byte clock at 500/8 = 62,5 MHZ */
+    /* We want TX escape clock at arround 20MHz and under 20MHz so clock division is set to 4 */
+    DsiHandle.Init.TXEscapeCkdiv             = 4;
+    DsiHandle.Init.NumberOfLanes             = DSI_ONE_DATA_LANE;
+    /* We have HSE value at 16 Mhz and we want data lane at 500Mbps */
+    dsiPllInit.PLLNDIV = 20;
+    dsiPllInit.PLLIDF  = DSI_PLL_IN_DIV1;
+    dsiPllInit.PLLODF  = DSI_PLL_OUT_DIV2;
+    if (HAL_DSI_Init(&DsiHandle, &dsiPllInit) != HAL_OK)
+    {
+        return -RT_ERROR;
+    }
+    /* Tclk-post + Tclk-trail + Ths-exit = [(60ns + 52xUI) + (60ns) + (300ns)]/16ns */
+    PhyTimings.ClockLaneHS2LPTime  = 33;
+    /* Tlpx + (Tclk-prepare + Tclk-zero) + Tclk-pre = [150ns + 300ns + 8xUI]/16ns */
+    PhyTimings.ClockLaneLP2HSTime  = 30;
+    /* Ths-trail + Ths-exit = [(60ns + 4xUI) + 100ns]/16ns */
+    PhyTimings.DataLaneHS2LPTime   = 11;
+    /* Tlpx + (Ths-prepare + Ths-zero) + Ths-sync = [150ns + (145ns + 10xUI) + 8xUI]/16ns */
+    PhyTimings.DataLaneLP2HSTime   = 21;
+    PhyTimings.DataLaneMaxReadTime = 0;
+    PhyTimings.StopWaitTime        = 7;
+    if (HAL_DSI_ConfigPhyTimer(&DsiHandle, &PhyTimings) != HAL_OK)
+    {
+        return -RT_ERROR;
+    }
+
+    HostTimeouts.TimeoutCkdiv                 = 1;
+    HostTimeouts.HighSpeedTransmissionTimeout = 0;
+    HostTimeouts.LowPowerReceptionTimeout     = 0;
+    HostTimeouts.HighSpeedReadTimeout         = 0;
+    HostTimeouts.LowPowerReadTimeout          = 0;
+    HostTimeouts.HighSpeedWriteTimeout        = 0;
+    HostTimeouts.HighSpeedWritePrespMode      = 0;
+    HostTimeouts.LowPowerWriteTimeout         = 0;
+    HostTimeouts.BTATimeout                   = 0;
+    if (HAL_DSI_ConfigHostTimeouts(&DsiHandle, &HostTimeouts) != HAL_OK)
+    {
+        return -RT_ERROR;
+    }
+
+    LPCmd.LPGenShortWriteNoP  = DSI_LP_GSW0P_ENABLE;
+    LPCmd.LPGenShortWriteOneP = DSI_LP_GSW1P_ENABLE;
+    LPCmd.LPGenShortWriteTwoP = DSI_LP_GSW2P_ENABLE;
+    LPCmd.LPGenShortReadNoP   = DSI_LP_GSR0P_ENABLE;
+    LPCmd.LPGenShortReadOneP  = DSI_LP_GSR1P_ENABLE;
+    LPCmd.LPGenShortReadTwoP  = DSI_LP_GSR2P_ENABLE;
+    LPCmd.LPGenLongWrite      = DSI_LP_GLW_DISABLE;
+    LPCmd.LPDcsShortWriteNoP  = DSI_LP_DSW0P_ENABLE;
+    LPCmd.LPDcsShortWriteOneP = DSI_LP_DSW1P_ENABLE;
+    LPCmd.LPDcsShortReadNoP   = DSI_LP_DSR0P_ENABLE;
+    LPCmd.LPDcsLongWrite      = DSI_LP_DLW_DISABLE;
+    LPCmd.LPMaxReadPacket     = DSI_LP_MRDP_DISABLE;
+    LPCmd.AcknowledgeRequest  = DSI_ACKNOWLEDGE_DISABLE;
+    if (HAL_DSI_ConfigCommand(&DsiHandle, &LPCmd) != HAL_OK)
+    {
+        return -RT_ERROR;
+    }
+
+    CmdCfg.VirtualChannelID      = 0;
+#if LCD_BITS_PER_PIXEL == 16
+    CmdCfg.ColorCoding           = DSI_RGB565;
+#else
+    CmdCfg.ColorCoding           = DSI_RGB888;
+#endif
+    CmdCfg.CommandSize           = 390;
+    CmdCfg.TearingEffectSource   = DSI_TE_DSILINK;
+    CmdCfg.TearingEffectPolarity = DSI_TE_FALLING_EDGE;
+    CmdCfg.HSPolarity            = DSI_HSYNC_ACTIVE_LOW;
+    CmdCfg.VSPolarity            = DSI_VSYNC_ACTIVE_LOW;
+    CmdCfg.DEPolarity            = DSI_DATA_ENABLE_ACTIVE_HIGH;
+    CmdCfg.VSyncPol              = DSI_VSYNC_FALLING;
+    CmdCfg.AutomaticRefresh      = DSI_AR_ENABLE;
+    CmdCfg.TEAcknowledgeRequest  = DSI_TE_ACKNOWLEDGE_ENABLE;
+    if (HAL_DSI_ConfigAdaptedCommandMode(&DsiHandle, &CmdCfg) != HAL_OK)
+    {
+        return -RT_ERROR;
+    }
+
+    /* Disable the Tearing Effect interrupt activated by default on previous function */
+    __HAL_DSI_DISABLE_IT(&DsiHandle, DSI_IT_TE);
+
+    if (HAL_DSI_ConfigFlowControl(&DsiHandle, DSI_FLOW_CONTROL_BTA) != HAL_OK)
+    {
+        return -RT_ERROR;
+    }
+
+    /* Enable DSI */
+    __HAL_DSI_ENABLE(&DsiHandle);
+
+    /*************************/
+    /* LCD POWER ON SEQUENCE */
+    /*************************/
+    /* Step 1 */
+    /* Go to command 2 */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x01);
+    /* IC Frame rate control, set power, sw mapping, mux swithc timing command */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x06, 0x62);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0E, 0x80);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0F, 0x80);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x10, 0x71);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x13, 0x81);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x14, 0x81);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x15, 0x82);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x16, 0x82);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x18, 0x88);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x19, 0x55);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1A, 0x10);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1C, 0x99);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1D, 0x03);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1E, 0x03);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1F, 0x03);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x20, 0x03);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x25, 0x03);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x26, 0x8D);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2A, 0x03);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2B, 0x8D);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x36, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x37, 0x10);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3A, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3B, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3D, 0x20);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3F, 0x3A);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x40, 0x30);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x41, 0x1A);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x42, 0x33);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x43, 0x22);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x44, 0x11);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x45, 0x66);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x46, 0x55);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x47, 0x44);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x4C, 0x33);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x4D, 0x22);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x4E, 0x11);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x4F, 0x66);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x50, 0x55);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x51, 0x44);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x57, 0x33);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x6B, 0x1B);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x70, 0x55);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x74, 0x0C);
+
+    /* Go to command 3 */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x02);
+    /* Set the VGMP/VGSP coltage control */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9B, 0x40);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9C, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9D, 0x20);
+
+    /* Go to command 4 */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x03);
+    /* Set the VGMP/VGSP coltage control */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9B, 0x40);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9C, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x9D, 0x20);
+
+    /* Go to command 5 */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x04);
+    /* VSR command */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x5D, 0x10);
+    /* VSR1 timing set */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x00, 0x8D);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x01, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x02, 0x01);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x03, 0x01);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x04, 0x10);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x05, 0x01);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x06, 0xA7);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x07, 0x20);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x08, 0x00);
+    /* VSR2 timing set */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x09, 0xC2);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0A, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0B, 0x02);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0C, 0x01);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0D, 0x40);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0E, 0x06);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x0F, 0x01);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x10, 0xA7);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x11, 0x00);
+    /* VSR3 timing set */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x12, 0xC2);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x13, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x14, 0x02);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x15, 0x01);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x16, 0x40);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x17, 0x07);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x18, 0x01);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x19, 0xA7);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1A, 0x00);
+    /* VSR4 timing set */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1B, 0x82);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1C, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1D, 0xFF);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1E, 0x05);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x1F, 0x60);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x20, 0x02);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x21, 0x01);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x22, 0x7C);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x23, 0x00);
+    /* VSR5 timing set */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x24, 0xC2);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x25, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x26, 0x04);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x27, 0x02);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x28, 0x70);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x29, 0x05);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2A, 0x74);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2B, 0x8D);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2D, 0x00);
+    /* VSR6 timing set */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2F, 0xC2);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x30, 0x00);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x31, 0x04);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x32, 0x02);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x33, 0x70);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x34, 0x07);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x35, 0x74);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x36, 0x8D);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x37, 0x00);
+    /* VSR marping command */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x5E, 0x20);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x5F, 0x31);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x60, 0x54);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x61, 0x76);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x62, 0x98);
+
+    /* Go to command 6 */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x05);
+    /* Set the ELVSS voltage */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x05, 0x17);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x2A, 0x04);
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x91, 0x00);
+
+    /* Go back in standard commands */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xFE, 0x00);
+
+    /* Set the Pixel format */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x3A, 0x07);
+
+    /* Set tear off */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, DSI_SET_TEAR_OFF, 0x0);
+
+    /* Set DSI mode to internal timing added vs ORIGINAL for Command mode */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0xC2, 0x0);
+
+    /* Set memory address MODIFIED vs ORIGINAL */
+    {
+        uint8_t InitParam1[4] = {0x00, 0x04, 0x01, 0x89};
+        uint8_t InitParam2[4] = {0x00, 0x00, 0x01, 0x85};
+
+        HAL_DSI_LongWrite(&DsiHandle, 0, DSI_DCS_LONG_PKT_WRITE, 4, DSI_SET_COLUMN_ADDRESS, InitParam1);
+        HAL_DSI_LongWrite(&DsiHandle, 0, DSI_DCS_LONG_PKT_WRITE, 4, DSI_SET_PAGE_ADDRESS, InitParam2);
+    }
+
+    /* Sleep out */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P0, DSI_EXIT_SLEEP_MODE, 0x0);
+
+    HAL_Delay(120);
+
+    /* Set default Brightness */
+    HAL_DSI_ShortWrite(&DsiHandle, 0, DSI_DCS_SHORT_PKT_WRITE_P1, 0x51, BRIGHTNESS_NORMAL);
+
+    /* Set display on */
+    if (HAL_DSI_ShortWrite(&DsiHandle,
+                           0,
+                           DSI_DCS_SHORT_PKT_WRITE_P0,
+                           DSI_SET_DISPLAY_ON,
+                           0x0) != HAL_OK)
+    {
+        LOG_E("set display on failed");
+        return -RT_ERROR;
+    }
+
+    /* Enable DSI Wrapper */
+    __HAL_DSI_WRAPPER_ENABLE(&DsiHandle);
+
+    /* NVIC configuration for DSI interrupt that is now enabled */
+    HAL_NVIC_SetPriority(DSI_IRQn, 3, 0);
+    HAL_NVIC_EnableIRQ(DSI_IRQn);
+
+    HAL_DSI_Refresh(&DsiHandle);
+    LOG_D("LCD init success");
+
+    return RT_EOK;
+}
+
+#if defined(LCD_BACKLIGHT_USING_PWM)
+void turn_on_lcd_backlight(void)
+{
+    struct rt_device_pwm *pwm_dev;
+
+    /* turn on the LCD backlight */
+    pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME);
+    /* pwm frequency:100K = 10000ns */
+    rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, 10000, 10000);
+    rt_pwm_enable(pwm_dev, PWM_DEV_CHANNEL);
+}
+#elif defined(LCD_BACKLIGHT_USING_GPIO)
+void turn_on_lcd_backlight(void)
+{
+    rt_pin_mode(LCD_BL_GPIO_NUM, PIN_MODE_OUTPUT);
+
+    rt_pin_write(LCD_BL_GPIO_NUM, PIN_HIGH);
+}
+#endif
+
+void DSI_IRQHandler(void)
+{
+    HAL_DSI_IRQHandler(&DsiHandle);
+}
+
+void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi)
+{
+    rt_sem_release(&_lcd.lcd_lock);
+}
+
+#ifdef RT_USING_DEVICE_OPS
+const static struct rt_device_ops lcd_ops =
+{
+    drv_lcd_init,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    RT_NULL,
+    drv_lcd_control
+};
+#endif
+
+int drv_lcd_hw_init(void)
+{
+    rt_err_t result = RT_EOK;
+    struct rt_device *device = &_lcd.parent;
+
+    /* memset _lcd to zero */
+    memset(&_lcd, 0x00, sizeof(_lcd));
+
+    /* init lcd_lock semaphore */
+    result = rt_sem_init(&_lcd.lcd_lock, "lcd_lock", 0, RT_IPC_FLAG_FIFO);
+    if (result != RT_EOK)
+    {
+        LOG_E("init semaphore failed!\n");
+        result = -RT_ENOMEM;
+        goto __exit;
+    }
+
+    /* config LCD dev info */
+    _lcd.lcd_info.height = LCD_HEIGHT;
+    _lcd.lcd_info.width = LCD_WIDTH;
+    _lcd.lcd_info.bits_per_pixel = LCD_BITS_PER_PIXEL;
+    _lcd.lcd_info.pixel_format = LCD_PIXEL_FORMAT;
+
+    /* malloc memory */
+    _lcd.lcd_info.framebuffer = rt_malloc_align(LCD_DSI_BUF_SIZE, 16);
+    _lcd.front_buf = rt_malloc_align(LCD_DSI_BUF_SIZE_ROUND, 16);
+    if (_lcd.lcd_info.framebuffer == RT_NULL || _lcd.front_buf == RT_NULL)
+    {
+        LOG_E("init frame buffer failed!\n");
+        result = -RT_ENOMEM;
+        goto __exit;
+    }
+
+    /* memset buff to 0xFF */
+    memset(_lcd.lcd_info.framebuffer, 0xFF, LCD_DSI_BUF_SIZE);
+    memset(_lcd.front_buf, 0xFF, LCD_DSI_BUF_SIZE_ROUND);
+
+    device->type    = RT_Device_Class_Graphic;
+#ifdef RT_USING_DEVICE_OPS
+    device->ops     = &lcd_ops;
+#else
+    device->init    = drv_lcd_init;
+    device->control = drv_lcd_control;
+#endif
+
+    /* register lcd device */
+    rt_device_register(device, "lcd_dsi", RT_DEVICE_FLAG_RDWR);
+
+    /* init stm32 LTDC */
+    if (stm32_lcd_init(&_lcd) != RT_EOK)
+    {
+        result = -RT_ERROR;
+        goto __exit;
+    }
+    else
+    {
+        turn_on_lcd_backlight();
+    }
+
+__exit:
+    if (result != RT_EOK)
+    {
+        rt_sem_delete(&_lcd.lcd_lock);
+
+        if (_lcd.lcd_info.framebuffer)
+        {
+            rt_free(_lcd.lcd_info.framebuffer);
+        }
+
+        if (_lcd.front_buf)
+        {
+
+            rt_free(_lcd.front_buf);
+        }
+    }
+    return result;
+}
+INIT_DEVICE_EXPORT(drv_lcd_hw_init);
+
+#if defined(PKG_USING_GUIENGINE)
+
+#include <rtgui/driver.h>
+int graphic_device_init(void)
+{
+    struct rt_device *device;
+    device = rt_device_find("lcd_dsi");
+    if (device)
+    {
+        rtgui_graphic_set_device(device);
+    }
+
+    return 0;
+}
+INIT_ENV_EXPORT(graphic_device_init);
+#endif
+
+#ifdef DRV_DEBUG
+#ifdef FINSH_USING_MSH
+int lcd_dsi_test()
+{
+    struct drv_lcd_dsi_device *lcd;
+    lcd = (struct drv_lcd_dsi_device *)rt_device_find("lcd_dsi");
+    rt_uint8_t *ptr = lcd->lcd_info.framebuffer;
+    while (1)
+    {
+        /* red */
+        for (unsigned long long i = 0; i < LCD_DSI_BUF_SIZE/4; i++)
+        {
+            ptr[4 * i] = 0x00;
+            ptr[4 * i + 1] = 0x00;
+            ptr[4 * i + 2] = 0xFF;
+            ptr[4 * i + 3] = 0xFF;
+        }
+        rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
+        rt_thread_mdelay(1000);
+
+        /* green */
+        for (int i = 0; i < LCD_DSI_BUF_SIZE/4; i++)
+        {
+            ptr[4 * i] = 0x00;
+            ptr[4 * i + 1] = 0xFF;
+            ptr[4 * i + 2] = 0x00;
+            ptr[4 * i + 3] = 0xFF;
+        }
+        rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
+        rt_thread_mdelay(1000);
+
+        /* blue */
+        for (int i = 0; i < LCD_DSI_BUF_SIZE/4; i++)
+        {
+            ptr[4 * i] = 0xFF;
+            ptr[4 * i + 1] = 0x00;
+            ptr[4 * i + 2] = 0x00;
+            ptr[4 * i + 3] = 0xFF;
+        }
+        rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
+        rt_thread_mdelay(1000);
+    }
+}
+MSH_CMD_EXPORT(lcd_dsi_test, lcd_dsi_test);
+
+//draw a line in screen
+void line()
+{
+    struct drv_lcd_dsi_device *lcd;
+    lcd = (struct drv_lcd_dsi_device *)rt_device_find("lcd_dsi");
+    rt_uint8_t *ptr = lcd->lcd_info.framebuffer;
+
+		/* red */
+		for (unsigned long long i = LCD_DSI_BUF_SIZE/4/2; i <LCD_DSI_BUF_SIZE/4/2+390; i++)
+		{
+				ptr[4 * i] = 0x00;
+				ptr[4 * i + 1] = 0x00;
+				ptr[4 * i + 2] = 0xFF;
+				ptr[4 * i + 3] = 0xFF;
+		}
+		rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL);
+
+	
+}
+MSH_CMD_EXPORT(line, line);
+
+#endif /* FINSH_USING_MSH */
+#endif /* DRV_DEBUG */
+#endif /* BSP_USING_LCD */

bsp/stm32/stm32l4r9-st-eval/board/ports/drv_sram.c

@@ -0,0 +1,163 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-04     zylx         first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+#ifdef BSP_USING_SRAM
+#include <sram_port.h>
+
+#define DRV_DEBUG
+#define LOG_TAG             "drv.sram"
+#include <drv_log.h>
+
+static SRAM_HandleTypeDef hsram;
+static FMC_NORSRAM_TimingTypeDef SRAM_Timing;
+#ifdef RT_USING_MEMHEAP_AS_HEAP
+static struct rt_memheap system_heap;
+#endif
+
+static int SRAM_Init(void)
+{
+    int result = RT_EOK;
+
+    /* SRAM device configuration */
+    hsram.Instance  = FMC_NORSRAM_DEVICE;
+    hsram.Extended  = FMC_NORSRAM_EXTENDED_DEVICE;
+
+    /* SRAM device configuration */
+    SRAM_Timing.AddressSetupTime       = ADDRESSSETUPTIME;
+    SRAM_Timing.AddressHoldTime        = ADDRESSHOLDTIME;          /* Min value, Don't care on SRAM Access mode A */
+    SRAM_Timing.DataSetupTime          = DATASETUPTIME;
+    SRAM_Timing.DataHoldTime           = DATAHOLDTIME;
+    SRAM_Timing.BusTurnAroundDuration  = BUSTURNAROUNDDURATION;
+    SRAM_Timing.CLKDivision            = CLKDIVISION;              /* Min value, Don't care on SRAM Access mode A */
+    SRAM_Timing.DataLatency            = DATALATENCY;              /* Min value, Don't care on SRAM Access mode A */
+    SRAM_Timing.AccessMode             = ACCESSMODE;
+
+    hsram.Init.NSBank             = FMC_NORSRAM_BANK1;
+    hsram.Init.DataAddressMux     = FMC_DATA_ADDRESS_MUX_DISABLE;
+    hsram.Init.MemoryType         = FMC_MEMORY_TYPE_SRAM;
+#if SRAM_DATA_WIDTH == 8
+    hsram.Init.MemoryDataWidth    = FMC_NORSRAM_MEM_BUS_WIDTH_8;
+#elif SRAM_DATA_WIDTH == 16
+    hsram.Init.MemoryDataWidth    = FMC_NORSRAM_MEM_BUS_WIDTH_16;
+#else
+    hsram.Init.MemoryDataWidth    = FMC_NORSRAM_MEM_BUS_WIDTH_32;
+#endif
+    hsram.Init.BurstAccessMode    = FMC_BURST_ACCESS_MODE_DISABLE;
+    hsram.Init.WriteOperation     = FMC_WRITE_OPERATION_ENABLE;
+    hsram.Init.WaitSignal         = FMC_WAIT_SIGNAL_DISABLE;
+    hsram.Init.WaitSignalActive   = FMC_WAIT_TIMING_BEFORE_WS;
+    hsram.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
+    hsram.Init.ExtendedMode       = FMC_EXTENDED_MODE_DISABLE;
+    hsram.Init.AsynchronousWait   = FMC_ASYNCHRONOUS_WAIT_DISABLE;
+    hsram.Init.WriteBurst         = FMC_WRITE_BURST_DISABLE;
+    hsram.Init.ContinuousClock    = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
+    hsram.Init.WriteFifo          = FMC_WRITE_FIFO_DISABLE;
+    hsram.Init.NBLSetupTime       = 0;
+    hsram.Init.PageSize           = FMC_PAGE_SIZE_NONE;
+
+    /* Initialize the SRAM controller */
+    if (HAL_SRAM_Init(&hsram, &SRAM_Timing, &SRAM_Timing) != HAL_OK)
+    {
+        LOG_E("SRAM init failed!");
+        result = -RT_ERROR;
+    }
+    else
+    {
+        LOG_D("sram init success, mapped at 0x%X, size is %d bytes, data width is %d", SRAM_BANK_ADDR, SRAM_SIZE, SRAM_DATA_WIDTH);
+#ifdef RT_USING_MEMHEAP_AS_HEAP
+        /* If RT_USING_MEMHEAP_AS_HEAP is enabled, SRAM is initialized to the heap */
+        rt_memheap_init(&system_heap, "sram", (void *)SRAM_BANK_ADDR, SRAM_SIZE);
+#endif
+    }
+
+    return result;
+}
+INIT_BOARD_EXPORT(SRAM_Init);
+
+#ifdef DRV_DEBUG
+#ifdef FINSH_USING_MSH
+int sram_test(void)
+{
+    int i = 0;
+    uint32_t start_time = 0, time_cast = 0;
+#if SRAM_DATA_WIDTH == 8
+    char data_width = 1;
+    uint8_t data = 0;
+    uint8_t *ptr = (uint8_t *)SRAM_BANK_ADDR;
+#elif SRAM_DATA_WIDTH == 16
+    char data_width = 2;
+    uint16_t data = 0;
+    uint16_t *ptr = (uint16_t *)SRAM_BANK_ADDR;
+#else
+    char data_width = 4;
+    uint32_t data = 0;
+    uint32_t *ptr = (uint32_t *)SRAM_BANK_ADDR;
+#endif
+
+    /* write data */
+    LOG_D("Writing the %ld bytes data, waiting....", SRAM_SIZE);
+    start_time = rt_tick_get();
+    for (i = 0; i < SRAM_SIZE / data_width; i++)
+    {
+#if SRAM_DATA_WIDTH == 8
+        ((__IO uint8_t *)ptr)[i] = (uint8_t)0x55;
+#elif SRAM_DATA_WIDTH == 16
+        ((__IO uint16_t *)ptr)[i] = (uint16_t)0x5555;
+#else
+        ((__IO uint32_t *)ptr)[i] = (uint32_t)0x55555555;
+#endif
+    }
+    time_cast = rt_tick_get() - start_time;
+    LOG_D("Write data success, total time: %d.%03dS.", time_cast / RT_TICK_PER_SECOND,
+          time_cast % RT_TICK_PER_SECOND / ((RT_TICK_PER_SECOND * 1 + 999) / 1000));
+
+    /* read data */
+    LOG_D("start Reading and verifying data, waiting....");
+    for (i = 0; i < SRAM_SIZE / data_width; i++)
+    {
+#if SRAM_DATA_WIDTH == 8
+        data = ((__IO uint8_t *)ptr)[i];
+        if (data != 0x55)
+        {
+            LOG_E("SRAM test failed!");
+            break;
+        }
+#elif SRAM_DATA_WIDTH == 16
+        data = ((__IO uint16_t *)ptr)[i];
+        if (data != 0x5555)
+        {
+            LOG_E("SRAM test failed!");
+            break;
+        }
+#else
+        data = ((__IO uint32_t *)ptr)[i];
+        if (data != 0x55555555)
+        {
+            LOG_E("SRAM test failed!");
+            break;
+        }
+#endif
+    }
+
+    if (i >= SRAM_SIZE / data_width)
+    {
+        LOG_D("SRAM test success!");
+    }
+
+    return RT_EOK;
+}
+MSH_CMD_EXPORT(sram_test, sram test);
+#endif /* FINSH_USING_MSH */
+#endif /* DRV_DEBUG */
+#endif /* BSP_USING_SRAM */

bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch.c

@@ -0,0 +1,194 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-02-08     Zhangyihong  the first version
+ */
+#include "drv_touch.h"
+#include <string.h>
+#ifdef BSP_USING_TOUCH
+#ifdef PKG_USING_GUIENGINE
+#include <rtgui/event.h>
+#include <rtgui/rtgui_server.h>
+#elif defined(PKG_USING_LITTLEVGL2RTT)
+#include <littlevgl2rtt.h>
+#endif
+#define BSP_TOUCH_SAMPLE_HZ    (50)
+
+#define DBG_ENABLE
+#define DBG_SECTION_NAME  "TOUCH"
+#define DBG_LEVEL         DBG_ERROR
+#define DBG_COLOR
+#include <rtdbg.h>
+
+static rt_list_t driver_list;
+
+
+void rt_touch_drivers_register(touch_drv_t drv)
+{
+    rt_list_insert_before(&driver_list, &drv->list);
+}
+
+static void post_down_event(rt_uint16_t x, rt_uint16_t y, rt_tick_t ts)
+{
+#ifdef PKG_USING_GUIENGINE
+    struct rtgui_event_mouse emouse;
+
+    emouse.parent.sender = RT_NULL;
+    emouse.wid = RT_NULL;
+
+    emouse.parent.type = RTGUI_EVENT_MOUSE_BUTTON;
+    emouse.button = RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_DOWN;
+    emouse.x = x;
+    emouse.y = y;
+    emouse.ts = rt_tick_get();
+    emouse.id = ts;
+    rtgui_server_post_event(&emouse.parent, sizeof(emouse));
+#elif defined(PKG_USING_LITTLEVGL2RTT)
+    littlevgl2rtt_send_input_event(x, y, LITTLEVGL2RTT_INPUT_DOWN);
+#endif
+}
+
+static void post_motion_event(rt_uint16_t x, rt_uint16_t y, rt_tick_t ts)
+{
+#ifdef PKG_USING_GUIENGINE
+    struct rtgui_event_mouse emouse;
+
+    emouse.parent.sender = RT_NULL;
+    emouse.wid = RT_NULL;
+
+    emouse.button = RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_DOWN;
+    emouse.parent.type = RTGUI_EVENT_MOUSE_MOTION;
+    emouse.x = x;
+    emouse.y = y;
+    emouse.ts = rt_tick_get();
+    emouse.id = ts;
+    rtgui_server_post_event(&emouse.parent, sizeof(emouse));
+#elif defined(PKG_USING_LITTLEVGL2RTT)
+    littlevgl2rtt_send_input_event(x, y, LITTLEVGL2RTT_INPUT_MOVE);
+#endif
+}
+
+static void post_up_event(rt_uint16_t x, rt_uint16_t y, rt_tick_t ts)
+{
+#ifdef PKG_USING_GUIENGINE
+    struct rtgui_event_mouse emouse;
+
+    emouse.parent.sender = RT_NULL;
+    emouse.wid = RT_NULL;
+
+    emouse.parent.type = RTGUI_EVENT_MOUSE_BUTTON;
+    emouse.button = RTGUI_MOUSE_BUTTON_LEFT | RTGUI_MOUSE_BUTTON_UP;
+    emouse.x = x;
+    emouse.y = y;
+    emouse.ts = rt_tick_get();
+    emouse.id = ts;
+    rtgui_server_post_event(&emouse.parent, sizeof(emouse));
+#elif defined(PKG_USING_LITTLEVGL2RTT)
+    littlevgl2rtt_send_input_event(x, y, LITTLEVGL2RTT_INPUT_MOVE);
+#endif
+}
+
+static void touch_thread_entry(void *parameter)
+{
+    touch_drv_t touch = (touch_drv_t)parameter;
+    struct touch_message msg;
+    rt_tick_t emouse_id = 0;
+    touch->ops->isr_enable(RT_TRUE);
+    while (1)
+    {
+
+        if (rt_sem_take(touch->isr_sem, 10) != RT_EOK)
+        {
+            continue;
+        }
+        while(touch->ops->read_point(&msg) == RT_EOK)
+        {
+            switch (msg.event)
+            {
+            case TOUCH_EVENT_UP:
+                post_up_event(msg.x, msg.y, emouse_id);
+                break;
+            case TOUCH_EVENT_DOWN:
+                emouse_id = rt_tick_get();
+                post_down_event(msg.x, msg.y, emouse_id);
+                break;
+            case TOUCH_EVENT_MOVE:
+                post_motion_event(msg.x, msg.y, emouse_id);
+                break;
+            default:
+                break;
+            }
+            rt_thread_delay(RT_TICK_PER_SECOND / BSP_TOUCH_SAMPLE_HZ);
+        }
+        touch->ops->isr_enable(RT_TRUE);
+    }
+}
+
+static int rt_touch_driver_init(void)
+{
+    rt_list_init(&driver_list);
+    return 0;
+}
+INIT_BOARD_EXPORT(rt_touch_driver_init);
+
+static struct rt_i2c_bus_device *i2c_bus = RT_NULL;
+static int rt_touch_thread_init(void)
+{
+    rt_list_t *l;
+    touch_drv_t current_driver;
+    rt_thread_t tid = RT_NULL;
+    i2c_bus = (struct rt_i2c_bus_device *)rt_device_find(BSP_I2C1_NAME);
+    RT_ASSERT(i2c_bus);
+    current_driver = RT_NULL;
+    if (rt_device_open((rt_device_t)i2c_bus, RT_DEVICE_OFLAG_RDWR) != RT_EOK)
+        return -1;
+    for (l = driver_list.next; l != &driver_list; l = l->next)
+    {
+        if (rt_list_entry(l, struct touch_drivers, list)->probe(i2c_bus))
+        {
+            current_driver = rt_list_entry(l, struct touch_drivers, list);
+            break;
+        }
+    }
+    if (current_driver == RT_NULL)
+    {
+        LOG_E("no touch screen or do not have driver\r\n");
+        rt_device_close((rt_device_t)i2c_bus);
+        return -1;
+    }
+    current_driver->ops->init(i2c_bus);
+    LOG_I("touch screen found driver\r\n");
+    tid = rt_thread_create("touch", touch_thread_entry, current_driver, 2048, 27, 20);
+    if (tid == RT_NULL)
+    {
+        current_driver->ops->deinit();
+        rt_device_close((rt_device_t)i2c_bus);
+        return -1;
+    }
+    rt_thread_startup(tid);
+    return 0;
+}
+
+static void touch_init_thread_entry(void *parameter)
+{
+    rt_touch_thread_init();
+}
+static int touc_bg_init(void)
+{
+    rt_thread_t tid = RT_NULL;
+    tid = rt_thread_create("touchi", touch_init_thread_entry, RT_NULL, 2048, 28, 20);
+    if (tid == RT_NULL)
+    {
+        return -1;
+    }
+    rt_thread_startup(tid);
+    return 0;
+}
+INIT_APP_EXPORT(touc_bg_init);
+
+
+#endif

bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch_ft.c

@@ -0,0 +1,218 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2017-08-08     Yang        the first version
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+#include <rtdevice.h>
+#include "drv_touch.h"
+#include <string.h>
+
+#ifdef BSP_USING_TOUCH
+
+#define DBG_ENABLE
+#define DBG_SECTION_NAME  "TOUCH.ft"
+#define DBG_LEVEL         TOUCH_DBG_LEVEL
+#define DBG_COLOR
+#include <rtdbg.h>
+
+
+#ifdef TOUCH_IC_FT3X67
+#define CHIP_ID_REG                 0xA8U
+#define CHIP_ID_VALUE               0x11U
+#define TOUCH_SLAVE_ADDR            0x38U
+#else
+#error "Please define at least one TOUCH DEVICE"
+/* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
+#endif
+
+static struct rt_i2c_bus_device *ft_i2c_bus;
+static struct touch_drivers ft_driver;
+
+static int ft_read(struct rt_i2c_bus_device *i2c_bus, rt_uint8_t addr, rt_uint8_t *buffer, rt_size_t length)
+{
+    int ret = -1;
+    int retries = 0;
+
+    struct rt_i2c_msg msgs[] =
+    {
+        {
+            .addr   = ft_driver.address,
+            .flags  = RT_I2C_WR,
+            .len    = 1,
+            .buf    = &addr,
+        },
+        {
+            .addr   = ft_driver.address,
+            .flags  = RT_I2C_RD,
+            .len    = length,
+            .buf    = buffer,
+        },
+    };
+
+    while (retries < IIC_RETRY_NUM)
+    {
+        ret = rt_i2c_transfer(i2c_bus, msgs, 2);
+        if (ret == 2)break;
+        retries++;
+    }
+
+    if (retries >= IIC_RETRY_NUM)
+    {
+        LOG_E("%s i2c read error: %d", __func__, ret);
+        return -1;
+    }
+
+    return ret;
+}
+
+static void ft_write(touch_drv_t driver, struct rt_i2c_bus_device *i2c_bus, rt_uint8_t addr, rt_uint8_t *buffer, rt_size_t length)
+{
+
+    rt_uint8_t *send_buffer = rt_malloc(length + 1);
+
+    RT_ASSERT(send_buffer);
+
+    send_buffer[0] = addr;
+    memcpy(send_buffer + 1, buffer, length);
+
+    struct rt_i2c_msg msgs[] =
+    {
+        {
+            .addr   = ft_driver.address,
+            .flags  = RT_I2C_WR,
+            .len    = length + 1,
+            .buf    = send_buffer,
+        }
+    };
+
+    length = rt_i2c_transfer(i2c_bus, msgs, 1);
+    rt_free(send_buffer);
+    send_buffer = RT_NULL;
+}
+
+static void ft_isr_enable(rt_bool_t enable)
+{
+    rt_pin_irq_enable(BSP_TOUCH_INT_PIN, enable);
+}
+
+static void ft_touch_isr(void *parameter)
+{
+    ft_isr_enable(RT_FALSE);
+    rt_sem_release(ft_driver.isr_sem);
+}
+
+static rt_err_t ft_read_point(touch_msg_t msg)
+{
+    int ret = -1;
+    uint8_t point_num = 0;
+    static uint8_t s_tp_down = 0;
+    uint8_t point[6];
+    ret = ft_read(ft_i2c_bus, 0x02, &point_num, 1);
+    if (ret < 0)
+    {
+        return RT_ERROR;
+    }
+    
+    if (point_num == 0)
+    {
+        if (s_tp_down)
+        {
+            s_tp_down = 0;
+            msg->event = TOUCH_EVENT_UP;
+            return RT_EOK;
+        }
+        msg->event = TOUCH_EVENT_NONE;
+        return RT_ERROR;
+    }
+    
+    ret = ft_read(ft_i2c_bus, 0x03, point, 6);
+    if (ret < 0)
+    {
+        return RT_ERROR;
+    }
+
+    msg->y = (point[0]&0x0F) << 8 | point[1];
+    msg->x = (point[2]&0x0F) << 8 | point[3];
+    if (s_tp_down)
+    {
+        msg->event = TOUCH_EVENT_MOVE;
+        return RT_EOK;
+    }
+    msg->event = TOUCH_EVENT_DOWN;
+    s_tp_down = 1;
+    
+    return RT_EOK;
+}
+
+static void ft_init(struct rt_i2c_bus_device *i2c_bus)
+{
+    if (ft_i2c_bus == RT_NULL)
+    {
+        ft_i2c_bus = i2c_bus;
+    }
+    ft_driver.isr_sem = rt_sem_create("ft", 0, RT_IPC_FLAG_FIFO);
+    RT_ASSERT(ft_driver.isr_sem);
+
+    rt_pin_mode(BSP_TOUCH_INT_PIN, PIN_MODE_INPUT_PULLUP);
+    rt_pin_attach_irq(BSP_TOUCH_INT_PIN, PIN_IRQ_MODE_FALLING, ft_touch_isr, RT_NULL);
+
+    rt_thread_mdelay(200);
+}
+
+static void ft_deinit(void)
+{
+    if (ft_driver.isr_sem)
+    {
+        rt_sem_delete(ft_driver.isr_sem);
+        ft_driver.isr_sem = RT_NULL;
+    }
+}
+
+struct touch_ops ft_ops =
+{
+    ft_isr_enable,
+    ft_read_point,
+    ft_init,
+    ft_deinit,
+};
+
+static rt_bool_t ft_probe(struct rt_i2c_bus_device *i2c_bus)
+{
+    int err = 0;
+    uint8_t cid = 0xFF;
+
+    ft_i2c_bus = i2c_bus;
+    err = ft_read(ft_i2c_bus, CHIP_ID_REG, (uint8_t *)&cid, 1);
+    if (err < 0)
+    {
+        LOG_E("%s failed: %d", __func__, err);
+        return RT_FALSE;
+    }
+    LOG_I("touch CID:%02X", cid);
+    if(cid == CHIP_ID_VALUE)
+    {
+        return RT_TRUE;
+    }
+    return RT_FALSE;
+}
+
+int ft_driver_register(void)
+{
+    ft_driver.address = TOUCH_SLAVE_ADDR;
+    ft_driver.probe = ft_probe;
+    ft_driver.ops = &ft_ops;
+    ft_driver.user_data = RT_NULL;
+    rt_touch_drivers_register(&ft_driver);
+    return 0;
+}
+
+INIT_DEVICE_EXPORT(ft_driver_register);
+
+#endif

bsp/stm32/stm32l4r9-st-eval/board/ports/include/drv_touch.h

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-02-08     Zhangyihong  the first version
+ */
+#ifndef __DRV_TOUCH_H__
+#define __DRV_TOUCH_H__
+
+#include "rtthread.h"
+#include "rtdevice.h"
+
+#define TOUCH_DBG_LEVEL DBG_ERROR
+
+#define IIC_RETRY_NUM 2
+
+#define TOUCH_EVENT_UP      (0x01)
+#define TOUCH_EVENT_DOWN    (0x02)
+#define TOUCH_EVENT_MOVE    (0x03)
+#define TOUCH_EVENT_NONE    (0x80)
+
+struct touch_message
+{
+    rt_uint16_t x;
+    rt_uint16_t y;
+    rt_uint8_t event;
+};
+typedef struct touch_message *touch_msg_t;
+
+struct touch_ops
+{
+    void (* isr_enable)(rt_bool_t);
+    rt_err_t (* read_point)(touch_msg_t);
+    void (* init)(struct rt_i2c_bus_device *);
+    void (* deinit)(void);
+};
+typedef struct touch_ops *touch_ops_t;
+
+struct touch_drivers
+{
+    rt_list_t       list;
+    unsigned char   address;
+    rt_bool_t (*probe)(struct rt_i2c_bus_device *i2c_bus);
+    rt_sem_t        isr_sem;
+    touch_ops_t     ops;
+    void           *user_data;
+};
+typedef struct touch_drivers *touch_drv_t;
+
+extern void rt_touch_drivers_register(touch_drv_t drv);
+#endif

bsp/stm32/stm32l4r9-st-eval/board/ports/include/lcd_port_dsi.h

@@ -0,0 +1,28 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-01-08     zylx         first version
+ */
+
+#ifndef __LCD_PORT_DSI_H__
+#define __LCD_PORT_DSI_H__
+
+#define LCD_HEIGHT              390
+#define LCD_WIDTH               390
+#define LCD_BITS_PER_PIXEL      24
+#define LCD_PIXEL_FORMAT        RTGRAPHIC_PIXEL_FORMAT_ARGB888
+#define LCD_DSI_BUF_SIZE        608400
+#define LCD_DSI_BUF_SIZE_ROUND  365040
+
+#define LAYER_ADDRESS           GFXMMU_VIRTUAL_BUFFER0_BASE
+#define BRIGHTNESS_MIN          50
+#define BRIGHTNESS_NORMAL       200
+
+#define LCD_BACKLIGHT_USING_GPIO
+#define LCD_BL_GPIO_NUM         GET_PIN(B, 14)
+
+#endif /* __LCD_PORT_DSI_H__ */

bsp/stm32/stm32l4r9-st-eval/board/ports/include/sram_port.h

@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-04     zylx         The first version for STM32F4xx
+ */
+
+#ifndef __SDRAM_PORT_H__
+#define __SDRAM_PORT_H__
+
+/* parameters for sdram peripheral */
+/* Bank1 */
+#define SRAM_TARGET_BANK                1
+/* stm32f4 Bank1:0x60000000 */
+#define SRAM_BANK_ADDR                  ((uint32_t)0x60000000)
+/* data width: 8, 16, 32 */
+#define SRAM_DATA_WIDTH                 16
+/* sram size */
+#define SRAM_SIZE                       ((uint32_t)0x200000)
+
+/* Timing configuration for IS61WV102416BLL-10MLI */
+#define ADDRESSSETUPTIME                2
+#define ADDRESSHOLDTIME                 1
+#define DATASETUPTIME                   1
+#define DATAHOLDTIME                    1
+#define BUSTURNAROUNDDURATION           0
+#define CLKDIVISION                     2
+#define DATALATENCY                     2
+#define ACCESSMODE                      FMC_ACCESS_MODE_A
+/* Timing configuration for IS61WV102416BLL-10MLI */
+
+#endif

bsp/stm32/stm32l4r9-st-eval/project.uvoptx

@@ -73,7 +73,7 @@
         <LExpSel>0</LExpSel>
       </OPTXL>
       <OPTFL>
-        <tvExp>1</tvExp>
+        <tvExp>0</tvExp>
         <tvExpOptDlg>0</tvExpOptDlg>
         <IsCurrentTarget>1</IsCurrentTarget>
       </OPTFL>
@@ -117,26 +117,6 @@
         <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ARMRTXEVENTFLAGS</Key>
-          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGTARM</Key>
-          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>ARMDBGFLAGS</Key>
-          <Name></Name>
-        </SetRegEntry>
-        <SetRegEntry>
-          <Number>0</Number>
-          <Key>DLGUARM</Key>
-          <Name>(105=-1,-1,-1,-1,0)</Name>
-        </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
           <Key>UL2CM3</Key>
@@ -145,7 +125,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>ST-LINKIII-KEIL_SWO</Key>
-          <Name>-U0668FF504955857567074018 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9AIIx$CMSIS\Flash\STM32L4Rx_2048.FLM)</Name>
+          <Name>-U0668FF504955857567074018 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO31 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9AIIx$CMSIS\Flash\STM32L4Rx_2048.FLM)</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>
@@ -155,12 +135,12 @@
       <DebugFlag>
         <trace>0</trace>
         <periodic>0</periodic>
-        <aLwin>1</aLwin>
+        <aLwin>0</aLwin>
         <aCover>0</aCover>
         <aSer1>0</aSer1>
         <aSer2>0</aSer2>
         <aPa>0</aPa>
-        <viewmode>1</viewmode>
+        <viewmode>0</viewmode>
         <vrSel>0</vrSel>
         <aSym>0</aSym>
         <aTbox>0</aTbox>
@@ -310,8 +290,8 @@
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
-      <PathWithFileName>..\..\..\src\mem.c</PathWithFileName>
-      <FilenameWithoutPath>mem.c</FilenameWithoutPath>
+      <PathWithFileName>..\..\..\src\memheap.c</PathWithFileName>
+      <FilenameWithoutPath>memheap.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
@@ -411,7 +391,7 @@
 
   <Group>
     <GroupName>Drivers</GroupName>
-    <tvExp>1</tvExp>
+    <tvExp>0</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
@@ -570,6 +550,42 @@
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
       <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\components\drivers\i2c\i2c_core.c</PathWithFileName>
+      <FilenameWithoutPath>i2c_core.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>5</GroupNumber>
+      <FileNumber>29</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\components\drivers\i2c\i2c_dev.c</PathWithFileName>
+      <FilenameWithoutPath>i2c_dev.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>5</GroupNumber>
+      <FileNumber>30</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\components\drivers\i2c\i2c-bit-ops.c</PathWithFileName>
+      <FilenameWithoutPath>i2c-bit-ops.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>5</GroupNumber>
+      <FileNumber>31</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
       <PathWithFileName>..\..\..\components\drivers\misc\pin.c</PathWithFileName>
       <FilenameWithoutPath>pin.c</FilenameWithoutPath>
       <RteFlg>0</RteFlg>
@@ -577,7 +593,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>29</FileNumber>
+      <FileNumber>32</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -589,7 +605,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>30</FileNumber>
+      <FileNumber>33</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -601,7 +617,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>31</FileNumber>
+      <FileNumber>34</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -613,7 +629,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>32</FileNumber>
+      <FileNumber>35</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -625,7 +641,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>33</FileNumber>
+      <FileNumber>36</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -637,7 +653,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>34</FileNumber>
+      <FileNumber>37</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -649,7 +665,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>35</FileNumber>
+      <FileNumber>38</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -661,7 +677,7 @@
     </File>
     <File>
       <GroupNumber>5</GroupNumber>
-      <FileNumber>36</FileNumber>
+      <FileNumber>39</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -681,7 +697,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>37</FileNumber>
+      <FileNumber>40</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -693,7 +709,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>38</FileNumber>
+      <FileNumber>41</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -705,7 +721,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>39</FileNumber>
+      <FileNumber>42</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -717,7 +733,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>40</FileNumber>
+      <FileNumber>43</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -729,7 +745,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>41</FileNumber>
+      <FileNumber>44</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -741,7 +757,7 @@
     </File>
     <File>
       <GroupNumber>6</GroupNumber>
-      <FileNumber>42</FileNumber>
+      <FileNumber>45</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -761,7 +777,7 @@
     <RteFlg>0</RteFlg>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>43</FileNumber>
+      <FileNumber>46</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -773,7 +789,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>44</FileNumber>
+      <FileNumber>47</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -785,7 +801,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>45</FileNumber>
+      <FileNumber>48</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -797,7 +813,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>46</FileNumber>
+      <FileNumber>49</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -809,7 +825,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>47</FileNumber>
+      <FileNumber>50</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -821,7 +837,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>48</FileNumber>
+      <FileNumber>51</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -833,7 +849,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>49</FileNumber>
+      <FileNumber>52</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -845,7 +861,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>50</FileNumber>
+      <FileNumber>53</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -857,7 +873,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>51</FileNumber>
+      <FileNumber>54</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -869,7 +885,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>52</FileNumber>
+      <FileNumber>55</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -881,7 +897,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>53</FileNumber>
+      <FileNumber>56</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -893,7 +909,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>54</FileNumber>
+      <FileNumber>57</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -905,7 +921,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>55</FileNumber>
+      <FileNumber>58</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -917,7 +933,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>56</FileNumber>
+      <FileNumber>59</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -929,7 +945,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>57</FileNumber>
+      <FileNumber>60</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -941,7 +957,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>58</FileNumber>
+      <FileNumber>61</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -953,19 +969,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>59</FileNumber>
-      <FileType>1</FileType>
-      <tvExp>0</tvExp>
-      <tvExpOptDlg>0</tvExpOptDlg>
-      <bDave2>0</bDave2>
-      <PathWithFileName>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sram.c</PathWithFileName>
-      <FilenameWithoutPath>stm32l4xx_hal_sram.c</FilenameWithoutPath>
-      <RteFlg>0</RteFlg>
-      <bShared>0</bShared>
-    </File>
-    <File>
-      <GroupNumber>7</GroupNumber>
-      <FileNumber>60</FileNumber>
+      <FileNumber>62</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -977,7 +981,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>61</FileNumber>
+      <FileNumber>63</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -989,7 +993,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>62</FileNumber>
+      <FileNumber>64</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -1001,7 +1005,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>63</FileNumber>
+      <FileNumber>65</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -1013,7 +1017,7 @@
     </File>
     <File>
       <GroupNumber>7</GroupNumber>
-      <FileNumber>64</FileNumber>
+      <FileNumber>66</FileNumber>
       <FileType>1</FileType>
       <tvExp>0</tvExp>
       <tvExpOptDlg>0</tvExpOptDlg>
@@ -1023,6 +1027,30 @@
       <RteFlg>0</RteFlg>
       <bShared>0</bShared>
     </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>67</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</PathWithFileName>
+      <FilenameWithoutPath>stm32l4xx_hal_i2c.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>7</GroupNumber>
+      <FileNumber>68</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</PathWithFileName>
+      <FilenameWithoutPath>stm32l4xx_hal_i2c_ex.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
   </Group>
 
 </ProjectOpt>

bsp/stm32/stm32l4r9-st-eval/project.uvprojx

@@ -49,7 +49,7 @@
             <InvalidFlash>1</InvalidFlash>
           </TargetStatus>
           <OutputDirectory>.\build\keil\Obj\</OutputDirectory>
-          <OutputName>rt-thread</OutputName>
+          <OutputName>rtthread</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
           <CreateHexFile>0</CreateHexFile>
@@ -338,7 +338,7 @@
               <MiscControls></MiscControls>
               <Define>USE_HAL_DRIVER, STM32L4R9xx</Define>
               <Undefine></Undefine>
-              <IncludePath>.;..\..\..\include;applications\E;applications\:;..\..\..\..;applications\r;applications\t;applications\-;applications\t;applications\h;applications\r;applications\e;applications\a;applications\d;..\..\..\..;applications\b;applications\s;applications\p;..\..\..\..;applications\s;applications\t;applications\m;applications\3;applications\2;..\..\..\..;applications\s;applications\t;applications\m;applications\3;applications\2;applications\l;applications\4;applications\r;applications\9;applications\-;applications\s;applications\t;applications\-;applications\e;applications\v;applications\a;applications\l;..\..\..\..;applications\a;applications\p;applications\p;applications\l;applications\i;applications\c;applications\a;applications\t;applications\i;applications\o;applications\n;applications\s;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc;..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include;..\libraries\STM32L4xx_HAL\CMSIS\Include</IncludePath>
+              <IncludePath>.;..\..\..\include;applications;board;board\CubeMX_Config\Inc;board\ports\include;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Inc;..\libraries\STM32L4xx_HAL\CMSIS\Device\ST\STM32L4xx\Include;..\libraries\STM32L4xx_HAL\CMSIS\Include</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -423,9 +423,9 @@
               <FilePath>..\..\..\src\kservice.c</FilePath>
             </File>
             <File>
-              <FileName>mem.c</FileName>
+              <FileName>memheap.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\mem.c</FilePath>
+              <FilePath>..\..\..\src\memheap.c</FilePath>
             </File>
             <File>
               <FileName>mempool.c</FileName>
@@ -537,6 +537,21 @@
         <Group>
           <GroupName>DeviceDrivers</GroupName>
           <Files>
+            <File>
+              <FileName>i2c_core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\i2c_core.c</FilePath>
+            </File>
+            <File>
+              <FileName>i2c_dev.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\i2c_dev.c</FilePath>
+            </File>
+            <File>
+              <FileName>i2c-bit-ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\i2c-bit-ops.c</FilePath>
+            </File>
             <File>
               <FileName>pin.c</FileName>
               <FileType>1</FileType>
@@ -702,11 +717,6 @@
               <FileType>1</FileType>
               <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c</FilePath>
             </File>
-            <File>
-              <FileName>stm32l4xx_hal_sram.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sram.c</FilePath>
-            </File>
             <File>
               <FileName>stm32l4xx_hal_gpio.c</FileName>
               <FileType>1</FileType>
@@ -732,6 +742,16 @@
               <FileType>1</FileType>
               <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_usart_ex.c</FilePath>
             </File>
+            <File>
+              <FileName>stm32l4xx_hal_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32l4xx_hal_i2c_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</FilePath>
+            </File>
           </Files>
         </Group>
       </Groups>

bsp/stm32/stm32l4r9-st-eval/rtconfig.h

@@ -30,7 +30,8 @@
 /* Memory Management */
 
 #define RT_USING_MEMPOOL
-#define RT_USING_SMALL_MEM
+#define RT_USING_MEMHEAP
+#define RT_USING_MEMHEAP_AS_HEAP
 #define RT_USING_HEAP
 
 /* Kernel Device Object */
@@ -80,6 +81,8 @@
 #define RT_USING_SERIAL
 #define RT_SERIAL_USING_DMA
 #define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
 #define RT_USING_PIN
 
 /* Using WiFi */
@@ -96,6 +99,9 @@
 /* Socket abstraction layer */
 
 
+/* Network interface device */
+
+
 /* light weight TCP/IP stack */
 
 
@@ -113,11 +119,6 @@
 
 /* RT-Thread online packages */
 
-/* system packages */
-
-/* RT-Thread GUI Engine */
-
-
 /* IoT - internet of things */
 
 
@@ -129,6 +130,9 @@
 /* Wiced WiFi */
 
 
+/* IoT Cloud */
+
+
 /* security packages */
 
 
@@ -141,10 +145,16 @@
 /* tools packages */
 
 
+/* system packages */
+
+
+/* peripheral libraries and drivers */
+
+
 /* miscellaneous packages */
 
 
-/* example package: hello */
+/* samples: kernel and components samples */
 
 #define SOC_FAMILY_STM32
 #define SOC_SERIES_STM32L4
@@ -155,6 +165,11 @@
 
 /* Onboard Peripheral Drivers */
 
+#define BSP_USING_STLINK_TO_USART
+
+/* Enable Touch */
+
+
 /* On-chip Peripheral Drivers */
 
 #define BSP_USING_GPIO

bsp/stm32/stm32l4r9-st-eval/template.uvoptx

@@ -125,7 +125,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>ST-LINKIII-KEIL_SWO</Key>
-          <Name>-U0668FF504955857567074018 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9AIIx$CMSIS\Flash\STM32L4Rx_2048.FLM)</Name>
+          <Name>-U0668FF504955857567074018 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO31 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9AIIx$CMSIS\Flash\STM32L4Rx_2048.FLM)</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>

bsp/stm32/stm32l4r9-st-eval/template.uvprojx

@@ -49,7 +49,7 @@
             <InvalidFlash>1</InvalidFlash>
           </TargetStatus>
           <OutputDirectory>.\build\keil\Obj\</OutputDirectory>
-          <OutputName>rt-thread</OutputName>
+          <OutputName>rtthread</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
           <CreateHexFile>0</CreateHexFile>