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@@ -12,7 +12,6 @@
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* 2006-03-13 Bernard first version
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* 2006-03-13 Bernard first version
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* 2006-10-05 Alsor.Z for s3c2440 initialize
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* 2006-10-05 Alsor.Z for s3c2440 initialize
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* 2008-01-29 Yi.Qiu for QEMU emulator
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* 2008-01-29 Yi.Qiu for QEMU emulator
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- * 2010-03-15 Gary Lee Modified the structure of startcode
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*/
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*/
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#define CONFIG_STACKSIZE 512
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#define CONFIG_STACKSIZE 512
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@@ -38,10 +37,6 @@
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#define S_R1 4
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#define S_R1 4
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#define S_R0 0
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#define S_R0 0
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-#define CLK_CTL_BASE 0x4C000000 /* Gary Lee */
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-#define MDIV_405 0x7f << 12 /* Gary Lee */
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-#define PSDIV_405 0x21 /* Gary Lee */
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-
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.equ USERMODE, 0x10
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.equ USERMODE, 0x10
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.equ FIQMODE, 0x11
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.equ FIQMODE, 0x11
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.equ IRQMODE, 0x12
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.equ IRQMODE, 0x12
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@@ -180,58 +175,18 @@ _load_address:
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*************************************************************************
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*************************************************************************
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*/
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*/
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reset:
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reset:
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- bl mode_svn32
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- bl watchdog_disable
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- bl interrupt_disable
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- bl sys_clock_setup
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- bl cpu_crit_init
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- bl interrupt_vector_setup
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- bl stack_setup
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- bl bss_clear
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- /* call C++ constructors of global objects */
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- ldr r0, =__ctors_start__
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- ldr r1, =__ctors_end__
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-
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-ctor_loop:
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- cmp r0, r1
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- beq kernel_start
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- ldr r2, [r0], #4
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- stmfd sp!, {r0-r1}
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- mov lr, pc
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- bx r2
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- ldmfd sp!, {r0-r1}
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- b ctor_loop
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-
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-kernel_start:
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- /* start RT-Thread Kernel */
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- ldr pc, _rtthread_startup
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-
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-_rtthread_startup:
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- .word rtthread_startup
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-/*
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- *************************************************************************
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- * Subroutines
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- *************************************************************************
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- */
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/* set the cpu to SVC32 mode */
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/* set the cpu to SVC32 mode */
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-mode_svn32:
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mrs r0, cpsr
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mrs r0, cpsr
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bic r0, r0,#MODEMASK
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bic r0, r0,#MODEMASK
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orr r0, r0,#SVCMODE
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orr r0, r0,#SVCMODE
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msr cpsr, r0
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msr cpsr, r0
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-
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- mov pc, lr
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-
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- /* watch dog disable */
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-watchdog_disable:
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+
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+ /* watch dog disable */
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ldr r0, =WTCON
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ldr r0, =WTCON
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ldr r1, =0x0
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ldr r1, =0x0
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str r1, [r0]
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str r1, [r0]
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-
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- mov pc, lr
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-
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+
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/* mask all IRQs by clearing all bits in the INTMRs */
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/* mask all IRQs by clearing all bits in the INTMRs */
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-interrupt_disable:
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ldr r1, =INTMSK
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ldr r1, =INTMSK
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ldr r0, =0xffffffff
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ldr r0, =0xffffffff
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str r0, [r1]
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str r0, [r1]
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@@ -239,49 +194,7 @@ interrupt_disable:
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ldr r0, =0x7fff /*all sub interrupt disable */
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ldr r0, =0x7fff /*all sub interrupt disable */
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str r0, [r1]
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str r0, [r1]
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- mov pc, lr
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-
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-sys_clock_setup: /* FCLK:HCLK:PCLK = 1:4:8 */
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- ldr r0, =CLKDIVN
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- mov r1, #5
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- str r1, [r0]
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-
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- mrc p15, 0, r1, c1, c0, 0 /* switch to asynchronous mode */
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- orr r1, r1, #0xc0000000
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- mcr p15, 0, r1, c1, c0, 0
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-
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- mov r1, #CLK_CTL_BASE
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- mov r2, #MDIV_405
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- add r2, r2, #PSDIV_405
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- str r2, [r1, #0x04] /* MPLLCON Gary Lee */
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-
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- mov pc, lr
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-
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-/*==============================================================================*/
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-cpu_crit_init:
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- /* flush v4 I/D caches */
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-
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- mov r0, #0
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- mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
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- mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
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-
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- /* disable MMU stuff and caches */
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- mrc p15, 0, r0, c1, c0, 0
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- bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
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- bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
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- orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
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- orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
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- mcr p15, 0, r0, c1, c0, 0
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-
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- mov ip, lr
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-
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- bl lowlevel_init
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-
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- mov lr, ip
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- mov pc, lr
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-
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/* set interrupt vector */
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/* set interrupt vector */
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-interrupt_vector_setup:
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ldr r0, _load_address /* _load_address = 0x30000000 */
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ldr r0, _load_address /* _load_address = 0x30000000 */
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mov r1, #0x0 /* target address */
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mov r1, #0x0 /* target address */
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add r2, r0, #0x20 /* size, 32bytes */
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add r2, r0, #0x20 /* size, 32bytes */
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@@ -291,9 +204,42 @@ copy_loop:
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stmia r1!, {r3-r10} /* copy to target address [r1] */
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stmia r1!, {r3-r10} /* copy to target address [r1] */
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cmp r0, r2 /* until source end addreee [r2] */
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cmp r0, r2 /* until source end addreee [r2] */
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ble copy_loop
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ble copy_loop
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-
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- mov pc, lr
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+ bl stack_setup
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+ /* clear .bss */
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+ mov r0,#0 /* get a zero */
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+ ldr r1,=__bss_start /* bss start */
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+ ldr r2,=__bss_end /* bss end */
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+
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+bss_loop:
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+ cmp r1,r2 /* check if data to clear */
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+ strlo r0,[r1],#4 /* clear 4 bytes */
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+ blo bss_loop /* loop until done */
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+ /* call C++ constructors of global objects */
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+ ldr r0, =__ctors_start__
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+ ldr r1, =__ctors_end__
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+
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+ctor_loop:
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+ cmp r0, r1
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+ beq kernel_start
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+ ldr r2, [r0], #4
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+ stmfd sp!, {r0-r1}
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+ mov lr, pc
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+ bx r2
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+ ldmfd sp!, {r0-r1}
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+ b ctor_loop
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+
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+kernel_start:
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+ /* start RT-Thread Kernel */
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+ ldr pc, _rtthread_startup
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+
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+_rtthread_startup:
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+ .word rtthread_startup
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+/*
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+ *************************************************************************
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+ * Subroutines
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+ *************************************************************************
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+ */
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stack_setup:
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stack_setup:
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mrs r0, cpsr
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mrs r0, cpsr
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bic r0, r0, #MODEMASK
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bic r0, r0, #MODEMASK
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@@ -322,19 +268,6 @@ stack_setup:
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/* USER mode is not initialized. */
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/* USER mode is not initialized. */
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mov pc,lr /* The LR register may be not valid for the mode changes.*/
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mov pc,lr /* The LR register may be not valid for the mode changes.*/
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-
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- /* clear .bss */
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-bss_clear:
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- mov r0,#0 /* get a zero */
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- ldr r1,=__bss_start /* bss start */
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- ldr r2,=__bss_end /* bss end */
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-
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-bss_loop:
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- cmp r1,r2 /* check if data to clear */
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- strlo r0,[r1],#4 /* clear 4 bytes */
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- blo bss_loop /* loop until done */
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-
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- mov pc, lr
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/*
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/*
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*************************************************************************
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*************************************************************************
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