Merge pull request #5044 from BernardXiong/libc_pr

[libc] remove rtlibc

bsp/gd32vf103v-eval/board/board.c

@@ -8,7 +8,7 @@
  * 2019-07-23     tyustli      first version
  *
  */
-
+#include <stddef.h>
 #include <rtthread.h>
 #include <rtdevice.h>
 #include "board.h"

bsp/gd32vf103v-eval/libraries/SConscript

@@ -8,7 +8,6 @@ cwd = GetCurrentDir()
 
 src = Glob('GD32VF103_standard_peripheral/Source/*.c')
 src += Glob('n22/env_Eclipse/*.c')
-src += Glob('n22/stubs/*.c')
 src += ['GD32VF103_standard_peripheral/system_gd32vf103.c',
         'n22/drivers/n22_func.c',
         'n22/env_Eclipse/start.S',

bsp/lpc1114/driver/drv_uart.c

@@ -8,7 +8,7 @@
  * 2013-05-18     Bernard      The first version for LPC40xx
  * 2019-05-05     jg1uaa       port to LPC1114
  */
-
+#include <stddef.h>
 #include <rtthread.h>
 #include <rtdevice.h>
 #include <rthw.h>

bsp/mini2440/drivers/uart.c

@@ -1,29 +1,32 @@
 /*
- * File      : uart.c
- * Drivers for s3c2440 uarts.
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
  * Change Logs:
  * Date           Author       Notes
  * 2020-04-09     Jonne        Code refactoring for new bsp
  */
 
+#include <stddef.h>
 #include <rthw.h>
 #include <rtdevice.h>
 #include <board.h>
 
-#define ULCON_OFS				0x00
-#define UCON_OFS				0x04
-#define UFCON_OFS				0x08
-#define UMCON_OFS				0x0c
-#define UTRSTAT_OFS				0x10
-#define UERSTAT_OFS				0x14
-#define UFSTAT_OFS				0x18
-#define UMSTAT_OFS				0x1c
-#define UTXH_OFS				0x20
-#define URXH_OFS				0x24
-#define UBRDIV_OFS				0x28
+#define ULCON_OFS               0x00
+#define UCON_OFS                0x04
+#define UFCON_OFS               0x08
+#define UMCON_OFS               0x0c
+#define UTRSTAT_OFS             0x10
+#define UERSTAT_OFS             0x14
+#define UFSTAT_OFS              0x18
+#define UMSTAT_OFS              0x1c
+#define UTXH_OFS                0x20
+#define URXH_OFS                0x24
+#define UBRDIV_OFS              0x28
 
 #define readl(addr)             (*(volatile unsigned long *)(addr))
-#define writel(addr, value)     (*(volatile unsigned long *)(addr) = value)  
+#define writel(addr, value)     (*(volatile unsigned long *)(addr) = value)
 
 #define PCLK_HZ                 50000000
 
@@ -33,9 +36,9 @@ struct hw_uart_device
     rt_uint32_t irqno;
 };
 
-static rt_err_t s3c2440_serial_configure(struct rt_serial_device *serial, struct serial_configure *cfg) 
+static rt_err_t s3c2440_serial_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
-    struct hw_uart_device* uart = serial->parent.user_data;
+    struct hw_uart_device *uart = serial->parent.user_data;
 
     writel(uart->hw_base + UBRDIV_OFS, PCLK_HZ / (cfg->baud_rate * 16));
 
@@ -44,22 +47,22 @@ static rt_err_t s3c2440_serial_configure(struct rt_serial_device *serial, struct
     writel(uart->hw_base + UFCON_OFS, 0x00);
     writel(uart->hw_base + UMCON_OFS, 0x00);
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
 static rt_err_t s3c2440_serial_control(struct rt_serial_device *serial, int cmd, void *arg)
 {
-	struct hw_uart_device *uart;
+    struct hw_uart_device *uart;
     int mask;
 
-    RT_ASSERT(serial != RT_NULL); 
+    RT_ASSERT(serial != RT_NULL);
     uart = (struct hw_uart_device *)serial->parent.user_data;
 
-    if(uart->irqno == INTUART0)
+    if (uart->irqno == INTUART0)
     {
         mask = BIT_SUB_RXD0;
     }
-    else if(uart->irqno == INTUART1)
+    else if (uart->irqno == INTUART1)
     {
         mask = BIT_SUB_RXD1;
     }
@@ -73,7 +76,7 @@ static rt_err_t s3c2440_serial_control(struct rt_serial_device *serial, int cmd,
     case RT_DEVICE_CTRL_CLR_INT:
         /* disable rx irq */
         INTSUBMSK |= mask;
-		
+
         break;
 
     case RT_DEVICE_CTRL_SET_INT:
@@ -86,28 +89,28 @@ static rt_err_t s3c2440_serial_control(struct rt_serial_device *serial, int cmd,
 }
 static int s3c2440_putc(struct rt_serial_device *serial, char c)
 {
-    struct hw_uart_device* uart = serial->parent.user_data;
+    struct hw_uart_device *uart = serial->parent.user_data;
 
-    while(!(readl(uart->hw_base + UTRSTAT_OFS) & (1<<2))) 
+    while (!(readl(uart->hw_base + UTRSTAT_OFS) & (1 << 2)))
     {
     }
 
     writel(uart->hw_base + UTXH_OFS, c);
-    
+
     return 0;
 
-     
+
 }
 static int s3c2440_getc(struct rt_serial_device *serial)
 {
-    struct hw_uart_device* uart = serial->parent.user_data;
+    struct hw_uart_device *uart = serial->parent.user_data;
     int ch = -1;
 
-    if(readl(uart->hw_base + UTRSTAT_OFS) & (1<<0)) 
+    if (readl(uart->hw_base + UTRSTAT_OFS) & (1 << 0))
     {
         ch = readl(uart->hw_base + URXH_OFS) & 0x000000FF;
     }
-    
+
     return ch;
 }
 
@@ -116,61 +119,68 @@ static void rt_hw_uart_isr(int irqno, void *param)
     struct rt_serial_device *serial = (struct rt_serial_device *)param;
 
     rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
-    
-    /*clear SUBSRCPND*/ 
-    if(irqno == INTUART0) 
+
+    /*clear SUBSRCPND*/
+    if (irqno == INTUART0)
     {
         SUBSRCPND = BIT_SUB_RXD0;
-    } 
-    else if(irqno == INTUART1) 
+    }
+    else if (irqno == INTUART1)
     {
         SUBSRCPND = BIT_SUB_RXD1;
     }
-    else 
+    else
     {
         SUBSRCPND = BIT_SUB_RXD2;
     }
 }
 
-static struct rt_uart_ops s3c2440_uart_ops = {
-		.configure = s3c2440_serial_configure,
-		.control = s3c2440_serial_control,
-		.putc = s3c2440_putc,
-		.getc = s3c2440_getc
+static struct rt_uart_ops s3c2440_uart_ops =
+{
+    .configure = s3c2440_serial_configure,
+    .control = s3c2440_serial_control,
+    .putc = s3c2440_putc,
+    .getc = s3c2440_getc
 };
 
 
-static struct rt_serial_device _serial0 = {
-	.ops = &s3c2440_uart_ops,
-	.config = RT_SERIAL_CONFIG_DEFAULT,
-	.serial_rx = NULL,
-	.serial_tx = NULL
+static struct rt_serial_device _serial0 =
+{
+    .ops = &s3c2440_uart_ops,
+    .config = RT_SERIAL_CONFIG_DEFAULT,
+    .serial_rx = NULL,
+    .serial_tx = NULL
 };
-static struct hw_uart_device _hwserial0 = {
-	.hw_base = 0x50000000,
-	.irqno = INTUART0
+static struct hw_uart_device _hwserial0 =
+{
+    .hw_base = 0x50000000,
+    .irqno = INTUART0
 };
 
-static struct rt_serial_device _serial1 = {
-	.ops = &s3c2440_uart_ops,
-	.config = RT_SERIAL_CONFIG_DEFAULT,
-	.serial_rx = NULL,
-	.serial_tx = NULL
+static struct rt_serial_device _serial1 =
+{
+    .ops = &s3c2440_uart_ops,
+    .config = RT_SERIAL_CONFIG_DEFAULT,
+    .serial_rx = NULL,
+    .serial_tx = NULL
 };
-static struct hw_uart_device _hwserial1 = {
-	.hw_base = 0x50004000,
-	.irqno = INTUART1
+static struct hw_uart_device _hwserial1 =
+{
+    .hw_base = 0x50004000,
+    .irqno = INTUART1
 };
 
-static struct rt_serial_device _serial2 = {
-	.ops = &s3c2440_uart_ops,
-	.config = RT_SERIAL_CONFIG_DEFAULT,
-	.serial_rx = NULL,
-	.serial_tx = NULL
+static struct rt_serial_device _serial2 =
+{
+    .ops = &s3c2440_uart_ops,
+    .config = RT_SERIAL_CONFIG_DEFAULT,
+    .serial_rx = NULL,
+    .serial_tx = NULL
 };
-static struct hw_uart_device _hwserial2 = {
-	.hw_base = 0x50008000,
-	.irqno = INTUART2
+static struct hw_uart_device _hwserial2 =
+{
+    .hw_base = 0x50008000,
+    .irqno = INTUART2
 };
 
 
@@ -185,7 +195,7 @@ int rt_hw_uart_init(void)
     rt_hw_serial_register(&_serial0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &_hwserial0);
     rt_hw_interrupt_install(_hwserial0.irqno, rt_hw_uart_isr, &_serial0, "uart0");
     rt_hw_interrupt_umask(INTUART0);
-	
+
     /* register UART1 device */
     rt_hw_serial_register(&_serial1, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, &_hwserial1);
     rt_hw_interrupt_install(_hwserial1.irqno, rt_hw_uart_isr, &_serial1, "uart1");
@@ -198,5 +208,5 @@ int rt_hw_uart_init(void)
 
     return RT_EOK;
 }
-
 INIT_BOARD_EXPORT(rt_hw_uart_init);
+

bsp/qemu-riscv-virt64/driver/plic.c

@@ -7,7 +7,8 @@
  * Date           Author       Notes
  * 2021-05-20     bigmagic     first version
  */
-#include "rtthread.h"
+#include <rtthread.h>
+#include <stdint.h>
 #include "plic.h"
 #include <riscv_io.h>
 #include "encoding.h"

bsp/qemu-riscv-virt64/driver/sbi.c

@@ -72,8 +72,8 @@ sbi_get_impl_version(void)
 void
 sbi_print_version(void)
 {
-    u_int major;
-    u_int minor;
+    int major;
+    int minor;
 
     /* For legacy SBI implementations. */
     if (sbi_spec_version == 0)

bsp/qemu-riscv-virt64/driver/sbi.h

@@ -48,6 +48,7 @@
 #ifndef _MACHINE_SBI_H_
 #define _MACHINE_SBI_H_
 
+#include <stdint.h>
 #include <rtdef.h>
 
 /* SBI Specification Version */

bsp/raspberry-pi/raspi4-32/driver/drv_eth.c

@@ -9,9 +9,12 @@
  * 2020-10-30     bigmagic       first version
  */
 
-#include <rthw.h>
 #include <stdint.h>
+
+#include <rthw.h>
 #include <rtthread.h>
+#include "board.h"
+
 #include <lwip/sys.h>
 #include <netif/ethernetif.h>
 
@@ -72,12 +75,12 @@ static struct rt_semaphore link_ack;
 
 static inline rt_uint32_t read32(void *addr)
 {
-    return (*((volatile unsigned int*)(addr)));
+    return (*((volatile unsigned int *)(addr)));
 }
 
 static inline void write32(void *addr, rt_uint32_t value)
 {
-    (*((volatile unsigned int*)(addr))) = value;
+    (*((volatile unsigned int *)(addr))) = value;
 }
 
 static void eth_rx_irq(int irq, void *param)
@@ -380,7 +383,7 @@ static int bcmgenet_gmac_eth_start(void)
 
     /* Update MAC registers based on PHY property */
     ret = bcmgenet_adjust_link();
-    if(ret)
+    if (ret)
     {
         rt_kprintf("bcmgenet: adjust PHY link failed: %d\n", ret);
         return ret;
@@ -416,10 +419,10 @@ static rt_uint32_t prev_recv_cnt = 0;
 static rt_uint32_t cur_recv_cnt = 0;
 static rt_uint32_t bcmgenet_gmac_eth_recv(rt_uint8_t **packetp)
 {
-    void* desc_base;
+    void *desc_base;
     rt_uint32_t length = 0, addr = 0;
     rt_uint32_t prod_index = read32(MAC_REG + RDMA_PROD_INDEX);
-    if(prod_index == index_flag)
+    if (prod_index == index_flag)
     {
         cur_recv_cnt = index_flag;
         index_flag = 0x7fffffff;
@@ -428,7 +431,7 @@ static rt_uint32_t bcmgenet_gmac_eth_recv(rt_uint8_t **packetp)
     }
     else
     {
-        if(prev_recv_cnt == prod_index & 0xffff)
+        if (prev_recv_cnt == (prod_index & 0xffff))
         {
             return 0;
         }
@@ -437,15 +440,16 @@ static rt_uint32_t bcmgenet_gmac_eth_recv(rt_uint8_t **packetp)
         length = read32(desc_base + DMA_DESC_LENGTH_STATUS);
         length = (length >> DMA_BUFLENGTH_SHIFT) & DMA_BUFLENGTH_MASK;
         addr = read32(desc_base + DMA_DESC_ADDRESS_LO);
+
         /* To cater for the IP headepr alignment the hardware does.
-        * This would actually not be needed if we don't program
-        * RBUF_ALIGN_2B
-        */
-        rt_hw_cpu_dcache_invalidate(addr,length);
+            * This would actually not be needed if we don't program
+            * RBUF_ALIGN_2B
+            */
+        rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, (void *) addr, length);
         *packetp = (rt_uint8_t *)(addr + RX_BUF_OFFSET);
 
         rx_index = rx_index + 1;
-        if(rx_index >= RX_DESCS)
+        if (rx_index >= RX_DESCS)
         {
             rx_index = 0;
         }
@@ -453,7 +457,7 @@ static rt_uint32_t bcmgenet_gmac_eth_recv(rt_uint8_t **packetp)
 
         cur_recv_cnt = cur_recv_cnt + 1;
 
-        if(cur_recv_cnt > 0xffff)
+        if (cur_recv_cnt > 0xffff)
         {
             cur_recv_cnt = 0;
         }
@@ -468,16 +472,16 @@ static int bcmgenet_gmac_eth_send(void *packet, int length)
     void *desc_base = (TX_DESC_BASE + tx_index * DMA_DESC_SIZE);
     rt_uint32_t len_stat = length << DMA_BUFLENGTH_SHIFT;
 
-    rt_uint32_t prod_index, cons;
-    rt_uint32_t tries = 100;
+    rt_uint32_t prod_index;
 
     prod_index = read32(MAC_REG + TDMA_PROD_INDEX);
 
     len_stat |= 0x3F << DMA_TX_QTAG_SHIFT;
     len_stat |= DMA_TX_APPEND_CRC | DMA_SOP | DMA_EOP;
 
-    rt_hw_cpu_dcache_clean((void*)packet, length);
-    write32((desc_base + DMA_DESC_ADDRESS_LO), packet);
+    rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, (void *)packet, length);
+
+    write32((desc_base + DMA_DESC_ADDRESS_LO), (rt_uint32_t)packet);
     write32((desc_base + DMA_DESC_ADDRESS_HI), 0);
     write32((desc_base + DMA_DESC_LENGTH_STATUS), len_stat);
 
@@ -631,7 +635,7 @@ struct pbuf *rt_eth_rx(rt_device_t device)
         if (recv_len > 0)
         {
             pbuf = pbuf_alloc(PBUF_LINK, recv_len, PBUF_RAM);
-            if(pbuf)
+            if (pbuf)
             {
                 rt_memcpy(pbuf->payload, addr_point, recv_len);
             }

bsp/raspberry-pi/raspi4-32/driver/mbox.h

@@ -12,6 +12,7 @@
 #define __MBOX_H__
 
 #include <rtthread.h>
+#include "board.h"
 
 //https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
 //https://github.com/hermanhermitage/videocoreiv

bsp/tm4c123bsp/libraries/Drivers/drv_pwm.h

@@ -11,6 +11,7 @@
 #ifndef __DRV_PWM_H__
 #define __DRV_PWM_H__
 
+#include <stdint.h>
 #include<rtdevice.h>
 #include<rthw.h>
 

bsp/tm4c123bsp/libraries/Drivers/drv_spi.h

@@ -11,6 +11,7 @@
 #ifndef __DRV_SPI_H__
 #define __DRV_SPI_H__
 
+#include <stdint.h>
 #include <rtdevice.h>
 #include <rthw.h>
 #include "drivers/spi.h"

components/dfs/include/dfs.h

@@ -16,6 +16,8 @@
 #include <stdlib.h>
 #include <string.h>
 #include <dirent.h>
+#include <fcntl.h>
+#include <sys/stat.h>
 #include <sys/time.h>
 #include <rtdevice.h>
 

components/dfs/include/dfs_posix.h

@@ -16,22 +16,15 @@
 #define __DFS_POSIX_H__
 
 #include <dfs_file.h>
+#include <sys/stat.h>
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
-/* directory api*/
-int mkdir(const char *path, mode_t mode);
-DIR *opendir(const char *name);
-struct dirent *readdir(DIR *d);
-long telldir(DIR *d);
-void seekdir(DIR *d, off_t offset);
-void rewinddir(DIR *d);
-int closedir(DIR *d);
 
 /* file api*/
-int open(const char *file, int flags, ...);
+
 int close(int d);
 
 #if defined(RT_USING_NEWLIB) && defined(_EXFUN)
@@ -45,11 +38,7 @@ int write(int fd, const void *buf, size_t len);
 off_t lseek(int fd, off_t offset, int whence);
 int rename(const char *from, const char *to);
 int unlink(const char *pathname);
-int stat(const char *file, struct stat *buf);
-int fstat(int fildes, struct stat *buf);
 int fsync(int fildes);
-int fcntl(int fildes, int cmd, ...);
-int ioctl(int fildes, int cmd, ...);
 int ftruncate(int fd, off_t length);
 
 /* directory api*/
@@ -62,7 +51,6 @@ int statfs(const char *path, struct statfs *buf);
 
 int access(const char *path, int amode);
 int pipe(int fildes[2]);
-int mkfifo(const char *path, mode_t mode);
 
 #ifdef __cplusplus
 }

components/drivers/include/drivers/cputime.h

@@ -11,6 +11,8 @@
 #ifndef CPUTIME_H__
 #define CPUTIME_H__
 
+#include <stdint.h>
+
 struct rt_clock_cputime_ops
 {
     float    (*cputime_getres) (void);

components/drivers/include/drivers/pm.h

@@ -15,6 +15,7 @@
 #ifndef __PM_H__
 #define __PM_H__
 
+#include <stdint.h>
 #include <rtthread.h>
 
 #ifndef PM_HAS_CUSTOM_CONFIG

components/drivers/phy/phy.c

@@ -8,7 +8,7 @@
  * Date           Author        Notes
  * 2020-09-27     wangqiang     first version
  */
-
+#include <stddef.h>
 #include <rthw.h>
 #include <rtthread.h>
 #include <rtdevice.h>

components/drivers/rtc/rtc.c

@@ -223,7 +223,7 @@ rt_err_t set_time(rt_uint32_t hour, rt_uint32_t minute, rt_uint32_t second)
 /**
  * get date and time or set (local timezone) [year month day hour min sec]
  */
-static void date(uint8_t argc, char **argv)
+static void date(int argc, char **argv)
 {
     if (argc == 1)
     {
@@ -235,8 +235,9 @@ static void date(uint8_t argc, char **argv)
     else if (argc >= 7)
     {
         /* set time and date */
-        uint16_t year;
-        uint8_t month, day, hour, min, sec;
+        rt_uint16_t year;
+        rt_uint8_t month, day, hour, min, sec;
+
         year = atoi(argv[1]);
         month = atoi(argv[2]);
         day = atoi(argv[3]);

include/libc/libc_fcntl.h → components/libc/compilers/common/fcntl.h

@@ -5,44 +5,17 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2018-02-07     Bernard      Add O_DIRECTORY definition in NEWLIB mode.
- * 2018-02-09     Bernard      Add O_BINARY definition
+ * 2021-09-02     Meco Man     First version
  */
+#ifndef __FCNTL_H__
+#define __FCNTL_H__
 
-#ifndef LIBC_FCNTL_H__
-#define LIBC_FCNTL_H__
-
-#if defined(RT_USING_NEWLIB) || defined(_WIN32) || (defined( __GNUC__ ) && !defined(__ARMCC_VERSION))
-#include <fcntl.h>
-
-#ifndef O_NONBLOCK
-#define O_NONBLOCK   0x4000
-#endif
+#include <sys/types.h>
 
 #if defined(_WIN32)
 #define O_ACCMODE   (_O_RDONLY | _O_WRONLY | _O_RDWR)
 #endif
 
-#ifndef F_GETFL
-#define F_GETFL  3
-#endif
-#ifndef F_SETFL
-#define F_SETFL  4
-#endif
-
-#ifndef O_DIRECTORY
-#define O_DIRECTORY 0x200000
-#endif
-
-#ifndef O_BINARY
-#ifdef  _O_BINARY
-#define O_BINARY _O_BINARY
-#else
-#define O_BINARY         0
-#endif
-#endif
-
-#else
 #define O_RDONLY         00
 #define O_WRONLY         01
 #define O_RDWR           02
@@ -60,7 +33,6 @@
 #define O_DIRECTORY 0200000
 #define O_NOFOLLOW  0400000
 #define O_CLOEXEC  02000000
-
 #define O_ASYNC      020000
 #define O_DIRECT     040000
 #define O_LARGEFILE 0100000
@@ -68,7 +40,6 @@
 #define O_PATH    010000000
 #define O_TMPFILE 020200000
 #define O_NDELAY O_NONBLOCK
-
 #define O_SEARCH  O_PATH
 #define O_EXEC    O_PATH
 
@@ -93,6 +64,9 @@
 #define F_GETOWN_EX 16
 
 #define F_GETOWNER_UIDS 17
-#endif
+
+int open(const char *file, int flags, ...);
+int fcntl(int fildes, int cmd, ...);
+int creat(const char *, mode_t);
 
 #endif

components/libc/compilers/common/none-gcc/fcntl.h

@@ -1,18 +0,0 @@
-/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- */
-#ifndef FCNTL_H__
-#define FCNTL_H__
-
-#include <rtconfig.h>
-
-#ifdef RT_USING_DFS
-#include <dfs_posix.h>
-#endif
-
-#endif

components/libc/compilers/common/none-gcc/sys/stat.h

@@ -5,9 +5,79 @@
  *
  * Change Logs:
  * Date           Author       Notes
+ * 2021-09-02     Meco Man     First version
  */
 
- #ifndef __SYS_STAT_H__
- #define __SYS_STAT_H__
+#ifndef __SYS_STAT_H__
+#define __SYS_STAT_H__
 
- #endif
+#include <sys/types.h>
+#include <sys/time.h>
+
+#define S_IFMT               00170000
+#define S_IFSOCK             0140000
+#define S_IFLNK              0120000
+#define S_IFREG              0100000
+#define S_IFBLK              0060000
+#define S_IFDIR              0040000
+#define S_IFCHR              0020000
+#define S_IFIFO              0010000
+#define S_ISUID              0004000
+#define S_ISGID              0002000
+#define S_ISVTX              0001000
+
+#define S_ISLNK(m)           (((m) & S_IFMT) == S_IFLNK)
+#define S_ISREG(m)           (((m) & S_IFMT) == S_IFREG)
+#define S_ISDIR(m)           (((m) & S_IFMT) == S_IFDIR)
+#define S_ISCHR(m)           (((m) & S_IFMT) == S_IFCHR)
+#define S_ISBLK(m)           (((m) & S_IFMT) == S_IFBLK)
+#define S_ISFIFO(m)          (((m) & S_IFMT) == S_IFIFO)
+#define S_ISSOCK(m)          (((m) & S_IFMT) == S_IFSOCK)
+
+#define S_IRWXU              00700
+#define S_IRUSR              00400
+#define S_IWUSR              00200
+#define S_IXUSR              00100
+
+#define S_IRWXG              00070
+#define S_IRGRP              00040
+#define S_IWGRP              00020
+#define S_IXGRP              00010
+
+#define S_IRWXO              00007
+#define S_IROTH              00004
+#define S_IWOTH              00002
+#define S_IXOTH              00001
+
+struct stat
+{
+    struct rt_device *st_dev;
+    uint16_t  st_ino;
+    uint16_t  st_mode;
+    uint16_t  st_nlink;
+    uint16_t  st_uid;
+    uint16_t  st_gid;
+    struct rt_device *st_rdev;
+    uint32_t  st_size;
+    time_t    st_atime;
+    long      st_spare1;
+    time_t    st_mtime;
+    long      st_spare2;
+    time_t    st_ctime;
+    long      st_spare3;
+    uint32_t  st_blksize;
+    uint32_t  st_blocks;
+    long      st_spare4[2];
+};
+
+int    chmod(const char *, mode_t);
+int    fchmod(int, mode_t);
+int    fstat(int, struct stat *);
+int    lstat(const char *, struct stat *);
+int    mkdir(const char *, mode_t);
+int    mkfifo(const char *, mode_t);
+int    mknod(const char *, mode_t, dev_t);
+int    stat(const char *, struct stat *);
+mode_t umask(mode_t);
+
+#endif

components/libc/compilers/common/sys/ioctl.h

@@ -235,4 +235,6 @@ struct winsize {
 #define SIOCDEVPRIVATE      0x89F0
 #define SIOCPROTOPRIVATE    0x89E0
 
+int ioctl(int fildes, int cmd, ...);
+
 #endif

components/libc/compilers/dlib/libc.c

@@ -9,7 +9,7 @@
  */
 #include <stdio.h>
 #include <stdlib.h>
-
+#include <fcntl.h>
 #include <rtthread.h>
 
 #include "libc.h"

components/libc/compilers/newlib/stdio.c

@@ -9,7 +9,7 @@
  */
 #include <stdio.h>
 #include <stdlib.h>
-
+#include <fcntl.h>
 #include <rtthread.h>
 #include "libc.h"
 

components/libc/libdl/dlelf.h

@@ -4,9 +4,9 @@
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
- * Date           Author      Notes
- * 2018/08/29     Bernard     first version
- * 2021/04/23     chunyexixiaoyu    distinguish 32-bit and 64-bit
+ * Date           Author          Notes
+ * 2018/08/29     Bernard         first version
+ * 2021/04/23     chunyexixiaoyu  distinguish 32-bit and 64-bit
  */
 
 #ifndef DL_ELF_H__
@@ -20,20 +20,15 @@ typedef rt_int32_t              Elf32_Sword;   /* Signed large integer */
 typedef rt_uint32_t             Elf32_Word;    /* Unsigned large integer */
 typedef rt_uint16_t             Elf32_Half;    /* Unsigned medium integer */
 
-typedef rt_uint64_t	            Elf64_Addr;
-typedef rt_uint16_t	            Elf64_Half;
-typedef rt_int16_t	            Elf64_SHalf;
-typedef rt_uint64_t	            Elf64_Off;
-typedef rt_int32_t	            Elf64_Sword;
-typedef rt_uint32_t	            Elf64_Word;
-typedef rt_uint64_t	            Elf64_Xword;
-typedef rt_int64_t	            Elf64_Sxword;
-typedef uint16_t                Elf64_Section;
-
-
-
-
-
+typedef rt_uint64_t             Elf64_Addr;
+typedef rt_uint16_t             Elf64_Half;
+typedef rt_int16_t              Elf64_SHalf;
+typedef rt_uint64_t             Elf64_Off;
+typedef rt_int32_t              Elf64_Sword;
+typedef rt_uint32_t             Elf64_Word;
+typedef rt_uint64_t             Elf64_Xword;
+typedef rt_int64_t              Elf64_Sxword;
+typedef rt_uint16_t             Elf64_Section;
 
 /* e_ident[] magic number */
 #define ELFMAG0                 0x7f           /* e_ident[EI_MAG0] */
@@ -91,24 +86,24 @@ typedef struct elfhdr
                                                   header string table" entry offset */
 } Elf32_Ehdr;
 
-
-typedef struct elf64_hdr {
-  unsigned char     e_ident[EI_NIDENT];        /* ELF Identification */ 
-  Elf64_Half        e_type;                    /* object file type */
-  Elf64_Half        e_machine;                 /* machine */
-  Elf64_Word        e_version;                 /* object file version */
-  Elf64_Addr        e_entry;                   /* virtual entry point */ 
-  Elf64_Off         e_phoff;                   /* program header table offset */ 
-  Elf64_Off         e_shoff;                   /* section header table offset */ 
-  Elf64_Word        e_flags;                   /* processor-specific flags */
-  Elf64_Half        e_ehsize;                  /* ELF header size */
-  Elf64_Half        e_phentsize;               /* program header entry size */
-  Elf64_Half        e_phnum;                   /* number of program header entries */
-  Elf64_Half        e_shentsize;               /* section header entry size */
-  Elf64_Half        e_shnum;                   /* number of section header entries */
-  Elf64_Half        e_shstrndx;                /* section header table's "section
+typedef struct elf64_hdr
+{
+    unsigned char     e_ident[EI_NIDENT];        /* ELF Identification */
+    Elf64_Half        e_type;                    /* object file type */
+    Elf64_Half        e_machine;                 /* machine */
+    Elf64_Word        e_version;                 /* object file version */
+    Elf64_Addr        e_entry;                   /* virtual entry point */
+    Elf64_Off         e_phoff;                   /* program header table offset */
+    Elf64_Off         e_shoff;                   /* section header table offset */
+    Elf64_Word        e_flags;                   /* processor-specific flags */
+    Elf64_Half        e_ehsize;                  /* ELF header size */
+    Elf64_Half        e_phentsize;               /* program header entry size */
+    Elf64_Half        e_phnum;                   /* number of program header entries */
+    Elf64_Half        e_shentsize;               /* section header entry size */
+    Elf64_Half        e_shnum;                   /* number of section header entries */
+    Elf64_Half        e_shstrndx;                /* section header table's "section
                                                 header string table" entry offset */
-} Elf64_Ehdr;                                   
+} Elf64_Ehdr;
 
 /* Section Header */
 typedef struct
@@ -128,19 +123,18 @@ typedef struct
 
 typedef struct
 {
-  Elf64_Word        sh_name;                   /* Section name (string tbl index) */
-  Elf64_Word        sh_type;                   /* Section type */
-  Elf64_Xword       sh_flags;                  /* Section flags */
-  Elf64_Addr        sh_addr;                   /* Section virtual addr at execution */
-  Elf64_Off         sh_offset;                 /* Section file offset */
-  Elf64_Xword       sh_size;                   /* Section size in bytes */
-  Elf64_Word        sh_link;                   /* Link to another section */
-  Elf64_Word        sh_info;                   /* Additional section information */
-  Elf64_Xword       sh_addralign;              /* Section alignment */
-  Elf64_Xword       sh_entsize;                /* Entry size if section holds table */
+    Elf64_Word        sh_name;                   /* Section name (string tbl index) */
+    Elf64_Word        sh_type;                   /* Section type */
+    Elf64_Xword       sh_flags;                  /* Section flags */
+    Elf64_Addr        sh_addr;                   /* Section virtual addr at execution */
+    Elf64_Off         sh_offset;                 /* Section file offset */
+    Elf64_Xword       sh_size;                   /* Section size in bytes */
+    Elf64_Word        sh_link;                   /* Link to another section */
+    Elf64_Word        sh_info;                   /* Additional section information */
+    Elf64_Xword       sh_addralign;              /* Section alignment */
+    Elf64_Xword       sh_entsize;                /* Entry size if section holds table */
 } Elf64_Shdr;
 
-
 /* Section names */
 #define ELF_BSS                 ".bss"         /* uninitialized data */
 #define ELF_DATA                ".data"        /* initialized data */
@@ -176,19 +170,16 @@ typedef struct elf32_sym
     Elf32_Half    st_shndx;                    /* section header index */
 } Elf32_Sym;
 
-
 typedef struct
 {
-  Elf64_Word        st_name;                   /* Symbol name (string tbl index) */
-  unsigned char     st_info;                   /* Symbol type and binding */
-  unsigned char     st_other;                  /* Symbol visibility */
-  Elf64_Section     st_shndx;                  /* Section index */
-  Elf64_Addr        st_value;                  /* Symbol value */
-  Elf64_Xword       st_size;                   /* Symbol size */
+    Elf64_Word        st_name;                   /* Symbol name (string tbl index) */
+    unsigned char     st_info;                   /* Symbol type and binding */
+    unsigned char     st_other;                  /* Symbol visibility */
+    Elf64_Section     st_shndx;                  /* Section index */
+    Elf64_Addr        st_value;                  /* Symbol value */
+    Elf64_Xword       st_size;                   /* Symbol size */
 } Elf64_Sym;
 
-
-
 #define STB_LOCAL               0              /* BIND */
 #define STB_GLOBAL              1
 #define STB_WEAK                2
@@ -249,8 +240,6 @@ typedef struct
 #define ELF32_R_TYPE(i)         ((unsigned char) (i))
 #define ELF32_R_INFO(s,t)       (((s) << 8) + (unsigned char)(t))
 
-
-
 #define ELF64_R_SYM(i)                        ((i) >> 32)
 #define ELF64_R_TYPE(i)                        ((i) & 0xffffffff)
 #define ELF64_R_INFO(sym,type)                ((((Elf64_Xword) (sym)) << 32) + (type))
@@ -301,7 +290,6 @@ typedef struct
     Elf32_Word p_align;                        /* memory alignment */
 } Elf32_Phdr;
 
-
 typedef struct
 {
     Elf64_Word   p_type;                       /* Segment type */
@@ -314,10 +302,6 @@ typedef struct
     Elf64_Xword  p_align;                      /* Segment alignment */
 } Elf64_Phdr;
 
-
-
-
-
 /* p_type */
 #define PT_NULL                 0
 #define PT_LOAD                 1
@@ -389,10 +373,9 @@ typedef Elf64_Sym       Elf_Sym;
 typedef Elf64_Rela      Elf_Rel;
 typedef Elf64_Addr      Elf_Addr;
 #endif
-int dlmodule_relocate(struct rt_dlmodule *module, Elf_Rel *rel, Elf_Addr sym_val);
-rt_err_t dlmodule_load_shared_object(struct rt_dlmodule* module, void *module_ptr);
-rt_err_t dlmodule_load_relocated_object(struct rt_dlmodule* module, void *module_ptr);
-
 
+int dlmodule_relocate(struct rt_dlmodule *module, Elf_Rel *rel, Elf_Addr sym_val);
+rt_err_t dlmodule_load_shared_object(struct rt_dlmodule *module, void *module_ptr);
+rt_err_t dlmodule_load_relocated_object(struct rt_dlmodule *module, void *module_ptr);
 
 #endif

components/net/lwip-1.4.1/src/lwipopts.h

@@ -533,6 +533,7 @@
 #ifndef LWIP_SOCKET
 #define LWIP_SOCKET                     1
 #endif
+#include <fcntl.h>
 
 /*
  * LWIP_COMPAT_SOCKETS==1: Enable BSD-style sockets functions names.

components/net/lwip-2.0.2/src/lwipopts.h

@@ -572,6 +572,7 @@
 #ifndef LWIP_SOCKET
 #define LWIP_SOCKET                     1
 #endif
+#include <fcntl.h>
 
 /*
  * LWIP_COMPAT_SOCKETS==1: Enable BSD-style sockets functions names.

components/net/lwip-2.0.3/src/lwipopts.h

@@ -572,6 +572,7 @@
 #ifndef LWIP_SOCKET
 #define LWIP_SOCKET                     1
 #endif
+#include <fcntl.h>
 
 /*
  * LWIP_COMPAT_SOCKETS==1: Enable BSD-style sockets functions names.

components/net/lwip-2.1.2/src/lwipopts.h

@@ -579,6 +579,7 @@
 #ifndef LWIP_SOCKET
 #define LWIP_SOCKET                     1
 #endif
+#include <fcntl.h>
 
 /*
  * LWIP_COMPAT_SOCKETS==1: Enable BSD-style sockets functions names.

components/net/netdev/src/netdev.c

@@ -10,6 +10,7 @@
 
 #include <stdio.h>
 #include <string.h>
+#include <stdlib.h>
 
 #include <rtthread.h>
 #include <rthw.h>

components/net/netdev/src/netdev_ipaddr.c

@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2018-05-18     ChenYong     First version
  */
-
+#include <stdlib.h>
 #include <rtthread.h>
 #include <netdev_ipaddr.h>
 

components/net/sal_socket/socket/net_netdb.c

@@ -9,6 +9,7 @@
  * 2108-05-24     ChenYong     Add socket abstraction layer
  */
 
+#include <stddef.h>
 #include <rtthread.h>
 
 #include <netdb.h>

components/utilities/utest/utest_assert.h

@@ -50,8 +50,8 @@ void utest_assert_buf(const char *a, const char *b, rt_size_t sz, rt_bool_t equa
 */
 #define uassert_true(value)      __utest_assert(value, "(" #value ") is false")
 #define uassert_false(value)     __utest_assert(!(value), "(" #value ") is true")
-#define uassert_null(value)      __utest_assert((const char *)(value) == NULL, "(" #value ") is not null")
-#define uassert_not_null(value)  __utest_assert((const char *)(value) != NULL, "(" #value ") is null")
+#define uassert_null(value)      __utest_assert((const char *)(value) == RT_NULL, "(" #value ") is not null")
+#define uassert_not_null(value)  __utest_assert((const char *)(value) != RT_NULL, "(" #value ") is null")
 
 #define uassert_int_equal(a, b)      __utest_assert((a) == (b), "(" #a ") not equal to (" #b ")")
 #define uassert_int_not_equal(a, b)  __utest_assert((a) != (b), "(" #a ") equal to (" #b ")")

include/libc/libc_stat.h

@@ -1,110 +0,0 @@
-/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- */
-
-#ifndef LIBC_STAT_H__
-#define LIBC_STAT_H__
-
-#include <rtconfig.h>
-
-#if defined(RT_USING_NEWLIB) || (defined( __GNUC__ ) && !defined(__ARMCC_VERSION))
-/* use header file of newlib */
-#include <sys/stat.h>
-
-#elif defined(_WIN32)
-#include <sys/stat.h>
-
-#define S_IRWXU              00700
-#define S_IRUSR              00400
-#define S_IWUSR              00200
-#define S_IXUSR              00100
-
-#define S_IRWXG              00070
-#define S_IRGRP              00040
-#define S_IWGRP              00020
-#define S_IXGRP              00010
-
-#define S_IRWXO              00007
-#define S_IROTH              00004
-#define S_IWOTH              00002
-#define S_IXOTH              00001
-
-#define S_IFSOCK             0140000
-#define S_IFLNK              0120000
-#define S_IFBLK              0060000
-#define S_IFIFO              0010000
-#define S_ISUID              0004000
-#define S_ISGID              0002000
-#define S_ISVTX              0001000
-
-#define S_ISDIR(m)           (((m) & S_IFMT) == S_IFDIR)
-
-#else
-#define S_IFMT               00170000
-#define S_IFSOCK             0140000
-#define S_IFLNK              0120000
-#define S_IFREG              0100000
-#define S_IFBLK              0060000
-#define S_IFDIR              0040000
-#define S_IFCHR              0020000
-#define S_IFIFO              0010000
-#define S_ISUID              0004000
-#define S_ISGID              0002000
-#define S_ISVTX              0001000
-
-#define S_ISLNK(m)           (((m) & S_IFMT) == S_IFLNK)
-#define S_ISREG(m)           (((m) & S_IFMT) == S_IFREG)
-#define S_ISDIR(m)           (((m) & S_IFMT) == S_IFDIR)
-#define S_ISCHR(m)           (((m) & S_IFMT) == S_IFCHR)
-#define S_ISBLK(m)           (((m) & S_IFMT) == S_IFBLK)
-#define S_ISFIFO(m)          (((m) & S_IFMT) == S_IFIFO)
-#define S_ISSOCK(m)          (((m) & S_IFMT) == S_IFSOCK)
-
-#define S_IRWXU              00700
-#define S_IRUSR              00400
-#define S_IWUSR              00200
-#define S_IXUSR              00100
-
-#define S_IRWXG              00070
-#define S_IRGRP              00040
-#define S_IWGRP              00020
-#define S_IXGRP              00010
-
-#define S_IRWXO              00007
-#define S_IROTH              00004
-#define S_IWOTH              00002
-#define S_IXOTH              00001
-
-/* stat structure */
-#include <stdint.h>
-#include <time.h>
-
-struct stat
-{
-    struct rt_device *st_dev;
-    uint16_t  st_ino;
-    uint16_t  st_mode;
-    uint16_t  st_nlink;
-    uint16_t  st_uid;
-    uint16_t  st_gid;
-    struct rt_device *st_rdev;
-    uint32_t  st_size;
-    time_t    st_atime;
-    long      st_spare1;
-    time_t    st_mtime;
-    long      st_spare2;
-    time_t    st_ctime;
-    long      st_spare3;
-    uint32_t  st_blksize;
-    uint32_t  st_blocks;
-    long      st_spare4[2];
-};
-
-#endif
-
-#endif

include/rtdef.h

@@ -1146,9 +1146,6 @@ struct rt_device_graphic_ops
 /**@}*/
 #endif
 
-/* definitions for libc */
-#include "rtlibc.h"
-
 #ifdef __cplusplus
 }
 #endif

include/rtlibc.h

@@ -1,31 +0,0 @@
-/*
- * Copyright (c) 2006-2021, RT-Thread Development Team
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2017-01-21     Bernard      the first version
- */
-
-#ifndef RTLIBC_H__
-#define RTLIBC_H__
-
-/* definitions for libc if toolchain has no these definitions */
-#include "libc/libc_stat.h"
-#include "libc/libc_fcntl.h"
-
-#ifndef RT_USING_LIBC
-#if defined(__ARMCC_VERSION) || defined(__IAR_SYSTEMS_ICC__)
-typedef signed long off_t;
-typedef int mode_t;
-#endif
-#endif
-
-#if defined(__MINGW32__) || defined(_WIN32)
-typedef signed long off_t;
-typedef int mode_t;
-#endif
-
-#endif
-

libcpu/arm/zynqmp-r5/cache.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2021, RT-Thread Development Team
+ * Copyright (c) 2006 - 2021, RT-Thread Development Team
  * Copyright (c) 2014 - 2020 Xilinx, Inc.  All rights reserved.
  * Copyright (c) 2021 WangHuachen.  All rights reserved.
  * SPDX-License-Identifier: MIT
@@ -9,6 +9,8 @@
  * 2020-03-19     WangHuachen  first version
  * 2021-05-10     WangHuachen  add more functions
  */
+
+#include <stdint.h>
 #include <rthw.h>
 #include <rtdef.h>
 
@@ -69,9 +71,10 @@ void Xil_DCacheEnable(void)
 #if defined (__GNUC__)
     CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
 #elif defined (__ICCARM__)
-     mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+    mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
 #endif
-    if ((CtrlReg & XREG_CP15_CONTROL_C_BIT)==0x00000000U) {
+    if ((CtrlReg & XREG_CP15_CONTROL_C_BIT) == 0x00000000U)
+    {
         /* invalidate the Data cache */
         Xil_DCacheInvalidate();
 
@@ -93,7 +96,7 @@ void Xil_DCacheDisable(void)
 #if defined (__GNUC__)
     CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
 #elif defined (__ICCARM__)
-     mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+    mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
 #endif
 
     CtrlReg &= ~(XREG_CP15_CONTROL_C_BIT);
@@ -126,7 +129,7 @@ void Xil_DCacheInvalidateLine(INTPTR adr)
     mtcp(XREG_CP15_CACHE_SIZE_SEL, 0);
     mtcp(XREG_CP15_INVAL_DC_LINE_MVA_POC, (adr & (~0x1F)));
 
-        /* Wait for invalidate to complete */
+    /* Wait for invalidate to complete */
     dsb();
 
     mtcpsr(currmask);
@@ -143,29 +146,33 @@ void Xil_DCacheInvalidateRange(INTPTR adr, u32 len)
     currmask = mfcpsr();
     mtcpsr(currmask | IRQ_FIQ_MASK);
 
-    if (len != 0U) {
+    if (len != 0U)
+    {
         end = tempadr + len;
         tempend = end;
         /* Select L1 Data cache in CSSR */
         mtcp(XREG_CP15_CACHE_SIZE_SEL, 0U);
 
-        if ((tempadr & (cacheline-1U)) != 0U) {
+        if ((tempadr & (cacheline - 1U)) != 0U)
+        {
             tempadr &= (~(cacheline - 1U));
 
             Xil_DCacheFlushLine(tempadr);
         }
-        if ((tempend & (cacheline-1U)) != 0U) {
+        if ((tempend & (cacheline - 1U)) != 0U)
+        {
             tempend &= (~(cacheline - 1U));
 
             Xil_DCacheFlushLine(tempend);
         }
 
-        while (tempadr < tempend) {
+        while (tempadr < tempend)
+        {
 
-        /* Invalidate Data cache line */
-        asm_inval_dc_line_mva_poc(tempadr);
+            /* Invalidate Data cache line */
+            asm_inval_dc_line_mva_poc(tempadr);
 
-        tempadr += cacheline;
+            tempadr += cacheline;
         }
     }
 
@@ -189,7 +196,7 @@ void Xil_DCacheFlush(void)
 #if defined (__GNUC__)
     CsidReg = mfcp(XREG_CP15_CACHE_SIZE_ID);
 #elif defined (__ICCARM__)
-     mfcp(XREG_CP15_CACHE_SIZE_ID,CsidReg);
+    mfcp(XREG_CP15_CACHE_SIZE_ID, CsidReg);
 #endif
     /* Determine Cache Size */
 
@@ -204,15 +211,17 @@ void Xil_DCacheFlush(void)
     /* Get the cacheline size, way size, index size from csidr */
     LineSize = (CsidReg & 0x00000007U) + 0x00000004U;
 
-    NumSet = CacheSize/NumWays;
+    NumSet = CacheSize / NumWays;
     NumSet /= (0x00000001U << LineSize);
 
     Way = 0U;
     Set = 0U;
 
     /* Invalidate all the cachelines */
-    for (WayIndex = 0U; WayIndex < NumWays; WayIndex++) {
-        for (SetIndex = 0U; SetIndex < NumSet; SetIndex++) {
+    for (WayIndex = 0U; WayIndex < NumWays; WayIndex++)
+    {
+        for (SetIndex = 0U; SetIndex < NumSet; SetIndex++)
+        {
             C7Reg = Way | Set;
             /* Flush by Set/Way */
             asm_clean_inval_dc_line_sw(C7Reg);
@@ -241,7 +250,7 @@ void Xil_DCacheFlushLine(INTPTR adr)
 
     mtcp(XREG_CP15_CLEAN_INVAL_DC_LINE_MVA_POC, (adr & (~0x1F)));
 
-        /* Wait for flush to complete */
+    /* Wait for flush to complete */
     dsb();
     mtcpsr(currmask);
 }
@@ -256,14 +265,16 @@ void Xil_DCacheFlushRange(INTPTR adr, u32 len)
     currmask = mfcpsr();
     mtcpsr(currmask | IRQ_FIQ_MASK);
 
-    if (len != 0x00000000U) {
+    if (len != 0x00000000U)
+    {
         /* Back the starting address up to the start of a cache line
          * perform cache operations until adr+len
          */
         end = LocalAddr + len;
         LocalAddr &= ~(cacheline - 1U);
 
-        while (LocalAddr < end) {
+        while (LocalAddr < end)
+        {
             /* Flush Data cache line */
             asm_clean_inval_dc_line_mva_poc(LocalAddr);
 
@@ -301,7 +312,8 @@ void Xil_ICacheEnable(void)
 #elif defined (__ICCARM__)
     mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
 #endif
-    if ((CtrlReg & XREG_CP15_CONTROL_I_BIT)==0x00000000U) {
+    if ((CtrlReg & XREG_CP15_CONTROL_I_BIT) == 0x00000000U)
+    {
         /* invalidate the instruction cache */
         mtcp(XREG_CP15_INVAL_IC_POU, 0);
 
@@ -321,11 +333,11 @@ void Xil_ICacheDisable(void)
     /* invalidate the instruction cache */
     mtcp(XREG_CP15_INVAL_IC_POU, 0);
 
-        /* disable the instruction cache */
+    /* disable the instruction cache */
 #if defined (__GNUC__)
     CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
 #elif defined (__ICCARM__)
-    mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+    mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
 #endif
 
     CtrlReg &= ~(XREG_CP15_CONTROL_I_BIT);
@@ -360,7 +372,7 @@ void Xil_ICacheInvalidateLine(INTPTR adr)
     mtcp(XREG_CP15_CACHE_SIZE_SEL, 1);
     mtcp(XREG_CP15_INVAL_IC_LINE_MVA_POU, (adr & (~0x1F)));
 
-        /* Wait for invalidate to complete */
+    /* Wait for invalidate to complete */
     dsb();
     mtcpsr(currmask);
 }
@@ -374,7 +386,8 @@ void Xil_ICacheInvalidateRange(INTPTR adr, u32 len)
 
     currmask = mfcpsr();
     mtcpsr(currmask | IRQ_FIQ_MASK);
-    if (len != 0x00000000U) {
+    if (len != 0x00000000U)
+    {
         /* Back the starting address up to the start of a cache line
          * perform cache operations until adr+len
          */
@@ -384,7 +397,8 @@ void Xil_ICacheInvalidateRange(INTPTR adr, u32 len)
         /* Select cache L0 I-cache in CSSR */
         mtcp(XREG_CP15_CACHE_SIZE_SEL, 1U);
 
-        while (LocalAddr < end) {
+        while (LocalAddr < end)
+        {
 
             /* Invalidate L1 I-cache line */
             asm_inval_ic_line_mva_pou(LocalAddr);
@@ -418,7 +432,7 @@ rt_base_t rt_hw_cpu_icache_status(void)
 #if defined (__GNUC__)
     CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
 #elif defined (__ICCARM__)
-     mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+    mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
 #endif
     return CtrlReg & XREG_CP15_CONTROL_I_BIT;
 }
@@ -429,7 +443,7 @@ rt_base_t rt_hw_cpu_dcache_status(void)
 #if defined (__GNUC__)
     CtrlReg = mfcp(XREG_CP15_SYS_CONTROL);
 #elif defined (__ICCARM__)
-     mfcp(XREG_CP15_SYS_CONTROL,CtrlReg);
+    mfcp(XREG_CP15_SYS_CONTROL, CtrlReg);
 #endif
     return CtrlReg & XREG_CP15_CONTROL_C_BIT;
 }

libcpu/mips/common/ptrace.h

@@ -63,7 +63,7 @@ struct pt_regs {
      * so it should be a part of pt_regs */
     struct mips_fpu_struct fpu;
 #endif
-} __aligned(8);
+} __attribute__((aligned(8)));
 #endif
 
 /* Note: For call stack o32 ABI has 0x8 shadowsoace Here  */

libcpu/risc-v/virt64/cpuport.c

@@ -9,13 +9,13 @@
  * 2021-02-11     lizhirui     add gp support
  */
 
+#include <stddef.h>
 #include <rthw.h>
 #include <rtthread.h>
 
 #include "cpuport.h"
 #include "stack.h"
 
-
 /**
  * @brief from thread used interrupt context switch
  *