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@@ -22,6 +22,8 @@ processor_version: 0.15.0
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*/
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*/
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/* clang-format on */
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/* clang-format on */
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+#include "rtconfig.h"
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+
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#include "fsl_common.h"
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#include "fsl_common.h"
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#include "fsl_port.h"
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#include "fsl_port.h"
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#include "pin_mux.h"
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#include "pin_mux.h"
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@@ -159,6 +161,109 @@ void BOARD_InitPins(void)
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kPORT_UnlockRegister};
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kPORT_UnlockRegister};
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/* PORT3_12 (pin 63) is configured as LED_RED */
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/* PORT3_12 (pin 63) is configured as LED_RED */
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PORT_SetPinConfig(PORT3, 12U, &port3_12_pin63_config);
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PORT_SetPinConfig(PORT3, 12U, &port3_12_pin63_config);
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+
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+#ifdef BSP_USING_SPI1
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+ const port_pin_config_t port2_12_pin34_config = {/* Internal pull-up/down resistor is disabled */
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+ kPORT_PullDisable,
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+ /* Low internal pull resistor value is selected. */
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+ kPORT_LowPullResistor,
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+ /* Fast slew rate is configured */
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+ kPORT_FastSlewRate,
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+ /* Passive input filter is disabled */
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+ kPORT_PassiveFilterDisable,
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+ /* Open drain output is disabled */
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+ kPORT_OpenDrainDisable,
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+ /* Low drive strength is configured */
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+ kPORT_LowDriveStrength,
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+ /* Normal drive strength is configured */
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+ kPORT_NormalDriveStrength,
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+ /* Pin is configured as LPSPI1_SCK */
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+ kPORT_MuxAlt2,
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+ /* Digital input enabled */
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+ kPORT_InputBufferEnable,
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+ /* Digital input is not inverted */
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+ kPORT_InputNormal,
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+ /* Pin Control Register fields [15:0] are not locked */
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+ kPORT_UnlockRegister};
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+ /* PORT2_12 (pin 34) is configured as LPSPI1_SCK */
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+ PORT_SetPinConfig(PORT2, 12U, &port2_12_pin34_config);
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+
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+ const port_pin_config_t port2_13_pin35_config = {/* Internal pull-up/down resistor is disabled */
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+ kPORT_PullDisable,
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+ /* Low internal pull resistor value is selected. */
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+ kPORT_LowPullResistor,
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+ /* Fast slew rate is configured */
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+ kPORT_FastSlewRate,
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+ /* Passive input filter is disabled */
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+ kPORT_PassiveFilterDisable,
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+ /* Open drain output is disabled */
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+ kPORT_OpenDrainDisable,
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+ /* Low drive strength is configured */
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+ kPORT_LowDriveStrength,
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+ /* Normal drive strength is configured */
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+ kPORT_NormalDriveStrength,
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+ /* Pin is configured as LPSPI1_SDO */
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+ kPORT_MuxAlt2,
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+ /* Digital input enabled */
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+ kPORT_InputBufferEnable,
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+ /* Digital input is not inverted */
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+ kPORT_InputNormal,
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+ /* Pin Control Register fields [15:0] are not locked */
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+ kPORT_UnlockRegister};
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+ /* PORT2_13 (pin 35) is configured as LPSPI1_SDO */
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+ PORT_SetPinConfig(PORT2, 13U, &port2_13_pin35_config);
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+
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+ const port_pin_config_t port2_16_pin37_config = {/* Internal pull-up/down resistor is disabled */
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+ kPORT_PullDisable,
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+ /* Low internal pull resistor value is selected. */
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+ kPORT_LowPullResistor,
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+ /* Fast slew rate is configured */
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+ kPORT_FastSlewRate,
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+ /* Passive input filter is disabled */
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+ kPORT_PassiveFilterDisable,
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+ /* Open drain output is disabled */
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+ kPORT_OpenDrainDisable,
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+ /* Low drive strength is configured */
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+ kPORT_LowDriveStrength,
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+ /* Normal drive strength is configured */
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+ kPORT_NormalDriveStrength,
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+ /* Pin is configured as LPSPI1_SDI */
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+ kPORT_MuxAlt2,
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+ /* Digital input enabled */
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+ kPORT_InputBufferEnable,
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+ /* Digital input is not inverted */
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+ kPORT_InputNormal,
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+ /* Pin Control Register fields [15:0] are not locked */
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+ kPORT_UnlockRegister};
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+ /* PORT2_16 (pin 37) is configured as LPSPI1_SDI */
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+ PORT_SetPinConfig(PORT2, 16U, &port2_16_pin37_config);
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+
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+ const port_pin_config_t port2_6_pin28_config = {/* Internal pull-up/down resistor is disabled */
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+ kPORT_PullDisable,
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+ /* Low internal pull resistor value is selected. */
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+ kPORT_LowPullResistor,
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+ /* Fast slew rate is configured */
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+ kPORT_FastSlewRate,
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+ /* Passive input filter is disabled */
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+ kPORT_PassiveFilterDisable,
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+ /* Open drain output is disabled */
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+ kPORT_OpenDrainDisable,
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+ /* Low drive strength is configured */
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+ kPORT_LowDriveStrength,
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+ /* Normal drive strength is configured */
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+ kPORT_NormalDriveStrength,
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+ /* Pin is configured as LPSPI1_PCS1 */
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+ kPORT_MuxAsGpio,
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+ /* Digital input enabled */
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+ kPORT_InputBufferEnable,
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+ /* Digital input is not inverted */
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+ kPORT_InputNormal,
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+ /* Pin Control Register fields [15:0] are not locked */
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+ kPORT_UnlockRegister};
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+ /* PORT2_6 (pin 20) is configured as LPSPI1_PCS1 */
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+ PORT_SetPinConfig(PORT2, 6U, &port2_6_pin28_config);
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+#endif
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+
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}
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}
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/***********************************************************************************************************************
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/***********************************************************************************************************************
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* EOF
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* EOF
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