优化lwp_user_setting_save的执行时机

include/rthw.h

@@ -132,7 +132,7 @@ void rt_hw_context_switch_interrupt(void *context, rt_ubase_t from, rt_ubase_t t
 #else
 void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
 void rt_hw_context_switch_to(rt_ubase_t to);
-void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to);
+void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread);
 #endif /*RT_USING_SMP*/
 
 void rt_hw_console_output(const char *str);

libcpu/aarch64/common/context_gcc.S

@@ -8,6 +8,8 @@
  * 2021-05-18     Jesven       the first version
  */
 
+#include "rtconfig.h"
+
 #include "asm-fpu.h"
 
   /*
@@ -245,24 +247,28 @@ rt_hw_context_switch:
     RESTORE_CONTEXT
 
 /*
- * void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to);
+ * void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread);
  */
 .globl rt_thread_switch_interrupt_flag
 .globl rt_interrupt_from_thread
 .globl rt_interrupt_to_thread
 .globl rt_hw_context_switch_interrupt
 rt_hw_context_switch_interrupt:
-    ADR     X2, rt_thread_switch_interrupt_flag
-    LDR     X3, [X2]
-    CMP     X3, #1
+    ADR     X6, rt_thread_switch_interrupt_flag
+    LDR     X7, [X6]
+    CMP     X7, #1
     B.EQ     _reswitch
     ADR     X4, rt_interrupt_from_thread   // set rt_interrupt_from_thread
-    MOV     X3, #1              // set rt_thread_switch_interrupt_flag to 1
     STR     X0, [X4]
-    STR     X3, [X2]
+    MOV     X7, #1              // set rt_thread_switch_interrupt_flag to 1
+    STR     X7, [X6]
+    STP     X1, X30, [SP, #-0x10]!
+    MOV     X0, X2
+    BL      lwp_user_setting_save
+    LDP     X1, X30, [SP], #0x10
 _reswitch:
-    ADR     X2, rt_interrupt_to_thread     // set rt_interrupt_to_thread
-    STR     X1, [X2]
+    ADR     X6, rt_interrupt_to_thread     // set rt_interrupt_to_thread
+    STR     X1, [X6]
     RET
 
 .text
@@ -293,9 +299,6 @@ vector_irq:
     SAVE_CONTEXT
     STP     X0, X1, [SP, #-0x10]!   /* X0 is thread sp */
 
-    BL      rt_thread_self
-    BL      lwp_user_setting_save
-
     BL      rt_interrupt_enter
     BL      rt_hw_trap_irq
     BL      rt_interrupt_leave

libcpu/arm/cortex-a/context_gcc.S

@@ -145,28 +145,60 @@ rt_hw_context_switch_interrupt:
      * r2 :addr of to_thread's sp
      * r3 :to_thread's tcb
      */
-
+#ifdef RT_USING_LWP
+    push {r0 - r3, lr}
+    bl rt_thread_self
+    bl lwp_user_setting_save
+    pop {r0 - r3, lr}
+#endif
     str     r0, [r1]
 
     ldr     sp, [r2]
     mov     r0, r3
+
     bl      rt_cpus_lock_status_restore
 
     b       rt_hw_context_switch_exit
 
 #else /*RT_USING_SMP*/
-    ldr r2, =rt_thread_switch_interrupt_flag
-    ldr r3, [r2]
+    /* r0 :addr of from_thread's sp
+     * r1 :addr of to_thread's sp
+     * r2 :from_thread's tcb
+     * r3 :to_thread's tcb
+     */
+#ifdef RT_USING_LWP
+    /* now to_thread(r3) not used */
+    ldr ip, =rt_thread_switch_interrupt_flag
+    ldr r3, [ip]
     cmp r3, #1
     beq _reswitch
-    ldr ip, =rt_interrupt_from_thread   @ set rt_interrupt_from_thread
+    ldr r3, =rt_interrupt_from_thread   @ set rt_interrupt_from_thread
+    str r0, [r3]
     mov r3, #1              @ set rt_thread_switch_interrupt_flag to 1
-    str r0, [ip]
-    str r3, [r2]
+    str r3, [ip]
+    push {r1, lr}
+    mov r0, r2
+    bl lwp_user_setting_save
+    pop {r1, lr}
 _reswitch:
-    ldr r2, =rt_interrupt_to_thread     @ set rt_interrupt_to_thread
-    str r1, [r2]
+    ldr ip, =rt_interrupt_to_thread     @ set rt_interrupt_to_thread
+    str r1, [ip]
     bx  lr
+#else
+    /* now from_thread(r2) to_thread(r3) not used */
+    ldr ip, =rt_thread_switch_interrupt_flag
+    ldr r3, [ip]
+    cmp r3, #1
+    beq _reswitch
+    ldr r3, =rt_interrupt_from_thread   @ set rt_interrupt_from_thread
+    str r0, [r3]
+    mov r3, #1              @ set rt_thread_switch_interrupt_flag to 1
+    str r3, [ip]
+_reswitch:
+    ldr ip, =rt_interrupt_to_thread     @ set rt_interrupt_to_thread
+    str r1, [ip]
+    bx  lr
+#endif
 #endif /*RT_USING_SMP*/
 
 .global rt_hw_context_switch_exit

libcpu/arm/cortex-a/start_gcc.S

@@ -361,11 +361,6 @@ vector_irq:
     cps     #Mode_SVC
     mov     sp, r8
 
-#ifdef RT_USING_LWP
-    bl      rt_thread_self
-    bl      lwp_user_setting_save
-#endif
-
     bl      rt_interrupt_enter
     bl      rt_hw_trap_irq
     bl      rt_interrupt_leave
@@ -378,11 +373,6 @@ vector_irq:
 #else
     stmfd   sp!, {r0-r12,lr}
 
-#ifdef RT_USING_LWP
-    bl      rt_thread_self
-    bl      lwp_user_setting_save
-#endif
-
     bl      rt_interrupt_enter
     bl      rt_hw_trap_irq
     bl      rt_interrupt_leave

src/scheduler.c

@@ -47,10 +47,6 @@ struct rt_thread *rt_current_thread;
 rt_uint8_t rt_current_priority;
 #endif /*RT_USING_SMP*/
 
-#ifdef RT_USING_LWP
-void lwp_user_setting_save(rt_thread_t thread);
-#endif
-
 #ifdef RT_USING_HOOK
 static void (*rt_scheduler_hook)(struct rt_thread *from, struct rt_thread *to);
 
@@ -377,9 +373,6 @@ void rt_schedule(void)
                 _rt_scheduler_stack_check(to_thread);
 #endif
 
-#ifdef RT_USING_LWP
-                lwp_user_setting_save(current_thread);
-#endif
                 rt_hw_context_switch((rt_ubase_t)&current_thread->sp,
                         (rt_ubase_t)&to_thread->sp, to_thread);
             }
@@ -489,9 +482,6 @@ void rt_schedule(void)
                 {
                     extern void rt_thread_handle_sig(rt_bool_t clean_state);
 
-#ifdef RT_USING_LWP
-                    lwp_user_setting_save(from_thread);
-#endif
                     rt_hw_context_switch((rt_ubase_t)&from_thread->sp,
                             (rt_ubase_t)&to_thread->sp);
 
@@ -524,7 +514,7 @@ void rt_schedule(void)
                     RT_DEBUG_LOG(RT_DEBUG_SCHEDULER, ("switch in interrupt\n"));
 
                     rt_hw_context_switch_interrupt((rt_ubase_t)&from_thread->sp,
-                            (rt_ubase_t)&to_thread->sp);
+                            (rt_ubase_t)&to_thread->sp, from_thread, to_thread);
                 }
             }
             else