fixed a compiling error with gcc

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2549 bbd45198-f89e-11dd-88c7-29a3b14d5316

bsp/xplorer4330/libraries/startup_code/gcc_startup_lpc18xx43xx.s

@@ -1,221 +1,291 @@
-/* File: startup_ARMCM4.S
- * Purpose: startup file for Cortex-M4 devices. Should use with
- *   GCC for ARM Embedded Processors
- * Version: V1.3
- * Date: 08 Feb 2012
- *
- * Copyright (c) 2012, ARM Limited
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-    * Redistributions in binary form must reproduce the above copyright
-      notice, this list of conditions and the following disclaimer in the
-      documentation and/or other materials provided with the distribution.
-    * Neither the name of the ARM Limited nor the
-      names of its contributors may be used to endorse or promote products
-      derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-    .syntax unified
-    .arch armv7-m
-
-    .section .stack
-    .align 3
-#ifdef __STACK_SIZE
-    .equ    Stack_Size, __STACK_SIZE
-#else
-    .equ    Stack_Size, 0x400
-#endif
-    .globl    __StackTop
-    .globl    __StackLimit
-__StackLimit:
-    .space    Stack_Size
-    .size __StackLimit, . - __StackLimit
-__StackTop:
-    .size __StackTop, . - __StackTop
-
-    .section .heap
-    .align 3
-#ifdef __HEAP_SIZE
-    .equ    Heap_Size, __HEAP_SIZE
-#else
-    .equ    Heap_Size, 0xC00
-#endif
-    .globl    __HeapBase
-    .globl    __HeapLimit
-__HeapBase:
-    .if    Heap_Size
-    .space    Heap_Size
+/*****************************************************************************/
+/* startup_LPC18xx.s: Startup file for LPC18xx device series                 */
+/*****************************************************************************/
+/* Version: CodeSourcery Sourcery G++ Lite (with CS3)                        */
+/*****************************************************************************/
+
+
+/*
+//*** <<< Use Configuration Wizard in Context Menu >>> ***
+*/
+
+
+/*
+// <h> Stack Configuration
+//   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+// </h>
+*/
+
+    .equ    Stack_Size, 0x00000100
+    .equ    Sign_Value, 0x5A5A5A5A
+    .section ".stack", "w"
+    .align  3
+    .globl  __cs3_stack_mem
+    .globl  __cs3_stack_size
+__cs3_stack_mem:
+    .if     Stack_Size
+    .space  Stack_Size
+    .endif
+    .size   __cs3_stack_mem,  . - __cs3_stack_mem
+    .set    __cs3_stack_size, . - __cs3_stack_mem
+
+
+/*
+// <h> Heap Configuration
+//   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+// </h>
+*/
+
+    .equ    Heap_Size,  0x00001000
+
+    .section ".heap", "w"
+    .align  3
+    .globl  __cs3_heap_start
+    .globl  __cs3_heap_end
+__cs3_heap_start:
+    .if     Heap_Size
+    .space  Heap_Size
     .endif
-    .size __HeapBase, . - __HeapBase
-__HeapLimit:
-    .size __HeapLimit, . - __HeapLimit
-
-    .section .isr_vector
-    .align 2
-    .globl __isr_vector
-__isr_vector:
-    .long    __StackTop            /* Top of Stack */
-    .long    Reset_Handler         /* Reset Handler */
-    .long    NMI_Handler           /* NMI Handler */
-    .long    HardFault_Handler     /* Hard Fault Handler */
-    .long    MemManage_Handler     /* MPU Fault Handler */
-    .long    BusFault_Handler      /* Bus Fault Handler */
-    .long    UsageFault_Handler    /* Usage Fault Handler */
-    .long    0                     /* Reserved */
-    .long    0                     /* Reserved */
-    .long    0                     /* Reserved */
-    .long    0                     /* Reserved */
-    .long    SVC_Handler           /* SVCall Handler */
-    .long    DebugMon_Handler      /* Debug Monitor Handler */
-    .long    0                     /* Reserved */
-    .long    PendSV_Handler        /* PendSV Handler */
-    .long    SysTick_Handler       /* SysTick Handler */
-
-    /* External interrupts */
-    .long    WDT_IRQHandler        /*  0:  Watchdog Timer            */
-    .long    RTC_IRQHandler        /*  1:  Real Time Clock           */
-    .long    TIM0_IRQHandler       /*  2:  Timer0 / Timer1           */
-    .long    TIM2_IRQHandler       /*  3:  Timer2 / Timer3           */
-    .long    MCIA_IRQHandler       /*  4:  MCIa                      */
-    .long    MCIB_IRQHandler       /*  5:  MCIb                      */
-    .long    UART0_IRQHandler      /*  6:  UART0 - DUT FPGA          */
-    .long    UART1_IRQHandler      /*  7:  UART1 - DUT FPGA          */
-    .long    UART2_IRQHandler      /*  8:  UART2 - DUT FPGA          */
-    .long    UART4_IRQHandler      /*  9:  UART4 - not connected     */
-    .long    AACI_IRQHandler       /* 10: AACI / AC97                */
-    .long    CLCD_IRQHandler       /* 11: CLCD Combined Interrupt    */
-    .long    ENET_IRQHandler       /* 12: Ethernet                   */
-    .long    USBDC_IRQHandler      /* 13: USB Device                 */
-    .long    USBHC_IRQHandler      /* 14: USB Host Controller        */
-    .long    CHLCD_IRQHandler      /* 15: Character LCD              */
-    .long    FLEXRAY_IRQHandler    /* 16: Flexray                    */
-    .long    CAN_IRQHandler        /* 17: CAN                        */
-    .long    LIN_IRQHandler        /* 18: LIN                        */
-    .long    I2C_IRQHandler        /* 19: I2C ADC/DAC                */
-    .long    0                     /* 20: Reserved                   */
-    .long    0                     /* 21: Reserved                   */
-    .long    0                     /* 22: Reserved                   */
-    .long    0                     /* 23: Reserved                   */
-    .long    0                     /* 24: Reserved                   */
-    .long    0                     /* 25: Reserved                   */
-    .long    0                     /* 26: Reserved                   */
-    .long    0                     /* 27: Reserved                   */
-    .long    CPU_CLCD_IRQHandler   /* 28: Reserved - CPU FPGA CLCD   */
-    .long    0                     /* 29: Reserved - CPU FPGA        */
-    .long    UART3_IRQHandler      /* 30: UART3    - CPU FPGA        */
-    .long    SPI_IRQHandler        /* 31: SPI Touchscreen - CPU FPGA */
-
-    .size    __isr_vector, . - __isr_vector
-
-    .text
+__cs3_heap_end:
+
+
+/* Vector Table */
+
+    .section ".cs3.interrupt_vector"
+    .globl  __cs3_interrupt_vector_cortex_m
+    .type   __cs3_interrupt_vector_cortex_m, %object
+
+__cs3_interrupt_vector_cortex_m:
+    .long   __cs3_stack                 /* Top of Stack                 */
+    .long   __cs3_reset                 /* Reset Handler                */
+    .long   NMI_Handler                 /* NMI Handler                  */
+    .long   HardFault_Handler           /* Hard Fault Handler           */
+    .long   MemManage_Handler           /* MPU Fault Handler            */
+    .long   BusFault_Handler            /* Bus Fault Handler            */
+    .long   UsageFault_Handler          /* Usage Fault Handler          */
+    .long   Sign_Value                  /* Reserved                     */
+    .long   0                           /* Reserved                     */
+    .long   0                           /* Reserved                     */
+    .long   0                           /* Reserved                     */
+    .long   SVC_Handler                 /* SVCall Handler               */
+    .long   DebugMon_Handler            /* Debug Monitor Handler        */
+    .long   0                           /* Reserved                     */
+    .long   PendSV_Handler              /* PendSV Handler               */
+    .long   SysTick_Handler             /* SysTick Handler              */
+
+    /* External Interrupts */
+    .long	DAC_IRQHandler	 			/* 16 D/A Converter */
+	.long	0				/* 17 Event Router */
+	.long	DMA_IRQHandler				/* 18 General Purpose DMA */
+	.long	0					/* 19 Reserved */
+	.long	0					/* 20 Reserved */
+	.long	ETH_IRQHandler				/* 21 Ethernet */
+	.long	SDIO_IRQHandler				/* 22 SD/MMC */
+	.long	LCD_IRQHandler				/* 23 LCD */
+	.long	USB0_IRQHandler				/* 24 USB0*/
+	.long	USB1_IRQHandler				/* 25 USB1*/
+	.long	SCT_IRQHandler				/* 26 State Configurable Timer*/
+	.long	RIT_IRQHandler				/* 27 Repetitive Interrupt Timer*/
+	.long	TIMER0_IRQHandler			/* 28 Timer0*/
+	.long	TIMER1_IRQHandler			/* 29 Timer1*/
+	.long	TIMER2_IRQHandler			/* 30 Timer2*/
+	.long	TIMER3_IRQHandler			/* 31 Timer3*/
+	.long	MCPWM_IRQHandler			/* 32 Motor Control PWM*/
+	.long	ADC0_IRQHandler				/* 33 A/D Converter 0*/
+	.long	I2C0_IRQHandler				/* 34 I2C0*/
+	.long	I2C1_IRQHandler				/* 35 I2C1*/
+	.long	0					/* 36 Reserved*/
+	.long	ADC1_IRQHandler				/* 37 A/D Converter 1*/
+	.long	SSP0_IRQHandler				/* 38 SSP0*/
+	.long	SSP1_IRQHandler				/* 39 SSP1*/
+	.long	UART0_IRQHandler			/* 40 UART0*/
+	.long	UART1_IRQHandler			/* 41 UART1*/
+	.long	UART2_IRQHandler			/* 42 UART2*/
+	.long	UART3_IRQHandler			/* 43 UART3*/
+	.long	I2S0_IRQHandler				/* 44 I2S*/
+	.long 	I2S1_IRQHandler				/* 45 AES Engine*/
+	.long 	SPIFI_IRQHandler			/* 46 SPI Flash Interface*/
+	.long	SGPIO_IRQHandler			/* 47 SGPIO*/
+	.long	GPIO0_IRQHandler			/* 48 GPIO0*/
+	.long	GPIO1_IRQHandler			/* 49 GPIO1*/
+	.long	GPIO2_IRQHandler			/* 50 GPIO2*/
+	.long	GPIO3_IRQHandler			/* 51 GPIO3*/
+	.long	GPIO4_IRQHandler			/* 52 GPIO4*/
+	.long	GPIO5_IRQHandler			/* 53 GPIO5*/
+	.long	GPIO6_IRQHandler			/* 54 GPIO6*/
+	.long	GPIO7_IRQHandler			/* 55 GPIO7*/
+	.long	GINT0_IRQHandler			/* 56 GINT0*/
+	.long	GINT1_IRQHandler			/* 57 GINT1*/
+	.long	EVRT_IRQHandler				/* 58 Event Router*/
+	.long	CAN1_IRQHandler				/* 59 C_CAN1*/
+	.long	0							/* 60 Reserved*/
+	.long	VADC_IRQHandler				/* 61 VADC*/
+	.long	ATIMER_IRQHandler			/* 62 ATIMER*/
+	.long	RTC_IRQHandler				/* 63 RTC*/
+	.long	0							/* 64 Reserved*/
+	.long	WDT_IRQHandler				/* 65 WDT*/
+	.long	0							/* 66 M0s*/
+	.long	CAN0_IRQHandler				/* 67 C_CAN0*/
+	.long 	QEI_IRQHandler				/* 68 QEI*/
+
+    .size   __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m
+
+
     .thumb
+
+
+/* Reset Handler */
+
+    .section .cs3.reset,"x",%progbits
     .thumb_func
-    .align 2
-    .globl    Reset_Handler
-    .type    Reset_Handler, %function
-Reset_Handler:
-/*     Loop to copy data from read only memory to RAM. The ranges
- *      of copy from/to are specified by following symbols evaluated in
- *      linker script.
- *      __etext: End of code section, i.e., begin of data sections to copy from.
- *      __data_start__/__data_end__: RAM address range that data should be
- *      copied to. Both must be aligned to 4 bytes boundary.  */
-
-    ldr    r1, =__etext
-    ldr    r2, =__data_start__
-    ldr    r3, =__data_end__
-
-#if 1
-/* Here are two copies of loop implemenations. First one favors code size
- * and the second one favors performance. Default uses the first one.
- * Change to "#if 0" to use the second one */
-.flash_to_ram_loop:
-    cmp     r2, r3
-    ittt    lt
-    ldrlt   r0, [r1], #4
-    strlt   r0, [r2], #4
-    blt    .flash_to_ram_loop
-#else
-    subs    r3, r2
-    ble    .flash_to_ram_loop_end
-.flash_to_ram_loop:
-    subs    r3, #4
-    ldr    r0, [r1, r3]
-    str    r0, [r2, r3]
-    bgt    .flash_to_ram_loop
-.flash_to_ram_loop_end:
-#endif
-
-#ifndef __NO_SYSTEM_INIT
-    ldr    r0, =SystemInit
-    blx    r0
-#endif
-
-    ldr    r0, =_start
-    bx    r0
+    .globl  __cs3_reset_cortex_m
+    .type   __cs3_reset_cortex_m, %function
+__cs3_reset_cortex_m:
+    .fnstart
+/* .if (RAM_MODE) */
+ .if 0
+/* Clear .bss section (Zero init) */
+	MOV     R0, #0
+	LDR     R1, =__bss_start__
+	LDR     R2, =__bss_end__
+	CMP     R1,R2
+	BEQ     BSSIsEmpty
+LoopZI:
+	CMP     R1, R2
+	BHS		BSSIsEmpty
+	STR   	R0, [R1]
+	ADD		R1, #4
+	BLO     LoopZI
+BSSIsEmpty:
+    LDR     R0,=main
+    BX      R0
+.else
+    LDR     R0, =SystemInit
+    BLX     R0
+    LDR     R0,=main
+    BX      R0
+.endif
     .pool
-    .size Reset_Handler, . - Reset_Handler
+    .cantunwind
+    .fnend
+    .size   __cs3_reset_cortex_m,.-__cs3_reset_cortex_m
 
-/*    Macro to define default handlers. Default handler
- *    will be weak symbol and just dead loops. They can be
- *    overwritten by other handlers */
-    .macro    def_irq_handler    handler_name
-    .align 1
-    .thumb_func
-    .weak    \handler_name
-    .type    \handler_name, %function
-\handler_name :
-    b    .
-    .size    \handler_name, . - \handler_name
-    .endm
+    .section ".text"
+
+/* Exception Handlers */
+
+    .weak   NMI_Handler
+    .type   NMI_Handler, %function
+NMI_Handler:
+    B       .
+    .size   NMI_Handler, . - NMI_Handler
+
+    .weak   HardFault_Handler
+    .type   HardFault_Handler, %function
+HardFault_Handler:
+    B       .
+    .size   HardFault_Handler, . - HardFault_Handler
+
+    .weak   MemManage_Handler
+    .type   MemManage_Handler, %function
+MemManage_Handler:
+    B       .
+    .size   MemManage_Handler, . - MemManage_Handler
+
+    .weak   BusFault_Handler
+    .type   BusFault_Handler, %function
+BusFault_Handler:
+    B       .
+    .size   BusFault_Handler, . - BusFault_Handler
 
-    def_irq_handler    NMI_Handler
-    def_irq_handler    HardFault_Handler
-    def_irq_handler    MemManage_Handler
-    def_irq_handler    BusFault_Handler
-    def_irq_handler    UsageFault_Handler
-    def_irq_handler    SVC_Handler
-    def_irq_handler    DebugMon_Handler
-    def_irq_handler    PendSV_Handler
-    def_irq_handler    SysTick_Handler
-    def_irq_handler    Default_Handler
-
-    def_irq_handler    WDT_IRQHandler
-    def_irq_handler    RTC_IRQHandler
-    def_irq_handler    TIM0_IRQHandler
-    def_irq_handler    TIM2_IRQHandler
-    def_irq_handler    MCIA_IRQHandler
-    def_irq_handler    MCIB_IRQHandler
-    def_irq_handler    UART0_IRQHandler
-    def_irq_handler    UART1_IRQHandler
-    def_irq_handler    UART2_IRQHandler
-    def_irq_handler    UART3_IRQHandler
-    def_irq_handler    UART4_IRQHandler
-    def_irq_handler    AACI_IRQHandler
-    def_irq_handler    CLCD_IRQHandler
-    def_irq_handler    ENET_IRQHandler
-    def_irq_handler    USBDC_IRQHandler
-    def_irq_handler    USBHC_IRQHandler
-    def_irq_handler    CHLCD_IRQHandler
-    def_irq_handler    FLEXRAY_IRQHandler
-    def_irq_handler    CAN_IRQHandler
-    def_irq_handler    LIN_IRQHandler
-    def_irq_handler    I2C_IRQHandler
-    def_irq_handler    CPU_CLCD_IRQHandler
-    def_irq_handler    SPI_IRQHandler
+    .weak   UsageFault_Handler
+    .type   UsageFault_Handler, %function
+UsageFault_Handler:
+    B       .
+    .size   UsageFault_Handler, . - UsageFault_Handler
+
+    .weak   SVC_Handler
+    .type   SVC_Handler, %function
+SVC_Handler:
+    B       .
+    .size   SVC_Handler, . - SVC_Handler
+
+    .weak   DebugMon_Handler
+    .type   DebugMon_Handler, %function
+DebugMon_Handler:
+    B       .
+    .size   DebugMon_Handler, . - DebugMon_Handler
+
+    .weak   PendSV_Handler
+    .type   PendSV_Handler, %function
+PendSV_Handler:
+    B       .
+    .size   PendSV_Handler, . - PendSV_Handler
+
+    .weak   SysTick_Handler
+    .type   SysTick_Handler, %function
+SysTick_Handler:
+    B       .
+    .size   SysTick_Handler, . - SysTick_Handler
+
+
+/* IRQ Handlers */
+
+    .globl  Default_Handler
+    .type   Default_Handler, %function
+Default_Handler:
+    B       .
+    .size   Default_Handler, . - Default_Handler
+
+    .macro  IRQ handler
+    .weak   \handler
+    .set    \handler, Default_Handler
+    .endm
 
+    IRQ DAC_IRQHandler
+	IRQ DMA_IRQHandler
+	IRQ ETH_IRQHandler
+	IRQ SDIO_IRQHandler
+	IRQ LCD_IRQHandler
+	IRQ USB0_IRQHandler
+	IRQ USB1_IRQHandler
+	IRQ SCT_IRQHandler
+	IRQ RIT_IRQHandler
+	IRQ TIMER0_IRQHandler
+	IRQ TIMER1_IRQHandler
+	IRQ TIMER2_IRQHandler
+	IRQ TIMER3_IRQHandler
+	IRQ MCPWM_IRQHandler
+	IRQ ADC0_IRQHandler
+	IRQ I2C0_IRQHandler
+	IRQ I2C1_IRQHandler
+	IRQ ADC1_IRQHandler
+	IRQ SSP0_IRQHandler
+	IRQ SSP1_IRQHandler
+	IRQ UART0_IRQHandler
+	IRQ UART1_IRQHandler
+	IRQ UART2_IRQHandler
+	IRQ UART3_IRQHandler
+	IRQ I2S0_IRQHandler
+	IRQ I2S1_IRQHandler
+	IRQ SPIFI_IRQHandler
+	IRQ	SGPIO_IRQHandler
+	IRQ	GPIO0_IRQHandler
+	IRQ	GPIO1_IRQHandler
+	IRQ	GPIO2_IRQHandler
+	IRQ	GPIO3_IRQHandler
+	IRQ	GPIO4_IRQHandler
+	IRQ	GPIO5_IRQHandler
+	IRQ	GPIO6_IRQHandler
+	IRQ	GPIO7_IRQHandler
+	IRQ	GINT0_IRQHandler
+	IRQ	GINT1_IRQHandler
+	IRQ	EVRT_IRQHandler
+	IRQ	CAN1_IRQHandler
+	IRQ	VADC_IRQHandler
+	IRQ	ATIMER_IRQHandler
+	IRQ	RTC_IRQHandler
+	IRQ	WDT_IRQHandler
+	IRQ	CAN0_IRQHandler
+	IRQ	QEI_IRQHandler
     .end

bsp/xplorer4330/libraries/startup_code/keil_startup_lpc18xx43xx.s

@@ -48,85 +48,85 @@ __heap_limit
                 AREA    RESET, DATA, READONLY
                 EXPORT  __Vectors
 
-Sign_Value		EQU		0x5A5A5A5A
-
-__Vectors       DCD     __initial_sp              	; 0 Top of Stack
-                DCD     Reset_Handler             	; 1 Reset Handler
-                DCD     NMI_Handler               	; 2 NMI Handler
-                DCD     HardFault_Handler         	; 3 Hard Fault Handler
-                DCD     MemManage_Handler         	; 4 MPU Fault Handler
-                DCD     BusFault_Handler          	; 5 Bus Fault Handler
-                DCD     UsageFault_Handler        	; 6 Usage Fault Handler
-                DCD     Sign_Value                	; 7 Reserved
-                DCD     UnHandled_Vector           	; 8 Reserved
-                DCD     UnHandled_Vector           	; 9 Reserved
-                DCD     UnHandled_Vector          	; 10 Reserved
-                DCD     SVC_Handler               	; 11 SVCall Handler
-                DCD     DebugMon_Handler          	; 12 Debug Monitor Handler
-                DCD     UnHandled_Vector          	; 13 Reserved
-                DCD     PendSV_Handler            	; 14 PendSV Handler
-                DCD     SysTick_Handler           	; 15 SysTick Handler
+Sign_Value      EQU     0x5A5A5A5A
+
+__Vectors       DCD     __initial_sp                    ; 0 Top of Stack
+                DCD     Reset_Handler                   ; 1 Reset Handler
+                DCD     NMI_Handler                     ; 2 NMI Handler
+                DCD     HardFault_Handler               ; 3 Hard Fault Handler
+                DCD     MemManage_Handler               ; 4 MPU Fault Handler
+                DCD     BusFault_Handler                ; 5 Bus Fault Handler
+                DCD     UsageFault_Handler              ; 6 Usage Fault Handler
+                DCD     Sign_Value                      ; 7 Reserved
+                DCD     UnHandled_Vector                ; 8 Reserved
+                DCD     UnHandled_Vector                ; 9 Reserved
+                DCD     UnHandled_Vector                ; 10 Reserved
+                DCD     SVC_Handler                     ; 11 SVCall Handler
+                DCD     DebugMon_Handler                ; 12 Debug Monitor Handler
+                DCD     UnHandled_Vector                ; 13 Reserved
+                DCD     PendSV_Handler                  ; 14 PendSV Handler
+                DCD     SysTick_Handler                 ; 15 SysTick Handler
 
                 ; External Interrupts
-				DCD		DAC_IRQHandler	 			; 16 D/A Converter
-				DCD		MX_CORE_IRQHandler			; 17 M0/M4 IRQ handler (LPC43XX ONLY)
-				DCD		DMA_IRQHandler				; 18 General Purpose DMA
-				DCD		UnHandled_Vector			; 19 Reserved
-				DCD		FLASHEEPROM_IRQHandler		; 20 ORed flash bank A, flash bank B, EEPROM interrupts
-				DCD		ETH_IRQHandler				; 21 Ethernet
-				DCD		SDIO_IRQHandler				; 22 SD/MMC
-				DCD		LCD_IRQHandler				; 23 LCD
-				DCD		USB0_IRQHandler				; 24 USB0
-				DCD		USB1_IRQHandler				; 25 USB1
-				DCD		SCT_IRQHandler				; 26 State Configurable Timer
-				DCD		RIT_IRQHandler				; 27 Repetitive Interrupt Timer
-				DCD		TIMER0_IRQHandler			; 28 Timer0
-				DCD		TIMER1_IRQHandler			; 29 Timer1
-				DCD		TIMER2_IRQHandler			; 30 Timer2
-				DCD		TIMER3_IRQHandler			; 31 Timer3
-				DCD		MCPWM_IRQHandler			; 32 Motor Control PWM
-				DCD		ADC0_IRQHandler				; 33 A/D Converter 0
-				DCD		I2C0_IRQHandler				; 34 I2C0
-				DCD		I2C1_IRQHandler				; 35 I2C1
-				DCD		SPI_IRQHandler				; 36 SPI (LPC43XX ONLY)
-				DCD		ADC1_IRQHandler				; 37 A/D Converter 1
-				DCD		SSP0_IRQHandler				; 38 SSP0
-				DCD		SSP1_IRQHandler				; 39 SSP1
-				DCD		UART0_IRQHandler			; 40 UART0
-				DCD		UART1_IRQHandler			; 41 UART1
-				DCD		UART2_IRQHandler			; 42 UART2
-				DCD		UART3_IRQHandler			; 43 UART3
-				DCD		I2S0_IRQHandler				; 44 I2S0
-				DCD		I2S1_IRQHandler				; 45 I2S1
-				DCD		SPIFI_IRQHandler			; 46 SPI Flash Interface
-				DCD		SGPIO_IRQHandler			; 47 SGPIO (LPC43XX ONLY)
-				DCD		GPIO0_IRQHandler			; 48 GPIO0
-				DCD		GPIO1_IRQHandler			; 49 GPIO1
-				DCD		GPIO2_IRQHandler			; 50 GPIO2
-				DCD		GPIO3_IRQHandler			; 51 GPIO3
-				DCD		GPIO4_IRQHandler			; 52 GPIO4
-				DCD		GPIO5_IRQHandler			; 53 GPIO5
-				DCD		GPIO6_IRQHandler			; 54 GPIO6
-				DCD		GPIO7_IRQHandler			; 55 GPIO7
-				DCD		GINT0_IRQHandler			; 56 GINT0
-				DCD		GINT1_IRQHandler			; 57 GINT1
-				DCD		EVRT_IRQHandler				; 58 Event Router
-				DCD		CAN1_IRQHandler				; 59 C_CAN1
- 				DCD		UnHandled_Vector			; 60 Reserved
-				DCD		VADC_IRQHandler 			; 61 VADC
-				DCD		ATIMER_IRQHandler			; 62 ATIMER
-				DCD		RTC_IRQHandler				; 63 RTC
- 				DCD		UnHandled_Vector			; 64 Reserved
-				DCD		WDT_IRQHandler				; 65 WDT
-				DCD		UnHandled_Vector			; 66 M0s
-				DCD		CAN0_IRQHandler				; 67 C_CAN0
-				DCD 	QEI_IRQHandler				; 68 QEI
-
-
-;                IF      :LNOT::DEF:NO_CRP
-;                AREA    |.ARM.__at_0x02FC|, CODE, READONLY
-;CRP_Key         DCD     0xFFFFFFFF
-;                ENDIF
+                DCD     DAC_IRQHandler                  ; 16 D/A Converter
+                DCD     MX_CORE_IRQHandler              ; 17 M0/M4 IRQ handler (LPC43XX ONLY)
+                DCD     DMA_IRQHandler                  ; 18 General Purpose DMA
+                DCD     UnHandled_Vector                ; 19 Reserved
+                DCD     FLASHEEPROM_IRQHandler          ; 20 ORed flash bank A, flash bank B, EEPROM interrupts
+                DCD     ETH_IRQHandler                  ; 21 Ethernet
+                DCD     SDIO_IRQHandler                 ; 22 SD/MMC
+                DCD     LCD_IRQHandler                  ; 23 LCD
+                DCD     USB0_IRQHandler                 ; 24 USB0
+                DCD     USB1_IRQHandler                 ; 25 USB1
+                DCD     SCT_IRQHandler                  ; 26 State Configurable Timer
+                DCD     RIT_IRQHandler                  ; 27 Repetitive Interrupt Timer
+                DCD     TIMER0_IRQHandler               ; 28 Timer0
+                DCD     TIMER1_IRQHandler               ; 29 Timer1
+                DCD     TIMER2_IRQHandler               ; 30 Timer2
+                DCD     TIMER3_IRQHandler               ; 31 Timer3
+                DCD     MCPWM_IRQHandler                ; 32 Motor Control PWM
+                DCD     ADC0_IRQHandler                 ; 33 A/D Converter 0
+                DCD     I2C0_IRQHandler                 ; 34 I2C0
+                DCD     I2C1_IRQHandler                 ; 35 I2C1
+                DCD     SPI_IRQHandler                  ; 36 SPI (LPC43XX ONLY)
+                DCD     ADC1_IRQHandler                 ; 37 A/D Converter 1
+                DCD     SSP0_IRQHandler                 ; 38 SSP0
+                DCD     SSP1_IRQHandler                 ; 39 SSP1
+                DCD     UART0_IRQHandler                ; 40 UART0
+                DCD     UART1_IRQHandler                ; 41 UART1
+                DCD     UART2_IRQHandler                ; 42 UART2
+                DCD     UART3_IRQHandler                ; 43 UART3
+                DCD     I2S0_IRQHandler                 ; 44 I2S0
+                DCD     I2S1_IRQHandler                 ; 45 I2S1
+                DCD     SPIFI_IRQHandler                ; 46 SPI Flash Interface
+                DCD     SGPIO_IRQHandler                ; 47 SGPIO (LPC43XX ONLY)
+                DCD     GPIO0_IRQHandler                ; 48 GPIO0
+                DCD     GPIO1_IRQHandler                ; 49 GPIO1
+                DCD     GPIO2_IRQHandler                ; 50 GPIO2
+                DCD     GPIO3_IRQHandler                ; 51 GPIO3
+                DCD     GPIO4_IRQHandler                ; 52 GPIO4
+                DCD     GPIO5_IRQHandler                ; 53 GPIO5
+                DCD     GPIO6_IRQHandler                ; 54 GPIO6
+                DCD     GPIO7_IRQHandler                ; 55 GPIO7
+                DCD     GINT0_IRQHandler                ; 56 GINT0
+                DCD     GINT1_IRQHandler                ; 57 GINT1
+                DCD     EVRT_IRQHandler                 ; 58 Event Router
+                DCD     CAN1_IRQHandler                 ; 59 C_CAN1
+                DCD     UnHandled_Vector                ; 60 Reserved
+                DCD     VADC_IRQHandler                 ; 61 VADC
+                DCD     ATIMER_IRQHandler               ; 62 ATIMER
+                DCD     RTC_IRQHandler                  ; 63 RTC
+                DCD     UnHandled_Vector                ; 64 Reserved
+                DCD     WDT_IRQHandler                  ; 65 WDT
+                DCD     UnHandled_Vector                ; 66 M0s
+                DCD     CAN0_IRQHandler                 ; 67 C_CAN0
+                DCD     QEI_IRQHandler                  ; 68 QEI
+
+
+;               IF      :LNOT::DEF:NO_CRP
+;               AREA    |.ARM.__at_0x02FC|, CODE, READONLY
+;CRP_Key        DCD     0xFFFFFFFF
+;               ENDIF
 
                 AREA    |.text|, CODE, READONLY
 
@@ -135,9 +135,10 @@ __Vectors       DCD     __initial_sp              	; 0 Top of Stack
 Reset_Handler   PROC
                 EXPORT  Reset_Handler             [WEAK]
                 IMPORT  __main
-				IMPORT  SystemInit
-				LDR		R0, =SystemInit
-				BLX		R0
+                IMPORT  SystemInit
+                LDR     R0, =SystemInit
+                BLX     R0
+
                 LDR     R0, =__main
                 BX      R0
                 ENDP
@@ -185,62 +186,62 @@ SysTick_Handler PROC
                 EXPORT  SysTick_Handler           [WEAK]
                 B       .
                 ENDP
-UnHandled_Vector	PROC
+UnHandled_Vector        PROC
                 EXPORT  UnHandled_Vector          [WEAK]
                 B       .
                 ENDP
 
 Default_Handler PROC
 
-                EXPORT DAC_IRQHandler 	    	[WEAK]
-                EXPORT MX_CORE_IRQHandler	    [WEAK]
-				EXPORT DMA_IRQHandler		    [WEAK]
-                EXPORT FLASHEEPROM_IRQHandler	[WEAK]
-				EXPORT ETH_IRQHandler	    	[WEAK]
-				EXPORT SDIO_IRQHandler	    	[WEAK]
-				EXPORT LCD_IRQHandler	    	[WEAK]
-				EXPORT USB0_IRQHandler	    	[WEAK]
-				EXPORT USB1_IRQHandler	    	[WEAK]
-				EXPORT SCT_IRQHandler	    	[WEAK]
-				EXPORT RIT_IRQHandler	    	[WEAK]
-				EXPORT TIMER0_IRQHandler    	[WEAK]
-				EXPORT TIMER1_IRQHandler    	[WEAK]
-				EXPORT TIMER2_IRQHandler    	[WEAK]
-				EXPORT TIMER3_IRQHandler    	[WEAK]
-				EXPORT MCPWM_IRQHandler	    	[WEAK]
-				EXPORT ADC0_IRQHandler	    	[WEAK]
-				EXPORT I2C0_IRQHandler	    	[WEAK]
-				EXPORT I2C1_IRQHandler	    	[WEAK]
-                EXPORT SPI_IRQHandler	    	[WEAK]
-				EXPORT ADC1_IRQHandler		    [WEAK]
-				EXPORT SSP0_IRQHandler	    	[WEAK]
-				EXPORT SSP1_IRQHandler	    	[WEAK]
-				EXPORT UART0_IRQHandler	    	[WEAK]
-				EXPORT UART1_IRQHandler	    	[WEAK]
-				EXPORT UART2_IRQHandler	    	[WEAK]
-				EXPORT UART3_IRQHandler	    	[WEAK]
-				EXPORT I2S0_IRQHandler	    	[WEAK]
-				EXPORT I2S1_IRQHandler	    	[WEAK]
-				EXPORT SPIFI_IRQHandler     	[WEAK]
-				EXPORT SGPIO_IRQHandler     	[WEAK]
-				EXPORT GPIO0_IRQHandler	        [WEAK]
-				EXPORT GPIO1_IRQHandler     	[WEAK]
-				EXPORT GPIO2_IRQHandler	        [WEAK]
-				EXPORT GPIO3_IRQHandler     	[WEAK]
-				EXPORT GPIO4_IRQHandler     	[WEAK]
-				EXPORT GPIO5_IRQHandler     	[WEAK]
-				EXPORT GPIO6_IRQHandler	        [WEAK]
-				EXPORT GPIO7_IRQHandler	        [WEAK]
-				EXPORT GINT0_IRQHandler	        [WEAK]
-				EXPORT GINT1_IRQHandler	        [WEAK]
-				EXPORT EVRT_IRQHandler		    [WEAK]
-				EXPORT CAN1_IRQHandler	    	[WEAK]
-				EXPORT VADC_IRQHandler	    	[WEAK]
-				EXPORT ATIMER_IRQHandler    	[WEAK]
-				EXPORT RTC_IRQHandler	    	[WEAK]
-				EXPORT WDT_IRQHandler	    	[WEAK]
-				EXPORT CAN0_IRQHandler	    	[WEAK]
-				EXPORT QEI_IRQHandler	    	[WEAK]
+                EXPORT DAC_IRQHandler           [WEAK]
+                EXPORT MX_CORE_IRQHandler       [WEAK]
+                EXPORT DMA_IRQHandler           [WEAK]
+                EXPORT FLASHEEPROM_IRQHandler   [WEAK]
+                EXPORT ETH_IRQHandler           [WEAK]
+                EXPORT SDIO_IRQHandler          [WEAK]
+                EXPORT LCD_IRQHandler           [WEAK]
+                EXPORT USB0_IRQHandler          [WEAK]
+                EXPORT USB1_IRQHandler          [WEAK]
+                EXPORT SCT_IRQHandler           [WEAK]
+                EXPORT RIT_IRQHandler           [WEAK]
+                EXPORT TIMER0_IRQHandler        [WEAK]
+                EXPORT TIMER1_IRQHandler        [WEAK]
+                EXPORT TIMER2_IRQHandler        [WEAK]
+                EXPORT TIMER3_IRQHandler        [WEAK]
+                EXPORT MCPWM_IRQHandler         [WEAK]
+                EXPORT ADC0_IRQHandler          [WEAK]
+                EXPORT I2C0_IRQHandler          [WEAK]
+                EXPORT I2C1_IRQHandler          [WEAK]
+                EXPORT SPI_IRQHandler           [WEAK]
+                EXPORT ADC1_IRQHandler          [WEAK]
+                EXPORT SSP0_IRQHandler          [WEAK]
+                EXPORT SSP1_IRQHandler          [WEAK]
+                EXPORT UART0_IRQHandler         [WEAK]
+                EXPORT UART1_IRQHandler         [WEAK]
+                EXPORT UART2_IRQHandler         [WEAK]
+                EXPORT UART3_IRQHandler         [WEAK]
+                EXPORT I2S0_IRQHandler          [WEAK]
+                EXPORT I2S1_IRQHandler          [WEAK]
+                EXPORT SPIFI_IRQHandler         [WEAK]
+                EXPORT SGPIO_IRQHandler         [WEAK]
+                EXPORT GPIO0_IRQHandler         [WEAK]
+                EXPORT GPIO1_IRQHandler         [WEAK]
+                EXPORT GPIO2_IRQHandler         [WEAK]
+                EXPORT GPIO3_IRQHandler         [WEAK]
+                EXPORT GPIO4_IRQHandler         [WEAK]
+                EXPORT GPIO5_IRQHandler         [WEAK]
+                EXPORT GPIO6_IRQHandler         [WEAK]
+                EXPORT GPIO7_IRQHandler         [WEAK]
+                EXPORT GINT0_IRQHandler         [WEAK]
+                EXPORT GINT1_IRQHandler         [WEAK]
+                EXPORT EVRT_IRQHandler          [WEAK]
+                EXPORT CAN1_IRQHandler          [WEAK]
+                EXPORT VADC_IRQHandler          [WEAK]
+                EXPORT ATIMER_IRQHandler        [WEAK]
+                EXPORT RTC_IRQHandler           [WEAK]
+                EXPORT WDT_IRQHandler           [WEAK]
+                EXPORT CAN0_IRQHandler          [WEAK]
+                EXPORT QEI_IRQHandler           [WEAK]
 
 DAC_IRQHandler
 MX_CORE_IRQHandler
@@ -322,5 +323,5 @@ __user_initial_stackheap
 
                 ENDIF
 
-				END
-				
+                END
+

bsp/xplorer4330/m4/lpc4330_xplorer_spifi32mb.ld

@@ -70,12 +70,12 @@ SECTIONS
         _edata = . ;
     } >DATA
 
-	.stack : 
-	{
-		. = . + _system_stack_size;
-		. = ALIGN(4);
-		_estack = .;
-	} >DATA
+    .stack : 
+    {
+        . = . + _system_stack_size;
+        . = ALIGN(4);
+        _estack = .;
+    } >DATA
 
     __bss_start = .;
     .bss :

bsp/xplorer4330/m4/rtconfig.h

@@ -64,9 +64,10 @@
 
 // <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >
 #define RT_USING_DEVICE
+// <bool name=RT_USING_DEVICE_IPC description="Using IPC in Device Driver Framework" default="true" />
+#define RT_USING_DEVICE_IPC
 // <bool name="RT_USING_SERIAL" description="Using Serial Device Driver Framework" default="true" />
 #define RT_USING_SERIAL
-#define RT_USING_DEVICE_IPC
 
 // <bool name="RT_USING_UART0" description="Using UART0" default="true" />
 #define RT_USING_UART0