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[bluetrum] edit .lds

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greedyhao 4 년 전
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54c880e979

+ 30 - 3
bsp/bluetrum/ab32vg1-ab-prougen/.config

@@ -23,7 +23,18 @@ CONFIG_IDLE_THREAD_STACK_SIZE=1024
 CONFIG_RT_USING_TIMER_SOFT=y
 CONFIG_RT_TIMER_THREAD_PRIO=4
 CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
-# CONFIG_RT_DEBUG is not set
+CONFIG_RT_DEBUG=y
+# CONFIG_RT_DEBUG_COLOR is not set
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
 
 #
 # Inter-Thread communication
@@ -83,7 +94,7 @@ CONFIG_FINSH_USING_HISTORY=y
 CONFIG_FINSH_HISTORY_LINES=5
 CONFIG_FINSH_USING_SYMTAB=y
 CONFIG_FINSH_USING_DESCRIPTION=y
-CONFIG_FINSH_ECHO_DISABLE_DEFAULT=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
 CONFIG_FINSH_THREAD_PRIORITY=20
 CONFIG_FINSH_THREAD_STACK_SIZE=4096
 CONFIG_FINSH_CMD_SIZE=80
@@ -417,7 +428,10 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_MULTIBUTTON_V102 is not set
+# CONFIG_PKG_USING_MULTIBUTTON_LATEST_VERSION is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
@@ -458,7 +472,20 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
 
 #
-# General Purpose UARTs
+# Hardware Drivers Config
+#
+
+#
+# Onboard Peripheral Drivers
+#
+CONFIG_BSP_USING_USB_TO_USART=y
+
+#
+# On-chip Peripheral Drivers
 #
 CONFIG_BSP_USING_UART0=y
+
+#
+# Board extended module Drivers
+#
 CONFIG_BOARD_BLUETRUM_EVB=y

+ 3 - 0
bsp/bluetrum/ab32vg1-ab-prougen/.gitignore

@@ -2,9 +2,12 @@
 *.bin
 *.dcf
 *.map
+*.lst
 *.pyc
 *.elf
 *.old
+*.o
 
 build
 dist
+packages

+ 2 - 0
bsp/bluetrum/ab32vg1-ab-prougen/README.md

@@ -102,6 +102,8 @@ msh >
 
 ## 注意事项
 
+波特率默认为 1.5M,需要使用 [Downloader](https://github.com/BLUETRUM/Downloader) 下载 `.dcf` 到芯片
+
 编译报错的时候,如果出现重复定义的报错,可能需要在 `cconfig.h` 中手动添加以下配置
 
 ```

+ 18 - 1
bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig

@@ -1,4 +1,16 @@
-menu "General Purpose UARTs"
+menu "Hardware Drivers Config"
+
+menu "Onboard Peripheral Drivers"
+
+    config BSP_USING_USB_TO_USART
+        bool "Enable USB TO USART (uart0)"
+        select BSP_USING_UART
+        select BSP_USING_UART0
+        default y
+
+endmenu
+
+menu "On-chip Peripheral Drivers"
 
 menuconfig BSP_USING_UART0
     bool "Enable UART0"
@@ -6,3 +18,8 @@ menuconfig BSP_USING_UART0
     default y
 
 endmenu
+
+menu "Board extended module Drivers"
+endmenu
+
+endmenu

+ 2 - 2
bsp/bluetrum/ab32vg1-ab-prougen/board/board.c

@@ -17,7 +17,7 @@ void timer0_cfg(uint32_t ticks);
 void rt_soft_isr(int vector, void *param);
 void cpu_irq_comm(void);
 void set_cpu_irq_comm(void (*irq_hook)(void));
-extern uint32_t __aram_start, __eram_end;
+extern uint32_t __heap_start, __heap_end;
 
 void hal_printf(const char *fmt, ...)
 {
@@ -108,7 +108,7 @@ void rt_hw_board_init(void)
     rt_hw_systick_init();
 
 #ifdef RT_USING_HEAP
-    rt_system_heap_init(&__aram_start, &__eram_end);
+    rt_system_heap_init(&__heap_start, &__heap_end);
 #endif
 
 #ifdef RT_USING_PIN

+ 46 - 33
bsp/bluetrum/ab32vg1-ab-prougen/link.lds

@@ -1,21 +1,26 @@
 /* Define the flash max size */
 __max_flash_size = 768k;
 
+__comm_ram_size = 104k;
+__heap_ram_size = 14k;
+
 __base = 0x10000000;
 
-__comm_vma = 0x17000;
-__max_comm_size = 76k;
+__comm_vma = 0x12800;
+__heap_vma = __comm_vma + __comm_ram_size;
+
+__ram1_vma = 0x50000;
 
 MEMORY
 {
     init            : org = __base,             len = 512
     flash(rx)       : org = __base + 512,       len = __max_flash_size
-    comm(rx)        : org = __comm_vma,         len = __max_comm_size
-    data            : org = 0x11000,            len = 16k
-    stack           : org = 0x15000,            len = 8k
-    aram            : org = 0x50000,            len = 16k
-    dram            : org = 0x54000,            len = 12k
-    eram            : org = 0x57000,            len = 0xa00
+    comm(rx)        : org = __comm_vma,         len = __comm_ram_size
+
+    data            : org = 0x11000,            len = 5k
+    stack           : org = 0x12400,            len = 1k
+    heap            : org = __heap_vma,         len = __heap_ram_size
+    ram1(rx)        : org = __ram1_vma,         len = 0x7a00
 }
 
 SECTIONS
@@ -24,17 +29,17 @@ SECTIONS
         *(.reset)
     } > init
 
-    .comm : {
-        KEEP(*(.vector))
-        *(.com_text*)
-        *(.text*)
-        *(.rodata*)
-        *(.com_rodata*)
-        *(.rela*)
-        *(.data*)
-	    *(.sdata*)
-        LONG(0)
-    } > comm AT > flash
+    .ram1 __ram1_vma : {
+        /*board\\ports\\*.o(.text*)*/
+        *hal_drivers\\*.o(.text*)
+        *hal_libraries\\ab32vg1_hal\\*.o(.text*)
+        *components\\drivers\\*.o(.text* .rodata*)
+        *components\\libc\\*.o(.text*)
+        *ab32vg1_hal_msp.o(.text*)
+        *components.o(.text* .rodata*)
+        *ipc.o(.text* .rodata*)
+        . = ALIGN(32);
+    } > ram1 AT > flash
 
     .rti : {
         . = ALIGN(4);
@@ -52,6 +57,19 @@ SECTIONS
         __vsymtab_start = .;
         KEEP(*(VSymTab))
         __vsymtab_end = .;
+
+        . = ALIGN(32);
+    } > ram1 AT > flash
+
+    .comm : {
+        KEEP(*(.vector))
+        *(.text*)
+        *(.rodata*)
+        *(.srodata*)
+        *(.rela*)
+        *(.data*)
+	    *(.sdata*)
+        . = ALIGN(512);
     } > comm AT > flash
 
     .flash : {
@@ -71,26 +89,21 @@ SECTIONS
 
     .stack (NOLOAD) : {
         __irq_stack_start = .;
-        . = 0x2000;
+        . = 0x400;
         __irq_stack = .;
     } > stack
     __irq_stack_size = __irq_stack - __irq_stack_start;
 
-    .code_aecram (NOLOAD): {
-        __aram_start = .;
-    } > aram
-
-    .code_decram (NOLOAD): {
-    } > dram
-
-    .code_encram (NOLOAD): {
-        __eram_start = .;
-        . = 0xa00;
-        __eram_end = .;
-    } > eram
+    .heap : {
+        __heap_start = .;
+        . = __heap_ram_size;
+        __heap_end = .;
+    } > heap
 }
 
 /* Calc the lma */
 __bank_size = SIZEOF(.flash);
 __comm_lma = LOADADDR(.comm);
-__comm_size = SIZEOF(.comm) + SIZEOF(.rti);
+__comm_size = SIZEOF(.comm);
+__ram1_lma = LOADADDR(.ram1);
+__ram1_size = SIZEOF(.ram1) + SIZEOF(.rti);

+ 11 - 2
bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h

@@ -19,6 +19,7 @@
 #define RT_USING_TIMER_SOFT
 #define RT_TIMER_THREAD_PRIO 4
 #define RT_TIMER_THREAD_STACK_SIZE 512
+#define RT_DEBUG
 
 /* Inter-Thread communication */
 
@@ -62,7 +63,6 @@
 #define FINSH_HISTORY_LINES 5
 #define FINSH_USING_SYMTAB
 #define FINSH_USING_DESCRIPTION
-#define FINSH_ECHO_DISABLE_DEFAULT
 #define FINSH_THREAD_PRIORITY 20
 #define FINSH_THREAD_STACK_SIZE 4096
 #define FINSH_CMD_SIZE 80
@@ -154,9 +154,18 @@
 /* games: games run on RT-Thread console */
 
 
-/* General Purpose UARTs */
+/* Hardware Drivers Config */
+
+/* Onboard Peripheral Drivers */
+
+#define BSP_USING_USB_TO_USART
+
+/* On-chip Peripheral Drivers */
 
 #define BSP_USING_UART0
+
+/* Board extended module Drivers */
+
 #define BOARD_BLUETRUM_EVB
 
 #endif

+ 13 - 3
bsp/bluetrum/libraries/hal_drivers/drv_gpio.c

@@ -40,9 +40,19 @@ static const hal_sfr_t port_sfr[] =
     GPIOF_BASE,
 };
 
+static uint8_t _pin_port(uint32_t pin)
+{
+    uint8_t port = 0;
+    for (port = 0; port < 3; port++) {
+        if (pin < (port_table[port].total_pin + port_table[port].delta_pin)) {
+            break;
+        }
+    }
+    return port;
+}
+
 #define PIN_NUM(port, no)       ((uint8_t)(port_table[port].total_pin + no - port_table[port].start_pin))
-#define _PIN_PORT(pin)          (uint8_t)(((pin) >> 3) & 0xFu)
-#define PIN_PORT(pin)           ((port_table[_PIN_PORT(pin)].delta_pin == 8) ? _PIN_PORT(pin) : _PIN_PORT(pin) + 1)
+#define PIN_PORT(pin)           _pin_port(pin)
 #define PORT_SFR(port)          (port_sfr[(port)])
 #define PIN_NO(pin)             (uint8_t)((pin) & 0xFu)
 
@@ -95,7 +105,7 @@ static void ab32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
 {
     uint8_t port = PIN_PORT(pin);
     uint8_t gpio_pin  = pin - port_table[port].total_pin;
-    hal_gpio_write(PORT_SFR(port), gpio_pin, value);
+    hal_gpio_write(PORT_SFR(port), gpio_pin, (uint8_t)value);
 }
 
 static int ab32_pin_read(rt_device_t dev, rt_base_t pin)

+ 1 - 1
bsp/bluetrum/libraries/hal_drivers/drv_usart.c

@@ -187,7 +187,7 @@ int rt_hw_usart_init(void)
         uart_obj[i].config          = &uart_config[i];
         uart_obj[i].serial.ops      = &ab32_uart_ops;
         uart_obj[i].serial.config   = config;
-        uart_obj[0].serial.config.baud_rate = 1500000;
+        uart_obj[i].serial.config.baud_rate = 1500000;
 
         /* register UART device */
         result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,

+ 0 - 2
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_hal_gpio.h

@@ -80,8 +80,6 @@ enum
 #define GPIO_PIN_6          (BIT(6))
 #define GPIO_PIN_7          (BIT(7))
 
-#define __HAL_GPIO_SET_DIR(__PORT__, __PIN__, __DIR__) (__DIR__) ? (GPIOx_REG((__PORT__), (GPIOxDIR)) |= BIT(__PIN__)) : (GPIOx_REG((__PORT__), (GPIOxDIR)) &= ~BIT(__PIN__))
-
 /* Include GPIO HAL Extended module */
 #include "ab32vg1_hal_gpio_ex.h"
 

+ 1 - 1
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal.c

@@ -34,5 +34,5 @@ void hal_udelay(uint16_t nus)
    }
 }
 
-WEAK void hal_printf(const char *format, ...)
+WEAK void hal_printf(const char *fmt, ...)
 {}

+ 0 - 6
bsp/bluetrum/libraries/hal_libraries/bmsis/include/ab32vgx.h

@@ -23,12 +23,6 @@
 #define WEAK                    __attribute__((weak))
 #define PACKED                  __attribute__((packed))
 
-// #define WDT_CLR()               WDTCON = 0xa
-// #define WDT_EN()                WDTCON = 0x110
-// #define WDT_DIS()               WDTCON = 0xaa0
-// #define WDT_RST()               WDTCON = 0xa000110; while (1)
-// #define WDT_RST_DELAY()         WDTCON = 0xa100110; while (1)
-
 #define BYTE0(n)                ((unsigned char)(n))
 #define BYTE1(n)                ((unsigned char)((n)>>8))
 #define BYTE2(n)                ((unsigned char)((n)>>16))

+ 7 - 34
bsp/bluetrum/libraries/hal_libraries/bmsis/source/startup.S

@@ -9,44 +9,18 @@
 .global _start
 .section .reset, "ax"
 _start:
+
     //load comm
     la      a0, __comm_vma
     la      a1, __comm_lma
     la      a2, __comm_size
+    call    0x84044
 
-    /* memcpy start */
-    //先按32 BYTE一个循环来copy
-    mv      t0, a0              //备份dst
-    srli    t1, a2, 5           //长度除32的商
-
-    slli    t1, t1, 5
-    add     t1, a0, t1          //t1存放对齐的结束地址
-
-    _memcpy_loop1:              //8 WORDS every cycle
-    lw      a2, 0(a1)
-    lw      a3, 4(a1)
-    lw      a4, 8(a1)
-    lw      a5, 12(a1)
-    sw      a2, 0(a0)
-    sw      a3, 4(a0)
-    sw      a4, 8(a0)
-    sw      a5, 12(a0)
-
-    lw      a2, 16(a1)
-    lw      a3, 20(a1)
-    lw      a4, 24(a1)
-    lw      a5, 28(a1)
-    sw      a2, 16(a0)
-    sw      a3, 20(a0)
-    sw      a4, 24(a0)
-    sw      a5, 28(a0)
-
-    addi    a0, a0, 32
-    addi    a1, a1, 32
-    blt     a0, t1, _memcpy_loop1
-
-    mv      a0, t0              //返回dst
-    /* memcpy end */
+    //load ram1
+    la      a0, __ram1_vma
+    la      a1, __ram1_lma
+    la      a2, __ram1_size
+    call    0x84044
 
     la      a0, __irq_stack_start           //Stack清成0x23
     li      a1, 0x23
@@ -83,7 +57,6 @@ _start:
     mret
 
     .global cpu_irq_comm
-    .section .com_text.irq
 cpu_irq_comm:
     la      a5, __irq_stack
     mv      sp, a5

+ 0 - 9
bsp/bluetrum/libraries/hal_libraries/bmsis/source/system_ab32vgx.c

@@ -20,7 +20,6 @@ typedef struct _sys_t {
     uint32_t uart0baud;          //UART0BAUD
 } sys_t;
 
-AT(.text.sys_clk.table)
 const uint8_t sysclk_sel_tbl[] = {
     OSCDIV_2M,          //SYS_2M
     PLL0DIV_12M,        //SYS_12M
@@ -34,7 +33,6 @@ const uint8_t sysclk_sel_tbl[] = {
     PLL0DIV_120M,       //SYS_120M
 };
 
-AT(.text.sys_clk.table)
 const uint8_t sysclk_index[] = {
     2,
     12,
@@ -51,7 +49,6 @@ const uint8_t sysclk_index[] = {
 sys_t sys = {0};
 void my_printf(const char *format, ...);
 
-AT(.com_text.delay)
 static void delay_us(uint16_t nus)
 {
    int i;
@@ -60,13 +57,11 @@ static void delay_us(uint16_t nus)
    }
 }
 
-AT(.text.sys_clk)
 uint8_t get_clksel_val(uint8_t val)
 {
     return sysclk_sel_tbl[val];
 }
 
-AT(.text.sys_clk)
 uint8_t get_cur_sysclk(void)
 {
     return sys.sys_clk;
@@ -90,13 +85,11 @@ uint32_t get_sysclk_nhz(void)
 //    }
 //}
 
-AT(.text.sys_clk)
 uint8_t get_sd_rate(void)
 {
     return 0;  //unit: M
 }
 
-AT(.text.sys_clk)
 uint8_t set_sd_baud(uint8_t sd_rate)
 {
     uint8_t sd0baud=0;
@@ -148,7 +141,6 @@ void update_sd0baud(void)
     }
 }
 
-AT(.text.sys_clk)
 uint8_t sysclk_update_baud(uint8_t baud)
 {
     uint8_t sd_rate=get_sd_rate();
@@ -181,7 +173,6 @@ void set_sys_uart0baud(uint32_t baud)
 }
 
 //切系统时钟前,先设置模块时钟分频较大值,保证模块不会超频的情况
-AT(.com_text.sys)
 void set_peripherals_clkdiv_safety(void)
 {
     uint32_t clkcon3 = CLKCON3;