瀏覽代碼

[bsp][gd32e230k-start] Update Sconscript

xuzhuoyi 6 年之前
父節點
當前提交
5a460aadcd

+ 8 - 14
bsp/gd32e230k-start/Libraries/SConscript

@@ -6,27 +6,21 @@ cwd = GetCurrentDir()
 
 # The set of source files associated with this SConscript file.
 
-src = Glob('GD32F30x_standard_peripheral/Source/*.c')
-src += [cwd + '/CMSIS/GD/GD32F30x/Source/system_gd32f30x.c']
+src = Glob('GD32E230_standard_peripheral/Source/*.c')
+src += [cwd + '/CMSIS/GD/GD32E230/Source/system_gd32e230.c']
 
 #add for startup script
-if rtconfig.CROSS_TOOL == 'gcc':
-    src += [cwd + '/CMSIS/GD/GD32F30x/Source/GCC/startup_gd32f30x_hd.s']
-elif rtconfig.CROSS_TOOL == 'keil':
-    src += [cwd + '/CMSIS/GD/GD32F30x/Source/ARM/startup_gd32f30x_hd.s']
+if rtconfig.CROSS_TOOL == 'keil':
+    src += [cwd + '/CMSIS/GD/GD32E230/Source/ARM/startup_gd32e230.s']
 elif rtconfig.CROSS_TOOL == 'iar':
-    src += [cwd + '/CMSIS/GD/GD32F30x/Source/IAR/startup_gd32f30x_hd.s']
+    src += [cwd + '/CMSIS/GD/GD32E230/Source/IAR/startup_gd32e230.s']
 
 path = [
-    cwd + '/CMSIS/GD/GD32F30x/Include',
+    cwd + '/CMSIS/GD/GD32E230/Include',
     cwd + '/CMSIS',
-    cwd + '/GD32F30x_standard_peripheral/Include',]
-    
-if GetDepend(['RT_USING_BSP_USB']):
-    path += [cwd + '/GD32F30x_usb_driver/Include']
-    src  += [cwd + '/GD32F30x_usb_driver/Source']
+    cwd + '/GD32E230_standard_peripheral/Include',]
 
-CPPDEFINES = ['USE_STDPERIPH_DRIVER', 'GD32F30X_HD']
+CPPDEFINES = ['GD32E230']
 
 group = DefineGroup('GD32_Lib', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
 

+ 1 - 1
bsp/gd32e230k-start/SConstruct

@@ -15,7 +15,7 @@ except:
     print(RTT_ROOT)
     exit(-1)
 
-TARGET = 'rtthread-gd32f30x.' + rtconfig.TARGET_EXT
+TARGET = 'rtthread-gd32f230.' + rtconfig.TARGET_EXT
 
 env = Environment(tools = ['mingw'],
     AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,

+ 0 - 4
bsp/gd32e230k-start/drivers/SConscript

@@ -24,10 +24,6 @@ if GetDepend('RT_USING_I2C'):
 if GetDepend('RT_USING_PIN'):
     src += ['drv_gpio.c']
 
-# add spi flash drivers.
-if GetDepend('RT_USING_SFUD'):
-    src += ['drv_spi_flash.c']
-
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
 
 Return('group')

+ 1 - 1
bsp/gd32e230k-start/drivers/board.h

@@ -29,7 +29,7 @@ extern char __ICFEDIT_region_RAM_end__;
 #define GD32_SRAM_END          (0x20000000 + GD32_SRAM_SIZE * 1024)
 #endif
 
-#ifdef __CC_ARM
+#ifdef __ARMCC_VERSION
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

File diff suppressed because it is too large
+ 200 - 244
bsp/gd32e230k-start/project.uvoptx


+ 131 - 187
bsp/gd32e230k-start/project.uvprojx

@@ -7,11 +7,10 @@
 
   <Targets>
     <Target>
-      <TargetName>rt-thread_gd32f30x</TargetName>
+      <TargetName>rt-thread_gd32e230</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
-      <pArmCC>6120000::V6.12::.\ARMCLANG</pArmCC>
-      <pCCUsed>6120000::V6.12::.\ARMCLANG</pCCUsed>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
       <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
@@ -50,7 +49,7 @@
             <InvalidFlash>1</InvalidFlash>
           </TargetStatus>
           <OutputDirectory>.\build\</OutputDirectory>
-          <OutputName>rtthread-gd32f30x</OutputName>
+          <OutputName>rtthread-gd32e230</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
           <CreateHexFile>0</CreateHexFile>
@@ -313,7 +312,7 @@
           </ArmAdsMisc>
           <Cads>
             <interw>1</interw>
-            <Optim>7</Optim>
+            <Optim>1</Optim>
             <oTime>0</oTime>
             <SplitLS>0</SplitLS>
             <OneElfS>0</OneElfS>
@@ -322,14 +321,14 @@
             <PlainCh>0</PlainCh>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
-            <wLevel>3</wLevel>
+            <wLevel>0</wLevel>
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>1</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>3</v6Lang>
-            <v6LangP>3</v6LangP>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
             <vShortEn>1</vShortEn>
             <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
@@ -337,9 +336,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls></MiscControls>
-              <Define>GD32E230, RT_USING_ARM_LIBC</Define>
+              <Define>GD32E230</Define>
               <Undefine></Undefine>
-              <IncludePath>applications;.;drivers;Libraries\CMSIS;..\..\include;..\..\libcpu\arm\common;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\dfs\filesystems\elmfat;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\spi\sfud\inc;..\..\components\drivers\include;..\..\components\finsh;..\..\components\libc\compilers\armlibc;.\Libraries\GD32E230_standard_peripheral\Include;.\Libraries\CMSIS\GD\GD32E230\Include;..\..\libcpu\arm\cortex-m23</IncludePath>
+              <IncludePath>.;..\..\include;applications;.;drivers;Libraries\CMSIS\GD\GD32E230\Include;Libraries\CMSIS;Libraries\GD32E230_standard_peripheral\Include;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m23;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\spi\sfud\inc;..\..\components\drivers\include;..\..\components\finsh</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -373,13 +372,93 @@
             <ScatterFile></ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
-            <Misc>--keep *.o(.rti_fn.*)   --keep *.o(FSymTab) --keep *.o(VSymTab)</Misc>
+            <Misc></Misc>
             <LinkerInputFile></LinkerInputFile>
             <DisabledWarnings></DisabledWarnings>
           </LDads>
         </TargetArmAds>
       </TargetOption>
       <Groups>
+        <Group>
+          <GroupName>Kernel</GroupName>
+          <Files>
+            <File>
+              <FileName>clock.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\clock.c</FilePath>
+            </File>
+            <File>
+              <FileName>components.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\components.c</FilePath>
+            </File>
+            <File>
+              <FileName>cpu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\cpu.c</FilePath>
+            </File>
+            <File>
+              <FileName>device.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\device.c</FilePath>
+            </File>
+            <File>
+              <FileName>idle.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\idle.c</FilePath>
+            </File>
+            <File>
+              <FileName>ipc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\ipc.c</FilePath>
+            </File>
+            <File>
+              <FileName>irq.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\irq.c</FilePath>
+            </File>
+            <File>
+              <FileName>kservice.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\kservice.c</FilePath>
+            </File>
+            <File>
+              <FileName>mem.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\mem.c</FilePath>
+            </File>
+            <File>
+              <FileName>mempool.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\mempool.c</FilePath>
+            </File>
+            <File>
+              <FileName>object.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\object.c</FilePath>
+            </File>
+            <File>
+              <FileName>scheduler.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\scheduler.c</FilePath>
+            </File>
+            <File>
+              <FileName>signal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\signal.c</FilePath>
+            </File>
+            <File>
+              <FileName>thread.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\thread.c</FilePath>
+            </File>
+            <File>
+              <FileName>timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\src\timer.c</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>Applications</GroupName>
           <Files>
@@ -426,187 +505,112 @@
             <File>
               <FileName>gd32e230_adc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_adc.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_adc.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_cmp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_cmp.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_cmp.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_crc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_crc.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_crc.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_dbg.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_dbg.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_dbg.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_dma.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_dma.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_dma.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_exti.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_exti.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_exti.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_fmc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_fmc.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_fmc.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_fwdgt.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_fwdgt.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_fwdgt.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_gpio.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_gpio.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_i2c.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_i2c.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_i2c.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_misc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_misc.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_misc.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_pmu.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_pmu.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_pmu.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_rcu.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_rcu.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_rcu.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_rtc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_rtc.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_rtc.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_spi.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_spi.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_spi.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_syscfg.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_syscfg.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_syscfg.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_timer.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_timer.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_usart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_usart.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_usart.c</FilePath>
             </File>
             <File>
               <FileName>gd32e230_wwdgt.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\GD32E230_standard_peripheral\Source\gd32e230_wwdgt.c</FilePath>
+              <FilePath>Libraries\GD32E230_standard_peripheral\Source\gd32e230_wwdgt.c</FilePath>
             </File>
             <File>
               <FileName>system_gd32e230.c</FileName>
               <FileType>1</FileType>
-              <FilePath>.\Libraries\CMSIS\GD\GD32E230\Source\system_gd32e230.c</FilePath>
+              <FilePath>Libraries\CMSIS\GD\GD32E230\Source\system_gd32e230.c</FilePath>
             </File>
             <File>
               <FileName>startup_gd32e230.s</FileName>
               <FileType>2</FileType>
-              <FilePath>.\Libraries\CMSIS\GD\GD32E230\Source\ARM\startup_gd32e230.s</FilePath>
-            </File>
-          </Files>
-        </Group>
-        <Group>
-          <GroupName>Kernel</GroupName>
-          <Files>
-            <File>
-              <FileName>clock.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\clock.c</FilePath>
-            </File>
-            <File>
-              <FileName>components.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\components.c</FilePath>
-            </File>
-            <File>
-              <FileName>device.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\device.c</FilePath>
-            </File>
-            <File>
-              <FileName>idle.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\idle.c</FilePath>
-            </File>
-            <File>
-              <FileName>ipc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\ipc.c</FilePath>
-            </File>
-            <File>
-              <FileName>irq.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\irq.c</FilePath>
-            </File>
-            <File>
-              <FileName>kservice.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\kservice.c</FilePath>
-            </File>
-            <File>
-              <FileName>mem.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\mem.c</FilePath>
-            </File>
-            <File>
-              <FileName>mempool.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\mempool.c</FilePath>
-            </File>
-            <File>
-              <FileName>object.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\object.c</FilePath>
-            </File>
-            <File>
-              <FileName>scheduler.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\scheduler.c</FilePath>
-            </File>
-            <File>
-              <FileName>signal.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\signal.c</FilePath>
-            </File>
-            <File>
-              <FileName>thread.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\thread.c</FilePath>
-            </File>
-            <File>
-              <FileName>timer.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\src\timer.c</FilePath>
+              <FilePath>Libraries\CMSIS\GD\GD32E230\Source\ARM\startup_gd32e230.s</FilePath>
             </File>
           </Files>
         </Group>
         <Group>
-          <GroupName>CORTEX-M23</GroupName>
+          <GroupName>cpu</GroupName>
           <Files>
             <File>
               <FileName>backtrace.c</FileName>
@@ -635,46 +639,6 @@
             </File>
           </Files>
         </Group>
-        <Group>
-          <GroupName>Filesystem</GroupName>
-          <Files>
-            <File>
-              <FileName>dfs.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\dfs\src\dfs.c</FilePath>
-            </File>
-            <File>
-              <FileName>dfs_file.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\dfs\src\dfs_file.c</FilePath>
-            </File>
-            <File>
-              <FileName>dfs_fs.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\dfs\src\dfs_fs.c</FilePath>
-            </File>
-            <File>
-              <FileName>dfs_posix.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\dfs\src\dfs_posix.c</FilePath>
-            </File>
-            <File>
-              <FileName>devfs.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\dfs\filesystems\devfs\devfs.c</FilePath>
-            </File>
-            <File>
-              <FileName>dfs_elm.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\dfs\filesystems\elmfat\dfs_elm.c</FilePath>
-            </File>
-            <File>
-              <FileName>ff.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\dfs\filesystems\elmfat\ff.c</FilePath>
-            </File>
-          </Files>
-        </Group>
         <Group>
           <GroupName>DeviceDrivers</GroupName>
           <GroupOption>
@@ -720,9 +684,9 @@
                 <v6WtE>2</v6WtE>
                 <v6Rtti>2</v6Rtti>
                 <VariousControls>
-                  <MiscControls></MiscControls>
-                  <Define></Define>
-                  <Undefine></Undefine>
+                  <MiscControls> --c99</MiscControls>
+                  <Define> </Define>
+                  <Undefine> </Undefine>
                   <IncludePath></IncludePath>
                 </VariousControls>
               </Cads>
@@ -777,6 +741,16 @@
               <FileType>1</FileType>
               <FilePath>..\..\components\drivers\spi\spi_dev.c</FilePath>
             </File>
+            <File>
+              <FileName>spi_flash_sfud.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\spi\spi_flash_sfud.c</FilePath>
+            </File>
+            <File>
+              <FileName>sfud.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\spi\sfud\src\sfud.c</FilePath>
+            </File>
             <File>
               <FileName>completion.c</FileName>
               <FileType>1</FileType>
@@ -792,6 +766,11 @@
               <FileType>1</FileType>
               <FilePath>..\..\components\drivers\src\pipe.c</FilePath>
             </File>
+            <File>
+              <FileName>ringblk_buf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\components\drivers\src\ringblk_buf.c</FilePath>
+            </File>
             <File>
               <FileName>ringbuffer.c</FileName>
               <FileType>1</FileType>
@@ -894,41 +873,6 @@
             </File>
           </Files>
         </Group>
-        <Group>
-          <GroupName>libc</GroupName>
-          <Files>
-            <File>
-              <FileName>libc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\libc\compilers\armlibc\libc.c</FilePath>
-            </File>
-            <File>
-              <FileName>libc_syms.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\libc\compilers\armlibc\libc_syms.c</FilePath>
-            </File>
-            <File>
-              <FileName>mem_std.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\libc\compilers\armlibc\mem_std.c</FilePath>
-            </File>
-            <File>
-              <FileName>stdio.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\libc\compilers\armlibc\stdio.c</FilePath>
-            </File>
-            <File>
-              <FileName>stubs.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\libc\compilers\armlibc\stubs.c</FilePath>
-            </File>
-            <File>
-              <FileName>time.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\components\libc\compilers\armlibc\time.c</FilePath>
-            </File>
-          </Files>
-        </Group>
         <Group>
           <GroupName>::CMSIS</GroupName>
         </Group>
@@ -942,7 +886,7 @@
       <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
         <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
         <targetInfos>
-          <targetInfo name="rt-thread_gd32f30x"/>
+          <targetInfo name="rt-thread_gd32e230"/>
         </targetInfos>
       </component>
     </components>

+ 31 - 30
bsp/gd32e230k-start/rtconfig.h

@@ -11,13 +11,13 @@
 #define RT_THREAD_PRIORITY_32
 #define RT_THREAD_PRIORITY_MAX 32
 #define RT_TICK_PER_SECOND 100
-#define RT_DEBUG
-#define RT_DEBUG_COLOR
 #define RT_USING_OVERFLOW_CHECK
-#define RT_DEBUG_INIT 0
-#define RT_DEBUG_THREAD 0
 #define RT_USING_HOOK
+#define RT_USING_IDLE_HOOK
+#define RT_IDEL_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 256
+#define RT_DEBUG
+#define RT_DEBUG_COLOR
 
 /* Inter-Thread communication */
 
@@ -39,12 +39,14 @@
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart0"
+#define RT_VER_NUM 0x40001
 
 /* RT-Thread Components */
 
 #define RT_USING_COMPONENTS_INIT
 #define RT_USING_USER_MAIN
 #define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
 
 /* C++ features */
 
@@ -62,45 +64,37 @@
 #define FINSH_CMD_SIZE 80
 #define FINSH_USING_MSH
 #define FINSH_USING_MSH_DEFAULT
+#define FINSH_ARG_MAX 10
 
 /* Device virtual file system */
 
-#define RT_USING_DFS
-#define DFS_USING_WORKDIR
-#define DFS_FILESYSTEMS_MAX 2
-#define DFS_FILESYSTEM_TYPES_MAX 2
-#define DFS_FD_MAX 4
-#define RT_USING_DFS_ELMFAT
-
-/* elm-chan's FatFs, Generic FAT Filesystem Module */
-
-#define RT_DFS_ELM_CODE_PAGE 437
-#define RT_DFS_ELM_WORD_ACCESS
-#define RT_DFS_ELM_USE_LFN_0
-#define RT_DFS_ELM_USE_LFN 0
-#define RT_DFS_ELM_MAX_LFN 255
-#define RT_DFS_ELM_DRIVES 2
-#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
-#define RT_DFS_ELM_REENTRANT
-#define RT_USING_DFS_DEVFS
 
 /* Device Drivers */
 
 #define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 512
 #define RT_USING_SERIAL
 #define RT_SERIAL_USING_DMA
+#define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_I2C
 #define RT_USING_PIN
 #define RT_USING_SPI
+#define RT_USING_SFUD
+#define RT_SFUD_USING_FLASH_INFO_TABLE
+
+/* Using WiFi */
+
 
 /* Using USB */
 
 
 /* POSIX layer and C standard library */
 
-#define RT_USING_LIBC
 
-/* Network stack */
+/* Network */
+
+/* Socket abstraction layer */
+
 
 /* light weight TCP/IP stack */
 
@@ -108,6 +102,9 @@
 /* Modbus master and slave stack */
 
 
+/* AT commands */
+
+
 /* VBUS(Virtual Software BUS) */
 
 
@@ -116,11 +113,6 @@
 
 /* RT-Thread online packages */
 
-/* system packages */
-
-/* RT-Thread GUI Engine */
-
-
 /* IoT - internet of things */
 
 
@@ -132,6 +124,9 @@
 /* Wiced WiFi */
 
 
+/* IoT Cloud */
+
+
 /* security packages */
 
 
@@ -144,10 +139,16 @@
 /* tools packages */
 
 
+/* system packages */
+
+
+/* peripheral libraries and drivers */
+
+
 /* miscellaneous packages */
 
 
-/* example package: hello */
+/* samples: kernel and components samples */
 
 #define RT_USING_USART0
 #define RT_USING_USART1

+ 1 - 3
bsp/gd32e230k-start/rtconfig.py

@@ -2,7 +2,7 @@ import os
 
 # toolchains options
 ARCH='arm'
-CPU='cortex-m4'
+CPU='cortex-m23'
 CROSS_TOOL='keil'
 
 if os.getenv('RTT_CC'):
@@ -71,8 +71,6 @@ elif PLATFORM == 'armcc':
     EXEC_PATH += '/ARM/ARMCC/bin'
     print(EXEC_PATH)
 
-    CFLAGS += ' --c99'
-
     if BUILD == 'debug':
         CFLAGS += ' -g -O0'
         AFLAGS += ' -g'

+ 9 - 9
bsp/gd32e230k-start/template.uvoptx

@@ -22,11 +22,11 @@
   </DaveTm>
 
   <Target>
-    <TargetName>rt-thread_gd32f30x</TargetName>
+    <TargetName>rt-thread_gd32e230</TargetName>
     <ToolsetNumber>0x4</ToolsetNumber>
     <ToolsetName>ARM-ADS</ToolsetName>
     <TargetOption>
-      <CLKADS>16000000</CLKADS>
+      <CLKADS>12000000</CLKADS>
       <OPTTT>
         <gFlags>1</gFlags>
         <BeepAtEnd>1</BeepAtEnd>
@@ -73,7 +73,7 @@
         <LExpSel>0</LExpSel>
       </OPTXL>
       <OPTFL>
-        <tvExp>0</tvExp>
+        <tvExp>1</tvExp>
         <tvExpOptDlg>0</tvExpOptDlg>
         <IsCurrentTarget>1</IsCurrentTarget>
       </OPTFL>
@@ -103,7 +103,7 @@
         <bEvRecOn>1</bEvRecOn>
         <bSchkAxf>0</bSchkAxf>
         <bTchkAxf>0</bTchkAxf>
-        <nTsel>4</nTsel>
+        <nTsel>14</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -114,18 +114,18 @@
         <tDlgDll></tDlgDll>
         <tDlgPa></tDlgPa>
         <tIfile></tIfile>
-        <pMon>Segger\JL2CM3.dll</pMon>
+        <pMon>BIN\UL2V8M.DLL</pMon>
       </DebugOpt>
       <TargetDriverDllRegistry>
         <SetRegEntry>
           <Number>0</Number>
-          <Key>JL2CM3</Key>
-          <Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_HD -FS08000000 -FL080000</Name>
+          <Key>UL2V8M</Key>
+          <Name>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32E230 -FS08000000 -FL010000 -FP0($$Device:GD32E230K8$Flash\GD32E230.FLM))</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
-          <Key>UL2CM3</Key>
-          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_HD -FS08000000 -FL010000 -FP0($$Device:GD32F303ZE$Flash\GD32F30x_HD.FLM))</Name>
+          <Key>JL2CM3</Key>
+          <Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC1000 -FN1 -FF0GD32F30x_HD -FS08000000 -FL080000</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>
       <Breakpoint/>

+ 32 - 30
bsp/gd32e230k-start/template.uvprojx

@@ -7,23 +7,23 @@
 
   <Targets>
     <Target>
-      <TargetName>rt-thread_gd32f30x</TargetName>
+      <TargetName>rt-thread_gd32e230</TargetName>
       <ToolsetNumber>0x4</ToolsetNumber>
       <ToolsetName>ARM-ADS</ToolsetName>
       <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
-      <uAC6>0</uAC6>
+      <uAC6>1</uAC6>
       <TargetOption>
         <TargetCommonOption>
-          <Device>GD32F303ZE</Device>
+          <Device>GD32E230K8</Device>
           <Vendor>GigaDevice</Vendor>
-          <PackID>GigaDevice.GD32F30x_DFP.1.0.1</PackID>
+          <PackID>GigaDevice.GD32E230_DFP.1.0.0</PackID>
           <PackURL>http://gd32mcu.21ic.com/data/documents/yingyongruanjian</PackURL>
-          <Cpu>IRAM(0x20000000-0x2000FFFF)IROM(0x08000000-0x0807FFFF) CLOCK(16000000) CPUTYPE("Cortex-M4")</Cpu>
+          <Cpu>IRAM(0x20000000,0x0002000) IROM(0x08000000,0x0010000) CPUTYPE("Cortex-M23") CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
-          <StartupFile>"Startup\GD\GD32F30x\startup_gd32f30x_hd.s" ("GD32F30x Startup Code")</StartupFile>
-          <FlashDriverDll>UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0GD32F30x_HD -FS08000000 -FL080000)</FlashDriverDll>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2V8M(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0GD32E230 -FS08000000 -FL010000 -FP0($$Device:GD32E230K8$Flash\GD32E230.FLM))</FlashDriverDll>
           <DeviceId>0</DeviceId>
-          <RegisterFile>gd32f30x.h</RegisterFile>
+          <RegisterFile>$$Device:GD32E230K8$Device\Include\gd32e230.h</RegisterFile>
           <MemoryEnv></MemoryEnv>
           <Cmp></Cmp>
           <Asm></Asm>
@@ -33,14 +33,14 @@
           <SLE66CMisc></SLE66CMisc>
           <SLE66AMisc></SLE66AMisc>
           <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>SFD\GD\GD32F30x\GD32F30x_HD.SFR</SFDFile>
+          <SFDFile>$$Device:GD32E230K8$SVD\GD32E230.svd</SFDFile>
           <bCustSvd>0</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath></BinPath>
           <IncludePath></IncludePath>
           <LibPath></LibPath>
-          <RegisterFilePath>GD\GD32F30x\</RegisterFilePath>
-          <DBRegisterFilePath>GD\GD32F30x\</DBRegisterFilePath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
           <TargetStatus>
             <Error>0</Error>
             <ExitCodeStop>0</ExitCodeStop>
@@ -49,7 +49,7 @@
             <InvalidFlash>1</InvalidFlash>
           </TargetStatus>
           <OutputDirectory>.\build\</OutputDirectory>
-          <OutputName>rtthread-gd32f30x</OutputName>
+          <OutputName>rtthread-gd32e230</OutputName>
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
           <CreateHexFile>0</CreateHexFile>
@@ -109,14 +109,14 @@
           <ComprImg>1</ComprImg>
         </CommonProperty>
         <DllOption>
-          <SimDllName>SARMCM3.DLL</SimDllName>
-          <SimDllArguments> -REMAP</SimDllArguments>
-          <SimDlgDll>DCM.DLL</SimDlgDll>
-          <SimDlgDllArguments>-pCM3</SimDlgDllArguments>
-          <TargetDllName>SARMCM3.DLL</TargetDllName>
-          <TargetDllArguments></TargetDllArguments>
+          <SimDllName></SimDllName>
+          <SimDllArguments></SimDllArguments>
+          <SimDlgDll></SimDlgDll>
+          <SimDlgDllArguments></SimDlgDllArguments>
+          <TargetDllName>SARMV8M.DLL</TargetDllName>
+          <TargetDllArguments> -MPU</TargetDllArguments>
           <TargetDlgDll>TCM.DLL</TargetDlgDll>
-          <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments>
+          <TargetDlgDllArguments>-pCM23</TargetDlgDllArguments>
         </DllOption>
         <DebugOption>
           <OPTHX>
@@ -137,8 +137,8 @@
             <DriverSelection>4096</DriverSelection>
           </Flash1>
           <bUseTDR>1</bUseTDR>
-          <Flash2>BIN\UL2CM3.DLL</Flash2>
-          <Flash3>"" ()</Flash3>
+          <Flash2>BIN\UL2V8M.DLL</Flash2>
+          <Flash3></Flash3>
           <Flash4></Flash4>
           <pFcarmOut></pFcarmOut>
           <pFcarmGrp></pFcarmGrp>
@@ -174,7 +174,7 @@
             <AdsLsxf>1</AdsLsxf>
             <RvctClst>0</RvctClst>
             <GenPPlst>0</GenPPlst>
-            <AdsCpuType>"Cortex-M4"</AdsCpuType>
+            <AdsCpuType>"Cortex-M23"</AdsCpuType>
             <RvctDeviceName></RvctDeviceName>
             <mOS>0</mOS>
             <uocRom>0</uocRom>
@@ -184,6 +184,7 @@
             <hadXRAM>0</hadXRAM>
             <uocXRam>0</uocXRam>
             <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
             <hadIRAM2>0</hadIRAM2>
             <hadIROM2>0</hadIROM2>
             <StupSel>8</StupSel>
@@ -192,7 +193,7 @@
             <uLtcg>0</uLtcg>
             <nSecure>0</nSecure>
             <RoSelD>3</RoSelD>
-            <RwSelD>4</RwSelD>
+            <RwSelD>3</RwSelD>
             <CodeSel>0</CodeSel>
             <OptFeed>0</OptFeed>
             <NoZi1>0</NoZi1>
@@ -244,12 +245,12 @@
               <IRAM>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x10000</Size>
+                <Size>0x2000</Size>
               </IRAM>
               <IROM>
                 <Type>1</Type>
                 <StartAddress>0x8000000</StartAddress>
-                <Size>0x80000</Size>
+                <Size>0x10000</Size>
               </IROM>
               <XRAM>
                 <Type>0</Type>
@@ -274,7 +275,7 @@
               <OCR_RVCT4>
                 <Type>1</Type>
                 <StartAddress>0x8000000</StartAddress>
-                <Size>0x80000</Size>
+                <Size>0x10000</Size>
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
@@ -299,7 +300,7 @@
               <OCR_RVCT9>
                 <Type>0</Type>
                 <StartAddress>0x20000000</StartAddress>
-                <Size>0x10000</Size>
+                <Size>0x2000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
@@ -324,6 +325,7 @@
             <uThumb>0</uThumb>
             <uSurpInc>0</uSurpInc>
             <uC99>1</uC99>
+            <uGnu>0</uGnu>
             <useXO>0</useXO>
             <v6Lang>1</v6Lang>
             <v6LangP>1</v6LangP>
@@ -387,10 +389,10 @@
   <RTE>
     <apis/>
     <components>
-      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.0.1" condition="ARMv6_7_8-M Device">
-        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.0.1"/>
+      <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.2.0" condition="ARMv6_7_8-M Device">
+        <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.5.1"/>
         <targetInfos>
-          <targetInfo name="rt-thread_gd32f30x"/>
+          <targetInfo name="rt-thread_gd32e230"/>
         </targetInfos>
       </component>
     </components>

+ 61 - 61
libcpu/arm/cortex-m23/context_gcc.S

@@ -5,26 +5,25 @@
  *
  * Change Logs:
  * Date         Author    Notes
- * 2009-10-11   Bernard   First version
- * 2010-12-29   onelife   Modify for EFM32
- * 2011-06-17   onelife   Merge all of the assembly source code into context_gcc.S
- * 2011-07-12   onelife   Add interrupt context check function
- * 2013-06-18   aozima    add restore MSP feature.
- * 2013-07-09   aozima    enhancement hard fault exception handler.
+ * 2010-01-25   Bernard      first version
+ * 2012-06-01   aozima       set pendsv priority to 0xFF.
+ * 2012-08-17   aozima       fixed bug: store r8 - r11.
+ * 2013-02-20   aozima       port to gcc.
+ * 2013-06-18   aozima       add restore MSP feature.
+ * 2013-11-04   bright       fixed hardfault bug for gcc.
  */
  
-    .cpu    cortex-m3
+    .cpu    cortex-m0
     .fpu    softvfp
     .syntax unified
     .thumb
     .text
 
-    .equ    SCB_VTOR, 0xE000ED08            /* Vector Table Offset Register */
-    .equ    ICSR, 0xE000ED04                /* interrupt control state register */
-    .equ    PENDSVSET_BIT, 0x10000000       /* value to trigger PendSV exception */
-    
-    .equ    SHPR3, 0xE000ED20               /* system priority register (3) */
-    .equ    PENDSV_PRI_LOWEST, 0x00FF0000   /* PendSV priority value (lowest) */
+	.equ 	SCB_VTOR, 0xE000ED08            /* Vector Table Offset Register */
+	.equ 	NVIC_INT_CTRL, 0xE000ED04       /* interrupt control state register */
+	.equ 	NVIC_SHPR3, 0xE000ED20          /* system priority register (3) */
+	.equ 	NVIC_PENDSV_PRI, 0x00FF0000     /* PendSV priority value (lowest) */
+	.equ 	NVIC_PENDSVSET, 0x10000000      /* value to trigger PendSV exception */
 
 /*
  * rt_base_t rt_hw_interrupt_disable();
@@ -61,7 +60,7 @@ rt_hw_context_switch:
     LDR     R3, [R2]
     CMP     R3, #1
     BEQ     _reswitch
-    MOV     R3, #1
+    MOVS    R3, #1
     STR     R3, [R2]
 
     LDR     R2, =rt_interrupt_from_thread   /* set rt_interrupt_from_thread */
@@ -71,8 +70,8 @@ _reswitch:
     LDR     R2, =rt_interrupt_to_thread     /* set rt_interrupt_to_thread */
     STR     R1, [R2]
 
-    LDR     R0, =ICSR           /* trigger the PendSV exception (causes context switch) */
-    LDR     R1, =PENDSVSET_BIT
+    LDR     R0, =NVIC_INT_CTRL           /* trigger the PendSV exception (causes context switch) */
+    LDR     R1, =NVIC_PENDSVSET
     STR     R1, [R0]
     BX      LR
 
@@ -90,36 +89,56 @@ PendSV_Handler:
     /* get rt_thread_switch_interrupt_flag */
     LDR     R0, =rt_thread_switch_interrupt_flag
     LDR     R1, [R0]
-    CBZ     R1, pendsv_exit         /* pendsv aLReady handled */
+    CMP     R1, #0x00
+    BEQ     pendsv_exit		/* pendsv aLReady handled */
 
     /* clear rt_thread_switch_interrupt_flag to 0 */
-    MOV     R1, #0
+    MOVS    R1, #0
     STR     R1, [R0]
 
     LDR     R0, =rt_interrupt_from_thread
     LDR     R1, [R0]
-    CBZ     R1, switch_to_thread    /* skip register save at the first time */
+    CMP     R1, #0x00
+    BEQ     switch_to_thread    /* skip register save at the first time */
 
-    MRS     R1, PSP                 /* get from thread stack pointer */
-    STMFD   R1!, {R4 - R11}         /* push R4 - R11 register */
+	MRS     R1, PSP                 /* get from thread stack pointer */
+
+    SUBS    R1, R1, #0x20           /* space for {R4 - R7} and {R8 - R11} */
     LDR     R0, [R0]
     STR     R1, [R0]                /* update from thread stack pointer */
 
+    STMIA   R1!, {R4 - R7}          /* push thread {R4 - R7} register to thread stack */
+
+    MOV     R4, R8                  /* mov thread {R8 - R11} to {R4 - R7} */
+    MOV     R5, R9
+    MOV     R6, R10
+    MOV     R7, R11
+    STMIA   R1!, {R4 - R7}          /* push thread {R8 - R11} high register to thread stack */
 switch_to_thread:
     LDR     R1, =rt_interrupt_to_thread
     LDR     R1, [R1]
     LDR     R1, [R1]                /* load thread stack pointer */
 
-    LDMFD   R1!, {R4 - R11}         /* pop R4 - R11 register */
+	LDMIA   R1!, {R4 - R7}          /* pop thread {R4 - R7} register from thread stack */
+    PUSH    {R4 - R7}               /* push {R4 - R7} to MSP for copy {R8 - R11} */
+
+    LDMIA   R1!, {R4 - R7}          /* pop thread {R8 - R11} high register from thread stack to {R4 - R7} */
+    MOV     R8,  R4                 /* mov {R4 - R7} to {R8 - R11} */
+    MOV     R9,  R5
+    MOV     R10, R6
+    MOV     R11, R7
+
+    POP     {R4 - R7}               /* pop {R4 - R7} from MSP */
+
     MSR     PSP, R1                 /* update stack pointer */
 
 pendsv_exit:
     /* restore interrupt */
     MSR     PRIMASK, R2
 
-    ORR     LR, LR, #0x04
-    BX      LR
-
+    MOVS    R0, #0x04
+    RSBS    R0, R0, #0x00
+    BX      R0
 /*
  * void rt_hw_context_switch_to(rt_uint32 to);
  * R0 --> to
@@ -132,34 +151,33 @@ rt_hw_context_switch_to:
 
     /* set from thread to 0 */
     LDR     R1, =rt_interrupt_from_thread
-    MOV     R0, #0
+    MOVS    R0, #0
     STR     R0, [R1]
 
     /* set interrupt flag to 1 */
     LDR     R1, =rt_thread_switch_interrupt_flag
-    MOV     R0, #1
+    MOVS    R0, #1
     STR     R0, [R1]
 
     /* set the PendSV exception priority */
-    LDR     R0, =SHPR3
-    LDR     R1, =PENDSV_PRI_LOWEST
-    LDR.W   R2, [R0,#0]             /* read */
-    ORR     R1, R1, R2              /* modify */
-    STR     R1, [R0]                /* write-back */
-
-    LDR     R0, =ICSR               /* trigger the PendSV exception (causes context switch) */
-    LDR     R1, =PENDSVSET_BIT
+    LDR     R0, =NVIC_SHPR3
+    LDR     R1, =NVIC_PENDSV_PRI
+    LDR     R2, [R0,#0x00]       /* read */
+    ORRS    R1, R1, R2             /* modify */
+    STR     R1, [R0]             /* write-back */
+
+    LDR     R0, =NVIC_INT_CTRL               /* trigger the PendSV exception (causes context switch) */
+    LDR     R1, =NVIC_PENDSVSET
     STR     R1, [R0]
-
+    NOP
     /* restore MSP */
-    LDR     r0, =SCB_VTOR
-    LDR     r0, [r0]
-    LDR     r0, [r0]
+    LDR     R0, =SCB_VTOR
+    LDR     R0, [R0]
+    LDR     R0, [R0]
     NOP
-    MSR     msp, r0
+    MSR     MSP, R0
 
     /* enable interrupts at processor level */
-    CPSIE   F
     CPSIE   I
 
     /* never reach here! */
@@ -175,29 +193,11 @@ rt_hw_interrupt_thread_switch:
     .type HardFault_Handler, %function
 HardFault_Handler:
     /* get current context */
-    MRS     r0, msp                 /* get fault context from handler. */
-    TST     lr, #0x04               /* if(!EXC_RETURN[2]) */
-    BEQ     _get_sp_done
-    MRS     r0, psp                 /* get fault context from thread. */
-_get_sp_done:
-
-    STMFD   r0!, {r4 - r11}         /* push r4 - r11 register */
-    STMFD   r0!, {lr}               /* push exec_return register */
-
-    TST     lr, #0x04               /* if(!EXC_RETURN[2]) */
-    BEQ     _update_msp
-    MSR     psp, r0                 /* update stack pointer to PSP. */
-    B       _update_done
-_update_msp:
-    MSR     msp, r0                 /* update stack pointer to MSP. */
-_update_done:
-
+    MRS     R0, PSP                 /* get fault thread stack pointer */
     PUSH    {LR}
     BL      rt_hw_hard_fault_exception
-    POP     {LR}
+    POP     {PC}
 
-    ORR     LR, LR, #0x04
-    BX      LR
 
 /*
  * rt_uint32_t rt_hw_interrupt_check(void);

+ 47 - 43
libcpu/arm/cortex-m23/context_iar.S

@@ -5,20 +5,20 @@
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes
-; * 2009-01-17     Bernard      first version
-; * 2009-09-27     Bernard      add protect when contex switch occurs
+; * 2010-01-25     Bernard      first version
+; * 2012-06-01     aozima       set pendsv priority to 0xFF.
+; * 2012-08-17     aozima       fixed bug: store r8 - r11.
 ; * 2013-06-18     aozima       add restore MSP feature.
-; * 2013-07-09     aozima       enhancement hard fault exception handler.
 ; */
 
 ;/**
-; * @addtogroup cortex-m3
+; * @addtogroup CORTEX-M0
 ; */
 ;/*@{*/
 
 SCB_VTOR        EQU     0xE000ED08               ; Vector Table Offset Register
 NVIC_INT_CTRL   EQU     0xE000ED04               ; interrupt control state register
-NVIC_SYSPRI2    EQU     0xE000ED20               ; system priority register (2)
+NVIC_SHPR3      EQU     0xE000ED20               ; system priority register (2)
 NVIC_PENDSV_PRI EQU     0x00FF0000               ; PendSV priority value (lowest)
 NVIC_PENDSVSET  EQU     0x10000000               ; value to trigger PendSV exception
 
@@ -62,7 +62,7 @@ rt_hw_context_switch:
     LDR     r3, [r2]
     CMP     r3, #1
     BEQ     _reswitch
-    MOV     r3, #1
+    MOVS    r3, #0x1
     STR     r3, [r2]
 
     LDR     r2, =rt_interrupt_from_thread   ; set rt_interrupt_from_thread
@@ -90,65 +90,91 @@ PendSV_Handler:
     ; get rt_thread_switch_interrupt_flag
     LDR     r0, =rt_thread_switch_interrupt_flag
     LDR     r1, [r0]
-    CBZ     r1, pendsv_exit         ; pendsv already handled
+    CMP     r1, #0x00
+    BEQ     pendsv_exit                ; pendsv already handled
 
     ; clear rt_thread_switch_interrupt_flag to 0
-    MOV     r1, #0x00
+    MOVS    r1, #0x00
     STR     r1, [r0]
 
     LDR     r0, =rt_interrupt_from_thread
     LDR     r1, [r0]
-    CBZ     r1, switch_to_thread    ; skip register save at the first time
+    CMP     r1, #0x00
+    BEQ     switch_to_thread        ; skip register save at the first time
 
     MRS     r1, psp                 ; get from thread stack pointer
-    STMFD   r1!, {r4 - r11}         ; push r4 - r11 register
+
+    SUBS    r1, r1, #0x20           ; space for {r4 - r7} and {r8 - r11}
     LDR     r0, [r0]
     STR     r1, [r0]                ; update from thread stack pointer
 
+    STMIA   r1!, {r4 - r7}          ; push thread {r4 - r7} register to thread stack
+
+    MOV     r4, r8                  ; mov thread {r8 - r11} to {r4 - r7}
+    MOV     r5, r9
+    MOV     r6, r10
+    MOV     r7, r11
+    STMIA   r1!, {r4 - r7}          ; push thread {r8 - r11} high register to thread stack
+
 switch_to_thread
     LDR     r1, =rt_interrupt_to_thread
     LDR     r1, [r1]
     LDR     r1, [r1]                ; load thread stack pointer
 
-    LDMFD   r1!, {r4 - r11}         ; pop r4 - r11 register
+    LDMIA   r1!, {r4 - r7}          ; pop thread {r4 - r7} register from thread stack
+    PUSH    {r4 - r7}               ; push {r4 - r7} to MSP for copy {r8 - r11}
+
+    LDMIA   r1!, {r4 - r7}          ; pop thread {r8 - r11} high register from thread stack to {r4 - r7}
+    MOV     r8,  r4                 ; mov {r4 - r7} to {r8 - r11}
+    MOV     r9,  r5
+    MOV     r10, r6
+    MOV     r11, r7
+
+    POP     {r4 - r7}               ; pop {r4 - r7} from MSP
+
     MSR     psp, r1                 ; update stack pointer
 
 pendsv_exit
     ; restore interrupt
     MSR     PRIMASK, r2
 
-    ORR     lr, lr, #0x04
-    BX      lr
+    MOVS    r0, #0x04
+    RSBS    r0, r0, #0x00
+    BX      r0
 
 ;/*
 ; * void rt_hw_context_switch_to(rt_uint32 to);
 ; * r0 --> to
+; * this fucntion is used to perform the first thread switch
 ; */
     EXPORT rt_hw_context_switch_to
 rt_hw_context_switch_to:
+    ; set to thread
     LDR     r1, =rt_interrupt_to_thread
     STR     r0, [r1]
 
     ; set from thread to 0
     LDR     r1, =rt_interrupt_from_thread
-    MOV     r0, #0x0
+    MOVS    r0, #0x0
     STR     r0, [r1]
 
     ; set interrupt flag to 1
     LDR     r1, =rt_thread_switch_interrupt_flag
-    MOV     r0, #1
+    MOVS    r0, #1
     STR     r0, [r1]
 
     ; set the PendSV exception priority
-    LDR     r0, =NVIC_SYSPRI2
+    LDR     r0, =NVIC_SHPR3
     LDR     r1, =NVIC_PENDSV_PRI
-    LDR.W   r2, [r0,#0x00]       ; read
-    ORR     r1,r1,r2             ; modify
+    LDR     r2, [r0,#0x00]       ; read
+    ORRS    r1,r1,r2             ; modify
     STR     r1, [r0]             ; write-back
 
-    LDR     r0, =NVIC_INT_CTRL      ; trigger the PendSV exception (causes context switch)
+    ; trigger the PendSV exception (causes context switch)
+    LDR     r0, =NVIC_INT_CTRL
     LDR     r1, =NVIC_PENDSVSET
     STR     r1, [r0]
+    NOP
 
     ; restore MSP
     LDR     r0, =SCB_VTOR
@@ -158,7 +184,6 @@ rt_hw_context_switch_to:
     MSR     msp, r0
 
     ; enable interrupts at processor level
-    CPSIE   F
     CPSIE   I
 
     ; never reach here!
@@ -173,30 +198,9 @@ rt_hw_interrupt_thread_switch:
 HardFault_Handler:
 
     ; get current context
-    MRS     r0, msp                 ; get fault context from handler.
-    TST     lr, #0x04               ; if(!EXC_RETURN[2])
-    BEQ     _get_sp_done
-    MRS     r0, psp                 ; get fault context from thread.
-_get_sp_done
-
-    STMFD   r0!, {r4 - r11}         ; push r4 - r11 register
-    ;STMFD   r0!, {lr}               ; push exec_return register
-    SUB     r0, r0, #0x04
-    STR     lr, [r0]
-
-    TST     lr, #0x04               ; if(!EXC_RETURN[2])
-    BEQ     _update_msp
-    MSR     psp, r0                 ; update stack pointer to PSP.
-    B       _update_done
-_update_msp
-    MSR     msp, r0                 ; update stack pointer to MSP.
-_update_done
-
+    MRS     r0, psp                 ; get fault thread stack pointer
     PUSH    {lr}
     BL      rt_hw_hard_fault_exception
-    POP     {lr}
-
-    ORR     lr, lr, #0x04
-    BX      lr
+    POP     {pc}
 
     END

+ 46 - 38
libcpu/arm/cortex-m23/context_rvds.S

@@ -5,9 +5,10 @@
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes
-; * 2009-01-17     Bernard      first version
+; * 2010-01-25     Bernard      first version
+; * 2012-06-01     aozima       set pendsv priority to 0xFF.
+; * 2012-08-17     aozima       fixed bug: store r8 - r11.
 ; * 2013-06-18     aozima       add restore MSP feature.
-; * 2013-07-09     aozima       enhancement hard fault exception handler.
 ; */
 
 ;/**
@@ -17,7 +18,7 @@
 
 SCB_VTOR        EQU     0xE000ED08               ; Vector Table Offset Register
 NVIC_INT_CTRL   EQU     0xE000ED04               ; interrupt control state register
-NVIC_SYSPRI2    EQU     0xE000ED20               ; system priority register (2)
+NVIC_SHPR3      EQU     0xE000ED20               ; system priority register (2)
 NVIC_PENDSV_PRI EQU     0x00FF0000               ; PendSV priority value (lowest)
 NVIC_PENDSVSET  EQU     0x10000000               ; value to trigger PendSV exception
 
@@ -45,8 +46,8 @@ rt_hw_interrupt_disable    PROC
 ; */
 rt_hw_interrupt_enable    PROC
     EXPORT  rt_hw_interrupt_enable
-    MSR     PRIMASK, r0
-    BX      LR
+    MSR		PRIMASK, r0
+    BX		LR
     ENDP
 
 ;/*
@@ -64,7 +65,7 @@ rt_hw_context_switch    PROC
     LDR     r3, [r2]
     CMP     r3, #1
     BEQ     _reswitch
-    MOV     r3, #1
+    MOVS    r3, #0x01
     STR     r3, [r2]
 
     LDR     r2, =rt_interrupt_from_thread   ; set rt_interrupt_from_thread
@@ -83,7 +84,7 @@ _reswitch
 ; r0 --> switch from thread stack
 ; r1 --> switch to thread stack
 ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
-PendSV_Handler   PROC
+PendSV_Handler    PROC
     EXPORT PendSV_Handler
 
     ; disable interrupt to protect context switch
@@ -93,35 +94,57 @@ PendSV_Handler   PROC
     ; get rt_thread_switch_interrupt_flag
     LDR     r0, =rt_thread_switch_interrupt_flag
     LDR     r1, [r0]
-    CBZ     r1, pendsv_exit         ; pendsv already handled
+    CMP     r1, #0x00
+    BEQ     pendsv_exit                ; pendsv already handled
 
     ; clear rt_thread_switch_interrupt_flag to 0
-    MOV     r1, #0x00
+    MOVS    r1, #0x00
     STR     r1, [r0]
 
     LDR     r0, =rt_interrupt_from_thread
     LDR     r1, [r0]
-    CBZ     r1, switch_to_thread    ; skip register save at the first time
+    CMP     r1, #0x00
+    BEQ     switch_to_thread        ; skip register save at the first time
 
     MRS     r1, psp                 ; get from thread stack pointer
-    STMFD   r1!, {r4 - r11}         ; push r4 - r11 register
+
+    SUBS    r1, r1, #0x20           ; space for {r4 - r7} and {r8 - r11}
     LDR     r0, [r0]
     STR     r1, [r0]                ; update from thread stack pointer
 
+    STMIA   r1!, {r4 - r7}          ; push thread {r4 - r7} register to thread stack
+
+    MOV     r4, r8                  ; mov thread {r8 - r11} to {r4 - r7}
+    MOV     r5, r9
+    MOV     r6, r10
+    MOV     r7, r11
+    STMIA   r1!, {r4 - r7}          ; push thread {r8 - r11} high register to thread stack
+
 switch_to_thread
     LDR     r1, =rt_interrupt_to_thread
     LDR     r1, [r1]
     LDR     r1, [r1]                ; load thread stack pointer
 
-    LDMFD   r1!, {r4 - r11}         ; pop r4 - r11 register
+    LDMIA   r1!, {r4 - r7}          ; pop thread {r4 - r7} register from thread stack
+    PUSH    {r4 - r7}               ; push {r4 - r7} to MSP for copy {r8 - r11}
+
+    LDMIA   r1!, {r4 - r7}          ; pop thread {r8 - r11} high register from thread stack to {r4 - r7}
+    MOV     r8,  r4                 ; mov {r4 - r7} to {r8 - r11}
+    MOV     r9,  r5
+    MOV     r10, r6
+    MOV     r11, r7
+
+    POP     {r4 - r7}               ; pop {r4 - r7} from MSP
+
     MSR     psp, r1                 ; update stack pointer
 
 pendsv_exit
     ; restore interrupt
     MSR     PRIMASK, r2
 
-    ORR     lr, lr, #0x04
-    BX      lr
+    MOVS    r0, #0x04
+    RSBS    r0, r0, #0x00
+    BX      r0
     ENDP
 
 ;/*
@@ -137,19 +160,19 @@ rt_hw_context_switch_to    PROC
 
     ; set from thread to 0
     LDR     r1, =rt_interrupt_from_thread
-    MOV     r0, #0x0
+    MOVS    r0, #0x0
     STR     r0, [r1]
 
     ; set interrupt flag to 1
     LDR     r1, =rt_thread_switch_interrupt_flag
-    MOV     r0, #1
+    MOVS    r0, #1
     STR     r0, [r1]
 
     ; set the PendSV exception priority
-    LDR     r0, =NVIC_SYSPRI2
+    LDR     r0, =NVIC_SHPR3
     LDR     r1, =NVIC_PENDSV_PRI
-    LDR.W   r2, [r0,#0x00]       ; read
-    ORR     r1,r1,r2             ; modify
+    LDR     r2, [r0,#0x00]       ; read
+    ORRS    r1,r1,r2             ; modify
     STR     r1, [r0]             ; write-back
 
     ; trigger the PendSV exception (causes context switch)
@@ -164,7 +187,6 @@ rt_hw_context_switch_to    PROC
     MSR     msp, r0
 
     ; enable interrupts at processor level
-    CPSIE   F
     CPSIE   I
 
     ; never reach here!
@@ -177,29 +199,15 @@ rt_hw_interrupt_thread_switch PROC
     ENDP
 
     IMPORT rt_hw_hard_fault_exception
-    EXPORT HardFault_Handler
+
 HardFault_Handler    PROC
+    EXPORT HardFault_Handler
 
     ; get current context
-    TST     lr, #0x04               ; if(!EXC_RETURN[2])
-    ITE     EQ
-    MRSEQ   r0, msp                 ; [2]=0 ==> Z=1, get fault context from handler.
-    MRSNE   r0, psp                 ; [2]=1 ==> Z=0, get fault context from thread.
-
-    STMFD   r0!, {r4 - r11}         ; push r4 - r11 register
-    STMFD   r0!, {lr}               ; push exec_return register
-
-    TST     lr, #0x04               ; if(!EXC_RETURN[2])
-    ITE     EQ
-    MSREQ   msp, r0                 ; [2]=0 ==> Z=1, update stack pointer to MSP.
-    MSRNE   psp, r0                 ; [2]=1 ==> Z=0, update stack pointer to PSP.
-
+    MRS     r0, psp                 ; get fault thread stack pointer
     PUSH    {lr}
     BL      rt_hw_hard_fault_exception
-    POP     {lr}
-
-    ORR     lr, lr, #0x04
-    BX      lr
+    POP     {pc}
     ENDP
 
     ALIGN   4

+ 30 - 298
libcpu/arm/cortex-m23/cpuport.c

@@ -4,13 +4,11 @@
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
- * Date         Author      Notes
- * 2009-01-05   Bernard     first version
- * 2011-02-14   onelife     Modify for EFM32
- * 2011-06-17   onelife     Merge all of the C source code into cpuport.c
- * 2012-12-23   aozima      stack addr align to 8byte.
- * 2012-12-29   Bernard     Add exception hook.
- * 2013-07-09   aozima      enhancement hard fault exception handler.
+ * Date           Author       Notes
+ * 2010-01-25     Bernard      first version
+ * 2012-05-31     aozima       Merge all of the C source code into cpuport.c
+ * 2012-08-17     aozima       fixed bug: store r8 - r11.
+ * 2012-12-23     aozima       stack addr align to 8byte.
  */
 
 #include <rtthread.h>
@@ -29,11 +27,13 @@ struct exception_stack_frame
 
 struct stack_frame
 {
-    /* r4 ~ r11 register */
+    /* r4 ~ r7 low register */
     rt_uint32_t r4;
     rt_uint32_t r5;
     rt_uint32_t r6;
     rt_uint32_t r7;
+
+    /* r8 ~ r11 high register */
     rt_uint32_t r8;
     rt_uint32_t r9;
     rt_uint32_t r10;
@@ -45,8 +45,6 @@ struct stack_frame
 /* flag in interrupt handling */
 rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
 rt_uint32_t rt_thread_switch_interrupt_flag;
-/* exception hook */
-static rt_err_t (*rt_exception_hook)(void *context) = RT_NULL;
 
 /**
  * This function will initialize thread stack
@@ -92,312 +90,46 @@ rt_uint8_t *rt_hw_stack_init(void       *tentry,
     return stk;
 }
 
+extern long list_thread(void);
+extern rt_thread_t rt_current_thread;
 /**
- * This function set the hook, which is invoked on fault exception handling.
- *
- * @param exception_handle the exception handling hook function.
+ * fault exception handling
  */
-void rt_hw_exception_install(rt_err_t (*exception_handle)(void* context))
+void rt_hw_hard_fault_exception(struct exception_stack_frame *contex)
 {
-    rt_exception_hook = exception_handle;
+    rt_kprintf("psr: 0x%08x\n", contex->psr);
+    rt_kprintf(" pc: 0x%08x\n", contex->pc);
+    rt_kprintf(" lr: 0x%08x\n", contex->lr);
+    rt_kprintf("r12: 0x%08x\n", contex->r12);
+    rt_kprintf("r03: 0x%08x\n", contex->r3);
+    rt_kprintf("r02: 0x%08x\n", contex->r2);
+    rt_kprintf("r01: 0x%08x\n", contex->r1);
+    rt_kprintf("r00: 0x%08x\n", contex->r0);
+
+    rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
+
+#ifdef RT_USING_FINSH
+    list_thread();
+#endif
+
+    while (1);
 }
 
 #define SCB_CFSR        (*(volatile const unsigned *)0xE000ED28) /* Configurable Fault Status Register */
 #define SCB_HFSR        (*(volatile const unsigned *)0xE000ED2C) /* HardFault Status Register */
 #define SCB_MMAR        (*(volatile const unsigned *)0xE000ED34) /* MemManage Fault Address register */
 #define SCB_BFAR        (*(volatile const unsigned *)0xE000ED38) /* Bus Fault Address Register */
-#define SCB_AIRCR       (*(volatile unsigned long *)0xE000ED0C)  /* Reset control Address Register */
+#define SCB_AIRCR       (*(volatile unsigned long *)0xE000ED00)  /* Reset control Address Register */
 #define SCB_RESET_VALUE 0x05FA0004                               /* Reset value, write to SCB_AIRCR can reset cpu */
 
 #define SCB_CFSR_MFSR   (*(volatile const unsigned char*)0xE000ED28)  /* Memory-management Fault Status Register */
 #define SCB_CFSR_BFSR   (*(volatile const unsigned char*)0xE000ED29)  /* Bus Fault Status Register */
 #define SCB_CFSR_UFSR   (*(volatile const unsigned short*)0xE000ED2A) /* Usage Fault Status Register */
 
-#ifdef RT_USING_FINSH
-static void usage_fault_track(void)
-{
-    rt_kprintf("usage fault:\n");
-    rt_kprintf("SCB_CFSR_UFSR:0x%02X ", SCB_CFSR_UFSR);
-
-    if(SCB_CFSR_UFSR & (1<<0))
-    {
-        /* [0]:UNDEFINSTR */
-        rt_kprintf("UNDEFINSTR ");
-    }
-
-    if(SCB_CFSR_UFSR & (1<<1))
-    {
-        /* [1]:INVSTATE */
-        rt_kprintf("INVSTATE ");
-    }
-
-    if(SCB_CFSR_UFSR & (1<<2))
-    {
-        /* [2]:INVPC */
-        rt_kprintf("INVPC ");
-    }
-
-    if(SCB_CFSR_UFSR & (1<<3))
-    {
-        /* [3]:NOCP */
-        rt_kprintf("NOCP ");
-    }
-
-    if(SCB_CFSR_UFSR & (1<<8))
-    {
-        /* [8]:UNALIGNED */
-        rt_kprintf("UNALIGNED ");
-    }
-
-    if(SCB_CFSR_UFSR & (1<<9))
-    {
-        /* [9]:DIVBYZERO */
-        rt_kprintf("DIVBYZERO ");
-    }
-
-    rt_kprintf("\n");
-}
-
-static void bus_fault_track(void)
-{
-    rt_kprintf("bus fault:\n");
-    rt_kprintf("SCB_CFSR_BFSR:0x%02X ", SCB_CFSR_BFSR);
-
-    if(SCB_CFSR_BFSR & (1<<0))
-    {
-        /* [0]:IBUSERR */
-        rt_kprintf("IBUSERR ");
-    }
-
-    if(SCB_CFSR_BFSR & (1<<1))
-    {
-        /* [1]:PRECISERR */
-        rt_kprintf("PRECISERR ");
-    }
-
-    if(SCB_CFSR_BFSR & (1<<2))
-    {
-        /* [2]:IMPRECISERR */
-        rt_kprintf("IMPRECISERR ");
-    }
-
-    if(SCB_CFSR_BFSR & (1<<3))
-    {
-        /* [3]:UNSTKERR */
-        rt_kprintf("UNSTKERR ");
-    }
-
-    if(SCB_CFSR_BFSR & (1<<4))
-    {
-        /* [4]:STKERR */
-        rt_kprintf("STKERR ");
-    }
-
-    if(SCB_CFSR_BFSR & (1<<7))
-    {
-        rt_kprintf("SCB->BFAR:%08X\n", SCB_BFAR);
-    }
-    else
-    {
-        rt_kprintf("\n");
-    }
-}
-
-static void mem_manage_fault_track(void)
-{
-    rt_kprintf("mem manage fault:\n");
-    rt_kprintf("SCB_CFSR_MFSR:0x%02X ", SCB_CFSR_MFSR);
-
-    if(SCB_CFSR_MFSR & (1<<0))
-    {
-        /* [0]:IACCVIOL */
-        rt_kprintf("IACCVIOL ");
-    }
-
-    if(SCB_CFSR_MFSR & (1<<1))
-    {
-        /* [1]:DACCVIOL */
-        rt_kprintf("DACCVIOL ");
-    }
-
-    if(SCB_CFSR_MFSR & (1<<3))
-    {
-        /* [3]:MUNSTKERR */
-        rt_kprintf("MUNSTKERR ");
-    }
-
-    if(SCB_CFSR_MFSR & (1<<4))
-    {
-        /* [4]:MSTKERR */
-        rt_kprintf("MSTKERR ");
-    }
-
-    if(SCB_CFSR_MFSR & (1<<7))
-    {
-        /* [7]:MMARVALID */
-        rt_kprintf("SCB->MMAR:%08X\n", SCB_MMAR);
-    }
-    else
-    {
-        rt_kprintf("\n");
-    }
-}
-
-static void hard_fault_track(void)
-{
-    if(SCB_HFSR & (1UL<<1))
-    {
-        /* [1]:VECTBL, Indicates hard fault is caused by failed vector fetch. */
-        rt_kprintf("failed vector fetch\n");
-    }
-
-    if(SCB_HFSR & (1UL<<30))
-    {
-        /* [30]:FORCED, Indicates hard fault is taken because of bus fault,
-                        memory management fault, or usage fault. */
-        if(SCB_CFSR_BFSR)
-        {
-            bus_fault_track();
-        }
-
-        if(SCB_CFSR_MFSR)
-        {
-            mem_manage_fault_track();
-        }
-
-        if(SCB_CFSR_UFSR)
-        {
-            usage_fault_track();
-        }
-    }
-
-    if(SCB_HFSR & (1UL<<31))
-    {
-        /* [31]:DEBUGEVT, Indicates hard fault is triggered by debug event. */
-        rt_kprintf("debug event\n");
-    }
-}
-#endif /* RT_USING_FINSH */
-
-struct exception_info
-{
-    rt_uint32_t exc_return;
-    struct stack_frame stack_frame;
-};
-
-/*
- * fault exception handler
- */
-void rt_hw_hard_fault_exception(struct exception_info * exception_info)
-{
-    extern long list_thread(void);
-    struct stack_frame* context = &exception_info->stack_frame;
-
-    if (rt_exception_hook != RT_NULL)
-    {
-        rt_err_t result;
-
-        result = rt_exception_hook(exception_info);
-        if (result == RT_EOK)
-            return;
-    }
-
-    rt_kprintf("psr: 0x%08x\n", context->exception_stack_frame.psr);
-
-    rt_kprintf("r00: 0x%08x\n", context->exception_stack_frame.r0);
-    rt_kprintf("r01: 0x%08x\n", context->exception_stack_frame.r1);
-    rt_kprintf("r02: 0x%08x\n", context->exception_stack_frame.r2);
-    rt_kprintf("r03: 0x%08x\n", context->exception_stack_frame.r3);
-    rt_kprintf("r04: 0x%08x\n", context->r4);
-    rt_kprintf("r05: 0x%08x\n", context->r5);
-    rt_kprintf("r06: 0x%08x\n", context->r6);
-    rt_kprintf("r07: 0x%08x\n", context->r7);
-    rt_kprintf("r08: 0x%08x\n", context->r8);
-    rt_kprintf("r09: 0x%08x\n", context->r9);
-    rt_kprintf("r10: 0x%08x\n", context->r10);
-    rt_kprintf("r11: 0x%08x\n", context->r11);
-    rt_kprintf("r12: 0x%08x\n", context->exception_stack_frame.r12);
-    rt_kprintf(" lr: 0x%08x\n", context->exception_stack_frame.lr);
-    rt_kprintf(" pc: 0x%08x\n", context->exception_stack_frame.pc);
-
-    if(exception_info->exc_return & (1 << 2) )
-    {
-        rt_kprintf("hard fault on thread: %s\r\n\r\n", rt_thread_self()->name);
-
-#ifdef RT_USING_FINSH
-        list_thread();
-#endif /* RT_USING_FINSH */
-    }
-    else
-    {
-        rt_kprintf("hard fault on handler\r\n\r\n");
-    }
-
-#ifdef RT_USING_FINSH
-    hard_fault_track();
-#endif /* RT_USING_FINSH */
-
-    while (1);
-}
-
-/**
- * shutdown CPU
- */
-void rt_hw_cpu_shutdown(void)
-{
-    rt_kprintf("shutdown...\n");
-
-    RT_ASSERT(0);
-}
-
 /**
  * reset CPU
  */
 RT_WEAK void rt_hw_cpu_reset(void)
 {
-    SCB_AIRCR = SCB_RESET_VALUE;
-}
-
-#ifdef RT_USING_CPU_FFS
-/**
- * This function finds the first bit set (beginning with the least significant bit)
- * in value and return the index of that bit.
- *
- * Bits are numbered starting at 1 (the least significant bit).  A return value of
- * zero from any of these functions means that the argument was zero.
- *
- * @return return the index of the first bit set. If value is 0, then this function
- * shall return 0.
- */
-#if defined(__CC_ARM)
-__asm int __rt_ffs(int value)
-{
-    CMP     r0, #0x00
-    BEQ     exit
-
-    RBIT    r0, r0
-    CLZ     r0, r0
-    ADDS    r0, r0, #0x01
-
-exit
-    BX      lr
+    SCB_AIRCR  = SCB_RESET_VALUE;//((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |SCB_AIRCR_SYSRESETREQ_Msk);
 }
-#elif defined(__IAR_SYSTEMS_ICC__)
-int __rt_ffs(int value)
-{
-    if (value == 0) return value;
-
-    asm("RBIT %0, %1" : "=r"(value) : "r"(value));
-    asm("CLZ  %0, %1" : "=r"(value) : "r"(value));
-    asm("ADDS %0, %1, #0x01" : "=r"(value) : "r"(value));
-
-    return value;
-}
-#elif defined(__GNUC__)
-int __rt_ffs(int value)
-{
-    return __builtin_ffs(value);
-}
-#endif
-
-#endif

Some files were not shown because too many files changed in this diff