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@@ -3,7 +3,6 @@
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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- *
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* Change Logs:
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* Date Author Notes
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* 2018-11-27 zylx change to new framework
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@@ -19,10 +18,7 @@
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#define LOG_TAG "drv.qspi"
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#include <drv_log.h>
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-#if !defined(BSP_USING_QSPI)
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- #error "Please define at least one BSP_USING_QSPI"
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- /* this driver can be disabled at menuconfig ? RT-Thread Components ? Device Drivers */
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-#endif
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+#if defined(BSP_USING_QSPI)
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struct stm32_hw_spi_cs
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{
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@@ -33,6 +29,9 @@ struct stm32_qspi_bus
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{
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QSPI_HandleTypeDef QSPI_Handler;
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char *bus_name;
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+#ifdef BSP_QSPI_USING_DMA
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+ DMA_HandleTypeDef hdma_quadspi;
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+#endif
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};
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struct rt_spi_bus _qspi_bus1;
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@@ -94,6 +93,33 @@ static int stm32_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configu
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LOG_E("qspi init failed (%d)!", result);
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}
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+#ifdef BSP_QSPI_USING_DMA
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+ /* QSPI interrupts must be enabled when using the HAL_QSPI_Receive_DMA */
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+ HAL_NVIC_SetPriority(QUADSPI_IRQn, 0, 0);
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+ HAL_NVIC_EnableIRQ(QUADSPI_IRQn);
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+ HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
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+ HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
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+
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+ /* init QSPI DMA */
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+ __HAL_RCC_DMA1_CLK_ENABLE();
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+ HAL_DMA_DeInit(qspi_bus->QSPI_Handler.hdma);
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+ qspi_bus->hdma_quadspi.Instance = DMA1_Channel5;
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+ qspi_bus->hdma_quadspi.Init.Request = DMA_REQUEST_5;
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+ qspi_bus->hdma_quadspi.Init.Direction = DMA_PERIPH_TO_MEMORY;
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+ qspi_bus->hdma_quadspi.Init.PeriphInc = DMA_PINC_DISABLE;
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+ qspi_bus->hdma_quadspi.Init.MemInc = DMA_MINC_ENABLE;
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+ qspi_bus->hdma_quadspi.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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+ qspi_bus->hdma_quadspi.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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+ qspi_bus->hdma_quadspi.Init.Mode = DMA_NORMAL;
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+ qspi_bus->hdma_quadspi.Init.Priority = DMA_PRIORITY_LOW;
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+ if (HAL_DMA_Init(&qspi_bus->hdma_quadspi) != HAL_OK)
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+ {
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+ LOG_E("qspi dma init failed (%d)!", result);
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+ }
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+
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+ __HAL_LINKDMA(&qspi_bus->QSPI_Handler,hdma,qspi_bus->hdma_quadspi);
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+#endif /* BSP_QSPI_USING_DMA */
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+
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return result;
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}
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@@ -205,7 +231,6 @@ static rt_uint32_t qspixfer(struct rt_spi_device *device, struct rt_spi_message
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{
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if (HAL_QSPI_Transmit(&qspi_bus->QSPI_Handler, (rt_uint8_t *)sndb, 5000) == HAL_OK)
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{
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-
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len = length;
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}
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else
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@@ -222,12 +247,17 @@ static rt_uint32_t qspixfer(struct rt_spi_device *device, struct rt_spi_message
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}
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else if (rcvb)/* recv data */
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{
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-
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qspi_send_cmd(qspi_bus, qspi_message);
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-
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+#ifdef BSP_QSPI_USING_DMA
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+ if (HAL_QSPI_Receive_DMA(&qspi_bus->QSPI_Handler, rcvb) == HAL_OK)
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+#else
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if (HAL_QSPI_Receive(&qspi_bus->QSPI_Handler, rcvb, 5000) == HAL_OK)
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+#endif
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{
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len = length;
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+#ifdef BSP_QSPI_USING_DMA
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+ while(qspi_bus->QSPI_Handler.RxXferCount != 0);
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+#endif
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}
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else
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{
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@@ -283,20 +313,22 @@ static int stm32_qspi_register_bus(struct stm32_qspi_bus *qspi_bus, const char *
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*/
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rt_err_t stm32_qspi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin, rt_uint8_t data_line_width, void (*enter_qspi_mode)(), void (*exit_qspi_mode)())
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{
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+ struct rt_qspi_device *qspi_device = RT_NULL;
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+ struct stm32_hw_spi_cs *cs_pin = RT_NULL;
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rt_err_t result = RT_EOK;
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RT_ASSERT(bus_name != RT_NULL);
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RT_ASSERT(device_name != RT_NULL);
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RT_ASSERT(data_line_width == 1 || data_line_width == 2 || data_line_width == 4);
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- struct rt_qspi_device *qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
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+ qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
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if (qspi_device == RT_NULL)
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{
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LOG_E("no memory, qspi bus attach device failed!");
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result = RT_ENOMEM;
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goto __exit;
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}
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- struct stm32_hw_spi_cs *cs_pin = (struct stm32_hw_spi_cs *)rt_malloc(sizeof(struct stm32_hw_spi_cs));
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+ cs_pin = (struct stm32_hw_spi_cs *)rt_malloc(sizeof(struct stm32_hw_spi_cs));
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if (qspi_device == RT_NULL)
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{
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LOG_E("no memory, qspi bus attach device failed!");
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@@ -333,10 +365,35 @@ __exit:
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return result;
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}
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+#ifdef BSP_QSPI_USING_DMA
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+void QUADSPI_IRQHandler(void)
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+{
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+
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+ HAL_QSPI_IRQHandler(&_stm32_qspi_bus.QSPI_Handler);
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+
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+void DMA1_Channel5_IRQHandler(void)
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+{
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+ /* enter interrupt */
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+ rt_interrupt_enter();
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+
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+ HAL_DMA_IRQHandler(&_stm32_qspi_bus.hdma_quadspi);
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+
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+ /* leave interrupt */
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+ rt_interrupt_leave();
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+}
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+#endif /* BSP_QSPI_USING_DMA */
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+
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static int rt_hw_qspi_bus_init(void)
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{
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return stm32_qspi_register_bus(&_stm32_qspi_bus, "qspi1");
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}
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INIT_BOARD_EXPORT(rt_hw_qspi_bus_init);
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+#endif /* BSP_USING_QSPI */
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#endif /* RT_USING_QSPI */
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