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@@ -56,7 +56,7 @@
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#if defined(BOARD_RT1050_FIRE) || defined(BOARD_RT1050_ATK)
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#if defined(BOARD_RT1050_FIRE) || defined(BOARD_RT1050_ATK)
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#define PHY_CONTROL_ID1 0x07U /*!< The PHY ID1*/
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#define PHY_CONTROL_ID1 0x07U /*!< The PHY ID1*/
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#endif
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#endif
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-#if defined(BOARD_RT1050_EVK) || defined(BOARD_RT1050_SeeedStudio)
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+#if defined(BOARD_RT1050_EVK)
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#define PHY_CONTROL_ID1 0x22U /*!< The PHY ID1*/
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#define PHY_CONTROL_ID1 0x22U /*!< The PHY ID1*/
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#endif
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#endif
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/*! @brief Defines the mask flag in basic control register. */
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/*! @brief Defines the mask flag in basic control register. */
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@@ -83,7 +83,7 @@
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#define PHY_CTL1_LINKUP_MASK 0x100U /*!< The PHY link up. */
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#define PHY_CTL1_LINKUP_MASK 0x100U /*!< The PHY link up. */
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#define PHY_LINK_READY_MASK (PHY_CTL1_ENERGYDETECT_MASK | PHY_CTL1_LINKUP_MASK)
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#define PHY_LINK_READY_MASK (PHY_CTL1_ENERGYDETECT_MASK | PHY_CTL1_LINKUP_MASK)
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#endif
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#endif
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-#if defined(BOARD_RT1050_EVK) || defined(BOARD_RT1050_SeeedStudio)
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+#if defined(BOARD_RT1050_EVK)
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#define PHY_CTL2_REMOTELOOP_MASK 0x0004U /*!< The PHY remote loopback mask. */
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#define PHY_CTL2_REMOTELOOP_MASK 0x0004U /*!< The PHY remote loopback mask. */
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#define PHY_CTL2_REFCLK_SELECT_MASK 0x0080U /*!< The PHY RMII reference clock select. */
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#define PHY_CTL2_REFCLK_SELECT_MASK 0x0080U /*!< The PHY RMII reference clock select. */
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#define PHY_CTL1_10HALFDUPLEX_MASK 0x0001U /*!< The PHY 10M half duplex mask. */
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#define PHY_CTL1_10HALFDUPLEX_MASK 0x0001U /*!< The PHY 10M half duplex mask. */
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