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add spi twi drv for nrf5340

andrew li 2 years ago
parent
commit
5f4b4ae5f1

+ 43 - 3
bsp/nrf5x/libraries/drivers/drv_i2c.c

@@ -1,5 +1,5 @@
 /*
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  *
  * SPDX-License-Identifier: Apache-2.0
  * SPDX-License-Identifier: Apache-2.0
  *
  *
@@ -7,14 +7,16 @@
  * Date           Author       Notes
  * Date           Author       Notes
  * 2020-11-15     xckhmf       First Verison
  * 2020-11-15     xckhmf       First Verison
  * 2021-11-27     chenyingchun fix _master_xfer bug
  * 2021-11-27     chenyingchun fix _master_xfer bug
- *
+ * 2023-01-28     Andrew       add Nrf5340 support
  */
  */
 
 
 #include <rtdevice.h>
 #include <rtdevice.h>
 #include <nrfx_twi_twim.h>
 #include <nrfx_twi_twim.h>
 #include <nrfx_twim.h>
 #include <nrfx_twim.h>
 #include <drv_i2c.h>
 #include <drv_i2c.h>
-#if defined(BSP_USING_I2C0) || defined(BSP_USING_I2C1)
+
+
+#if defined(BSP_USING_I2C0) || defined(BSP_USING_I2C1) || defined(BSP_USING_I2C2) || defined(BSP_USING_I2C3)
 typedef struct
 typedef struct
 {
 {
     nrf_twim_frequency_t freq;
     nrf_twim_frequency_t freq;
@@ -43,6 +45,28 @@ static drv_i2c_cfg_t drv_i2c_1 =
 };
 };
 static struct rt_i2c_bus_device i2c1_bus;
 static struct rt_i2c_bus_device i2c1_bus;
 #endif
 #endif
+#ifdef BSP_USING_I2C2
+static drv_i2c_cfg_t drv_i2c_2 =
+{
+    .freq = NRF_TWIM_FREQ_400K,
+    .scl_pin = BSP_I2C2_SCL_PIN,
+    .sda_pin = BSP_I2C2_SDA_PIN,
+    .twi_instance = NRFX_TWIM_INSTANCE(2)
+};
+static struct rt_i2c_bus_device i2c2_bus;
+#endif
+#ifdef BSP_USING_I2C3
+static drv_i2c_cfg_t drv_i2c_3 =
+{
+    .freq = NRF_TWIM_FREQ_400K,
+    .scl_pin = BSP_I2C3_SCL_PIN,
+    .sda_pin = BSP_I2C3_SDA_PIN,
+    .twi_instance = NRFX_TWIM_INSTANCE(3)
+};
+static struct rt_i2c_bus_device i2c3_bus;
+#endif
+
+
 static int twi_master_init(struct rt_i2c_bus_device *bus)
 static int twi_master_init(struct rt_i2c_bus_device *bus)
 {
 {
     nrfx_err_t rtn;
     nrfx_err_t rtn;
@@ -128,6 +152,22 @@ int rt_hw_i2c_init(void)
     twi_master_init(&i2c1_bus);
     twi_master_init(&i2c1_bus);
     rt_i2c_bus_device_register(&i2c1_bus, "i2c1");
     rt_i2c_bus_device_register(&i2c1_bus, "i2c1");
 #endif
 #endif
+#ifdef BSP_USING_I2C2
+        i2c2_bus.ops= &_i2c_ops;
+        i2c2_bus.timeout = 0;
+        i2c2_bus.priv = (void *)&drv_i2c_2;
+        twi_master_init(&i2c2_bus);
+        rt_i2c_bus_device_register(&i2c2_bus, "i2c2");
+#endif
+#ifdef BSP_USING_I2C3
+        i2c3_bus.ops= &_i2c_ops;
+        i2c3_bus.timeout = 0;
+        i2c3_bus.priv = (void *)&drv_i2c_3;
+        twi_master_init(&i2c3_bus);
+        rt_i2c_bus_device_register(&i2c3_bus, "i2c3");
+#endif
+
+
     return 0;
     return 0;
 }
 }
 
 

+ 351 - 1
bsp/nrf5x/libraries/drivers/drv_spi.c

@@ -1,5 +1,5 @@
 /*
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  *
  * SPDX-License-Identifier: Apache-2.0
  * SPDX-License-Identifier: Apache-2.0
  *
  *
@@ -7,6 +7,7 @@
  * Date             Author          Notes
  * Date             Author          Notes
  * 2020-05-22       Sherman         first version
  * 2020-05-22       Sherman         first version
  * 2020-11-02       xckhmf          fixed bug
  * 2020-11-02       xckhmf          fixed bug
+ * 2023-01-28       Andrew          add Nrf5340 support
  */
  */
 
 
 #include <stdint.h>
 #include <stdint.h>
@@ -19,7 +20,355 @@
 #define LOG_TAG                "drv.spi"
 #define LOG_TAG                "drv.spi"
 
 
 #ifdef BSP_USING_SPI
 #ifdef BSP_USING_SPI
+#if defined(SOC_NRF5340)
+#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) || defined(BSP_USING_SPI4)
+static struct nrfx_drv_spi_config spi_config[] =
+{
+#ifdef BSP_USING_SPI0
+    NRFX_SPI0_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI1
+    NRFX_SPI1_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI2
+    NRFX_SPI2_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI3
+    NRFX_SPI3_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI4
+    NRFX_SPI4_CONFIG,
+#endif
+
+
+};
+
+static struct nrfx_drv_spi spi_bus_obj[sizeof(spi_config) / sizeof(spi_config[0])];
+
+//Configure SPI bus pins using the menuconfig
+static struct nrfx_drv_spi_pin_config bsp_spi_pin[] =
+{
+#ifdef BSP_USING_SPI0
+    {
+        .sck_pin = BSP_SPI0_SCK_PIN,
+        .mosi_pin = BSP_SPI0_MOSI_PIN,
+        .miso_pin = BSP_SPI0_MISO_PIN,
+        .ss_pin = BSP_SPI0_SS_PIN
+    },
+#endif
+
+#ifdef BSP_USING_SPI1
+    {
+        .sck_pin = BSP_SPI1_SCK_PIN,
+        .mosi_pin = BSP_SPI1_MOSI_PIN,
+        .miso_pin = BSP_SPI1_MISO_PIN,
+        .ss_pin = BSP_SPI1_SS_PIN
+    },
+#endif
+
+#ifdef BSP_USING_SPI2
+    {
+        .sck_pin = BSP_SPI2_SCK_PIN,
+        .mosi_pin = BSP_SPI2_MOSI_PIN,
+        .miso_pin = BSP_SPI2_MISO_PIN,
+        .ss_pin = BSP_SPI2_SS_PIN
+    },
+#endif
 
 
+#ifdef BSP_USING_SPI3
+        .sck_pin = BSP_SPI3_SCK_PIN,
+        .mosi_pin = BSP_SPI3_MOSI_PIN,
+        .miso_pin = BSP_SPI3_MISO_PIN,
+        .ss_pin = BSP_SPI3_SS_PIN
+    },
+#endif
+
+#ifdef BSP_USING_SPI4
+    {
+        .sck_pin = BSP_SPI4_SCK_PIN,
+        .mosi_pin = BSP_SPI4_MOSI_PIN,
+        .miso_pin = BSP_SPI4_MISO_PIN,
+        .ss_pin = BSP_SPI4_SS_PIN
+    },
+#endif
+
+
+};
+
+
+static rt_uint8_t spi_index_find(struct rt_spi_bus *spi_bus)
+{
+    for (int i = 0; i < sizeof(spi_config) / sizeof(spi_config[0]); i++)
+    {
+        if(spi_bus == &spi_bus_obj[i].spi_bus)
+            return i;
+    }
+    return 0xFF;
+}
+
+/**
+ * spi event handler function
+ */
+static void spi0_handler(const nrfx_spim_evt_t *p_event, void *p_context)
+{
+    LOG_I("\nspi0_handler");
+}
+
+static void spi1_handler(const nrfx_spim_evt_t *p_event, void *p_context)
+{
+    LOG_I("\nspi1_handler");
+}
+
+static void spi2_handler(const nrfx_spim_evt_t *p_event, void *p_context)
+{
+    LOG_I("\nspi2_handler");
+}
+static void spi3_handler(const nrfx_spim_evt_t *p_event, void *p_context)
+{
+    LOG_I("\nspi3_handler");
+}
+static void spi4_handler(const nrfx_spim_evt_t *p_event, void *p_context)
+{
+    LOG_I("\nspi4_handler");
+}
+
+
+nrfx_spim_evt_handler_t spi_handler[] = {spi0_handler, spi1_handler, spi2_handler ,spi3_handler,spi4_handler};
+
+/**
+  * @brief  This function config spi bus
+  * @param  device
+  * @param  configuration
+  * @retval RT_EOK / RT_ERROR
+  */
+static rt_err_t spi_configure(struct rt_spi_device *device,
+                              struct rt_spi_configuration *configuration)
+{
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device->bus != RT_NULL);
+    RT_ASSERT(device->bus->parent.user_data != RT_NULL);
+    RT_ASSERT(configuration != RT_NULL);
+
+    rt_uint8_t index = spi_index_find(device->bus);
+    RT_ASSERT(index != 0xFF);
+
+    nrfx_spim_t spi = spi_bus_obj[index].spi;
+    nrfx_spim_config_t config = NRFX_SPIM_DEFAULT_CONFIG(bsp_spi_pin[index].sck_pin,
+        bsp_spi_pin[index].mosi_pin, bsp_spi_pin[index].miso_pin, NRFX_SPIM_PIN_NOT_USED);
+
+    /* spi config ss pin */
+    if(device->parent.user_data != RT_NULL)
+    {
+        nrf_gpio_cfg_output((uint32_t)device->parent.user_data);
+    }
+    /* spi config bit order */
+    if(configuration->mode & RT_SPI_MSB)
+    {
+        config.bit_order = NRF_SPIM_BIT_ORDER_MSB_FIRST;
+    }
+    else
+    {
+        config.bit_order = NRF_SPIM_BIT_ORDER_LSB_FIRST;
+    }
+    /* spi mode config */
+    switch (configuration->mode & RT_SPI_MODE_3 )
+    {
+    case RT_SPI_MODE_0/* RT_SPI_CPOL:0 , RT_SPI_CPHA:0 */:
+        config.mode = NRF_SPIM_MODE_0;
+        break;
+    case RT_SPI_MODE_1/* RT_SPI_CPOL:0 , RT_SPI_CPHA:1 */:
+        config.mode = NRF_SPIM_MODE_1;
+        break;
+    case RT_SPI_MODE_2/* RT_SPI_CPOL:1 , RT_SPI_CPHA:0 */:
+        config.mode = NRF_SPIM_MODE_2;
+        break;
+    case RT_SPI_MODE_3/* RT_SPI_CPOL:1 , RT_SPI_CPHA:1 */:
+        config.mode = NRF_SPIM_MODE_3;
+        break;
+    default:
+        LOG_E("spi_configure mode error %x\n",configuration->mode);
+        return RT_ERROR;
+    }
+    /* spi frequency config */
+    switch (configuration->max_hz / 1000)
+    {
+    case 125:
+        config.frequency = NRF_SPIM_FREQ_125K;
+        break;
+    case 250:
+        config.frequency = NRF_SPIM_FREQ_250K;
+        break;
+    case 500:
+        config.frequency = NRF_SPIM_FREQ_500K;
+        break;
+    case 1000:
+        config.frequency = NRF_SPIM_FREQ_1M;
+        break;
+    case 2000:
+        config.frequency = NRF_SPIM_FREQ_2M;
+        break;
+    case 4000:
+        config.frequency = NRF_SPIM_FREQ_4M;
+        break;
+    case 8000:
+        config.frequency = NRF_SPIM_FREQ_8M;
+        break;
+    default:
+        LOG_E("spi_configure rate error %d\n",configuration->max_hz);
+        break;
+    }
+
+    rt_memcpy((void*)&spi_bus_obj[index].spi_config, (void*)&config, sizeof(nrfx_spim_config_t));
+    nrfx_spim_evt_handler_t handler = RT_NULL;    //spi send callback handler ,default NULL
+    void * context = RT_NULL;
+    nrfx_err_t nrf_ret = nrfx_spim_init(&spi, &config, handler, context);
+    if(NRFX_SUCCESS == nrf_ret)
+        return RT_EOK;
+
+    return RT_ERROR;
+}
+
+static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
+{
+    RT_ASSERT(device != RT_NULL);
+    RT_ASSERT(device->bus != RT_NULL);
+    RT_ASSERT(device->bus->parent.user_data != RT_NULL);
+
+    rt_uint8_t index = spi_index_find(device->bus);
+    nrfx_err_t nrf_ret;
+    RT_ASSERT(index != 0xFF);
+
+    nrfx_spim_t * p_instance =  &spi_bus_obj[index].spi;
+    nrfx_spim_xfer_desc_t p_xfer_desc;
+
+    if(message->cs_take == 1)
+    {
+        nrf_gpio_pin_clear((uint32_t)device->parent.user_data);
+    }
+    p_xfer_desc.p_rx_buffer = message->recv_buf;
+    p_xfer_desc.rx_length = message->length;
+    p_xfer_desc.p_tx_buffer = message->send_buf;
+    p_xfer_desc.tx_length = message->length ;
+    if(message->send_buf == RT_NULL)
+    {
+        p_xfer_desc.tx_length = 0;
+    }
+    if(message->recv_buf == RT_NULL)
+    {
+        p_xfer_desc.rx_length = 0;
+    }
+
+    nrf_ret = nrfx_spim_xfer(p_instance, &p_xfer_desc, 0);
+    if(message->cs_release == 1)
+    {
+        nrf_gpio_pin_set((uint32_t)device->parent.user_data);
+    }
+
+    if( NRFX_SUCCESS != nrf_ret)
+    {
+        return 0;
+    }
+    else
+    {
+        return message->length;
+    }
+}
+
+/* spi bus callback function  */
+static const struct rt_spi_ops nrfx_spi_ops =
+{
+    .configure = spi_configure,
+    .xfer = spixfer,
+};
+
+/*spi bus init*/
+static int rt_hw_spi_bus_init(void)
+{
+    rt_err_t result = RT_ERROR;
+    for (int i = 0; i < sizeof(spi_config) / sizeof(spi_config[0]); i++)
+    {
+        spi_bus_obj[i].spi = spi_config[i].spi;
+        spi_bus_obj[i].spi_bus.parent.user_data = &spi_config[i];   //SPI INSTANCE
+        result = rt_spi_bus_register(&spi_bus_obj[i].spi_bus, spi_config[i].bus_name, &nrfx_spi_ops);
+        RT_ASSERT(result == RT_EOK);
+    }
+    return result;
+}
+
+int rt_hw_spi_init(void)
+{
+    return rt_hw_spi_bus_init();
+}
+INIT_BOARD_EXPORT(rt_hw_spi_init);
+
+/**
+  * Attach the spi device to SPI bus, this function must be used after initialization.
+  */
+rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t ss_pin)
+{
+    RT_ASSERT(bus_name != RT_NULL);
+    RT_ASSERT(device_name != RT_NULL);
+    RT_ASSERT(ss_pin != RT_NULL);
+
+    rt_err_t result;
+    struct rt_spi_device *spi_device;
+    /* attach the device to spi bus*/
+    spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
+    RT_ASSERT(spi_device != RT_NULL);
+    /* initialize the cs pin */
+    result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void*)ss_pin);
+    if (result != RT_EOK)
+    {
+        LOG_E("%s attach to %s faild, %d", device_name, bus_name, result);
+        result = RT_ERROR;
+    }
+    RT_ASSERT(result == RT_EOK);
+    return result;
+}
+
+#define SPI_DEVICE_NAME     "spi4x"
+#define TEST_STRING "liguan"
+static rt_uint8_t       m_tx_buf[] = TEST_STRING;           /**< TX buffer. */
+
+static int spi_sample(int argc, char *argv[])
+
+{
+    struct rt_spi_device *spi_dev;
+    char name[RT_NAME_MAX];
+    rt_uint8_t w25x_read_id = 0x65;
+    rt_uint8_t id[5] = {0};
+    rt_hw_spi_device_attach("spi4", SPI_DEVICE_NAME, 11);
+    struct rt_spi_configuration cfg;
+    cfg.data_width = 8;
+    cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_0 | RT_SPI_MSB;
+    cfg.max_hz = 20 * 1000 *1000;                           /* 20M */
+
+
+
+       /* 查找 spi 设备获取设备句柄 */
+    spi_dev = (struct rt_spi_device *)rt_device_find(SPI_DEVICE_NAME);
+    if (!spi_dev)
+    {
+        rt_kprintf("spi sample run failed! can't find %s device!\n", name);
+    }
+    else
+    {
+         rt_spi_configure(spi_dev, &cfg);
+        /* 方式1:使用 rt_spi_send_then_recv()发送命令读取ID */
+         while(1)
+       { rt_spi_send(spi_dev, m_tx_buf, 6);rt_thread_mdelay(500);}
+        //rt_kprintf("use rt_spi_send_then_recv() read w25q ID is:%x%x\n", id[3], id[4]);
+        }
+return RT_EOK;
+
+}
+MSH_CMD_EXPORT(spi_sample, spi sample);
+#endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 */
+#else
 #if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2)
 #if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2)
 static struct nrfx_drv_spi_config spi_config[] =
 static struct nrfx_drv_spi_config spi_config[] =
 {
 {
@@ -292,4 +641,5 @@ rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name,
 }
 }
 
 
 #endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 */
 #endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 */
+#endif
 #endif /*BSP_USING_SPI*/
 #endif /*BSP_USING_SPI*/

+ 76 - 2
bsp/nrf5x/libraries/drivers/drv_spi.h

@@ -1,11 +1,12 @@
 /*
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
+ * Copyright (c) 2006-2023, RT-Thread Development Team
  *
  *
  * SPDX-License-Identifier: Apache-2.0
  * SPDX-License-Identifier: Apache-2.0
  *
  *
  * Change Logs:
  * Change Logs:
  * Date             Author          Notes
  * Date             Author          Notes
  * 2020-05-19       Sherman         first version
  * 2020-05-19       Sherman         first version
+ * 2023-01-28       Andrew          add Nrf5340 support
  */
  */
 
 
 #include <rtthread.h>
 #include <rtthread.h>
@@ -16,6 +17,79 @@
 #define __DRV_SPI_H_
 #define __DRV_SPI_H_
 
 
 #ifdef BSP_USING_SPI
 #ifdef BSP_USING_SPI
+#if defined(SOC_NRF5340)
+#include "nrfx_spim.h"
+
+/**
+ * @brief Attach the spi device to SPI bus, this function must be used after initialization.
+ * @param bus_name     spi bus name  "spi0"/"spi1"/"spi2"
+ * @param device_name  spi device name "spi0x"/"spi1x"/"spi2x"
+ * @param ss_pin       spi ss pin number
+ * @retval  RT_ERROR / RT_EOK
+*/
+rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t ss_pin);
+
+//SPI bus config
+#ifdef BSP_USING_SPI0
+#define NRFX_SPI0_CONFIG         \
+{                                \
+    .bus_name = "spi0",          \
+    .spi = NRFX_SPIM_INSTANCE(0)  \
+}
+#endif
+#ifdef BSP_USING_SPI1
+#define NRFX_SPI1_CONFIG         \
+{                                \
+    .bus_name = "spi1",          \
+    .spi = NRFX_SPIM_INSTANCE(1)  \
+}
+#endif
+
+#ifdef BSP_USING_SPI2
+#define NRFX_SPI2_CONFIG         \
+{                                \
+    .bus_name = "spi2",          \
+    .spi = NRFX_SPIM_INSTANCE(2)  \
+}
+#endif
+
+#ifdef BSP_USING_SPI3
+#define NRFX_SPI3_CONFIG         \
+{                                \
+    .bus_name = "spi3",          \
+    .spi = NRFX_SPIM_INSTANCE(3)  \
+}
+#endif
+#ifdef BSP_USING_SPI4
+#define NRFX_SPI4_CONFIG         \
+{                                \
+    .bus_name = "spi4",          \
+    .spi = NRFX_SPIM_INSTANCE(4)  \
+}
+#endif
+
+struct nrfx_drv_spi_config
+{
+    char *bus_name;
+    nrfx_spim_t spi;
+};
+
+struct nrfx_drv_spi
+{
+    nrfx_spim_t spi;    /* nrfx spi driver instance. */
+    nrfx_spim_config_t   spi_config; /* nrfx spi config Configuration */
+    struct rt_spi_configuration *cfg;
+    struct rt_spi_bus spi_bus;
+};
+
+struct nrfx_drv_spi_pin_config
+{
+    rt_uint8_t sck_pin;
+    rt_uint8_t mosi_pin;
+    rt_uint8_t miso_pin;
+    rt_uint8_t ss_pin;
+};
+#else
 #include "nrfx_spi.h"
 #include "nrfx_spi.h"
 
 
 /**
 /**
@@ -72,6 +146,6 @@ struct nrfx_drv_spi_pin_config
     rt_uint8_t miso_pin;
     rt_uint8_t miso_pin;
     rt_uint8_t ss_pin;
     rt_uint8_t ss_pin;
 };
 };
-
+#endif
 #endif /* BSP_USING_SPI */
 #endif /* BSP_USING_SPI */
 #endif  /*__DRV_SPI_H_*/
 #endif  /*__DRV_SPI_H_*/