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@@ -38,12 +38,12 @@ extern void mmu_invalidate_dcache(rt_uint32_t buffer, rt_uint32_t size);
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/* EMAC internal utility function */
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static inline rt_uint32_t emac_virt_to_phys(void *addr)
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{
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- return addr;
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+ return (rt_uint32_t)addr;
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}
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static inline rt_uint32_t virt_to_phys(void *addr)
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{
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- return addr;
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+ return (rt_uint32_t)addr;
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}
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/* Cache macros - Packet buffers would be from pbuf pool which is cached */
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@@ -62,7 +62,6 @@ static inline rt_uint32_t virt_to_phys(void *addr)
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static struct emac_priv davinci_emac_device;
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-static struct rt_semaphore sem_ack;
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/* clock frequency for EMAC */
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static unsigned long emac_bus_frequency;
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@@ -240,6 +239,7 @@ static int davinci_emac_phy_init(rt_device_t dev)
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rt_kprintf("%s: link down (status: 0x%04x)\n",
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dev->parent.name, status);
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priv->link = 0;
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+ eth_device_linkchange(&priv->parent, RT_FALSE);
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return 0;
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} else {
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adv = emac_mii_read(priv, priv->phy_addr, MII_ADVERTISE);
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@@ -256,6 +256,7 @@ static int davinci_emac_phy_init(rt_device_t dev)
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priv->speed = speed;
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priv->duplex = duplex;
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priv->link = 1;
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+ eth_device_linkchange(&priv->parent, RT_TRUE);
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return 1;
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}
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@@ -387,7 +388,7 @@ static int emac_net_tx_complete(struct emac_priv *priv,
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priv->net_dev_stats.tx_bytes += p->len;
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//free pbuf
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}
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- rt_sem_release(&sem_ack);
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+
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return 0;
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}
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@@ -553,6 +554,8 @@ static int emac_send(struct emac_priv *priv, struct emac_netpktobj *pkt, rt_uint
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struct emac_tx_bd __iomem *curr_bd;
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struct emac_txch *txch;
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struct emac_netbufobj *buf_list;
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+ rt_uint32_t num_pkts = 0;
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+ int retry = 0;
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txch = priv->txch[ch];
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buf_list = pkt->buf_list; /* get handle to the buffer array */
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@@ -563,12 +566,21 @@ static int emac_send(struct emac_priv *priv, struct emac_netpktobj *pkt, rt_uint
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pkt->pkt_length = EMAC_DEF_MIN_ETHPKTSIZE;
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}
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+try:
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rt_sem_take(&priv->tx_lock, RT_WAITING_FOREVER);
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curr_bd = txch->bd_pool_head;
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if (curr_bd == RT_NULL) {
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txch->out_of_tx_bd++;
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rt_sem_release(&priv->tx_lock);
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- return EMAC_ERR_TX_OUT_OF_BD;
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+ num_pkts = emac_tx_bdproc(priv, EMAC_DEF_TX_CH,
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+ EMAC_DEF_TX_MAX_SERVICE);
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+ if (!num_pkts) {
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+ retry++;
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+ if (retry > 5)
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+ return EMAC_ERR_TX_OUT_OF_BD;
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+ rt_thread_delay(1);
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+ }
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+ goto try;
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}
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txch->bd_pool_head = curr_bd->next;
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@@ -713,38 +725,14 @@ static void emac_dev_tx_timeout(struct emac_priv *priv)
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/* transmit packet. */
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rt_err_t rt_davinci_emac_tx( rt_device_t dev, struct pbuf* p)
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{
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- /*struct pbuf* q;
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- rt_uint8_t* bufptr, *buf = RT_NULL;
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- unsigned long ctrl;
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- rt_uint32_t addr;*/
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rt_err_t err;
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struct emac_priv *priv = dev->user_data;
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- emac_dev_xmit(p, priv);
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-
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-
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-#if 0
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- buf = rt_malloc(p->tot_len);
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- if (!buf) {
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- rt_kprintf("%s:alloc buf failed\n", __func__);
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- return -RT_ENOMEM;
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- }
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- bufptr = buf;
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-
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-
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- /*for (q = p; q != RT_NULL; q = q->next)
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- {
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- memcpy(bufptr, q->payload, q->len);
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- bufptr += q->len;
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- }*/
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-#endif
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- /* wait ack */
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- err = rt_sem_take(&sem_ack, RT_TICK_PER_SECOND*5);
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+ err = emac_dev_xmit(p, priv);
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if (err != RT_EOK)
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{
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emac_dev_tx_timeout(priv);
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}
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- //rt_free(buf);
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return RT_EOK;
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}
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@@ -1460,7 +1448,7 @@ static int emac_hw_enable(struct emac_priv *priv)
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emac_write(EMAC_RXINTMASKSET, BIT(ch));
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rxch->queue_active = 1;
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emac_write(EMAC_RXHDP(ch),
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- rxch->active_queue_head); /* physcal addr */
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+ (unsigned int)(rxch->active_queue_head)); /* physcal addr */
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}
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/* Enable MII */
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@@ -1655,7 +1643,7 @@ void dm365_emac_gpio_init(void)
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davinci_writel(arm_intmux, DM365_ARM_INTMUX);
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}
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-void rt_hw_davinci_emac_init()
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+int rt_hw_davinci_emac_init()
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{
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struct emac_priv *priv = &davinci_emac_device;
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struct clk *emac_clk;
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@@ -1664,15 +1652,14 @@ void rt_hw_davinci_emac_init()
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psc_change_state(DAVINCI_DM365_LPSC_CPGMAC, PSC_ENABLE);
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dm365_emac_gpio_init();
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rt_memset(&davinci_emac_device, 0, sizeof(davinci_emac_device));
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- davinci_emac_device.emac_base = DM365_EMAC_CNTRL_BASE;
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- davinci_emac_device.ctrl_base = DM365_EMAC_WRAP_CNTRL_BASE;
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+ davinci_emac_device.emac_base = (void __iomem *)DM365_EMAC_CNTRL_BASE;
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+ davinci_emac_device.ctrl_base = (void __iomem *)DM365_EMAC_WRAP_CNTRL_BASE;
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davinci_emac_device.ctrl_ram_size = DM365_EMAC_CNTRL_RAM_SIZE;
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- davinci_emac_device.emac_ctrl_ram = DM365_EMAC_WRAP_RAM_BASE;
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- davinci_emac_device.mdio_base = DM365_EMAC_MDIO_BASE;
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+ davinci_emac_device.emac_ctrl_ram = (void __iomem *)DM365_EMAC_WRAP_RAM_BASE;
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+ davinci_emac_device.mdio_base = (void __iomem *)DM365_EMAC_MDIO_BASE;
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davinci_emac_device.version = EMAC_VERSION_2;
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davinci_emac_device.rmii_en = 0;
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davinci_emac_device.phy_addr = 0x09;
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- rt_sem_init(&sem_ack, "tx_ack", 0, RT_IPC_FLAG_FIFO);
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rt_sem_init(&priv->tx_lock, "tx_lock", 1, RT_IPC_FLAG_FIFO);
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rt_sem_init(&priv->rx_lock, "rx_lock", 1, RT_IPC_FLAG_FIFO);
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