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+/*
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+ * Copyright (c) 2020-2021, Bluetrum Development Team
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ *
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+ * Change Logs:
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+ * Date Author Notes
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+ * 2021-04-12 greedyhao first version
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+ */
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+
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+#include <board.h>
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+
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+#ifdef BSP_USING_IRRX
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+
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+//#define DRV_DEBUG
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+#define LOG_TAG "drv.irrx"
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+#include <drv_log.h>
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+
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+#ifdef BSP_USING_TIM3
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+#error "IRRX is conflict with hardware timer3!"
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+#endif
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+
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+#ifdef BSP_USING_IRRX_HW
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+///硬件IR receiver参数
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+#define IR32KSEL_EN 0 //IR clock source select 32K
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+#if IR32KSEL_EN
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+ #define RPTERR_CNT 33 //配置11.25ms ± (RPTERR_CNT + 1)*32K的repeat code允许范围
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+ #define DATERR_CNT 33 //配置13.5ms ± (DATERR_CNT + 1)*32K引导码允许范围
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+ #define ONEERR_CNT 7 //配置2.25ms ± (ONEERR_CNT + 1)*32K的logic "1"允许范围
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+ #define ZEROERR_CNT 3 //配置1.12ms ± (ONEERR_CNT + 1)*32K数logic "0"允许范围
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+ #define TOPR_CNT 55 //IR time out length = (TOPR + 1) * 64 *32K
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+#else
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+ #define RPTERR_CNT 1000 //配置11.25ms ± (RPTERR_CNT + 1)us的repeat code允许范围
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+ #define DATERR_CNT 1000 //配置13.5ms ± (DATERR_CNT + 1)us引导码允许范围
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+ #define ONEERR_CNT 250 //配置2.25ms ± (ONEERR_CNT + 1)us的logic "1"允许范围
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+ #define ZEROERR_CNT 125 //配置1.12ms ± (ONEERR_CNT + 1)us数logic "0"允许范围
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+ #define TOPR_CNT 1718 //IR time out length = (TOPR + 1) * 64 us
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+#endif // IR32KSEL_EN
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+#endif // BSP_USING_IRRX_HW
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+
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+#define NO_KEY (0u)
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+
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+struct ab32_irrx_data{
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+ uint16_t cnt; //ir data bit counter
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+ uint16_t rpt_cnt; //ir repeat counter
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+ uint16_t addr; //address, inverted address Extended NEC: 16bits address
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+ uint16_t cmd; //command, inverted command
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+};
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+typedef struct ab32_irrx_data *ab32_irrx_data_t;
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+
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+static struct ab32_irrx_data _irrx = {0};
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+
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+/**
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+ * @brief A non-zero value is returned
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+ * when IR key is detectedto be pressed.
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+ *
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+ * @param addr inverted address Extended NEC: 16bits address
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+ * @param cmd inverted command
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+ */
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+RT_SECTION(".irq.irrx")
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+uint8_t ab32_get_irkey(uint16_t *addr, uint16_t *cmd)
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+{
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+ if (_irrx.cnt != 32) {
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+ return NO_KEY;
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+ }
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+ if (addr != RT_NULL) {
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+ *addr = _irrx.addr;
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+ }
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+ if (cmd != RT_NULL) {
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+ *cmd = _irrx.cmd;
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+ }
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+ return !NO_KEY;
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+}
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+
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+/**
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+ * @brief Invalid the current IR key.
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+ *
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+ */
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+void ab32_clr_irkey(void)
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+{
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+ _irrx.cnt = 0;
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+}
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+
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+#ifdef BSP_USING_IRRX_HW
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+RT_SECTION(".irq.irrx")
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+static void irrx_isr(int vector, void *param)
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+{
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+ rt_interrupt_enter();
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+
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+ //IR RX data finish interrupt
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+ if (IRRXCON & BIT(16)) {
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+ IRRXCPND = BIT(16);
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+ _irrx.addr = (uint16_t)IRRXDAT;
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+ _irrx.cmd = (uint16_t)(IRRXDAT >> 16);
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+ _irrx.cnt = 32;
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+ }
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+
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+ //IR key release interrupt
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+ if (IRRXCON & BIT(17)) {
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+ IRRXCPND = BIT(17);
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+ _irrx.cnt = 0;
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+ }
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+
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+ rt_interrupt_leave();
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+}
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+
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+static void _irrx_hw_init(void)
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+{
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+ GPIOEDE |= BIT(6);
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+ GPIOEPU |= BIT(6);
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+ GPIOEDIR |= BIT(6);
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+ FUNCMCON2 |= 0xf << 20;
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+ FUNCMCON2 |= (7 << 20); //IR mapping to G6
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+ rt_memset(&_irrx, 0, sizeof(_irrx));
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+
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+ IRRXERR0 = (RPTERR_CNT << 16) | DATERR_CNT; //RPTERR[27:16], DATERR[11:0]
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+ IRRXERR1 = (TOPR_CNT << 20) | (ONEERR_CNT << 10) | ZEROERR_CNT; //TOPR[31:20], ONEERR[19:10], ZEROERR[9:0]
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+
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+#if IR32KSEL_EN
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+ CLKCON1 &= ~BIT(5);
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+ CLKCON1 |= BIT(4); //enable 26M分频32K
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+ IRRXCON |= BIT(3); //ir clock source select 32K
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+#endif // IR32KSEL_EN
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+
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+ rt_hw_interrupt_install(IRQ_IRRX_VECTOR, irrx_isr, RT_NULL, "irrx_isr");
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+ IRRXCON = 0x03;
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+
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+ // LOG_D("IRRXCON:%08x", IRRXCON);
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+}
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+#endif
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+
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+#ifdef BSP_USING_IRRX_SW
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+
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+#define TMR3_RCLK (1000u) //xosc26m_div 1M
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+
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+RT_SECTION(".irq.irrx")
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+static void irrx_isr(int vector, void *param)
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+{
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+ rt_uint32_t tmrcnt;
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+
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+ if (TMR3CON & BIT(17)) {
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+ //timer1 capture interrupt
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+ TMR3CNT = TMR3CNT - TMR3CPT;
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+ tmrcnt = TMR3CPT;
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+ TMR3CPND = BIT(17);
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+ tmrcnt /= TMR3_RCLK; //convert to ms
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+ } else if (TMR3CON & BIT(16)){
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+ //timer1 overflow interrupt
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+ TMR3CPND = BIT(16);
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+ tmrcnt = 110; //110ms overflow
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+ } else {
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+ return;
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+ }
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+
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+ //processing repeat code
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+ if (_irrx.cnt == 32) {
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+ if ((tmrcnt >= 10) && (tmrcnt <= 12)) {
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+ //repeat code is simply 9ms+2.25ms
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+ _irrx.rpt_cnt = 0;
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+ } else {
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+ _irrx.rpt_cnt += tmrcnt;
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+ if (_irrx.rpt_cnt > 108) {
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+ _irrx.rpt_cnt = 0;
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+ _irrx.cnt = 0; //ir key release
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+ }
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+ }
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+ return;
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+ } else if ((tmrcnt > 7) || (tmrcnt == 0)) { //A message is started by a 9ms AGC burst
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+ _irrx.rpt_cnt = 0;
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+ _irrx.cnt = 0; //ir key message started
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+ return;
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+ }
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+
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+ _irrx.cmd >>= 1;
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+ _irrx.cnt++;
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+ if (tmrcnt == 2) { //Bit time of 1.125ms(0) or 2.25ms(1)
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+ _irrx.cmd |= 0x8000;
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+ }
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+
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+ if (_irrx.cnt == 16) {
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+ _irrx.addr = _irrx.cmd; //save address data
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+ } else if (_irrx.cnt == 32) {
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+ //got ir key message
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+ if ((rt_uint8_t)_irrx.cmd > 96) {
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+ _irrx.cmd = NO_KEY;
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+ }
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+ }
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+}
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+
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+static void timer3_init(void)
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+{
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+ rt_hw_interrupt_install(IRQ_IRRX_VECTOR, irrx_isr, RT_NULL, "irrx_isr");
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+ TMR3CNT = 0;
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+ TMR3PR = TMR3_RCLK*110 - 1; //110ms Timer overflow interrupt
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+ TMR3CON = BIT(8) | BIT(7) | BIT(5) | BIT(2) | BIT(1) | BIT(0); //capture & overflow interrupt enable, falling edge, Capture Mode
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+}
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+
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+static void _irrx_hw_init(void)
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+{
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+ GPIOEDE |= BIT(6);
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+ GPIOEPU |= BIT(6);
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+ GPIOEDIR |= BIT(6);
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+ FUNCMCON2 |= 0xf << 4;
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+ FUNCMCON2 |= (7 << 4); // timer3 G6 PE6 capture
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+ rt_memset(&_irrx, 0, sizeof(_irrx));
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+
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+ timer3_init();
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+}
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+#endif
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+
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+static int ab32_irrx_init(void)
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+{
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+ _irrx_hw_init();
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+ LOG_D("irrx init success");
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+ return RT_EOK;
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+}
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+INIT_BOARD_EXPORT(ab32_irrx_init);
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+
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+#endif
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