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@@ -0,0 +1,139 @@
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+/*
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+ * Copyright (c) 2006-2021, RT-Thread Development Team
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ *
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+ * Change Logs:
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+ * Date Author Notes
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+ * 2021-02-20 iysheng first version
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+ */
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+
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+#include <board.h>
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+#include <sys/time.h>
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+#include <drivers/drv_comm.h>
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+
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+#define DBG_TAG "drv.rtc"
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+#define DBG_LVL DBG_INFO
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+
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+#include <rtdbg.h>
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+
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+#ifdef RT_USING_RTC
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+
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+typedef struct {
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+ struct rt_device rtc_dev;
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+} gd32_rtc_device;
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+
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+static gd32_rtc_device g_gd32_rtc_dev;
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+
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+static time_t get_rtc_timestamp(void)
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+{
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+ time_t rtc_counter;
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+
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+ rtc_counter = (time_t)RTC_GetCounter();
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+
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+ return rtc_counter;
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+}
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+
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+static rt_err_t set_rtc_timestamp(time_t time_stamp)
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+{
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+ uint32_t rtc_counter;
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+
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+ rtc_counter = (uint32_t)time_stamp;
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+
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+ /* wait until LWOFF bit in RTC_CTL to 1 */
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+ RTC_WaitLWOFF();
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+ /* enter configure mode */
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+ RTC_EnterConfigMode();
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+ /* write data to rtc register */
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+ RTC_SetCounter(rtc_counter);
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+ /* exit configure mode */
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+ RTC_ExitConfigMode();
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+ /* wait until LWOFF bit in RTC_CTL to 1 */
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+ RTC_WaitLWOFF();
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+
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+ return RT_EOK;
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+}
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+
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+static rt_err_t rt_gd32_rtc_control(rt_device_t dev, int cmd, void *args)
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+{
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+ rt_err_t result = RT_EOK;
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+
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+ RT_ASSERT(dev != RT_NULL);
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+ switch (cmd)
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+ {
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+ case RT_DEVICE_CTRL_RTC_GET_TIME:
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+ *(rt_uint32_t *)args = get_rtc_timestamp();
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+ break;
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+
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+ case RT_DEVICE_CTRL_RTC_SET_TIME:
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+ if (set_rtc_timestamp(*(rt_uint32_t *)args))
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+ {
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+ result = -RT_ERROR;
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+ }
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+ break;
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+ }
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+
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+ return result;
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+}
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+
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+#ifdef RT_USING_DEVICE_OPS
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+const static struct rt_device_ops g_gd32_rtc_ops =
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+{
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+ RT_NULL,
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+ RT_NULL,
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+ RT_NULL,
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+ RT_NULL,
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+ RT_NULL,
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+ rt_gd32_rtc_control
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+};
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+#endif
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+
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+static int rt_hw_rtc_init(void)
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+{
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+ rt_err_t ret;
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+ time_t rtc_counter;
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+
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+ rcu_periph_clock_enable(RCU_PMU);
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+ PWR_BackupAccess_Enable(ENABLE);
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+ rcu_periph_clock_enable(RCU_BKPI);
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+
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+ rtc_counter = get_rtc_timestamp();
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+ /* once the rtc clock source has been selected, if can't be changed
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+ * anymore unless the Backup domain is reset */
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+ rcu_bkp_reset_enable();
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+ rcu_bkp_reset_disable();
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+ rcu_periph_clock_enable(RCU_RTC);
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+ rcu_osci_on(RCU_LXTAL);
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+ if (SUCCESS == rcu_osci_stab_wait(RCU_LXTAL))
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+ {
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+ /* set lxtal as rtc clock source */
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+ rcu_rtc_clock_config(RCU_RTCSRC_LXTAL);
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+ }
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+ set_rtc_timestamp(rtc_counter);
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+
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+#ifdef RT_USING_DEVICE_OPS
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+ g_gd32_rtc_dev.rtc_dev.ops = &g_gd32_rtc_ops;
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+#else
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+ g_gd32_rtc_dev.rtc_dev.init = RT_NULL;
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+ g_gd32_rtc_dev.rtc_dev.open = RT_NULL;
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+ g_gd32_rtc_dev.rtc_dev.close = RT_NULL;
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+ g_gd32_rtc_dev.rtc_dev.read = RT_NULL;
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+ g_gd32_rtc_dev.rtc_dev.write = RT_NULL;
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+ g_gd32_rtc_dev.rtc_dev.control = rt_gd32_rtc_control;
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+#endif
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+ g_gd32_rtc_dev.rtc_dev.type = RT_Device_Class_RTC;
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+ g_gd32_rtc_dev.rtc_dev.rx_indicate = RT_NULL;
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+ g_gd32_rtc_dev.rtc_dev.tx_complete = RT_NULL;
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+ g_gd32_rtc_dev.rtc_dev.user_data = RT_NULL;
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+
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+ ret = rt_device_register(&g_gd32_rtc_dev.rtc_dev, "rtc", \
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+ RT_DEVICE_FLAG_RDWR);
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+ if (ret != RT_EOK)
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+ {
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+ LOG_E("failed register internal rtc device, err=%d", ret);
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+ }
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+
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+ return ret;
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+}
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+INIT_DEVICE_EXPORT(rt_hw_rtc_init);
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+#endif
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