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Эх сурвалжийг харах

[bsp][bluetrum] change the name of the sd register enum

greedyhao 4 жил өмнө
parent
commit
71bf7993f2

+ 25 - 25
bsp/bluetrum/libraries/hal_drivers/drv_sdio.c

@@ -149,10 +149,10 @@ static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
         return;
     }
 
-    cmd->resp[0] = hw_sdio[SDARG3];
-    cmd->resp[1] = hw_sdio[SDARG2];
-    cmd->resp[2] = hw_sdio[SDARG1];
-    cmd->resp[3] = hw_sdio[SDARG0];
+    cmd->resp[0] = hw_sdio[SDxARG3];
+    cmd->resp[1] = hw_sdio[SDxARG2];
+    cmd->resp[2] = hw_sdio[SDxARG1];
+    cmd->resp[3] = hw_sdio[SDxARG0];
 
     if (!(status & HW_SDIO_CON_NRPS)) {
         cmd->err = RT_EOK;
@@ -289,8 +289,8 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
     }
 
     /* send cmd */
-    hw_sdio[SDARG3] = cmd->arg;
-    hw_sdio[SDCMD]  = reg_cmd;
+    hw_sdio[SDxARG3] = cmd->arg;
+    hw_sdio[SDxCMD]  = reg_cmd;
 
     /* wait cmd completed */
     rthw_sdio_wait_completed(sdio);
@@ -309,15 +309,15 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
                             rt_tick_from_millisecond(5000), &status) != RT_EOK)
             {
                 LOG_E("wait completed timeout");
-                LOG_E("SDCON=0x%X SDCMD=0x%X\n", hw_sdio[SDCON], hw_sdio[SDCMD]);
+                LOG_E("SDxCON=0x%X SDxCMD=0x%X\n", hw_sdio[SDxCON], hw_sdio[SDxCMD]);
                 cmd->err = -RT_ETIMEOUT;
             }
 
             if (data_flag & DATA_DIR_WRITE) {
-                if (((hw_sdio[SDCON] & HW_SDIO_CON_CRCS) >> 17) != 2) {
+                if (((hw_sdio[SDxCON] & HW_SDIO_CON_CRCS) >> 17) != 2) {
                     LOG_E("Write CRC error!");
                     cmd->err = -RT_ERROR;
-                    hw_sdio[SDCPND] = HW_SDIO_CON_DFLAG;
+                    hw_sdio[SDxCPND] = HW_SDIO_CON_DFLAG;
                 }
             }
         } while(++pkg->xfer_blks != data->blks);
@@ -427,26 +427,26 @@ static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *
     switch (io_cfg->power_mode)
     {
     case MMCSD_POWER_OFF:
-        hw_sdio[SDCON] &= ~BIT(0);
+        hw_sdio[SDxCON] &= ~BIT(0);
         break;
     case MMCSD_POWER_UP:
         sd_baud = 199;
-        hw_sdio[SDCON] = 0;
+        hw_sdio[SDxCON] = 0;
         rt_thread_mdelay(1);
 
-        hw_sdio[SDCON] |= BIT(0);                 /* SD control enable */
-        hw_sdio[SDBAUD] = sysclk_update_baud(sd_baud);
-        hw_sdio[SDCON] |= BIT(3);                 /* Keep clock output */
-        hw_sdio[SDCON] |= BIT(4);
-        hw_sdio[SDCON] |= BIT(5);                 /* Data interrupt enable */
+        hw_sdio[SDxCON] |= BIT(0);                 /* SD control enable */
+        hw_sdio[SDxBAUD] = sysclk_update_baud(sd_baud);
+        hw_sdio[SDxCON] |= BIT(3);                 /* Keep clock output */
+        hw_sdio[SDxCON] |= BIT(4);
+        hw_sdio[SDxCON] |= BIT(5);                 /* Data interrupt enable */
 
         hal_mdelay(40);
         break;
     case MMCSD_POWER_ON:
         if (clk == SDIO_MAX_FREQ) {
-            hw_sdio[SDCON] &= ~BIT(3);
+            hw_sdio[SDxCON] &= ~BIT(3);
             sd_baud = 3;
-            hw_sdio[SDBAUD] = sysclk_update_baud(sd_baud);
+            hw_sdio[SDxBAUD] = sysclk_update_baud(sd_baud);
         }
         break;
     default:
@@ -501,17 +501,17 @@ void rthw_sdio_irq_process(struct rt_mmcsd_host *host)
     int complete = 0;
     struct rthw_sdio *sdio = host->private_data;
     hal_sfr_t hw_sdio = sdio->sdio_des.hw_sdio;
-    rt_uint32_t intstatus = hw_sdio[SDCON];
+    rt_uint32_t intstatus = hw_sdio[SDxCON];
 
     /* clear flag */
     if (intstatus & HW_SDIO_CON_CFLAG) {
         complete = 1;
-        hw_sdio[SDCPND] = HW_SDIO_CON_CFLAG;
+        hw_sdio[SDxCPND] = HW_SDIO_CON_CFLAG;
     }
 
     if (intstatus & HW_SDIO_CON_DFLAG) {
         complete = 1;
-        hw_sdio[SDCPND] = HW_SDIO_CON_DFLAG;
+        hw_sdio[SDxCPND] = HW_SDIO_CON_DFLAG;
     }
 
     if (complete)
@@ -602,8 +602,8 @@ static rt_err_t _dma_txconfig(rt_uint32_t *src, int Size)
 {
     hal_sfr_t sdiox = sdio_config->instance;
 
-    sdiox[SDDMAADR] = DMA_ADR(src);
-    sdiox[SDDMACNT] = BIT(18) | BIT(17) | BIT(16) | Size;
+    sdiox[SDxDMAADR] = DMA_ADR(src);
+    sdiox[SDxDMACNT] = BIT(18) | BIT(17) | BIT(16) | Size;
     return RT_EOK;
 }
 
@@ -611,8 +611,8 @@ static rt_err_t _dma_rxconfig(rt_uint32_t *dst, int Size)
 {
     hal_sfr_t sdiox = sdio_config->instance;
 
-    sdiox[SDDMAADR] = DMA_ADR(dst);
-    sdiox[SDDMACNT] = (Size);
+    sdiox[SDxDMAADR] = DMA_ADR(dst);
+    sdiox[SDxDMACNT] = (Size);
     return RT_EOK;
 }
 

+ 10 - 10
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/ab32vg1_ll_sdio.h

@@ -23,16 +23,16 @@ typedef struct sdio_init* sdio_init_t;
 
 enum
 {
-    SDCON = 0, /* [20]:BUSY [19:17]:CRCS [16]:DCRCE [15]:NRPS [1]:Data bus width [0]:SD enable */
-    SDCPND,
-    SDBAUD,
-    SDCMD,
-    SDARG3,
-    SDARG2,
-    SDARG1,
-    SDARG0,
-    SDDMAADR,
-    SDDMACNT,
+    SDxCON = 0, /* [20]:BUSY [19:17]:CRCS [16]:DCRCE [15]:NRPS [1]:Data bus width [0]:SD enable */
+    SDxCPND,
+    SDxBAUD,
+    SDxCMD,
+    SDxARG3,
+    SDxARG2,
+    SDxARG1,
+    SDxARG0,
+    SDxDMAADR,
+    SDxDMACNT,
 };
 
 #endif

+ 21 - 21
bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/source/ab32vg1_hal_sd.c

@@ -28,22 +28,22 @@ uint8_t sysclk_update_baud(uint8_t baud);
 
 void sdio_setbaud(hal_sfr_t sdiox, uint8_t baud)
 {
-    sdiox[SDBAUD] = sysclk_update_baud(baud);
+    sdiox[SDxBAUD] = sysclk_update_baud(baud);
 }
 
 void sdio_init(hal_sfr_t sdiox, sdio_init_t init)
 {
-    sdiox[SDCON] = 0;
+    sdiox[SDxCON] = 0;
 
     hal_udelay(20);
-    sdiox[SDCON] |= BIT(0);                 /* SD control enable */
+    sdiox[SDxCON] |= BIT(0);                 /* SD control enable */
     sdio_setbaud(sdiox, init->clock_div);   /* Set clock */
     if (init->clock_power_save == SDMMC_CLOCK_POWER_SAVE_DISABLE) {
-        sdiox[SDCON] |= BIT(3);                 /* Keep clock output */
+        sdiox[SDxCON] |= BIT(3);                 /* Keep clock output */
     } else {
-        sdiox[SDCON] &= ~BIT(3);                 /* Keep clock output */
+        sdiox[SDxCON] &= ~BIT(3);                 /* Keep clock output */
     }
-    sdiox[SDCON] |= BIT(5);                 /* Data interrupt enable */
+    sdiox[SDxCON] |= BIT(5);                 /* Data interrupt enable */
 
     hal_mdelay(40);
 }
@@ -57,8 +57,8 @@ void sdio_init(hal_sfr_t sdiox, sdio_init_t init)
  */
 bool sdio_check_finish(hal_sfr_t sdiox)
 {
-    if (sdiox[SDCON] & BIT(12)) {
-        sdiox[SDCPND] = BIT(12);
+    if (sdiox[SDxCON] & BIT(12)) {
+        sdiox[SDxCPND] = BIT(12);
         return true;
     }
     return false;
@@ -73,14 +73,14 @@ bool sdio_check_finish(hal_sfr_t sdiox)
  */
 bool sdio_check_rsp(hal_sfr_t sdiox)
 {
-    return !(sdiox[SDCON] & BIT(15));
+    return !(sdiox[SDxCON] & BIT(15));
 }
 
 bool sdio_send_cmd(hal_sfr_t sdiox, uint32_t cmd, uint32_t arg, uint8_t *abend)
 {
     uint32_t time_out = (cmd & CBUSY) ? RSP_BUSY_TIMEOUT : RSP_TIMEOUT;
-    sdiox[SDARG3] = arg;
-    sdiox[SDCMD] = cmd;
+    sdiox[SDxARG3] = arg;
+    sdiox[SDxCMD] = cmd;
 
     while (sdio_check_finish(sdiox) == false) {
         if (--time_out == 0) {
@@ -97,7 +97,7 @@ bool sdio_send_cmd(hal_sfr_t sdiox, uint32_t cmd, uint32_t arg, uint8_t *abend)
 
 uint8_t sdio_get_cmd_rsp(hal_sfr_t sdiox)
 {
-    return sdiox[SDCMD];
+    return sdiox[SDxCMD];
 }
 
 uint32_t sdio_get_rsp(hal_sfr_t sdiox, uint32_t rsp_reg)
@@ -107,14 +107,14 @@ uint32_t sdio_get_rsp(hal_sfr_t sdiox, uint32_t rsp_reg)
 
 void sdio_read_kick(hal_sfr_t sdiox, void* buf)
 {
-    sdiox[SDDMAADR] = DMA_ADR(buf);
-    sdiox[SDDMACNT] = 512;
+    sdiox[SDxDMAADR] = DMA_ADR(buf);
+    sdiox[SDxDMACNT] = 512;
 }
 
 void sdio_write_kick(hal_sfr_t sdiox, void* buf)
 {
-    sdiox[SDDMAADR] = DMA_ADR(buf);
-    sdiox[SDDMACNT] = BIT(18) | BIT(17) | BIT(16) | 512;
+    sdiox[SDxDMAADR] = DMA_ADR(buf);
+    sdiox[SDxDMACNT] = BIT(18) | BIT(17) | BIT(16) | 512;
 }
 
 bool sdio_isbusy(hal_sfr_t sdiox)
@@ -146,7 +146,7 @@ void sdmmc_cmd_set_rel_addr(sd_handle_t hsd)
         sdio_send_cmd(sdiox, 3 | RSP_1, hsd->sdcard.rca, &(hsd->sdcard.abend));
     } else {
         sdio_send_cmd(sdiox, 3 | RSP_6, 0, &(hsd->sdcard.abend));
-        hsd->sdcard.rca = sdio_get_rsp(sdiox, SDARG3) & 0xffff0000;
+        hsd->sdcard.rca = sdio_get_rsp(sdiox, SDxARG3) & 0xffff0000;
     }
 }
 
@@ -159,8 +159,8 @@ void sdmmc_cmd_send_csd(sd_handle_t hsd)
         //
     } else {
         if (hsd->sdcard.flag_sdhc == 1) {
-            hsd->sdcard.capacity =   (sdio_get_rsp(sdiox, SDARG2) << 24) & 0x00ff0000;   /* rspbuf[8] */
-            hsd->sdcard.capacity |=  ((sdio_get_rsp(sdiox, SDARG1) >> 16) & 0x0000ffff); /* rspbuf[9] rspbuf[10] */
+            hsd->sdcard.capacity =   (sdio_get_rsp(sdiox, SDxARG2) << 24) & 0x00ff0000;   /* rspbuf[8] */
+            hsd->sdcard.capacity |=  ((sdio_get_rsp(sdiox, SDxARG1) >> 16) & 0x0000ffff); /* rspbuf[9] rspbuf[10] */
             hsd->sdcard.capacity +=  1;
             hsd->sdcard.capacity <<= 10;
         }
@@ -240,11 +240,11 @@ static bool sd_go_ready_try(sd_handle_t hsd)
         break;
     }
 
-    if (0 == (hsd->instance[SDARG3] & BIT(31))) {
+    if (0 == (hsd->instance[SDxARG3] & BIT(31))) {
         return false; // no ready
     }
 
-    if ((hsd->sdcard.type == CARD_V2) && (hsd->instance[SDARG3] & BIT(30))) {
+    if ((hsd->sdcard.type == CARD_V2) && (hsd->instance[SDxARG3] & BIT(30))) {
         HAL_LOG("SDHC\n");
         hsd->sdcard.flag_sdhc = 1;
     }