[bsp] ra8 add adc、dac、pwm、spi、rw007 configs

bsp/renesas/libraries/HAL_Drivers/config/drv_config.h

@@ -127,6 +127,18 @@ extern "C"
 #ifdef SOC_SERIES_R7FA8M85
 #include "ra8/uart_config.h"
 
+#ifdef BSP_USING_PWM
+#include "ra8/pwm_config.h"
+#endif
+
+#ifdef BSP_USING_ADC
+#include "ra8/adc_config.h"
+#endif
+
+#ifdef BSP_USING_DAC
+#include "ra8/dac_config.h"
+#endif
+
 #endif /* SOC_SERIES_R7FA8M85 */
 
 #ifdef __cplusplus

bsp/renesas/libraries/HAL_Drivers/config/ra8/adc_config.h

@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-08-19     Mr.Tiger     first version
+ */
+
+#ifndef __ADC_CONFIG_H__
+#define __ADC_CONFIG_H__
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "hal_data.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
+struct ra_adc_map
+{
+    char name;
+    const adc_cfg_t *g_cfg;
+    const adc_instance_ctrl_t *g_ctrl;
+    const adc_channel_cfg_t   *g_channel_cfg;
+};
+
+struct ra_dev
+{
+    rt_adc_device_t     ra_adc_device_t;
+    struct ra_adc_map  *ra_adc_dev;
+};
+#endif
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+

bsp/renesas/libraries/HAL_Drivers/config/ra8/dac_config.h

@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-08-19     Mr.Tiger     first version
+ */
+
+#ifndef __DAC_CONFIG_H__
+#define __DAC_CONFIG_H__
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "hal_data.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef BSP_USING_DAC
+struct ra_dac_map
+{
+    char name;
+    const struct st_dac_cfg *g_cfg;
+    const struct st_dac_instance_ctrl *g_ctrl;
+};
+
+struct ra_dac_dev
+{
+    rt_dac_device_t       ra_dac_device_t;
+    struct ra_dac_map    *ra_dac_map_dev;
+};
+#endif
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+

bsp/renesas/libraries/HAL_Drivers/config/ra8/pwm_config.h

@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2006-2023, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author            Notes
+ * 2021-10-26     KevinXu           first version
+ */
+#ifndef __PWM_CONFIG_H__
+#define __PWM_CONFIG_H__
+
+#include <rtthread.h>
+#include <drv_config.h>
+#include "hal_data.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum
+{
+#ifdef BSP_USING_PWM0
+    BSP_PWM0_INDEX,
+#endif
+#ifdef BSP_USING_PWM1
+    BSP_PWM1_INDEX,
+#endif
+#ifdef BSP_USING_PWM2
+    BSP_PWM2_INDEX,
+#endif
+#ifdef BSP_USING_PWM3
+    BSP_PWM3_INDEX,
+#endif
+#ifdef BSP_USING_PWM4
+    BSP_PWM4_INDEX,
+#endif
+#ifdef BSP_USING_PWM5
+    BSP_PWM5_INDEX,
+#endif
+#ifdef BSP_USING_PWM6
+    BSP_PWM6_INDEX,
+#endif
+#ifdef BSP_USING_PWM7
+    BSP_PWM7_INDEX,
+#endif
+#ifdef BSP_USING_PWM8
+    BSP_PWM8_INDEX,
+#endif
+#ifdef BSP_USING_PWM9
+    BSP_PWM9_INDEX,
+#endif
+    BSP_PWMS_NUM
+};
+
+#define PWM_DRV_INITIALIZER(num)        \
+    {                                   \
+        .name = "pwm"#num ,             \
+        .g_cfg = &g_timer##num##_cfg,   \
+        .g_ctrl = &g_timer##num##_ctrl, \
+        .g_timer = &g_timer##num,       \
+    }
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PWM_CONFIG_H__ */

bsp/renesas/libraries/HAL_Drivers/drv_sci_spi.c

@@ -24,6 +24,14 @@
 #endif /* DRV_DEBUG */
 #include <rtdbg.h>
 
+#ifdef R_SCI_B_SPI_H
+#define R_SCI_SPI_Write R_SCI_B_SPI_Write
+#define R_SCI_SPI_Read R_SCI_B_SPI_Read
+#define R_SCI_SPI_WriteRead R_SCI_B_SPI_WriteRead
+#define R_SCI_SPI_Open R_SCI_B_SPI_Open
+#define R_SCI_SPI_Close R_SCI_B_SPI_Close
+#endif
+
 #define RA_SCI_SPI0_EVENT 0x0001
 #define RA_SCI_SPI1_EVENT 0x0002
 #define RA_SCI_SPI2_EVENT 0x0004
@@ -249,13 +257,21 @@ static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
     configuration->data_width = configuration->data_width / 8;
     spi_dev->rt_spi_cfg_t = configuration;
 
+#ifdef R_SCI_B_SPI_H
+    sci_b_spi_extended_cfg_t spi_cfg = *(sci_b_spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend;
+#else
     sci_spi_extended_cfg_t *spi_cfg = (sci_spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend;
+#endif
 
     /**< Configure Select Line */
     rt_pin_write(device->cs_pin, PIN_HIGH);
 
     /**< config bitrate */
-    R_SCI_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg->clk_div, false);
+#ifdef R_SCI_B_SPI_H
+    R_SCI_B_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, SCI_B_SPI_SOURCE_CLOCK_PCLK, &spi_cfg.clk_div);
+#else
+    R_SCI_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg.clk_div, false);
+#endif
 
     /**< init */
     err = R_SCI_SPI_Open((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, (spi_cfg_t const * const)spi_dev->ra_spi_handle_t->spi_cfg_t);

bsp/renesas/libraries/HAL_Drivers/drv_sci_spi.h

@@ -24,12 +24,16 @@
 extern "C" {
 #endif
 
-#ifdef R_SCI_SPI_H
+#if defined(R_SCI_SPI_H) || defined(R_SCI_B_SPI_H)
 struct ra_sci_spi_handle
 {
     const char bus_name[RT_NAME_MAX];
     const spi_cfg_t               *spi_cfg_t;
+#ifdef R_SCI_B_SPI_H
+    const sci_b_spi_instance_ctrl_t *spi_ctrl_t;
+#else
     const sci_spi_instance_ctrl_t *spi_ctrl_t;
+#endif
 };
 
 struct ra_sci_spi

bsp/renesas/libraries/HAL_Drivers/drv_spi.c

@@ -29,6 +29,14 @@
 #define RA_SPI1_EVENT 0x02
 static struct rt_event complete_event = {0};
 
+#ifdef SOC_SERIES_R7FA8M85
+#define R_SPI_Write R_SPI_B_Write
+#define R_SPI_Read  R_SPI_B_Read
+#define R_SPI_WriteRead R_SPI_B_WriteRead
+#define R_SPI_Open R_SPI_B_Open
+#define spi_extended_cfg_t spi_b_extended_cfg_t
+#endif
+
 static struct ra_spi_handle spi_handle[] =
 {
 #ifdef BSP_USING_SPI0
@@ -177,13 +185,17 @@ static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
     configuration->data_width = configuration->data_width / 8;
     spi_dev->rt_spi_cfg_t = configuration;
 
-    spi_extended_cfg_t *spi_cfg = (spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend;
+    spi_extended_cfg_t spi_cfg = *(spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend;
 
     /**< Configure Select Line */
     rt_pin_write(device->cs_pin, PIN_HIGH);
 
     /**< config bitrate */
-    R_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg->spck_div);
+#ifdef SOC_SERIES_R7FA8M85
+    R_SPI_B_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, SPI_B_CLOCK_SOURCE_PCLK, &spi_cfg.spck_div);
+#else
+    R_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg.spck_div);
+#endif
 
     /**< init */
     err = R_SPI_Open((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, (spi_cfg_t const * const)spi_dev->ra_spi_handle_t->spi_cfg_t);

bsp/renesas/libraries/HAL_Drivers/drv_spi.h

@@ -23,12 +23,16 @@
 extern "C" {
 #endif
 
-#ifdef R_SPI_H
+#if defined(R_SPI_H) || defined(R_SPI_API_H)
 struct ra_spi_handle
 {
     const char bus_name[RT_NAME_MAX];
-    const spi_cfg_t           *spi_cfg_t;
+    const spi_cfg_t  *spi_cfg_t;
+#if defined(R_SPI_API_H)
+    const spi_ctrl_t *spi_ctrl_t;
+#else
     const spi_instance_ctrl_t *spi_ctrl_t;
+#endif
 };
 
 struct ra_spi

bsp/renesas/ra8m1-ek/board/Kconfig

@@ -462,6 +462,24 @@ menu "Hardware Drivers Config"
                 endif
             endif
 
+        menuconfig BSP_USING_ADC
+            bool "Enable ADC"
+            default n
+            select RT_USING_ADC
+            if BSP_USING_ADC
+                config BSP_USING_ADC0
+                    bool "Enable ADC0"
+                    default n
+            endif
+        menuconfig BSP_USING_DAC
+            bool "Enable DAC"
+            default n
+            select RT_USING_DAC
+            if BSP_USING_DAC
+                config BSP_USING_DAC0
+                    bool "Enable DAC0"
+                    default n
+            endif
         menuconfig BSP_USING_FS
             bool "Enable filesystem"
             default n
@@ -480,9 +498,46 @@ menu "Hardware Drivers Config"
             default n
             select RT_USING_PWM
             if BSP_USING_PWM
-                config BSP_USING_PWM12
-                    bool "Enable GPT12 (16-Bits) output PWM"
+                config BSP_USING_PWM0
+                    bool "Enable GPT0 (16-Bits) output PWM"
                     default n
             endif
     endmenu
+
+    menu "Board extended module Drivers"
+        menuconfig BSP_USING_RW007
+            bool "Enable RW007"
+            default n
+            select PKG_USING_RW007
+            select BSP_USING_SCI_SPI
+            select BSP_USING_SCI_SPI0
+            select RT_USING_MEMPOOL
+            select RW007_NOT_USE_EXAMPLE_DRIVERS
+
+        if BSP_USING_RW007
+            config RA_RW007_SPI_BUS_NAME
+                string "RW007 BUS NAME"
+                default "scpi0"
+
+            config RA_RW007_CS_PIN
+                hex "(HEX)CS pin index"
+                default 0x060C
+
+            config RA_RW007_BOOT0_PIN
+                hex "(HEX)BOOT0 pin index (same as spi clk pin)"
+                default 0x060B
+
+            config RA_RW007_BOOT1_PIN
+                hex "(HEX)BOOT1 pin index (same as spi cs pin)"
+                default 0x060C
+
+            config RA_RW007_INT_BUSY_PIN
+                hex "(HEX)INT/BUSY pin index"
+                default 0x0006
+
+            config RA_RW007_RST_PIN
+                hex "(HEX)RESET pin index"
+                default 0x0A08
+        endif
+    endmenu
 endmenu

bsp/renesas/ra8m1-ek/board/ports/wifi/SConscript

@@ -0,0 +1,22 @@
+
+from building import *
+import rtconfig
+
+cwd = GetCurrentDir()
+
+src = []
+
+if GetDepend(['BSP_USING_RW007']):
+    src += Glob('drv_rw007.c')
+
+CPPPATH = [cwd]
+LOCAL_CFLAGS = ''
+
+if rtconfig.PLATFORM in ['gcc', 'armclang']:
+    LOCAL_CFLAGS += ' -std=c99'
+elif rtconfig.PLATFORM in ['armcc']:
+    LOCAL_CFLAGS += ' --c99'
+
+group = DefineGroup('Drivers', src, depend = [], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS)
+
+Return('group')

bsp/renesas/ra8m1-ek/board/ports/wifi/drv_rw007.c

@@ -0,0 +1,65 @@
+#include <rtthread.h>
+#include <rtdbg.h>
+#ifdef BSP_USING_RW007
+#include <rtdevice.h>
+#include <drv_sci_spi.h>
+#include <board.h>
+#include <spi_wifi_rw007.h>
+
+extern void spi_wifi_isr(int vector);
+
+static void rw007_gpio_init(void)
+{
+    /* Configure IO */
+    rt_pin_mode(RA_RW007_RST_PIN, PIN_MODE_OUTPUT);
+    rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN);
+
+    /* Reset rw007 and config mode */
+    rt_pin_write(RA_RW007_RST_PIN, PIN_LOW);
+    rt_thread_delay(rt_tick_from_millisecond(100));
+    rt_pin_write(RA_RW007_RST_PIN, PIN_HIGH);
+
+    /* Wait rw007 ready(exit busy stat) */
+    while (!rt_pin_read(RA_RW007_INT_BUSY_PIN))
+    {
+        rt_thread_delay(5);
+    }
+
+    rt_thread_delay(rt_tick_from_millisecond(200));
+    rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP);
+}
+
+int wifi_spi_device_init(void)
+{
+    char sn_version[32];
+    uint32_t cs_pin = RA_RW007_CS_PIN;
+
+    rw007_gpio_init();
+    rt_hw_sci_spi_device_attach(RA_RW007_SPI_BUS_NAME, "wspi", cs_pin);
+    rt_hw_wifi_init("wspi");
+
+    rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION);
+    rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP);
+
+    rw007_sn_get(sn_version);
+    rt_kprintf("\nrw007  sn: [%s]\n", sn_version);
+    rw007_version_get(sn_version);
+    rt_kprintf("rw007 ver: [%s]\n\n", sn_version);
+
+    return 0;
+}
+INIT_APP_EXPORT(wifi_spi_device_init);
+
+static void int_wifi_irq(void *p)
+{
+    ((void)p);
+    spi_wifi_isr(0);
+}
+
+void spi_wifi_hw_init(void)
+{
+    rt_pin_attach_irq(RA_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0);
+    rt_pin_irq_enable(RA_RW007_INT_BUSY_PIN, RT_TRUE);
+}
+
+#endif /* BSP_USING_RW007 */