[BSP] add some bsp drivers for F448, F472 and add bsp test codes

bsp/hc32/ev_hc32f448_lqfp80/.config

@@ -1,15 +1,117 @@
+
 #
-# Automatically generated file; DO NOT EDIT.
-# RT-Thread Configuration
+# RT-Thread Kernel
 #
 
 #
-# RT-Thread Kernel
+# klibc options
+#
+
+#
+# rt_vsnprintf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set
+# end of rt_vsnprintf options
+
+#
+# rt_vsscanf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSSCANF is not set
+# end of rt_vsscanf options
+
+#
+# rt_memset options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMSET is not set
+# end of rt_memset options
+
+#
+# rt_memcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMCPY is not set
+# end of rt_memcpy options
+
+#
+# rt_memmove options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMMOVE is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMMOVE is not set
+# end of rt_memmove options
+
+#
+# rt_memcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCMP is not set
+# end of rt_memcmp options
+
+#
+# rt_strstr options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRSTR is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRSTR is not set
+# end of rt_strstr options
+
+#
+# rt_strcasecmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCASECMP is not set
+# end of rt_strcasecmp options
+
+#
+# rt_strncpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCPY is not set
+# end of rt_strncpy options
+
+#
+# rt_strcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCPY is not set
+# end of rt_strcpy options
+
+#
+# rt_strncmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCMP is not set
+# end of rt_strncmp options
+
+#
+# rt_strcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCMP is not set
+# end of rt_strcmp options
+
+#
+# rt_strlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRLEN is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRLEN is not set
+# end of rt_strlen options
+
 #
+# rt_strnlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set
+# end of rt_strnlen options
+
+# CONFIG_RT_UTEST_TC_USING_KLIBC is not set
+# end of klibc options
+
 CONFIG_RT_NAME_MAX=8
 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set
-# CONFIG_RT_USING_SMART is not set
 # CONFIG_RT_USING_NANO is not set
+# CONFIG_RT_USING_SMART is not set
 # CONFIG_RT_USING_AMP is not set
 # CONFIG_RT_USING_SMP is not set
 CONFIG_RT_CPUS_NR=1
@@ -27,18 +129,20 @@ CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=256
 # CONFIG_RT_USING_TIMER_SOFT is not set
+# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
 
 #
-# kservice optimization
+# kservice options
 #
-# CONFIG_RT_KSERVICE_USING_STDLIB is not set
-# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
 # CONFIG_RT_USING_TINY_FFS is not set
-# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
+# end of kservice options
+
 CONFIG_RT_USING_DEBUG=y
+CONFIG_RT_DEBUGING_ASSERT=y
 CONFIG_RT_DEBUGING_COLOR=y
 CONFIG_RT_DEBUGING_CONTEXT=y
 # CONFIG_RT_DEBUGING_AUTO_INIT is not set
+# CONFIG_RT_USING_CI_ACTION is not set
 
 #
 # Inter-Thread communication
@@ -50,6 +154,7 @@ CONFIG_RT_USING_MAILBOX=y
 CONFIG_RT_USING_MESSAGEQUEUE=y
 # CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
 # CONFIG_RT_USING_SIGNALS is not set
+# end of Inter-Thread communication
 
 #
 # Memory Management
@@ -66,21 +171,21 @@ CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
 # CONFIG_RT_USING_MEMTRACE is not set
 # CONFIG_RT_USING_HEAP_ISR is not set
 CONFIG_RT_USING_HEAP=y
+# end of Memory Management
+
 CONFIG_RT_USING_DEVICE=y
 # CONFIG_RT_USING_DEVICE_OPS is not set
 # CONFIG_RT_USING_INTERRUPT_INFO is not set
 # CONFIG_RT_USING_THREADSAFE_PRINTF is not set
-# CONFIG_RT_USING_SCHED_THREAD_CTX is not set
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart2"
-CONFIG_RT_VER_NUM=0x50100
+CONFIG_RT_VER_NUM=0x50200
 # CONFIG_RT_USING_STDC_ATOMIC is not set
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
-# CONFIG_RT_USING_CACHE is not set
+# end of RT-Thread Kernel
+
 CONFIG_RT_USING_HW_ATOMIC=y
-# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set
-# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
 CONFIG_RT_USING_CPU_FFS=y
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM_CORTEX_M=y
@@ -115,12 +220,15 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y
 # DFS: device virtual file system
 #
 # CONFIG_RT_USING_DFS is not set
+# end of DFS: device virtual file system
+
 # CONFIG_RT_USING_FAL is not set
 
 #
 # Device Drivers
 #
 # CONFIG_RT_USING_DM is not set
+# CONFIG_RT_USING_DEV_BUS is not set
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_UNAMED_PIPE_NUMBER=64
 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@@ -131,16 +239,24 @@ CONFIG_RT_USING_SERIAL_V1=y
 # CONFIG_RT_USING_SERIAL_V2 is not set
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_SERIAL_BYPASS is not set
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+CONFIG_RT_USING_I2C_BITOPS=y
+# CONFIG_RT_I2C_BITOPS_DEBUG is not set
+# CONFIG_RT_USING_SOFT_I2C is not set
 # CONFIG_RT_USING_PHY is not set
+# CONFIG_RT_USING_PHY_V2 is not set
 # CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_NULL is not set
 # CONFIG_RT_USING_ZERO is not set
 # CONFIG_RT_USING_RANDOM is not set
 # CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_PM is not set
@@ -153,21 +269,14 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_TOUCH is not set
 # CONFIG_RT_USING_LCD is not set
 # CONFIG_RT_USING_HWCRYPTO is not set
-# CONFIG_RT_USING_PULSE_ENCODER is not set
-# CONFIG_RT_USING_INPUT_CAPTURE is not set
-# CONFIG_RT_USING_DEV_BUS is not set
 # CONFIG_RT_USING_WIFI is not set
+# CONFIG_RT_USING_BLK is not set
 # CONFIG_RT_USING_VIRTIO is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_KTIME is not set
 # CONFIG_RT_USING_HWTIMER is not set
-
-#
-# Using USB
-#
-# CONFIG_RT_USING_USB is not set
-# CONFIG_RT_USING_USB_HOST is not set
-# CONFIG_RT_USING_USB_DEVICE is not set
+# CONFIG_RT_USING_CHERRYUSB is not set
+# end of Device Drivers
 
 #
 # C/C++ and POSIX layer
@@ -185,6 +294,8 @@ CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y
 CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8
 CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0
 CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
+# end of Timezone and Daylight Saving Time
+# end of ISO-ANSI C layer
 
 #
 # POSIX (Portable Operating System Interface) layer
@@ -206,7 +317,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # Socket is in the 'Network' category
 #
+# end of Interprocess Communication (IPC)
+# end of POSIX (Portable Operating System Interface) layer
+
 # CONFIG_RT_USING_CPLUSPLUS is not set
+# end of C/C++ and POSIX layer
 
 #
 # Network
@@ -215,12 +330,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_RT_USING_NETDEV is not set
 # CONFIG_RT_USING_LWIP is not set
 # CONFIG_RT_USING_AT is not set
+# end of Network
 
 #
 # Memory protection
 #
 # CONFIG_RT_USING_MEM_PROTECTION is not set
 # CONFIG_RT_USING_HW_STACK_GUARD is not set
+# end of Memory protection
 
 #
 # Utilities
@@ -232,12 +349,25 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_RT_USING_RESOURCE_ID is not set
 # CONFIG_RT_USING_ADT is not set
 # CONFIG_RT_USING_RT_LINK is not set
+# end of Utilities
+
 # CONFIG_RT_USING_VBUS is not set
 
+#
+# Using USB legacy version
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+# end of Using USB legacy version
+
+# CONFIG_RT_USING_FDT is not set
+# end of RT-Thread Components
+
 #
 # RT-Thread Utestcases
 #
 # CONFIG_RT_USING_UTESTCASES is not set
+# end of RT-Thread Utestcases
 
 #
 # RT-Thread online packages
@@ -246,7 +376,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
 # CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
 # CONFIG_PKG_USING_UMQTT is not set
@@ -259,6 +388,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
 # CONFIG_PKG_USING_NANOPB is not set
+# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
 
 #
 # Wi-Fi
@@ -268,27 +398,35 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # Marvell WiFi
 #
 # CONFIG_PKG_USING_WLANMARVELL is not set
+# end of Marvell WiFi
 
 #
 # Wiced WiFi
 #
 # CONFIG_PKG_USING_WLAN_WICED is not set
+# end of Wiced WiFi
+
 # CONFIG_PKG_USING_RW007 is not set
 
 #
 # CYW43012 WiFi
 #
 # CONFIG_PKG_USING_WLAN_CYW43012 is not set
+# end of CYW43012 WiFi
 
 #
 # BL808 WiFi
 #
 # CONFIG_PKG_USING_WLAN_BL808 is not set
+# end of BL808 WiFi
 
 #
 # CYW43439 WiFi
 #
 # CONFIG_PKG_USING_WLAN_CYW43439 is not set
+# end of CYW43439 WiFi
+# end of Wi-Fi
+
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
@@ -311,6 +449,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
 # CONFIG_PKG_USING_JOYLINK is not set
 # CONFIG_PKG_USING_IOTSHARP_SDK is not set
+# end of IoT Cloud
+
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
@@ -353,6 +493,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ZEPHYR_POLLING is not set
 # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
 # CONFIG_PKG_USING_LHC_MODBUS is not set
+# CONFIG_PKG_USING_QMODBUS is not set
+# end of IoT - internet of things
 
 #
 # security packages
@@ -363,6 +505,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
 # CONFIG_PKG_USING_YD_CRYPTO is not set
+# end of security packages
 
 #
 # language packages
@@ -378,18 +521,22 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_AGILE_JSMN is not set
 # CONFIG_PKG_USING_PARSON is not set
+# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
 
 #
 # XML: Extensible Markup Language
 #
 # CONFIG_PKG_USING_SIMPLE_XML is not set
 # CONFIG_PKG_USING_EZXML is not set
+# end of XML: Extensible Markup Language
+
 # CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
 # CONFIG_PKG_USING_PIKASCRIPT is not set
 # CONFIG_PKG_USING_RTT_RUST is not set
+# end of language packages
 
 #
 # multimedia packages
@@ -401,12 +548,15 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_LVGL is not set
 # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
 # CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
+# end of LVGL: powerful and easy-to-use embedded GUI library
 
 #
 # u8g2: a monochrome graphic library
 #
 # CONFIG_PKG_USING_U8G2_OFFICIAL is not set
 # CONFIG_PKG_USING_U8G2 is not set
+# end of u8g2: a monochrome graphic library
+
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
@@ -427,6 +577,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_GUIENGINE is not set
 # CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_3GPP_AMRNB is not set
+# end of multimedia packages
 
 #
 # tools packages
@@ -476,6 +627,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_VOFA_PLUS is not set
 # CONFIG_PKG_USING_RT_TRACE is not set
 # CONFIG_PKG_USING_ZDEBUG is not set
+# end of tools packages
 
 #
 # system packages
@@ -487,6 +639,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_RT_MEMCPY_CM is not set
 # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
 # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
+# end of enhanced kernel services
+
+# CONFIG_PKG_USING_AUNITY is not set
 
 #
 # acceleration: Assembly language or algorithmic acceleration packages
@@ -494,6 +649,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
 # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
 # CONFIG_PKG_USING_QFPLIB_M3 is not set
+# end of acceleration: Assembly language or algorithmic acceleration packages
 
 #
 # CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
@@ -504,6 +660,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_CMSIS_NN is not set
 # CONFIG_PKG_USING_CMSIS_RTOS1 is not set
 # CONFIG_PKG_USING_CMSIS_RTOS2 is not set
+# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
 
 #
 # Micrium: Micrium software products porting for RT-Thread
@@ -514,6 +671,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_UC_CLK is not set
 # CONFIG_PKG_USING_UC_COMMON is not set
 # CONFIG_PKG_USING_UC_MODBUS is not set
+# end of Micrium: Micrium software products porting for RT-Thread
+
 # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
 # CONFIG_PKG_USING_LITEOS_SDK is not set
 # CONFIG_PKG_USING_TZ_DATABASE is not set
@@ -561,6 +720,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_RTP is not set
 # CONFIG_PKG_USING_REB is not set
 # CONFIG_PKG_USING_R_RHEALSTONE is not set
+# end of system packages
 
 #
 # peripheral libraries and drivers
@@ -573,9 +733,27 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # STM32 HAL & SDK Drivers
 #
-# CONFIG_PKG_USING_STM32L4XX_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
 # CONFIG_PKG_USING_STM32WB55_SDK is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
+# end of STM32 HAL & SDK Drivers
+
+#
+# Infineon HAL Packages
+#
+# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
+# CONFIG_PKG_USING_INFINEON_CMSIS is not set
+# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
+# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
+# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
+# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
+# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
+# CONFIG_PKG_USING_INFINEON_USBDEV is not set
+# end of Infineon HAL Packages
+
 # CONFIG_PKG_USING_BLUETRUM_SDK is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
 # CONFIG_PKG_USING_ESP_IDF is not set
@@ -585,9 +763,12 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # CONFIG_PKG_USING_K210_SDK is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# end of Kendryte SDK
+
 # CONFIG_PKG_USING_NRF5X_SDK is not set
 # CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
+# end of HAL & SDK Drivers
 
 #
 # sensors drivers
@@ -657,6 +838,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_PAJ7620 is not set
 # CONFIG_PKG_USING_STHS34PF80 is not set
+# end of sensors drivers
 
 #
 # touch drivers
@@ -671,6 +853,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_XPT2046_TOUCH is not set
 # CONFIG_PKG_USING_CST816X is not set
 # CONFIG_PKG_USING_CST812T is not set
+# end of touch drivers
+
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
@@ -743,6 +927,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_BT_MX01 is not set
 # CONFIG_PKG_USING_RGPOWER is not set
 # CONFIG_PKG_USING_SPI_TOOLS is not set
+# end of peripheral libraries and drivers
 
 #
 # AI packages
@@ -757,15 +942,18 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_QUEST is not set
 # CONFIG_PKG_USING_NAXOS is not set
 # CONFIG_PKG_USING_R_TINYMAIX is not set
+# end of AI packages
 
 #
 # Signal Processing and Control Algorithm Packages
 #
+# CONFIG_PKG_USING_APID is not set
 # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
 # CONFIG_PKG_USING_QPID is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_KISSFFT is not set
+# end of Signal Processing and Control Algorithm Packages
 
 #
 # miscellaneous packages
@@ -774,6 +962,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # project laboratory
 #
+# end of project laboratory
 
 #
 # samples: kernel and components samples
@@ -782,6 +971,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
 # CONFIG_PKG_USING_NETWORK_SAMPLES is not set
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# end of samples: kernel and components samples
 
 #
 # entertainment: terminal games and other interesting software packages
@@ -798,6 +988,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_MORSE is not set
 # CONFIG_PKG_USING_TINYSQUARE is not set
+# end of entertainment: terminal games and other interesting software packages
+
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
@@ -831,6 +1023,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_SOEM is not set
 # CONFIG_PKG_USING_QPARAM is not set
 # CONFIG_PKG_USING_CorevMCU_CLI is not set
+# end of miscellaneous packages
 
 #
 # Arduino libraries
@@ -846,6 +1039,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
 # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
 # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
+# end of Projects and Demos
 
 #
 # Sensors
@@ -985,6 +1179,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
 # CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set
+# end of Sensors
 
 #
 # Display
@@ -996,6 +1192,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
 # CONFIG_PKG_USING_SEEED_TM1637 is not set
+# end of Display
 
 #
 # Timing
@@ -1004,6 +1201,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
 # CONFIG_PKG_USING_ARDUINO_TICKER is not set
 # CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
+# end of Timing
 
 #
 # Data Processing
@@ -1011,6 +1209,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set
 # CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set
 # CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set
+# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set
+# end of Data Processing
 
 #
 # Data Storage
@@ -1021,6 +1221,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set
+# end of Communication
 
 #
 # Device Control
@@ -1032,12 +1233,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
+# end of Device Control
 
 #
 # Other
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
+# end of Other
 
 #
 # Signal IO
@@ -1050,10 +1253,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set
+# end of Signal IO
 
 #
 # Uncategorized
 #
+# end of Arduino libraries
+# end of RT-Thread online packages
+
 CONFIG_SOC_FAMILY_HC32=y
 CONFIG_SOC_SERIES_HC32F4=y
 
@@ -1069,12 +1276,15 @@ CONFIG_BSP_USING_ON_CHIP_FLASH_CACHE=y
 CONFIG_BSP_USING_ON_CHIP_FLASH_ICODE_CACHE=y
 CONFIG_BSP_USING_ON_CHIP_FLASH_DCODE_CACHE=y
 CONFIG_BSP_USING_ON_CHIP_FLASH_ICODE_PREFETCH=y
+# end of On-chip Drivers
 
 #
 # Onboard Peripheral Drivers
 #
-# CONFIG_BSP_USING_TCA9539 is not set
+CONFIG_BSP_USING_TCA9539=y
 # CONFIG_BSP_USING_SPI_FLASH is not set
+CONFIG_BSP_USING_EXT_IO=y
+# end of Onboard Peripheral Drivers
 
 #
 # On-chip Peripheral Drivers
@@ -1083,18 +1293,24 @@ CONFIG_BSP_USING_GPIO=y
 CONFIG_BSP_USING_UART=y
 # CONFIG_BSP_USING_UART1 is not set
 CONFIG_BSP_USING_UART2=y
-CONFIG_BSP_UART2_RX_USING_DMA=y
-CONFIG_BSP_UART2_TX_USING_DMA=y
+# CONFIG_BSP_UART2_RX_USING_DMA is not set
+# CONFIG_BSP_UART2_TX_USING_DMA is not set
 # CONFIG_BSP_USING_UART3 is not set
 # CONFIG_BSP_USING_UART4 is not set
 # CONFIG_BSP_USING_UART5 is not set
 # CONFIG_BSP_USING_UART6 is not set
-# CONFIG_BSP_USING_I2C is not set
+CONFIG_BSP_USING_I2C=y
+# CONFIG_BSP_USING_I2C1_SW is not set
+CONFIG_BSP_USING_I2C_HW=y
+CONFIG_BSP_USING_I2C1=y
+# CONFIG_BSP_I2C1_TX_USING_DMA is not set
+# CONFIG_BSP_I2C1_RX_USING_DMA is not set
+# CONFIG_BSP_USING_I2C2 is not set
 # CONFIG_BSP_USING_ON_CHIP_FLASH is not set
 # CONFIG_BSP_USING_SPI is not set
 # CONFIG_BSP_USING_ADC is not set
 # CONFIG_BSP_USING_DAC is not set
-# CONFIG_BSP_USING_CAN is not set
+# CONFIG_BSP_USING_MCAN is not set
 # CONFIG_BSP_USING_WDT_TMR is not set
 # CONFIG_BSP_USING_RTC is not set
 # CONFIG_BSP_USING_PM is not set
@@ -1104,7 +1320,9 @@ CONFIG_BSP_UART2_TX_USING_DMA=y
 # CONFIG_BSP_USING_PULSE_ENCODER is not set
 # CONFIG_BSP_USING_HWTIMER is not set
 # CONFIG_BSP_USING_SENSOR is not set
+# end of On-chip Peripheral Drivers
 
 #
 # Board extended module Drivers
 #
+# end of Hardware Drivers Config

bsp/hc32/ev_hc32f448_lqfp80/.project

@@ -64,5 +64,15 @@
       <type>2</type>
       <locationURI>$%7BPARENT-1-PROJECT_LOC%7D/libraries</locationURI>
     </link>
+    <link>
+      <name>rt-thread/bsp/hc32/platform</name>
+      <type>2</type>
+      <locationURI>PARENT-1-PROJECT_LOC/platform</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/bsp/hc32/tests</name>
+      <type>2</type>
+      <locationURI>PARENT-1-PROJECT_LOC/tests</locationURI>
+    </link>
   </linkedResources>
 </projectDescription>

bsp/hc32/ev_hc32f448_lqfp80/README.md

@@ -50,35 +50,43 @@ EV_F448_LQ80_Rev1.0 开发板常用 **板载资源** 如下：
 
 本 BSP 目前对外设的支持情况如下：
 
-| **板载外设**  | **支持情况** |               **备注**                |
-| :------------ | :-----------: | :-----------------------------------: |
-| USB 转串口    |      支持     |          使用 UART2                  |
-| LED           |     支持     |           LED1~4                   |
-
-| **片上外设**  | **支持情况** |               **备注**                |
-| :------------ | :-----------: | :-----------------------------------: |
-| ADC           |     支持     | ADC1: CH10, CH11, <br>ADC3: CH1 |
-| CAN           |     支持     |              CAN1、CAN2                      |
-| GPIO          |     支持     | PA0, PA1... PH2 ---> PIN: 0, 1...82 |
-| I2C           |     支持     | 软件模拟<br>硬件I2C1~2<br>I2C1支持EEPROM（BL24C256） |
-| Hwtimer           |     支持     | Hwtimer1~5 |
-| SPI           |     支持     | SPI1~3<br>SPI1支持W25Q |
-| UART          |     支持     |              UART1~6<br>UART2为console使用                 |
-
+| **板载外设** | **支持情况** | **备注**   |
+|:-------- |:--------:|:--------:|
+| USB 转串口  | 支持       | 使用 UART2 |
+| LED      | 支持       | LED1~4   |
+
+| **片上外设**      | **支持情况** | **备注**                                     |
+|:------------- |:--------:|:------------------------------------------:|
+| Crypto        | 支持       | AES, CRC, HASH, RNG, UID                   |
+| DAC           | 支持       |                                            |
+| ADC           | 支持       | ADC1: CH10, CH11, <br>ADC3: CH1            |
+| CAN           | 支持       | CAN1、CAN2                                  |
+| GPIO          | 支持       | PA0, PA1... PH2 ---> PIN: 0, 1...82        |
+| I2C           | 支持       | 软件模拟<br>硬件I2C1~2<br>I2C1支持EEPROM（BL24C256） |
+| PM            | 支持       |                                            |
+| Lptimer       | 支持       |                                            |
+| Hwtimer       | 支持       | Hwtimer1~5                                 |
+| Pulse_encoder | 支持       |                                            |
+| PWM           | 支持       |                                            |
+| RTC           | 支持       | 闹钟精度为1分钟                                   |
+| WDT           | 支持       |                                            |
+| I2C           | 支持       | 软件、硬件 I2C                                  |
+| QSPI          | 支持       |                                            |
+| SPI           | 支持       | SPI1~3<br>SPI1支持W25Q                       |
+| UART          | 支持       | UART1~6<br>UART2为console使用                 |
 
 ## 使用说明
 
 使用说明分为如下两个章节：
 
 - 快速上手
-
+  
     本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
 
 - 进阶使用
-
+  
     本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
 
-
 ### 快速上手
 
 本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
@@ -120,9 +128,13 @@ msh >
 4. 输入`scons --target=mdk5/iar` 命令重新生成工程。
 
 ## 注意事项
-无
+
+| 板载外设 | 模式   | 注意事项                                                                                                   |
+| ---- | ---- | ------------------------------------------------------------------------------------------------------ |
+| USB  | host | 若配置为U盘主机模式，出现部分U盘无法识别或者写入失败时，可以尝试将RTT抽象层中rt_udisk_run()函数的rt_usbh_storage_reset()操作注释掉，测试是否可以获得更好的兼容性。 |
+
 ## 联系人信息
 
 维护人:
 
--  [小华半导体MCU](https://www.xhsc.com.cn)，邮箱：<xhsc_mcu@xhsc.com.cn>
+- [小华半导体MCU](https://www.xhsc.com.cn)，邮箱：<xhsc_ae_cd_ap@xhsc.com.cn>

bsp/hc32/ev_hc32f448_lqfp80/SConstruct

@@ -56,7 +56,13 @@ objs.extend(SConscript(os.path.join(libraries_path_prefix, hc32_library, 'SConsc
 # include drivers
 objs.extend(SConscript(os.path.join(libraries_path_prefix, 'hc32_drivers', 'SConscript')))
 
-objs.extend(SConscript(os.path.join(os.getcwd(), 'board', 'ports', 'SConscript')))
+# include platform
+platform_path_prefix = os.path.dirname(SDK_ROOT) + '/platform'
+objs.extend(SConscript(os.path.join(platform_path_prefix, 'SConscript')))
+
+# include tests
+test_path_prefix = os.path.dirname(SDK_ROOT) + '/tests'
+objs.extend(SConscript(os.path.join(test_path_prefix, 'SConscript')))
 
 # make a building
 DoBuilding(TARGET, objs)

bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig

@@ -42,12 +42,17 @@ menu "Onboard Peripheral Drivers"
         select RT_USING_MTD_NOR
         default n
 
+    config BSP_USING_EXT_IO
+        bool
+        default y
+
 endmenu
 
 menu "On-chip Peripheral Drivers"
     config BSP_USING_GPIO
         bool "Enable GPIO"
         select RT_USING_PIN
+        select BSP_USING_TCA9539
         default y
 
     menuconfig BSP_USING_UART
@@ -212,12 +217,12 @@ menu "On-chip Peripheral Drivers"
                 if BSP_USING_I2C1_SW
                     config BSP_I2C1_SCL_PIN
                         int "i2c1 scl pin number"
-                        range 1 176
-                        default 51
+                        range 1 80
+                        default 10
                     config BSP_I2C1_SDA_PIN
                         int "I2C1 sda pin number"
-                        range 1 176
-                        default 90
+                        range 1 80
+                        default 9
                 endif
         endif
 
@@ -368,23 +373,20 @@ menu "On-chip Peripheral Drivers"
             config BSP_USING_DAC1
                 bool "using dac1"
                 default n
-            config BSP_USING_DAC2
-                bool "using dac2"
-                default n
         endif
 
-    menuconfig BSP_USING_CAN
-        bool "Enable CAN"
+    menuconfig BSP_USING_MCAN
+        bool "Enable MCAN"
         default n
         select RT_USING_CAN
         select RT_CAN_USING_HDR
         select BSP_USING_TCA9539
-        if BSP_USING_CAN
-            config BSP_USING_CAN1
-                bool "using can1"
+        if BSP_USING_MCAN
+            config BSP_USING_MCAN1
+                bool "using mcan1"
                 default n
-            config BSP_USING_CAN2
-                bool "using can2"
+            config BSP_USING_MCAN2
+                bool "using mcan2"
                 default n
         endif
 
@@ -418,10 +420,13 @@ menu "On-chip Peripheral Drivers"
                 default BSP_RTC_USING_XTAL32
 
                 config BSP_RTC_USING_XTAL32
-                    bool "RTC USING XTAL32"
+                    bool "RTC Using XTAL32"
 
                 config BSP_RTC_USING_LRC
-                    bool "RTC USING LRC"
+                    bool "RTC Using LRC"
+
+                config BSP_RTC_USING_XTAL_DIV
+                    bool "RTC Using XTAL Division"
             endchoice
         endif
 

bsp/hc32/ev_hc32f448_lqfp80/board/SConscript

@@ -12,12 +12,6 @@ board.c
 board_config.c
 ''')
 
-if GetDepend(['BSP_USING_TCA9539']):
-    src += Glob('ports/tca9539.c')
-
-if GetDepend(['BSP_USING_SPI_FLASH']):
-    src += Glob('ports/drv_spi_flash.c')
-
 path =  [cwd]
 path += [cwd + '/ports']
 path += [cwd + '/config']
@@ -25,11 +19,11 @@ path += [cwd + '/config']
 startup_path_prefix = SDK_LIB
 
 if rtconfig.PLATFORM in ['gcc']:
-    src += [startup_path_prefix + '/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f448.S']
+    src += [startup_path_prefix + '/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f448.S']
 elif rtconfig.PLATFORM in ['armcc', 'armclang']:
-    src += [startup_path_prefix + '/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f448.s']
+    src += [startup_path_prefix + '/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f448.s']
 elif rtconfig.PLATFORM in ['iccarm']:
-    src += [startup_path_prefix + '/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f448.s']
+    src += [startup_path_prefix + '/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f448.s']
 
 CPPDEFINES = ['HC32F448', '__DEBUG']
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)

bsp/hc32/ev_hc32f448_lqfp80/board/board.c

@@ -7,6 +7,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2024-02-20     CDT          first version
+ * 2024-06-07     CDT          Add XTAL divider config code for RTC
  */
 
 #include "board.h"
@@ -41,6 +42,9 @@ void SystemClock_Config(void)
 #if defined(BSP_RTC_USING_XTAL32) || defined(RT_USING_PM)
     stc_clock_xtal32_init_t stcXtal32Init;
 #endif
+#if defined(BSP_RTC_USING_XTAL_DIV)
+    stc_clock_xtaldiv_init_t stcXtaldivInit;
+#endif
 
     /* PCLK0, HCLK Max 200MHz */
     /* PCLK1, PCLK4 Max 100MHz */
@@ -87,17 +91,27 @@ void SystemClock_Config(void)
     stcXtal32Init.u8Filter = CLK_XTAL32_FILTER_RUN_MD;
     (void)CLK_Xtal32Init(&stcXtal32Init);
 #endif
+
+#if defined(BSP_RTC_USING_XTAL_DIV)
+    /* Xtal Div config */
+    (void)CLK_XtalDivStructInit(&stcXtaldivInit);
+    /* 8000000Hz / 32768Hz = 0x7A12 / 0x80 */
+    stcXtaldivInit.u32Num = 0x7A12UL;
+    stcXtaldivInit.u32Den = 0x80UL;
+    stcXtaldivInit.u32State = CLK_XTALDIV_ON;
+    (void)CLK_XtalDivInit(&stcXtaldivInit);
+#endif
 }
 
 /** Peripheral Clock Configuration
 */
 void PeripheralClock_Config(void)
 {
-#if defined(BSP_USING_CAN1)
-    CLK_SetCANClockSrc(CLK_CAN1, CLK_CANCLK_SYSCLK_DIV6);
+#if defined(BSP_USING_MCAN1)
+    CLK_SetCANClockSrc(CLK_MCAN1, CLK_MCANCLK_SYSCLK_DIV5);
 #endif
-#if defined(BSP_USING_CAN2)
-    CLK_SetCANClockSrc(CLK_CAN2, CLK_CANCLK_SYSCLK_DIV6);
+#if defined(BSP_USING_MCAN2)
+    CLK_SetCANClockSrc(CLK_MCAN2, CLK_MCANCLK_SYSCLK_DIV5);
 #endif
 
 #if defined(RT_USING_ADC)

bsp/hc32/ev_hc32f448_lqfp80/board/board_config.c

@@ -11,7 +11,7 @@
 
 #include <rtdevice.h>
 #include "board_config.h"
-#include "tca9539.h"
+#include "tca9539_port.h"
 
 /**
  * The below functions will initialize HC32 board.
@@ -130,7 +130,7 @@ rt_err_t rt_hw_board_dac_init(CM_DAC_TypeDef *DACx)
     switch ((rt_uint32_t)DACx)
     {
 #if defined(BSP_USING_DAC1)
-    case (rt_uint32_t)CM_DAC1:
+    case (rt_uint32_t)CM_DAC:
         (void)GPIO_Init(DAC1_CH1_PORT, DAC1_CH1_PIN, &stcGpioInit);
         (void)GPIO_Init(DAC1_CH2_PORT, DAC1_CH2_PIN, &stcGpioInit);
         break;
@@ -144,34 +144,35 @@ rt_err_t rt_hw_board_dac_init(CM_DAC_TypeDef *DACx)
 }
 #endif
 
+
 #if defined(RT_USING_CAN)
 void CanPhyEnable(void)
 {
-#if defined(BSP_USING_CAN1)
+#if defined(BSP_USING_MCAN1)
     TCA9539_WritePin(CAN1_STB_PORT, CAN1_STB_PIN, TCA9539_PIN_RESET);
     TCA9539_ConfigPin(CAN1_STB_PORT, CAN1_STB_PIN, TCA9539_DIR_OUT);
 #endif
-#if defined(BSP_USING_CAN2)
+#if defined(BSP_USING_MCAN2)
     TCA9539_WritePin(CAN2_STB_PORT, CAN2_STB_PIN, TCA9539_PIN_RESET);
     TCA9539_ConfigPin(CAN2_STB_PORT, CAN2_STB_PIN, TCA9539_DIR_OUT);
 #endif
 }
-rt_err_t rt_hw_board_can_init(CM_CAN_TypeDef *CANx)
+rt_err_t rt_hw_board_can_init(CM_MCAN_TypeDef *MCANx)
 {
     rt_err_t result = RT_EOK;
 
-    switch ((rt_uint32_t)CANx)
+    switch ((rt_uint32_t)MCANx)
     {
-#if defined(BSP_USING_CAN1)
-    case (rt_uint32_t)CM_CAN1:
-        GPIO_SetFunc(CAN1_TX_PORT, CAN1_TX_PIN, CAN1_TX_PIN_FUNC);
-        GPIO_SetFunc(CAN1_RX_PORT, CAN1_RX_PIN, CAN1_RX_PIN_FUNC);
+#if defined(BSP_USING_MCAN1)
+    case (rt_uint32_t)CM_MCAN1:
+        GPIO_SetFunc(MCAN1_TX_PORT, MCAN1_TX_PIN, MCAN1_TX_PIN_FUNC);
+        GPIO_SetFunc(MCAN1_RX_PORT, MCAN1_RX_PIN, MCAN1_RX_PIN_FUNC);
         break;
 #endif
-#if defined(BSP_USING_CAN2)
-    case (rt_uint32_t)CM_CAN2:
-        GPIO_SetFunc(CAN2_TX_PORT, CAN2_TX_PIN, CAN2_TX_PIN_FUNC);
-        GPIO_SetFunc(CAN2_RX_PORT, CAN2_RX_PIN, CAN2_RX_PIN_FUNC);
+#if defined(BSP_USING_MCAN2)
+    case (rt_uint32_t)CM_MCAN2:
+        GPIO_SetFunc(MCAN2_TX_PORT, MCAN2_TX_PIN, MCAN2_TX_PIN_FUNC);
+        GPIO_SetFunc(MCAN2_RX_PORT, MCAN2_RX_PIN, MCAN2_RX_PIN_FUNC);
         break;
 #endif
     default:
@@ -183,7 +184,6 @@ rt_err_t rt_hw_board_can_init(CM_CAN_TypeDef *CANx)
 }
 #endif
 
-
 #if defined (RT_USING_SPI)
 rt_err_t rt_hw_spi_board_init(CM_SPI_TypeDef *CM_SPIx)
 {
@@ -333,103 +333,7 @@ rt_err_t rt_hw_board_pwm_tmr6_init(CM_TMR6_TypeDef *TMR6x)
 #endif
 
 #ifdef RT_USING_PM
-#define EFM_ERASE_TIME_MAX_IN_MILLISECOND                   (20)
 #define PLL_SRC                                             ((CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLSRC) >> CMU_PLLHCFGR_PLLSRC_POS)
-
-static void _pm_sleep_common_init(rt_bool_t b_disable_unused_clk)
-{
-    CLK_Xtal32Cmd(ENABLE);
-
-    rt_tick_t tick_start = rt_tick_get_millisecond();
-    rt_err_t rt_stat = RT_EOK;
-    //wait flash idle
-    while (SET != EFM_GetStatus(EFM_FLAG_RDY))
-    {
-        if (rt_tick_get_millisecond() - tick_start > EFM_ERASE_TIME_MAX_IN_MILLISECOND)
-        {
-            rt_stat = RT_ERROR;
-            break;
-        }
-    }
-    RT_ASSERT(rt_stat == RT_EOK);
-
-    if (b_disable_unused_clk)
-    {
-        uint32_t cur_clk_src = READ_REG8_BIT(CM_CMU->CKSWR, CMU_CKSWR_CKSW);
-
-        switch (cur_clk_src)
-        {
-        case CLK_SYSCLK_SRC_HRC:
-            CLK_PLLCmd(DISABLE);
-            CLK_MrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            CLK_XtalCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_PLL, DISABLE);
-            break;
-        case CLK_SYSCLK_SRC_MRC:
-            CLK_PLLCmd(DISABLE);
-            CLK_HrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            CLK_XtalCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE);
-
-            break;
-        case CLK_SYSCLK_SRC_XTAL:
-            CLK_PLLCmd(DISABLE);
-            CLK_HrcCmd(DISABLE);
-            CLK_MrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE);
-
-            break;
-        case CLK_SYSCLK_SRC_XTAL32:
-            CLK_PLLCmd(DISABLE);
-            CLK_HrcCmd(DISABLE);
-            CLK_MrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            CLK_XtalCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE);
-
-            break;
-        case CLK_SYSCLK_SRC_PLL:
-            if (CLK_PLL_SRC_XTAL == PLL_SRC)
-            {
-                CLK_HrcCmd(DISABLE);
-            }
-            else
-            {
-                CLK_XtalCmd(DISABLE);
-            }
-            CLK_MrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_HRC, DISABLE);
-
-            break;
-        default:
-            break;
-        }
-    }
-}
-
-void rt_hw_board_pm_sleep_deep_init(void)
-{
-#if (PM_SLEEP_DEEP_CFG_CLK   == PWC_STOP_CLK_KEEP)
-    _pm_sleep_common_init(RT_TRUE);
-#else
-    _pm_sleep_common_init(RT_FALSE);
-    CLK_PLLCmd(DISABLE);
-    CLK_HrcCmd(DISABLE);
-    CLK_LrcCmd(DISABLE);
-    CLK_XtalCmd(DISABLE);
-    PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE);
-#endif
-}
-
-void rt_hw_board_pm_sleep_shutdown_init(void)
-{
-    _pm_sleep_common_init(RT_TRUE);
-}
-
 void rt_hw_board_pm_sysclk_cfg(uint8_t run_mode)
 {
     switch (run_mode)

bsp/hc32/ev_hc32f448_lqfp80/board/board_config.h

@@ -78,17 +78,17 @@
 
 /***********  ADC configure *********/
 #if defined(BSP_USING_ADC1)
-    #define ADC1_CH_PORT                    (GPIO_PORT_C)
+    #define ADC1_CH_PORT                    (GPIO_PORT_C)   /* Default ADC12_IN10 */
     #define ADC1_CH_PIN                     (GPIO_PIN_00)
 #endif
 
 #if defined(BSP_USING_ADC2)
-    #define ADC2_CH_PORT                    (GPIO_PORT_C)
-    #define ADC2_CH_PIN                     (GPIO_PIN_01)
+    #define ADC2_CH_PORT                    (GPIO_PORT_A)   /* Default ADC12_IN4 */
+    #define ADC2_CH_PIN                     (GPIO_PIN_04)
 #endif
 
 #if defined(BSP_USING_ADC3)
-    #define ADC3_CH_PORT                    (GPIO_PORT_E)
+    #define ADC3_CH_PORT                    (GPIO_PORT_E)   /* Default ADC3_IN1 */
     #define ADC3_CH_PIN                     (GPIO_PIN_03)
 #endif
 
@@ -101,24 +101,24 @@
 #endif
 
 /***********  CAN configure *********/
-#if defined(BSP_USING_CAN1)
-    #define CAN1_TX_PORT                    (GPIO_PORT_C)
-    #define CAN1_TX_PIN                     (GPIO_PIN_12)
-    #define CAN1_TX_PIN_FUNC                (GPIO_FUNC_56)
-
-    #define CAN1_RX_PORT                    (GPIO_PORT_D)
-    #define CAN1_RX_PIN                     (GPIO_PIN_00)
-    #define CAN1_RX_PIN_FUNC                (GPIO_FUNC_57)
+#if defined(BSP_USING_MCAN1)
+    #define MCAN1_TX_PORT                   (GPIO_PORT_C)
+    #define MCAN1_TX_PIN                    (GPIO_PIN_12)
+    #define MCAN1_TX_PIN_FUNC               (GPIO_FUNC_56)
+
+    #define MCAN1_RX_PORT                   (GPIO_PORT_D)
+    #define MCAN1_RX_PIN                    (GPIO_PIN_00)
+    #define MCAN1_RX_PIN_FUNC               (GPIO_FUNC_57)
 #endif
 
-#if defined(BSP_USING_CAN2)
-    #define CAN2_TX_PORT                    (GPIO_PORT_H)
-    #define CAN2_TX_PIN                     (GPIO_PIN_02)
-    #define CAN2_TX_PIN_FUNC                (GPIO_FUNC_56)
+#if defined(BSP_USING_MCAN2)
+    #define MCAN2_TX_PORT                   (GPIO_PORT_H)
+    #define MCAN2_TX_PIN                    (GPIO_PIN_02)
+    #define MCAN2_TX_PIN_FUNC               (GPIO_FUNC_56)
 
-    #define CAN2_RX_PORT                    (GPIO_PORT_E)
-    #define CAN2_RX_PIN                     (GPIO_PIN_04)
-    #define CAN2_RX_PIN_FUNC                (GPIO_FUNC_57)
+    #define MCAN2_RX_PORT                   (GPIO_PORT_E)
+    #define MCAN2_RX_PIN                    (GPIO_PIN_04)
+    #define MCAN2_RX_PIN_FUNC               (GPIO_FUNC_57)
 #endif
 
 /************************* SPI port ***********************/
@@ -296,11 +296,11 @@
 
     #if defined(BSP_USING_TMR6_PULSE_ENCODER)
         #if defined(BSP_USING_PULSE_ENCODER_TMR6_1)
-            #define PULSE_ENCODER_TMR6_1_A_PORT      (GPIO_PORT_A)
-            #define PULSE_ENCODER_TMR6_1_A_PIN       (GPIO_PIN_08)
+            #define PULSE_ENCODER_TMR6_1_A_PORT      (GPIO_PORT_B)
+            #define PULSE_ENCODER_TMR6_1_A_PIN       (GPIO_PIN_05)
             #define PULSE_ENCODER_TMR6_1_A_PIN_FUNC  (GPIO_FUNC_3)
-            #define PULSE_ENCODER_TMR6_1_B_PORT      (GPIO_PORT_A)
-            #define PULSE_ENCODER_TMR6_1_B_PIN       (GPIO_PIN_07)
+            #define PULSE_ENCODER_TMR6_1_B_PORT      (GPIO_PORT_B)
+            #define PULSE_ENCODER_TMR6_1_B_PIN       (GPIO_PIN_13)
             #define PULSE_ENCODER_TMR6_1_B_PIN_FUNC  (GPIO_FUNC_3)
         #endif /* BSP_USING_PULSE_ENCODER_TMR6_1 */
     #endif /* BSP_USING_TMR6_PULSE_ENCODER */

bsp/hc32/ev_hc32f448_lqfp80/board/config/adc_config.h

@@ -1,5 +1,4 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
  * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
@@ -32,7 +31,7 @@ extern "C" {
        .hard_trig_src                   = ADC_HARDTRIG_EVT0,                    \
        .internal_trig0_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig0_comtrg1_enable   = RT_FALSE,                             \
-       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_A,                 \
+       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_B,                 \
        .internal_trig1_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig1_comtrg1_enable   = RT_FALSE,                             \
        .internal_trig1_sel              = EVT_SRC_MAX,                          \
@@ -75,7 +74,7 @@ extern "C" {
        .hard_trig_src                   = ADC_HARDTRIG_EVT0,                    \
        .internal_trig0_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig0_comtrg1_enable   = RT_FALSE,                             \
-       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_A,                 \
+       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_B,                 \
        .internal_trig1_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig1_comtrg1_enable   = RT_FALSE,                             \
        .internal_trig1_sel              = EVT_SRC_MAX,                          \
@@ -118,7 +117,7 @@ extern "C" {
        .hard_trig_src                   = ADC_HARDTRIG_EVT0,                    \
        .internal_trig0_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig0_comtrg1_enable   = RT_FALSE,                             \
-       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_A,                 \
+       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_B,                 \
        .internal_trig1_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig1_comtrg1_enable   = RT_FALSE,                             \
        .internal_trig1_sel              = EVT_SRC_MAX,                          \

bsp/hc32/ev_hc32f448_lqfp80/board/config/can_config.h

@@ -19,117 +19,352 @@
 extern "C" {
 #endif
 
-#ifdef BSP_USING_CAN1
-#define CAN1_CLOCK_SEL                  (CAN_CLOCK_SRC_40M)
+/***********************************************************************************************/
+/***********************************************************************************************/
+// The arguments of RT command RT_CAN_CMD_SET_CANFD
+#define MCAN_FD_CLASSICAL                   0       /* CAN classical */
+#define MCAN_FD_ISO_FD_NO_BRS               1       /* ISO CAN FD without BRS */
+#define MCAN_FD_ISO_FD_BRS                  2       /* ISO CAN FD with BRS */
+#define MCAN_FD_NON_ISO_FD_NO_BRS           3       /* non-ISO CAN FD without BRS */
+#define MCAN_FD_NON_ISO_FD_BRS              4       /* non-ISO CAN FD with BRS */
+
+#define MCAN_FD_ARG_MIN                     MCAN_FD_ISO_FD_NO_BRS
+#define MCAN_FD_ARG_MAX                     MCAN_FD_NON_ISO_FD_BRS
+
+/* The default configuration for MCANs. Users can modify the configurations based on the application.
+   For the message RAM:
+   1. MCAN1 and MCAN2 share 2048 bytes message RAM
+   2. User can modify the definitions of filter number, Rx FIFO number, Tx FIFO number.
+   3. MCAN has two configurable Receive FIFOs, Rx FIFO0 and Rx FIFO1. There use Rx FIFO0 only by default.
+      If only one FIFO is needed, use Rx FIFO0. If Rx FIFO1 is needed, define it's macro between 1 and 64,
+      and pay attention the total size of meesage RAM that to be allocated.
+*/
+
 #ifdef RT_CAN_USING_CANFD
-#define CAN1_CANFD_MODE                 (CAN_FD_MD_ISO)
+#define MCAN_FD_SEL                     MCAN_FD_ISO_FD_BRS
+#define MCAN_TOTAL_FILTER_NUM           (26U)
+#define MCAN_STD_FILTER_NUM             (13U)                   /* Each standard filter element size is 4 bytes */
+#define MCAN_EXT_FILTER_NUM             (13U)                   /* Each extended filter element size is 8 bytes */
+#define MCAN_TX_FIFO_NUM                (6U)
+#define MCAN_RX_FIFO_NUM                (6U)
+#define MCAN_DATA_FIELD_SIZE            (MCAN_DATA_SIZE_64BYTE) /* Each FIFO element size is 64+8 bytes */
+#else
+#define MCAN_FD_SEL                     MCAN_FD_CLASSICAL
+#define MCAN_TOTAL_FILTER_NUM           (32U)
+#define MCAN_STD_FILTER_NUM             (16U)                   /* Each standard filter element size is 4 bytes */
+#define MCAN_EXT_FILTER_NUM             (16U)                   /* Each extended filter element size is 8 bytes */
+#define MCAN_TX_FIFO_NUM                (26U)
+#define MCAN_RX_FIFO_NUM                (26U)
+#define MCAN_DATA_FIELD_SIZE            (MCAN_DATA_SIZE_8BYTE)  /* Each FIFO element size is 8+8 bytes */
 #endif
-#define CAN1_NAME                       ("can1")
-#ifndef CAN1_INIT_PARAMS
-#define CAN1_INIT_PARAMS                                    \
+
+#ifdef BSP_USING_MCAN1
+#define MCAN1_NAME                      ("can1")
+#define MCAN1_WORK_MODE                 (RT_CAN_MODE_NORMAL)
+#define MCAN1_TX_PRIV_MODE              RT_CAN_MODE_NOPRIV      /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */
+
+#define MCAN1_FD_SEL                    MCAN_FD_SEL
+
+#define MCAN1_STD_FILTER_NUM            MCAN_STD_FILTER_NUM
+#define MCAN1_EXT_FILTER_NUM            MCAN_EXT_FILTER_NUM
+
+#define MCAN1_RX_FIFO0_NUM              MCAN_RX_FIFO_NUM
+#define MCAN1_RX_FIFO0_DATA_FIELD_SIZE  MCAN_DATA_FIELD_SIZE
+
+#define MCAN1_TX_FIFO_NUM               MCAN_TX_FIFO_NUM
+#define MCAN1_TX_FIFO_DATA_FIELD_SIZE   MCAN_DATA_FIELD_SIZE
+#define MCAN1_TX_NOTIFICATION_BUF       ((1UL << MCAN1_TX_FIFO_NUM) - 1U)
+#endif /* BSP_USING_MCAN1 */
+
+#ifdef BSP_USING_MCAN2
+#define MCAN2_NAME                      ("can2")
+#define MCAN2_WORK_MODE                 (RT_CAN_MODE_NORMAL)
+#define MCAN2_TX_PRIV_MODE              RT_CAN_MODE_NOPRIV      /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */
+
+#define MCAN2_FD_SEL                    MCAN_FD_SEL
+#define MCAN2_STD_FILTER_NUM            MCAN_STD_FILTER_NUM
+#define MCAN2_EXT_FILTER_NUM            MCAN_EXT_FILTER_NUM
+
+#define MCAN2_RX_FIFO0_NUM              MCAN_RX_FIFO_NUM
+#define MCAN2_RX_FIFO0_DATA_FIELD_SIZE  MCAN_DATA_FIELD_SIZE
+
+#define MCAN2_TX_FIFO_NUM               MCAN_TX_FIFO_NUM
+#define MCAN2_TX_FIFO_DATA_FIELD_SIZE   MCAN_DATA_FIELD_SIZE
+#define MCAN2_TX_NOTIFICATION_BUF       ((1UL << MCAN2_TX_FIFO_NUM) - 1U)
+#endif /* BSP_USING_MCAN2 */
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+
+/*
+  Bit rate configuration examples for CAN FD.
+  Nominal bit rate for CAN FD arbitration phase and data bit rate for CAN FD data phase.
+  BitRate(bps) = MCANClock(Hz) / (Prescaler * (TimeSeg1 + TimeSeg2))
+  SamplePoint(%) = TimeSeg1 / (TimeSeg1 + TimeSeg2)
+  eg.
+  BitRate(bps) = 40000000(Hz) / (2 * (16 + 4)) = 1000000 = 1M(bps)
+  SamplePoint(%) = 16 / (16 + 4) = 80%
+  The following bit rate configurations are based on the max MCAN Clock(40MHz).
+  NOTE:
+  1. It is better to limit u32NominalPrescaler and u32DataPrescaler between 1 and 2.
+  1. The unit of u32SspOffset is MCANClock.
+  2. For the corresponding function of u32TdcFilter, please refer to the reference manual for details(TDCR.TDCF).
+     The u32TdcFilter can be get from PSR.TDCV.
+*/
+#define MCAN_FD_CFG_500K_1M                                 \
     {                                                       \
-       .name = CAN1_NAME,                                   \
-       .single_trans_mode = RT_FALSE                        \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 64,                               \
+    .u32NominalTimeSeg2 = 16,                               \
+    .u32NominalSyncJumpWidth = 16,                          \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 32,                                  \
+    .u32DataTimeSeg2 = 8,                                   \
+    .u32DataSyncJumpWidth = 8,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 32,                                     \
+    .u32TdcFilter = 32 + 1,                                 \
     }
-#endif /* CAN1_INIT_PARAMS */
-#endif /* BSP_USING_CAN1 */
 
-#ifdef BSP_USING_CAN2
-#define CAN2_CLOCK_SEL                  (CAN_CLOCK_SRC_40M)
-#ifdef RT_CAN_USING_CANFD
-#define CAN2_CANFD_MODE                 (CAN_FD_MD_ISO)
-#endif
-#define CAN2_NAME                       ("can2")
-#ifndef CAN2_INIT_PARAMS
-#define CAN2_INIT_PARAMS                                    \
+#define MCAN_FD_CFG_500K_2M                                 \
     {                                                       \
-       .name = CAN2_NAME,                                   \
-       .single_trans_mode = RT_FALSE                        \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 64,                               \
+    .u32NominalTimeSeg2 = 16,                               \
+    .u32NominalSyncJumpWidth = 16,                          \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 16,                                  \
+    .u32DataTimeSeg2 = 4,                                   \
+    .u32DataSyncJumpWidth = 4,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 16,                                     \
+    .u32TdcFilter = 16 + 1,                                 \
     }
-#endif /* CAN2_INIT_PARAMS */
-#endif /* BSP_USING_CAN2 */
 
-/* Bit time config
-  Restrictions: u32TimeSeg1 >= u32TimeSeg2 + 1, u32TimeSeg2 >= u32SJW.
+#define MCAN_FD_CFG_500K_4M                                 \
+    {                                                       \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 64,                               \
+    .u32NominalTimeSeg2 = 16,                               \
+    .u32NominalSyncJumpWidth = 16,                          \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 8,                                   \
+    .u32DataTimeSeg2 = 2,                                   \
+    .u32DataSyncJumpWidth = 2,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 8,                                      \
+    .u32TdcFilter = 8 + 1,                                  \
+    }
 
-  Baudrate = CANClock/(u32Prescaler*(u32TimeSeg1 + u32TimeSeg2))
-  TQ = u32Prescaler / CANClock.
-  Bit time = (u32TimeSeg2 + u32TimeSeg2) x TQ.
+#define MCAN_FD_CFG_500K_5M                                 \
+    {                                                       \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 64,                               \
+    .u32NominalTimeSeg2 = 16,                               \
+    .u32NominalSyncJumpWidth = 16,                          \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 6,                                   \
+    .u32DataTimeSeg2 = 2,                                   \
+    .u32DataSyncJumpWidth = 2,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 6,                                      \
+    .u32TdcFilter = 6 + 1,                                  \
+    }
 
-  The following bit time configures are based on CAN Clock 40M
+#define MCAN_FD_CFG_500K_8M                                 \
+    {                                                       \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 64,                               \
+    .u32NominalTimeSeg2 = 16,                               \
+    .u32NominalSyncJumpWidth = 16,                          \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 4,                                   \
+    .u32DataTimeSeg2 = 1,                                   \
+    .u32DataSyncJumpWidth = 1,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 4,                                      \
+    .u32TdcFilter = 4 + 1,                                  \
+    }
+
+#define MCAN_FD_CFG_1M_1M                                   \
+    {                                                       \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 32,                               \
+    .u32NominalTimeSeg2 = 8,                                \
+    .u32NominalSyncJumpWidth = 8,                           \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 32,                                  \
+    .u32DataTimeSeg2 = 8,                                   \
+    .u32DataSyncJumpWidth = 8,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 2*32,                                   \
+    .u32TdcFilter = 2*32 + 1,                               \
+    }
+
+#define MCAN_FD_CFG_1M_2M                                   \
+    {                                                       \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 32,                               \
+    .u32NominalTimeSeg2 = 8,                                \
+    .u32NominalSyncJumpWidth = 8,                           \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 16,                                  \
+    .u32DataTimeSeg2 = 4,                                   \
+    .u32DataSyncJumpWidth = 4,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 16,                                     \
+    .u32TdcFilter = 16 + 1,                                 \
+    }
+
+#define MCAN_FD_CFG_1M_4M                                   \
+    {                                                       \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 32,                               \
+    .u32NominalTimeSeg2 = 8,                                \
+    .u32NominalSyncJumpWidth = 8,                           \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 8,                                   \
+    .u32DataTimeSeg2 = 2,                                   \
+    .u32DataSyncJumpWidth = 2,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 8,                                      \
+    .u32TdcFilter = 8 + 1,                                  \
+    }
+
+#define MCAN_FD_CFG_1M_5M                                   \
+    {                                                       \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 64,                               \
+    .u32NominalTimeSeg2 = 16,                               \
+    .u32NominalSyncJumpWidth = 16,                          \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 6,                                   \
+    .u32DataTimeSeg2 = 2,                                   \
+    .u32DataSyncJumpWidth = 2,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 6,                                      \
+    .u32TdcFilter = 6 + 1,                                  \
+    }
+
+#define MCAN_FD_CFG_1M_8M                                   \
+    {                                                       \
+    .u32NominalPrescaler = 1,                               \
+    .u32NominalTimeSeg1 = 64,                               \
+    .u32NominalTimeSeg2 = 16,                               \
+    .u32NominalSyncJumpWidth = 16,                          \
+    .u32DataPrescaler = 1,                                  \
+    .u32DataTimeSeg1 = 4,                                   \
+    .u32DataTimeSeg2 = 1,                                   \
+    .u32DataSyncJumpWidth = 1,                              \
+    .u32TDC = MCAN_FD_TDC_ENABLE,                           \
+    .u32SspOffset = 4,                                      \
+    .u32TdcFilter = 4 + 1,                                  \
+    }
+
+/*
+  Bit rate configuration examples for classical CAN.
+  BitRate(bps) = MCANClock(Hz) / (u32NominalPrescaler * (u32NominalTimeSeg1 + u32NominalTimeSeg2))
+  SamplePoint(%) = u32NominalTimeSeg1 / (u32NominalTimeSeg1 + u32NominalTimeSeg2)
+  eg.
+  BitRate(bps) = 40000000(Hz) / (2 * (16 + 4)) = 1000000 = 1M(bps)
+  SamplePoint(%) = 16 / (16 + 4) = 80%
+  The following bit rate configurations are based on the max MCAN Clock(40MHz).
 */
-#define CAN_BIT_TIME_CONFIG_1M_BAUD                         \
+#define MCAN_CC_CFG_1M                                      \
     {                                                       \
-        .u32Prescaler = 2,                                  \
-        .u32TimeSeg1 = 16,                                  \
-        .u32TimeSeg2 = 4,                                   \
-        .u32SJW = 4                                         \
+    .u32NominalPrescaler = 2,                               \
+    .u32NominalTimeSeg1 = 16,                               \
+    .u32NominalTimeSeg2 = 4,                                \
+    .u32NominalSyncJumpWidth = 4,                           \
     }
 
-#define CAN_BIT_TIME_CONFIG_800K_BAUD                       \
+#define MCAN_CC_CFG_800K                                    \
     {                                                       \
-        .u32Prescaler = 2,                                  \
-        .u32TimeSeg1 = 20,                                  \
-        .u32TimeSeg2 = 5,                                   \
-        .u32SJW = 4                                         \
+    .u32NominalPrescaler = 2,                               \
+    .u32NominalTimeSeg1 = 20,                               \
+    .u32NominalTimeSeg2 = 5,                                \
+    .u32NominalSyncJumpWidth = 5,                           \
     }
 
-#define CAN_BIT_TIME_CONFIG_500K_BAUD                       \
+#define MCAN_CC_CFG_500K                                    \
     {                                                       \
-        .u32Prescaler = 4,                                  \
-        .u32TimeSeg1 = 16,                                  \
-        .u32TimeSeg2 = 4,                                   \
-        .u32SJW = 4                                         \
+    .u32NominalPrescaler = 4,                               \
+    .u32NominalTimeSeg1 = 16,                               \
+    .u32NominalTimeSeg2 = 4,                                \
+    .u32NominalSyncJumpWidth = 4,                           \
     }
 
-#define CAN_BIT_TIME_CONFIG_250K_BAUD                       \
+#define MCAN_CC_CFG_250K                                    \
     {                                                       \
-        .u32Prescaler = 8,                                  \
-        .u32TimeSeg1 = 16,                                  \
-        .u32TimeSeg2 = 4,                                   \
-        .u32SJW = 4                                         \
+    .u32NominalPrescaler = 4,                               \
+    .u32NominalTimeSeg1 = 32,                               \
+    .u32NominalTimeSeg2 = 8,                                \
+    .u32NominalSyncJumpWidth = 8,                           \
     }
 
-#define CAN_BIT_TIME_CONFIG_125K_BAUD                       \
+#define MCAN_CC_CFG_125K                                    \
     {                                                       \
-        .u32Prescaler = 16,                                 \
-        .u32TimeSeg1 = 16,                                  \
-        .u32TimeSeg2 = 4,                                   \
-        .u32SJW = 4                                         \
+    .u32NominalPrescaler = 8,                               \
+    .u32NominalTimeSeg1 = 32,                               \
+    .u32NominalTimeSeg2 = 8,                                \
+    .u32NominalSyncJumpWidth = 8,                           \
     }
 
-#define CAN_BIT_TIME_CONFIG_100K_BAUD                       \
+#define MCAN_CC_CFG_100K                                    \
     {                                                       \
-        .u32Prescaler = 20,                                 \
-        .u32TimeSeg1 = 16,                                  \
-        .u32TimeSeg2 = 4,                                   \
-        .u32SJW = 4                                         \
+    .u32NominalPrescaler = 10,                              \
+    .u32NominalTimeSeg1 = 32,                               \
+    .u32NominalTimeSeg2 = 8,                                \
+    .u32NominalSyncJumpWidth = 8,                           \
     }
 
-#define CAN_BIT_TIME_CONFIG_50K_BAUD                        \
+#define MCAN_CC_CFG_50K                                     \
     {                                                       \
-        .u32Prescaler = 40,                                 \
-        .u32TimeSeg1 = 16,                                  \
-        .u32TimeSeg2 = 4,                                   \
-        .u32SJW = 4                                         \
+    .u32NominalPrescaler = 20,                              \
+    .u32NominalTimeSeg1 = 32,                               \
+    .u32NominalTimeSeg2 = 8,                                \
+    .u32NominalSyncJumpWidth = 8,                           \
     }
 
-#define CAN_BIT_TIME_CONFIG_20K_BAUD                        \
+#define MCAN_CC_CFG_20K                                     \
     {                                                       \
-        .u32Prescaler = 100,                                \
-        .u32TimeSeg1 = 16,                                  \
-        .u32TimeSeg2 = 4,                                   \
-        .u32SJW = 4                                         \
+    .u32NominalPrescaler = 50,                              \
+    .u32NominalTimeSeg1 = 32,                               \
+    .u32NominalTimeSeg2 = 8,                                \
+    .u32NominalSyncJumpWidth = 8,                           \
     }
 
-#define CAN_BIT_TIME_CONFIG_10K_BAUD                        \
+#define MCAN_CC_CFG_10K                                     \
     {                                                       \
-        .u32Prescaler = 200,                                \
-        .u32TimeSeg1 = 16,                                  \
-        .u32TimeSeg2 = 4,                                   \
-        .u32SJW = 4                                         \
+    .u32NominalPrescaler = 100,                             \
+    .u32NominalTimeSeg1 = 32,                               \
+    .u32NominalTimeSeg2 = 8,                                \
+    .u32NominalSyncJumpWidth = 8,                           \
     }
 
+#ifdef RT_CAN_USING_CANFD
+#define MCAN1_BAUD_RATE_CFG             MCAN_FD_CFG_1M_4M
+#define MCAN1_NOMINAL_BAUD_RATE         MCANFD_NOMINAL_BAUD_1M
+#define MCAN1_DATA_BAUD_RATE            MCANFD_DATA_BAUD_4M
+
+#define MCAN2_BAUD_RATE_CFG             MCAN_FD_CFG_1M_4M
+#define MCAN2_NOMINAL_BAUD_RATE         MCANFD_NOMINAL_BAUD_1M
+#define MCAN2_DATA_BAUD_RATE            MCANFD_DATA_BAUD_4M
+
+#else
+#define MCAN1_BAUD_RATE_CFG             MCAN_CC_CFG_1M
+#define MCAN1_NOMINAL_BAUD_RATE         CAN1MBaud
+#define MCAN1_DATA_BAUD_RATE            0
+
+#define MCAN2_BAUD_RATE_CFG             MCAN_CC_CFG_1M
+#define MCAN2_NOMINAL_BAUD_RATE         CAN1MBaud
+#define MCAN2_DATA_BAUD_RATE            0
+
+#endif /* #ifdef RT_CAN_USING_CANFD */
+
+/***********************************************************************************************/
+/***********************************************************************************************/
+
 #ifdef __cplusplus
 }
 #endif

bsp/hc32/ev_hc32f448_lqfp80/board/config/dac_config.h

@@ -1,6 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -27,15 +26,6 @@ extern "C" {
 #endif /* DAC1_INIT_PARAMS */
 #endif /* BSP_USING_DAC1 */
 
-#ifdef BSP_USING_DAC2
-#ifndef DAC2_INIT_PARAMS
-#define DAC2_INIT_PARAMS                                                    \
-    {                                                                       \
-       .name                      = "dac2",                                 \
-    }
-#endif /* DAC2_INIT_PARAMS */
-#endif /* BSP_USING_DAC2 */
-
 #ifdef __cplusplus
 }
 #endif

bsp/hc32/ev_hc32f448_lqfp80/board/config/dma_config.h

@@ -193,6 +193,16 @@ extern "C" {
 #define UART1_RX_DMA_IRQn               BSP_DMA2_CH0_IRQ_NUM
 #define UART1_RX_DMA_INT_PRIO           BSP_DMA2_CH0_IRQ_PRIO
 #define UART1_RX_DMA_INT_SRC            INT_SRC_DMA2_TC0
+
+#elif defined(BSP_QSPI_USING_DMA) && !defined(QSPI_DMA_INSTANCE)
+#define QSPI_DMA_INSTANCE               CM_DMA2
+#define QSPI_DMA_CHANNEL                DMA_CH0
+#define QSPI_DMA_CLOCK                  (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define QSPI_DMA_TRIG_SELECT            AOS_DMA2_0
+#define QSPI_DMA_TRANS_FLAG             DMA_FLAG_TC_CH0
+#define QSPI_DMA_IRQn                   BSP_DMA2_CH0_IRQ_NUM
+#define QSPI_DMA_INT_PRIO               BSP_DMA2_CH0_IRQ_PRIO
+#define QSPI_DMA_INT_SRC                INT_SRC_DMA2_TC0
 #endif
 
 /* DMA2 ch1 */

bsp/hc32/ev_hc32f448_lqfp80/board/config/irq_config.h

@@ -158,6 +158,11 @@ extern "C" {
 #define BSP_SPI3_ERR_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
 #endif
 
+#if defined (BSP_USING_QSPI)
+#define BSP_QSPI_ERR_IRQ_NUM            QSPI_IRQn
+#define BSP_QSPI_ERR_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
+#endif /* BSP_USING_QSPI */
+
 #if defined(BSP_USING_TMRA_1)
 #define BSP_USING_TMRA_1_IRQ_NUM        TMRA_1_OVF_UDF_IRQn
 #define BSP_USING_TMRA_1_IRQ_PRIO       DDL_IRQ_PRIO_DEFAULT
@@ -183,16 +188,71 @@ extern "C" {
 #define BSP_USING_TMRA_5_IRQ_PRIO       DDL_IRQ_PRIO_DEFAULT
 #endif/* BSP_USING_TMRA_5 */
 
-#if defined(BSP_USING_CAN1)
-#define BSP_CAN1_IRQ_NUM                MCAN1_INT0_IRQn
-#define BSP_CAN1_IRQ_PRIO               DDL_IRQ_PRIO_DEFAULT
-#endif/* BSP_USING_CAN1 */
+#if defined(BSP_USING_MCAN1)
+#define BSP_MCAN1_INT0_IRQ_NUM          MCAN1_INT0_IRQn
+#define BSP_MCAN1_INT0_IRQ_PRIO         DDL_IRQ_PRIO_DEFAULT
+
+#define BSP_MCAN1_INT1_IRQ_NUM          MCAN1_INT1_IRQn
+#define BSP_MCAN1_INT1_IRQ_PRIO         DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_MCAN1 */
+
+#if defined(BSP_USING_MCAN2)
+#define BSP_MCAN2_INT0_IRQ_NUM          MCAN2_INT0_IRQn
+#define BSP_MCAN2_INT0_IRQ_PRIO         DDL_IRQ_PRIO_DEFAULT
+
+#define BSP_MCAN2_INT1_IRQ_NUM          MCAN2_INT1_IRQn
+#define BSP_MCAN2_INT1_IRQ_PRIO         DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_MCAN2 */
 
 #if defined(RT_USING_ALARM)
 #define BSP_RTC_ALARM_IRQ_NUM           RTC_IRQn
 #define BSP_RTC_ALARM_IRQ_PRIO          DDL_IRQ_PRIO_DEFAULT
 #endif/* RT_USING_ALARM */
 
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_1)
+#define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM   TMRA_1_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM   TMRA_1_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_1 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_2)
+#define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM   TMRA_2_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM   TMRA_2_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_2 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_3)
+#define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM   TMRA_3_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM   TMRA_3_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_3 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_4)
+#define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM   TMRA_4_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM   TMRA_4_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_4 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_5)
+#define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM   TMRA_5_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM   TMRA_5_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_5 */
+
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_1)
+#define BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM   TMR6_1_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM   TMR6_1_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_1 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_2)
+#define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM   TMR6_2_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM   TMR6_2_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_2 */
+
 #ifdef __cplusplus
 }
 #endif

bsp/hc32/ev_hc32f448_lqfp80/board/config/pulse_encoder_config.h

@@ -25,7 +25,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_1_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_1,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_1,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_1,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -33,12 +33,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_1_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_1_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_1_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_1_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue      = 1000UL,                                           \
        .name                = "pulse_a1"                                        \
@@ -51,7 +51,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_2_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_2,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_2,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_2,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -59,12 +59,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_2_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_2_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_2_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_2_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a2"                                            \
@@ -77,7 +77,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_3_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_3,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_3,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_3,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -85,12 +85,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_3_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_3_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_3_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_3_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a3"                                            \
@@ -103,7 +103,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_4_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_4,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_4,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_4,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -111,12 +111,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_4_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_4_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_4_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_4_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a4"                                            \
@@ -129,7 +129,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_5_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_5,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_5,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_5,                                   \
        .hw_count =                                                              \
         {                                                                       \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -137,12 +137,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_5_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_5_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_5_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_5_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a5"                                            \
@@ -150,194 +150,12 @@ extern "C" {
 #endif /* PULSE_ENCODER_TMRA_5_CONFIG */
 #endif /* BSP_USING_PULSE_ENCODER_TMRA_5 */
 
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_6
-#ifndef PULSE_ENCODER_TMRA_6_CONFIG
-#define PULSE_ENCODER_TMRA_6_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_6,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_6,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_6_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_6_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a6"                                            \
-    }
-#endif /* PULSE_ENCODER_TMRA_6_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_6 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_7
-#ifndef PULSE_ENCODER_TMRA_7_CONFIG
-#define PULSE_ENCODER_TMRA_7_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_7,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_7,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_7_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_7_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_7_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_7_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_7_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_7_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a7"                                            \
-    }
-#endif /* PULSE_ENCODER_TMRA_7_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_7 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_8
-#ifndef PULSE_ENCODER_TMRA_8_CONFIG
-#define PULSE_ENCODER_TMRA_8_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_8,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_8,                                   \
-       .hw_count =                                                              \
-        {                                                                       \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_8_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_8_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_8_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_8_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_8_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_8_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a8"                                            \
-    }
-#endif /* PULSE_ENCODER_TMRA_8_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_8 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_9
-#ifndef PULSE_ENCODER_TMRA_9_CONFIG
-#define PULSE_ENCODER_TMRA_9_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_9,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_9,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_9_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_9_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_9_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_9_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_9_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_9_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a9"                                            \
-    }
-#endif /* PULSE_ENCODER_TMRA_9_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_9 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_10
-#ifndef PULSE_ENCODER_TMRA_10_CONFIG
-#define PULSE_ENCODER_TMRA_10_CONFIG                                            \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_10,                                           \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_10,                                  \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_10_OVF,                              \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_10_OVF_IRQ_NUM,            \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_10_OVF_IRQ_PRIO,           \
-            .enIntSrc_UDF   = INT_SRC_TMRA_10_UDF,                              \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_10_UDF_IRQ_NUM,            \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_10_UDF_IRQ_PRIO,           \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a10"                                           \
-    }
-#endif /* PULSE_ENCODER_TMRA_10_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_10 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_11
-#ifndef PULSE_ENCODER_TMRA_11_CONFIG
-#define PULSE_ENCODER_TMRA_11_CONFIG                                            \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_11,                                           \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_11,                                  \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_11_OVF,                              \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_11_OVF_IRQ_NUM,            \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_11_OVF_IRQ_PRIO,           \
-            .enIntSrc_UDF   = INT_SRC_TMRA_11_UDF,                              \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_11_UDF_IRQ_NUM,            \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_11_UDF_IRQ_PRIO,           \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a11"                                           \
-    }
-#endif /* PULSE_ENCODER_TMRA_11_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_11 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_12
-#ifndef PULSE_ENCODER_TMRA_12_CONFIG
-#define PULSE_ENCODER_TMRA_12_CONFIG                                            \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_12,                                           \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_12,                                  \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_12_OVF,                              \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_12_OVF_IRQ_NUM,            \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_12_OVF_IRQ_PRIO,           \
-            .enIntSrc_UDF   = INT_SRC_TMRA_12_UDF,                              \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_12_UDF_IRQ_NUM,            \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_12_UDF_IRQ_PRIO,           \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a12"                                           \
-    }
-#endif /* PULSE_ENCODER_TMRA_12_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_12 */
-
 #ifdef BSP_USING_PULSE_ENCODER_TMR6_1
 #ifndef PULSE_ENCODER_TMR6_1_CONFIG
 #define PULSE_ENCODER_TMR6_1_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_1,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_1,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_1,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -345,12 +163,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_1_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_1_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_1_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_1_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_61"                                            \
@@ -363,7 +181,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_2_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_2,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_2,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_2,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -371,12 +189,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_2_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_2_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_2_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_2_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_62"                                            \
@@ -384,162 +202,6 @@ extern "C" {
 #endif /* PULSE_ENCODER_TMR6_2_CONFIG */
 #endif /* BSP_USING_PULSE_ENCODER_TMR6_2 */
 
-#ifdef BSP_USING_PULSE_ENCODER_TMR6_3
-#ifndef PULSE_ENCODER_TMR6_3_CONFIG
-#define PULSE_ENCODER_TMR6_3_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMR6_3,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_3,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
-            .u32CountDownCond   = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_3_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_3_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_63"                                            \
-    }
-#endif /* PULSE_ENCODER_TMR6_3_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMR6_3 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMR6_4
-#ifndef PULSE_ENCODER_TMR6_4_CONFIG
-#define PULSE_ENCODER_TMR6_4_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMR6_4,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_4,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
-            .u32CountDownCond   = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_4_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_4_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_64"                                            \
-    }
-#endif /* PULSE_ENCODER_TMR6_4_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMR6_4 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMR6_5
-#ifndef PULSE_ENCODER_TMR6_5_CONFIG
-#define PULSE_ENCODER_TMR6_5_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMR6_5,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_5,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
-            .u32CountDownCond   = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_5_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_5_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_65"                                            \
-    }
-#endif /* PULSE_ENCODER_TMR6_5_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMR6_5 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMR6_6
-#ifndef PULSE_ENCODER_TMR6_6_CONFIG
-#define PULSE_ENCODER_TMR6_6_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMR6_6,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_6,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
-            .u32CountDownCond   = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_6_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_6_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_66"                                            \
-    }
-#endif /* PULSE_ENCODER_TMR6_6_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMR6_6 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMR6_7
-#ifndef PULSE_ENCODER_TMR6_7_CONFIG
-#define PULSE_ENCODER_TMR6_7_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMR6_7,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_7,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
-            .u32CountDownCond   = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_7_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_7_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_67"                                            \
-    }
-#endif /* PULSE_ENCODER_TMR6_7_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMR6_7 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMR6_8
-#ifndef PULSE_ENCODER_TMR6_8_CONFIG
-#define PULSE_ENCODER_TMR6_8_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMR6_8,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_8,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
-            .u32CountDownCond   = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_8_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_8_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_68"                                            \
-    }
-#endif /* PULSE_ENCODER_TMR6_8_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMR6_8 */
-
 #endif /* RT_USING_PULSE_ENCODER */
 
 #endif /* __PULSE_ENCODER_CONFIG_H__ */

bsp/hc32/ev_hc32f448_lqfp80/board/config/pwm_tmr_config.h

@@ -174,224 +174,6 @@ extern "C" {
     }
 #endif /* PWM_TMRA_5_CONFIG */
 #endif /* BSP_USING_PWM_TMRA_5 */
-
-#ifdef BSP_USING_PWM_TMRA_6
-#ifndef PWM_TMRA_6_CONFIG
-#define PWM_TMRA_6_CONFIG                                       \
-    {                                                           \
-        .name                           = "pwm_a6",             \
-        .instance                       = CM_TMRA_6,            \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_6_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_6 */
-
-#ifdef BSP_USING_PWM_TMRA_7
-#ifndef PWM_TMRA_7_CONFIG
-#define PWM_TMRA_7_CONFIG                                       \
-    {                                                           \
-        .name                           = "pwm_a7",             \
-        .instance                       = CM_TMRA_7,            \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_7_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_7 */
-
-#ifdef BSP_USING_PWM_TMRA_8
-#ifndef PWM_TMRA_8_CONFIG
-#define PWM_TMRA_8_CONFIG                                       \
-    {                                                           \
-        .name                           = "pwm_a8",             \
-        .instance                       = CM_TMRA_8,            \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_8_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_8 */
-
-#ifdef BSP_USING_PWM_TMRA_9
-#ifndef PWM_TMRA_9_CONFIG
-#define PWM_TMRA_9_CONFIG                                       \
-    {                                                           \
-        .name                           = "pwm_a9",             \
-        .instance                       = CM_TMRA_9,            \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_9_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_9 */
-
-#ifdef BSP_USING_PWM_TMRA_10
-#ifndef PWM_TMRA_10_CONFIG
-#define PWM_TMRA_10_CONFIG                                      \
-    {                                                           \
-        .name                           = "pwm_a10",            \
-        .instance                       = CM_TMRA_10,           \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_10_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_10 */
-
-#ifdef BSP_USING_PWM_TMRA_11
-#ifndef PWM_TMRA_11_CONFIG
-#define PWM_TMRA_11_CONFIG                                      \
-    {                                                           \
-        .name                           = "pwm_a11",            \
-        .instance                       = CM_TMRA_11,           \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_11_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_11 */
-
-#ifdef BSP_USING_PWM_TMRA_12
-#ifndef PWM_TMRA_12_CONFIG
-#define PWM_TMRA_12_CONFIG                                      \
-    {                                                           \
-        .name                           = "pwm_a12",            \
-        .instance                       = CM_TMRA_12,           \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_12_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_12 */
-
 #endif /* BSP_USING_PWM_TMRA */
 
 #ifdef BSP_USING_PWM_TMR4

bsp/hc32/ev_hc32f448_lqfp80/board/config/qspi_config.h

@@ -65,8 +65,13 @@ extern "C" {
         }                                                   \
     }
 #endif /* QSPI_DMA_CONFIG */
+
+/* unit: half-word, DMA data width of QSPI transmitting is 16bit */
+#ifndef QSPI_DMA_TX_BUFSIZE
+#define QSPI_DMA_TX_BUFSIZE             256
+#endif /* QSPI_DMA_TX_BUFSIZE */
 #endif /* BSP_QSPI_USING_DMA */
-#endif /* BSP_USING_SPI1 */
+#endif /* BSP_USING_QSPI */
 
 #ifdef __cplusplus
 }

bsp/hc32/ev_hc32f448_lqfp80/board/drv_config.h

@@ -1,6 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f448_lqfp80/board/hc32f4xx_conf.h

@@ -103,7 +103,7 @@ extern "C"
  * @note  If there is no supported BSP board or the BSP function is not used,
  * the value needs to be set to 0U.
  */
-#define BSP_EV_HC32F4XX                             (BSP_EV_HC32F448_LQFP80)
+#define BSP_EV_HC32F4XX                             (0U)
 
 /**
  * @brief This is the list of BSP components to be used.

bsp/hc32/ev_hc32f448_lqfp80/board/ports/SConscript

@@ -1,12 +0,0 @@
-import os
-from building import *
-
-objs = []
-cwd  = GetCurrentDir()
-
-list = os.listdir(cwd)
-for item in list:
-    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
-        objs = objs + SConscript(os.path.join(item, 'SConscript'))
-
-Return('objs')

bsp/hc32/ev_hc32f448_lqfp80/board/ports/drv_spi_flash.c

@@ -1,122 +0,0 @@
-/*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2024-02-20     CDT          first version
- */
-
-#include <board.h>
-#include <drv_spi.h>
-#include <rtdevice.h>
-#include <rthw.h>
-#include <finsh.h>
-#include <dfs_fs.h>
-#include <fal.h>
-
-#ifdef BSP_USING_SPI_FLASH
-
-#include "dev_spi_flash.h"
-#ifdef RT_USING_SFUD
-    #include "dev_spi_flash_sfud.h"
-#endif
-
-#define SPI_BUS_NAME                    "spi1"
-#define SPI_FLASH_DEVICE_NAME           "spi10"
-#define SPI_FLASH_CHIP                  "w25q64"
-#define SPI_FLASH_SS_PIN                GET_PIN(C, 7)
-/* Partition Name */
-#define FS_PARTITION_NAME              "filesystem"
-
-#ifdef RT_USING_SFUD
-static void rt_hw_spi_flash_reset(char *spi_dev_name)
-{
-    struct rt_spi_device *spi_dev_w25;
-    rt_uint8_t w25_en_reset = 0x66;
-    rt_uint8_t w25_reset_dev = 0x99;
-
-    spi_dev_w25 = (struct rt_spi_device *)rt_device_find(spi_dev_name);
-    if (!spi_dev_w25)
-    {
-        rt_kprintf("Can't find %s device!\n", spi_dev_name);
-    }
-    else
-    {
-        rt_spi_send(spi_dev_w25, &w25_en_reset, 1U);
-        rt_spi_send(spi_dev_w25, &w25_reset_dev, 1U);
-        DDL_DelayMS(1U);
-        rt_kprintf("Reset ext flash!\n");
-    }
-}
-
-static int rt_hw_spi_flash_with_sfud_init(void)
-{
-    rt_hw_spi_device_attach(SPI_BUS_NAME, SPI_FLASH_DEVICE_NAME, SPI_FLASH_SS_PIN);
-
-    if (RT_NULL == rt_sfud_flash_probe(SPI_FLASH_CHIP, SPI_FLASH_DEVICE_NAME))
-    {
-        rt_hw_spi_flash_reset(SPI_FLASH_DEVICE_NAME);
-        if (RT_NULL == rt_sfud_flash_probe(SPI_FLASH_CHIP, SPI_FLASH_DEVICE_NAME))
-        {
-            return -RT_ERROR;
-        }
-    }
-
-    return RT_EOK;
-}
-INIT_COMPONENT_EXPORT(rt_hw_spi_flash_with_sfud_init);
-
-static int rt_hw_fs_init(void)
-{
-    struct rt_device *mtd_dev = RT_NULL;
-
-    /* 初始化 fal */
-    fal_init();
-    /* 生成 mtd 设备 */
-    mtd_dev = fal_mtd_nor_device_create(FS_PARTITION_NAME);
-    if (!mtd_dev)
-    {
-        LOG_E("Can't create a mtd device on '%s' partition.", FS_PARTITION_NAME);
-        return -RT_ERROR;
-    }
-    else
-    {
-        /* 挂载 littlefs */
-        if (RT_EOK == dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0))
-        {
-            LOG_I("Filesystem initialized!");
-            return RT_EOK;
-        }
-        else
-        {
-            /* 格式化文件系统 */
-            if (RT_EOK == dfs_mkfs("lfs", FS_PARTITION_NAME))
-            {
-                /* 挂载 littlefs */
-                if (RT_EOK == dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0))
-                {
-                    LOG_I("Filesystem initialized!");
-                    return RT_EOK;
-                }
-                else
-                {
-                    LOG_E("Failed to initialize filesystem!");
-                    return -RT_ERROR;
-                }
-            }
-            else
-            {
-                LOG_E("Failed to Format fs!");
-                return -RT_ERROR;
-            }
-        }
-    }
-}
-INIT_APP_EXPORT(rt_hw_fs_init);
-
-#endif /* RT_USING_SFUD */
-
-#endif /* BSP_USING_SPI_FLASH */

bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/SConscript

@@ -1,20 +0,0 @@
-
-from building import *
-import rtconfig
-
-cwd     = GetCurrentDir()
-
-src = []
-
-src     += Glob('*.c')
-CPPPATH = [cwd]
-LOCAL_CFLAGS = ''
-
-if rtconfig.PLATFORM in ['gcc', 'armclang']:
-    LOCAL_CFLAGS += ' -std=c99'
-elif rtconfig.PLATFORM in ['armcc']:
-    LOCAL_CFLAGS += ' --c99'
-
-group = DefineGroup('FAL', src, depend = ['RT_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS)
-
-Return('group')

bsp/hc32/ev_hc32f448_lqfp80/board/ports/fal/fal_flash_sfud_port.c

@@ -1,85 +0,0 @@
-/*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2024-02-20     CDT          first version
- */
-
-#include <fal.h>
-
-#include <sfud.h>
-#ifdef RT_USING_SFUD
-    #include <dev_spi_flash_sfud.h>
-#endif
-
-#ifndef FAL_USING_NOR_FLASH_DEV_NAME
-    #define FAL_USING_NOR_FLASH_DEV_NAME            "w25q64"
-#endif
-
-static int init(void);
-static int read(long offset, rt_uint8_t *buf, rt_size_t size);
-static int write(long offset, const rt_uint8_t *buf, rt_size_t size);
-static int erase(long offset, rt_size_t size);
-
-static sfud_flash_t sfud_dev = NULL;
-struct fal_flash_dev ext_nor_flash0 =
-{
-    .name       = FAL_USING_NOR_FLASH_DEV_NAME,
-    .addr       = 0,
-    .len        = 8 * 1024 * 1024,
-    .blk_size   = 4096,
-    .ops        = {init, read, write, erase},
-    .write_gran = 1
-};
-
-static int init(void)
-{
-    /* RT-Thread RTOS platform */
-    sfud_dev = rt_sfud_flash_find_by_dev_name(FAL_USING_NOR_FLASH_DEV_NAME);
-    if (NULL == sfud_dev)
-    {
-        return -1;
-    }
-    /* update the flash chip information */
-    ext_nor_flash0.blk_size = sfud_dev->chip.erase_gran;
-    ext_nor_flash0.len      = sfud_dev->chip.capacity;
-
-    return 0;
-}
-
-static int read(long offset, rt_uint8_t *buf, rt_size_t size)
-{
-    RT_ASSERT(sfud_dev);
-    RT_ASSERT(sfud_dev->init_ok);
-    sfud_read(sfud_dev, ext_nor_flash0.addr + offset, size, buf);
-
-    return size;
-}
-
-static int write(long offset, const rt_uint8_t *buf, rt_size_t size)
-{
-    RT_ASSERT(sfud_dev);
-    RT_ASSERT(sfud_dev->init_ok);
-    if (sfud_write(sfud_dev, ext_nor_flash0.addr + offset, size, buf) != SFUD_SUCCESS)
-    {
-        return -1;
-    }
-
-    return size;
-}
-
-static int erase(long offset, rt_size_t size)
-{
-    RT_ASSERT(sfud_dev);
-    RT_ASSERT(sfud_dev->init_ok);
-    if (sfud_erase(sfud_dev, ext_nor_flash0.addr + offset, size) != SFUD_SUCCESS)
-    {
-        return -1;
-    }
-
-    return size;
-}

bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.c

@@ -1,320 +0,0 @@
-/*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2024-02-20     CDT          first version
- */
-
-#include <rtthread.h>
-#include <rtdevice.h>
-#include <rtdbg.h>
-
-#ifdef BSP_USING_TCA9539
-
-#include "tca9539.h"
-
-/*******************************************************************************
- * Local type definitions ('typedef')
- ******************************************************************************/
-
-/*******************************************************************************
- * Local pre-processor symbols/macros ('#define')
- ******************************************************************************/
-/* Define for TCA9539 */
-#define BSP_TCA9539_I2C_BUS_NAME        "i2c1"
-#define BSP_TCA9539_DEV_ADDR            (0x74U)
-
-#define TCA9539_RST_PIN                 (32)    /* PB15 */
-
-/*******************************************************************************
- * Global variable definitions (declared in header file with 'extern')
- ******************************************************************************/
-
-/*******************************************************************************
- * Local function prototypes ('static')
- ******************************************************************************/
-
-/*******************************************************************************
- * Local variable definitions ('static')
- ******************************************************************************/
-static struct rt_i2c_bus_device *i2c_bus = RT_NULL;
-
-/*******************************************************************************
- * Function implementation - global ('extern') and local ('static')
- ******************************************************************************/
-/**
- * @brief  BSP TCA9539 write data.
- * @param  [in] bus:                    Pointer to the i2c bus device.
- * @param  [in] reg:                    Register to be written.
- * @param  [in] data:                   The pointer to the buffer contains the data to be written.
- * @param  [in] len:                    Buffer size in byte.
- * @retval rt_err_t:
- *           - RT_EOK
- *           - -RT_ERROR
- */
-static rt_err_t BSP_TCA9539_I2C_Write(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t *data, rt_uint16_t len)
-{
-    struct rt_i2c_msg msgs;
-    rt_uint8_t buf[6];
-
-    buf[0] = reg;
-    if (len > 0)
-    {
-        if (len < 6)
-        {
-            rt_memcpy(buf + 1, data, len);
-        }
-        else
-        {
-            return -RT_ERROR;
-        }
-    }
-    msgs.addr   = BSP_TCA9539_DEV_ADDR;
-    msgs.flags  = RT_I2C_WR;
-    msgs.buf    = buf;
-    msgs.len    = len + 1;
-    if (rt_i2c_transfer(bus, &msgs, 1) == 1)
-    {
-        return RT_EOK;
-    }
-    else
-    {
-        return -RT_ERROR;
-    }
-}
-
-/**
- * @brief  BSP TCA9539 Read data.
- * @param  [in] bus:                    Pointer to the i2c bus device.
- * @param  [in] reg:                    Register to be read.
- * @param  [out] data:                  The pointer to the buffer contains the data to be read.
- * @param  [in] len:                    Buffer size in byte.
- * @retval rt_err_t:
- *           - RT_EOK
- *           - -RT_ERROR
- */
-static rt_err_t BSP_TCA9539_I2C_Read(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t *data, rt_uint16_t len)
-{
-    struct rt_i2c_msg msgs;
-
-    if (RT_EOK != BSP_TCA9539_I2C_Write(bus, reg, RT_NULL, 0))
-    {
-        return -RT_ERROR;
-    }
-    msgs.addr   = BSP_TCA9539_DEV_ADDR;
-    msgs.flags  = RT_I2C_RD;
-    msgs.buf    = data;
-    msgs.len    = len;
-    if (rt_i2c_transfer(bus, &msgs, 1) == 1)
-    {
-        return RT_EOK;
-    }
-    else
-    {
-        return -RT_ERROR;
-    }
-}
-
-
-/**
- * @brief  Reset TCA9539.
- * @param  [in] None
- * @retval None
- */
-static void TCA9539_Reset(void)
-{
-    rt_pin_mode(TCA9539_RST_PIN, PIN_MODE_OUTPUT);
-    /* Reset the device */
-    rt_pin_write(TCA9539_RST_PIN, PIN_LOW);
-    rt_thread_mdelay(3U);
-    rt_pin_write(TCA9539_RST_PIN, PIN_HIGH);
-}
-
-/**
- * @brief  Write TCA9539 pin output value.
- * @param  [in] u8Port                  Port number.
- *         This parameter can be one of the following values:
- *           @arg @ref TCA9539_Port_Definition
- * @param  [in] u8Pin                   Pin number.
- *         This parameter can be one or any combination of the following values:
- *           @arg @ref TCA9539_Pin_Definition
- * @param  [in] u8PinState              Pin state to be written.
- *         This parameter can be one of the following values:
- *           @arg @ref TCA9539_Pin_State_Definition
- * @retval rt_err_t:
- *           - RT_ERROR
- *           - RT_EOK
- */
-rt_err_t TCA9539_WritePin(uint8_t u8Port, uint8_t u8Pin, uint8_t u8PinState)
-{
-    uint8_t u8TempData[2];
-
-    u8TempData[0] = u8Port + TCA9539_REG_OUTPUT_PORT0;
-    if (RT_EOK != BSP_TCA9539_I2C_Read(i2c_bus, u8TempData[0], &u8TempData[1], 1U))
-    {
-        return -RT_ERROR;
-    }
-    if (0U == u8PinState)
-    {
-        u8TempData[1] &= (uint8_t)(~u8Pin);
-    }
-    else
-    {
-        u8TempData[1] |= u8Pin;
-    }
-    if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U))
-    {
-        return -RT_ERROR;
-    }
-
-    return RT_EOK;
-}
-
-/**
- * @brief  Read TCA9539 pin input value.
- * @param  [in] u8Port                  Port number.
- *         This parameter can be one of the following values:
- *           @arg @ref TCA9539_Port_Definition
- * @param  [in] u8Pin                   Pin number.
- *         This parameter can be one or any combination of the following values:
- *           @arg @ref TCA9539_Pin_Definition
- * @param  [in] u8PinState              Pin state to be written.
- *         This parameter can be one of the following values:
- *           @arg @ref TCA9539_Pin_State_Definition
- * @retval rt_err_t:
- *           - RT_ERROR
- *           - RT_EOK
- */
-rt_err_t TCA9539_ReadPin(uint8_t u8Port, uint8_t u8Pin, uint8_t *pu8PinState)
-{
-    uint8_t u8TempData[2];
-
-    u8TempData[0] = u8Port + TCA9539_REG_INPUT_PORT0;
-    if (RT_EOK != BSP_TCA9539_I2C_Read(i2c_bus, u8TempData[0], &u8TempData[1], 1U))
-    {
-        return -RT_ERROR;
-    }
-    if (0U != (u8TempData[1] & u8Pin))
-    {
-        *pu8PinState = TCA9539_PIN_SET;
-    }
-    else
-    {
-        *pu8PinState = TCA9539_PIN_RESET;
-    }
-
-    return RT_EOK;
-}
-
-/**
- * @brief  Toggle TCA9539 pin output value.
- * @param  [in] u8Port                  Port number.
- *         This parameter can be one of the following values:
- *           @arg @ref TCA9539_Port_Definition
- * @param  [in] u8Pin                   Pin number.
- *         This parameter can be one or any combination of the following values:
- *           @arg @ref TCA9539_Pin_Definition
- * @retval rt_err_t:
- *           - -RT_ERROR
- *           - RT_EOK
- */
-rt_err_t TCA9539_TogglePin(uint8_t u8Port, uint8_t u8Pin)
-{
-    uint8_t u8TempData[2];
-
-    u8TempData[0] = u8Port + TCA9539_REG_OUTPUT_PORT0;
-    if (RT_EOK != BSP_TCA9539_I2C_Read(i2c_bus, u8TempData[0], &u8TempData[1], 1U))
-    {
-        return -RT_ERROR;
-    }
-    u8TempData[1] ^= u8Pin;
-    if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U))
-    {
-        return -RT_ERROR;
-    }
-
-    return RT_EOK;
-}
-
-/**
- * @brief  Configuration TCA9539 pin.
- * @param  [in] u8Port                  Port number.
- *         This parameter can be one of the following values:
- *           @arg @ref TCA9539_Port_Definition
- * @param  [in] u8Pin                   Pin number.
- *         This parameter can be one or any combination of the following values:
- *           @arg @ref TCA9539_Pin_Definition
- * @param  [in] u8Dir                   Pin output direction.
- *         This parameter can be one of the following values:
- *           @arg @ref TCA9539_Direction_Definition
- * @retval rt_err_t:
- *           - -RT_ERROR
- *           - RT_EOK
- */
-rt_err_t TCA9539_ConfigPin(uint8_t u8Port, uint8_t u8Pin, uint8_t u8Dir)
-{
-    uint8_t u8TempData[2];
-
-    u8TempData[0] = u8Port + TCA9539_REG_CONFIG_PORT0;
-    if (RT_EOK != BSP_TCA9539_I2C_Read(i2c_bus, u8TempData[0], &u8TempData[1], 1U))
-    {
-        return -RT_ERROR;
-    }
-    if (TCA9539_DIR_OUT == u8Dir)
-    {
-        u8TempData[1] &= (uint8_t)(~u8Pin);
-    }
-    else
-    {
-        u8TempData[1] |= u8Pin;
-    }
-    if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U))
-    {
-        return -RT_ERROR;
-    }
-
-    return RT_EOK;
-}
-
-/**
- * @brief  Initialize TCA9539.
- * @param  [in] None
- * @retval rt_err_t:
- *           - -RT_ERROR
- *           - RT_EOK
- */
-int TCA9539_Init(void)
-{
-    char name[RT_NAME_MAX];
-    uint8_t u8TempData[2];
-
-    TCA9539_Reset();
-    rt_strncpy(name, BSP_TCA9539_I2C_BUS_NAME, RT_NAME_MAX);
-    i2c_bus = (struct rt_i2c_bus_device *)rt_device_find(name);
-    if (i2c_bus == RT_NULL)
-    {
-        rt_kprintf("can't find %s device!\n", BSP_TCA9539_I2C_BUS_NAME);
-        return -RT_ERROR;
-    }
-    /* All Pins are input as default */
-    u8TempData[0] = TCA9539_REG_CONFIG_PORT0;
-    u8TempData[1] = 0xFFU;
-    if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U))
-    {
-        return -RT_ERROR;
-    }
-    u8TempData[0] = TCA9539_REG_CONFIG_PORT1;
-    if (RT_EOK != BSP_TCA9539_I2C_Write(i2c_bus, u8TempData[0], &u8TempData[1], 1U))
-    {
-        return -RT_ERROR;
-    }
-
-    return RT_EOK;
-}
-INIT_PREV_EXPORT(TCA9539_Init);
-
-#endif /* BSP_USING_TCA9539 */

bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539.h

@@ -1,133 +0,0 @@
-/*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2024-02-20     CDT          first version
- */
-
-#ifndef __TCA9539_H__
-#define __TCA9539_H__
-
-#include <rtdevice.h>
-
-/**
- * @defgroup TCA9539_REGISTER_Definition TCA9539 Register Definition
- * @{
- */
-#define TCA9539_REG_INPUT_PORT0         (0x00U)
-#define TCA9539_REG_INPUT_PORT1         (0x01U)
-#define TCA9539_REG_OUTPUT_PORT0        (0x02U)
-#define TCA9539_REG_OUTPUT_PORT1        (0x03U)
-#define TCA9539_REG_INVERT_PORT0        (0x04U)
-#define TCA9539_REG_INVERT_PORT1        (0x05U)
-#define TCA9539_REG_CONFIG_PORT0        (0x06U)
-#define TCA9539_REG_CONFIG_PORT1        (0x07U)
-/**
- * @}
- */
-
-/**
- * @defgroup TCA9539_Port_Definition TCA9539 Port Definition
- * @{
- */
-#define TCA9539_IO_PORT0                (0x00U)
-#define TCA9539_IO_PORT1                (0x01U)
-/**
- * @}
- */
-
-/**
- * @defgroup TCA9539_Pin_Definition TCA9539 Pin Definition
- * @{
- */
-#define TCA9539_IO_PIN0                 (0x01U)
-#define TCA9539_IO_PIN1                 (0x02U)
-#define TCA9539_IO_PIN2                 (0x04U)
-#define TCA9539_IO_PIN3                 (0x08U)
-#define TCA9539_IO_PIN4                 (0x10U)
-#define TCA9539_IO_PIN5                 (0x20U)
-#define TCA9539_IO_PIN6                 (0x40U)
-#define TCA9539_IO_PIN7                 (0x80U)
-#define TCA9539_IO_PIN_ALL              (0xFFU)
-/**
- * @}
- */
-
-/**
- * @defgroup TCA9539_Direction_Definition TCA9539 Direction Definition
- * @{
- */
-#define TCA9539_DIR_OUT                 (0x00U)
-#define TCA9539_DIR_IN                  (0x01U)
-/**
- * @}
- */
-
-/**
- * @defgroup TCA9539_Pin_State_Definition TCA9539 Pin State Definition
- * @{
- */
-#define TCA9539_PIN_RESET               (0x00U)
-#define TCA9539_PIN_SET                 (0x01U)
-/**
- * @}
- */
-
-/**
- * @defgroup HC32F448_EV_IO_Function_Sel Expand IO function definition
- * @{
- */
-#define EIO_SCI_CD                      (TCA9539_IO_PIN1)   /* Smart card detect, input */
-#define EIO_TOUCH_INT                   (TCA9539_IO_PIN2)   /* Touch screen interrupt, input */
-#define EIO_TOUCH_CTRST                 (TCA9539_IO_PIN5)   /* 'Reset' for Cap touch panel, output */
-#define EIO_LCD_RST                     (TCA9539_IO_PIN6)   /* LCD panel reset, output */
-#define EIO_LCD_BKL                     (TCA9539_IO_PIN7)   /* LCD panel back light, output */
-
-#define EIO_LIN_SLEEP                   (TCA9539_IO_PIN1)   /* LIN PHY sleep, output */
-#define EIO_CAN1_STB                    (TCA9539_IO_PIN2)   /* CAN1 PHY standby, output */
-#define EIO_CAN2_STB                    (TCA9539_IO_PIN3)   /* CAN2 PHY standby, output */
-#define EIO_LED_RED                     (TCA9539_IO_PIN5)   /* Red LED, output */
-#define EIO_LED_YELLOW                  (TCA9539_IO_PIN6)   /* Yellow LED, output */
-#define EIO_LED_BLUE                    (TCA9539_IO_PIN7)   /* Blue LED, output */
-/**
- * @}
- */
-
-/**
- * @defgroup BSP_LED_PortPin_Sel BSP LED port/pin definition
- * @{
- */
-#define LED_PORT                        (TCA9539_IO_PORT1)
-#define LED_RED_PORT                    (TCA9539_IO_PORT1)
-#define LED_RED_PIN                     (EIO_LED_RED)
-#define LED_YELLOW_PORT                 (TCA9539_IO_PORT1)
-#define LED_YELLOW_PIN                  (EIO_LED_YELLOW)
-#define LED_BLUE_PORT                   (TCA9539_IO_PORT1)
-#define LED_BLUE_PIN                    (EIO_LED_BLUE)
-/**
- * @}
- */
-
-/**
- * @defgroup  BSP CAN PHY STB port/pin definition
- * @{
- */
-#define CAN1_STB_PORT                   (TCA9539_IO_PORT1)
-#define CAN1_STB_PIN                    (EIO_CAN1_STB)
-#define CAN2_STB_PORT                   (TCA9539_IO_PORT1)
-#define CAN2_STB_PIN                    (EIO_CAN2_STB)
-/**
- * @}
- */
-
-int TCA9539_Init(void);
-rt_err_t TCA9539_WritePin(uint8_t u8Port, uint8_t u8Pin, uint8_t u8PinState);
-rt_err_t TCA9539_ReadPin(uint8_t u8Port, uint8_t u8Pin, uint8_t *pu8PinState);
-rt_err_t TCA9539_TogglePin(uint8_t u8Port, uint8_t u8Pin);
-rt_err_t TCA9539_ConfigPin(uint8_t u8Port, uint8_t u8Pin, uint8_t u8Dir);
-
-#endif

bsp/hc32/ev_hc32f448_lqfp80/board/ports/tca9539_port.h

@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-04-28     CDT          first version
+ */
+
+#ifndef __TCA9539_PORT_H__
+#define __TCA9539_PORT_H__
+
+#include "tca9539.h"
+
+/**
+ * @defgroup HC32F448_EV_IO_Function_Sel Expand IO function definition
+ * @{
+ */
+#define EIO_SCI_CD                      (TCA9539_IO_PIN1)   /* Smart card detect, input */
+#define EIO_TOUCH_INT                   (TCA9539_IO_PIN2)   /* Touch screen interrupt, input */
+#define EIO_TOUCH_CTRST                 (TCA9539_IO_PIN5)   /* 'Reset' for Cap touch panel, output */
+#define EIO_LCD_RST                     (TCA9539_IO_PIN6)   /* LCD panel reset, output */
+#define EIO_LCD_BKL                     (TCA9539_IO_PIN7)   /* LCD panel back light, output */
+
+#define EIO_LIN_SLEEP                   (TCA9539_IO_PIN1)   /* LIN PHY sleep, output */
+#define EIO_CAN1_STB                    (TCA9539_IO_PIN2)   /* CAN1 PHY standby, output */
+#define EIO_CAN2_STB                    (TCA9539_IO_PIN3)   /* CAN2 PHY standby, output */
+#define EIO_LED_RED                     (TCA9539_IO_PIN5)   /* Red LED, output */
+#define EIO_LED_YELLOW                  (TCA9539_IO_PIN6)   /* Yellow LED, output */
+#define EIO_LED_BLUE                    (TCA9539_IO_PIN7)   /* Blue LED, output */
+/**
+ * @}
+ */
+
+/**
+ * @defgroup BSP_LED_PortPin_Sel BSP LED port/pin definition
+ * @{
+ */
+#define LED_RED_PORT                    (TCA9539_IO_PORT1)
+#define LED_RED_PIN                     (EIO_LED_RED)
+#define LED_YELLOW_PORT                 (TCA9539_IO_PORT1)
+#define LED_YELLOW_PIN                  (EIO_LED_YELLOW)
+#define LED_BLUE_PORT                   (TCA9539_IO_PORT1)
+#define LED_BLUE_PIN                    (EIO_LED_BLUE)
+/**
+ * @}
+ */
+
+/**
+ * @defgroup  BSP CAN PHY STB port/pin definition
+ * @{
+ */
+#define CAN1_STB_PORT                   (TCA9539_IO_PORT1)
+#define CAN1_STB_PIN                    (EIO_CAN1_STB)
+#define CAN2_STB_PORT                   (TCA9539_IO_PORT1)
+#define CAN2_STB_PIN                    (EIO_CAN2_STB)
+/**
+ * @}
+ */
+
+#endif

bsp/hc32/ev_hc32f448_lqfp80/jlink/ev_hc32f448_lqfp80 Debug.launch

@@ -41,7 +41,7 @@
     <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
     <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
     <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/../libraries/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/GCC/svd/HC32F448.svd"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/../libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/GCC/svd/HC32F448.svd"/>
     <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
     <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
     <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>

bsp/hc32/ev_hc32f448_lqfp80/project.ewd

@@ -44,7 +44,7 @@
                 </option>
                 <option>
                     <name>MemFile</name>
-                    <state>$PROJ_DIR$/../libraries/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F448.svd</state>
+                    <state>$PROJ_DIR$/../libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F448.svd</state>
                 </option>
                 <option>
                     <name>RunToEnable</name>
@@ -80,7 +80,7 @@
                 </option>
                 <option>
                     <name>OCProductVersion</name>
-                    <state>8.40.1.21529</state>
+                    <state>7.70.1.11471</state>
                 </option>
                 <option>
                     <name>OCDynDriverList</name>
@@ -88,7 +88,7 @@
                 </option>
                 <option>
                     <name>OCLastSavedByProductVersion</name>
-                    <state>8.50.9.33458</state>
+                    <state>8.40.2.22864</state>
                 </option>
                 <option>
                     <name>UseFlashLoader</name>
@@ -112,7 +112,7 @@
                 </option>
                 <option>
                     <name>FlashLoadersV3</name>
-                    <state>$PROJ_DIR$/../libraries/hc32f448_ddl/config/flashloader/FlashHC32F448xC.board</state>
+                    <state>$PROJ_DIR$/../libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448xC.board</state>
                 </option>
                 <option>
                     <name>OCImagesSuppressCheck1</name>
@@ -1007,7 +1007,7 @@
             <name>STLINK_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>7</version>
+                <version>6</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -1033,7 +1033,7 @@
                 </option>
                 <option>
                     <name>CCSwoClockAuto</name>
-                    <state>0</state>
+                    <state>1</state>
                 </option>
                 <option>
                     <name>CCSwoClockEdit</name>
@@ -1123,7 +1123,7 @@
                 <option>
                     <name>CCSTLinkProbeList</name>
                     <version>1</version>
-                    <state>2</state>
+                    <state>0</state>
                 </option>
             </data>
         </settings>
@@ -1379,7 +1379,7 @@
                 <option>
                     <name>CCXds100ProbeList</name>
                     <version>0</version>
-                    <state>3</state>
+                    <state>2</state>
                 </option>
                 <option>
                     <name>CCXds100SWOPortRadio</name>
@@ -1445,11 +1445,11 @@
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8b.ewplugin</file>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8bBE.ewplugin</file>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
@@ -1529,7 +1529,7 @@
                 </option>
                 <option>
                     <name>MemFile</name>
-                    <state>$PROJ_DIR$/../libraries/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F448.svd</state>
+                    <state>$PROJ_DIR$/../libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F448.svd</state>
                 </option>
                 <option>
                     <name>RunToEnable</name>
@@ -1565,15 +1565,15 @@
                 </option>
                 <option>
                     <name>OCProductVersion</name>
-                    <state>8.40.1.21529</state>
+                    <state>7.70.1.11471</state>
                 </option>
                 <option>
                     <name>OCDynDriverList</name>
-                    <state>CMSISDAP_ID</state>
+                    <state>ARMSIM_ID</state>
                 </option>
                 <option>
                     <name>OCLastSavedByProductVersion</name>
-                    <state>8.40.1.21529</state>
+                    <state></state>
                 </option>
                 <option>
                     <name>UseFlashLoader</name>
@@ -1597,7 +1597,7 @@
                 </option>
                 <option>
                     <name>FlashLoadersV3</name>
-                    <state>$PROJ_DIR$/../libraries/hc32f448_ddl/config/flashloader/FlashHC32F448xC.board</state>
+                    <state>$PROJ_DIR$/../libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F448xC.board</state>
                 </option>
                 <option>
                     <name>OCImagesSuppressCheck1</name>
@@ -2492,7 +2492,7 @@
             <name>STLINK_ID</name>
             <archiveVersion>2</archiveVersion>
             <data>
-                <version>7</version>
+                <version>6</version>
                 <wantNonLocal>1</wantNonLocal>
                 <debug>0</debug>
                 <option>
@@ -2518,7 +2518,7 @@
                 </option>
                 <option>
                     <name>CCSwoClockAuto</name>
-                    <state>0</state>
+                    <state>1</state>
                 </option>
                 <option>
                     <name>CCSwoClockEdit</name>
@@ -2608,7 +2608,7 @@
                 <option>
                     <name>CCSTLinkProbeList</name>
                     <version>1</version>
-                    <state>2</state>
+                    <state>0</state>
                 </option>
             </data>
         </settings>
@@ -2930,11 +2930,11 @@
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8b.ewplugin</file>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>
-                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8bBE.ewplugin</file>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8BE.ewplugin</file>
                 <loadFlag>0</loadFlag>
             </plugin>
             <plugin>

bsp/hc32/ev_hc32f448_lqfp80/project.ewp

@@ -319,27 +319,31 @@
         <option>
           <name>CCIncludePath2</name>
           <state />
-          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\epoll</state>
-          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
+          <state>$PROJ_DIR$\applications</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
-          <state>$PROJ_DIR$\board\ports</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\cmsis\Device\HDSC\hc32f4xx\Include</state>
+          <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
+          <state>$PROJ_DIR$\..\tests</state>
+          <state>$PROJ_DIR$\..\platform\tca9539</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
+          <state>$PROJ_DIR$\..\..\..\include</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\cmsis\Include</state>
           <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\cmsis\Include</state>
-          <state>$PROJ_DIR$\.</state>
-          <state>$PROJ_DIR$\applications</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\inc</state>
+          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
+          <state>$PROJ_DIR$\board\config</state>
           <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\board\ports</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\smp_call</state>
+          <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\board</state>
-          <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
-          <state>$PROJ_DIR$\board\config</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\inc</state>
-          <state>$PROJ_DIR$\..\..\..\include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\phy</state>
         </option>
         <option>
           <name>CCStdIncCheck</name>
@@ -1310,27 +1314,31 @@
         <option>
           <name>CCIncludePath2</name>
           <state />
-          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\epoll</state>
-          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
+          <state>$PROJ_DIR$\applications</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
-          <state>$PROJ_DIR$\board\ports</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\cmsis\Device\HDSC\hc32f4xx\Include</state>
+          <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
+          <state>$PROJ_DIR$\..\tests</state>
+          <state>$PROJ_DIR$\..\platform\tca9539</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
+          <state>$PROJ_DIR$\..\..\..\include</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\cmsis\Include</state>
           <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\cmsis\Include</state>
-          <state>$PROJ_DIR$\.</state>
-          <state>$PROJ_DIR$\applications</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\inc</state>
+          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
+          <state>$PROJ_DIR$\board\config</state>
           <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\board\ports</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\smp_call</state>
+          <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\board</state>
-          <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
-          <state>$PROJ_DIR$\board\config</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\inc</state>
-          <state>$PROJ_DIR$\..\..\..\include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\phy</state>
         </option>
         <option>
           <name>CCStdIncCheck</name>
@@ -1985,10 +1993,10 @@
   <group>
     <name>Applications</name>
     <file>
-      <name>$PROJ_DIR$\applications\xtal32_fcm.c</name>
+      <name>$PROJ_DIR$\applications\main.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\applications\main.c</name>
+      <name>$PROJ_DIR$\applications\xtal32_fcm.c</name>
     </file>
   </group>
   <group>
@@ -2045,7 +2053,22 @@
       <name>$PROJ_DIR$\..\..\..\components\drivers\core\device.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_core.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_dev.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion_comm.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion_up.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\condvar.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\dataqueue.c</name>
@@ -2066,10 +2089,10 @@
       <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\workqueue.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\pin\pin.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\pin\dev_pin.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\serial\dev_serial.c</name>
     </file>
   </group>
   <group>
@@ -2081,7 +2104,7 @@
       <name>$PROJ_DIR$\board\board_config.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\IAR\startup_hc32f448.s</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\cmsis\Device\HDSC\hc32f4xx\Source\IAR\startup_hc32f448.s</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_common.c</name>
@@ -2089,9 +2112,15 @@
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_gpio.c</name>
     </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_i2c.c</name>
+    </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_irq.c</name>
     </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_soft_i2c.c</name>
+    </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_usart.c</name>
     </file>
@@ -2099,16 +2128,16 @@
   <group>
     <name>Finsh</name>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\shell.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\msh_parse.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\msh.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\shell.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\msh_parse.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\cmd.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\cmd.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\msh.c</name>
     </file>
   </group>
   <group>
@@ -2120,19 +2149,19 @@
       <name>$PROJ_DIR$\..\..\..\src\components.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\idle.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\cpu_up.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\defunct.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\irq.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\idle.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\klibc\kstdio.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\klibc\kstring.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\irq.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
@@ -2159,6 +2188,24 @@
       <name>$PROJ_DIR$\..\..\..\src\timer.c</name>
     </file>
   </group>
+  <group>
+    <name>klibc</name>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\kerrno.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\kstdio.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\rt_vsnprintf_tiny.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\kstring.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\rt_vsscanf.c</name>
+    </file>
+  </group>
   <group>
     <name>libcpu</name>
     <file>
@@ -2180,58 +2227,88 @@
   <group>
     <name>Libraries</name>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_clk.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_fcg.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_clk.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_icg.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_icg.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_utility.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_interrupts.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_fcg.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_sram.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_interrupts.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_dma.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_sram.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_gpio.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_pwc.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_aos.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_efm.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_fcm.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_pwc.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_aos.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f448.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_utility.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_efm.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f448.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_gpio.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_fcm.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_usart.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_tmr0.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_rmu.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_usart.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_tmr0.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_rmu.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_dma.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_i2c.c</name>
+    </file>
+  </group>
+  <group>
+    <name>Platform</name>
+    <file>
+      <name>$PROJ_DIR$\..\platform\tca9539\tca9539.c</name>
     </file>
   </group>
   <group>
     <name>POSIX</name>
   </group>
+  <group>
+    <name>smp</name>
+  </group>
+  <group>
+    <name>Tests</name>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_soft_i2c.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_i2c.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_uart_v1.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_gpio.c</name>
+    </file>
+  </group>
+  <group>
+    <name>utestcases</name>
+  </group>
 </project>

bsp/hc32/ev_hc32f448_lqfp80/project.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -120,7 +120,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>CMSIS_AGDI</Key>
-          <Name>-X"" -O206 -S0 -C0 -P00 -FO15 -FD1FFF8000 -FC4000 -FN2 -FF0HC32F448_256K -FS00 -FL080000 -FP0($$Device:HC32F448MCTI$FlashARM\HC32F448_256K.FLM) -FF1HC32F448_otp -FS13000C00 -FL1400 -FP1($$Device:HC32F448MCTI$FlashARM\HC32F448_otp.FLM)</Name>
+          <Name>-X"" -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD1FFF8000 -FC4000 -FN2 -FF0HC32F448_256K.FLM -FS00 -FL080000 -FP0($$Device:HC32F448MCTI$FlashARM\HC32F448_256K.FLM) -FF1HC32F448_otp.FLM -FS13000C00 -FL1400 -FP1($$Device:HC32F448MCTI$FlashARM\HC32F448_otp.FLM)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -140,12 +140,12 @@
       <DebugFlag>
         <trace>0</trace>
         <periodic>0</periodic>
-        <aLwin>0</aLwin>
+        <aLwin>1</aLwin>
         <aCover>0</aCover>
         <aSer1>0</aSer1>
         <aSer2>0</aSer2>
         <aPa>0</aPa>
-        <viewmode>0</viewmode>
+        <viewmode>1</viewmode>
         <vrSel>0</vrSel>
         <aSym>0</aSym>
         <aTbox>0</aTbox>

bsp/hc32/ev_hc32f448_lqfp80/project.uvprojx

@@ -30,7 +30,7 @@
           <SLE66CMisc />
           <SLE66AMisc />
           <SLE66LinkerMisc />
-          <SFDFile>../libraries/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F448.SFR</SFDFile>
+          <SFDFile>../libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F448.SFR</SFDFile>
           <bCustSvd>1</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath />
@@ -242,7 +242,7 @@
               </Ocm6>
               <IRAM>
                 <Type>0</Type>
-                <StartAddress>0x1FFF8000</StartAddress>
+                <StartAddress>0x1fff8000</StartAddress>
                 <Size>0x10000</Size>
               </IRAM>
               <IROM>
@@ -277,7 +277,7 @@
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
-                <StartAddress>0x03000C00</StartAddress>
+                <StartAddress>0x3000c00</StartAddress>
                 <Size>0x400</Size>
               </OCR_RVCT5>
               <OCR_RVCT6>
@@ -297,12 +297,12 @@
               </OCR_RVCT8>
               <OCR_RVCT9>
                 <Type>0</Type>
-                <StartAddress>0x1FFF8000</StartAddress>
+                <StartAddress>0x1fff8000</StartAddress>
                 <Size>0x10000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
-                <StartAddress>0x200F0000</StartAddress>
+                <StartAddress>0x200f0000</StartAddress>
                 <Size>0x1000</Size>
               </OCR_RVCT10>
             </OnChipMemories>
@@ -334,9 +334,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls />
-              <Define>__STDC_LIMIT_MACROS, RT_USING_ARMLIBC, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, USE_DDL_DRIVER, __RTTHREAD__, __DEBUG, HC32F448</Define>
+              <Define>__STDC_LIMIT_MACROS, USE_DDL_DRIVER, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_LIBC, RT_USING_ARMLIBC, __DEBUG, __RTTHREAD__, HC32F448</Define>
               <Undefine />
-              <IncludePath>..\..\..\libcpu\arm\cortex-m4;board;..\..\..\components\libc\compilers\common\extension\fcntl\octal;board\config;..\..\..\components\libc\compilers\common\include;..\libraries\hc32f448_ddl\drivers\cmsis\Include;applications;.;..\..\..\components\finsh;..\..\..\components\drivers\include;..\..\..\libcpu\arm\common;..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\inc;..\..\..\components\drivers\include;..\..\..\include;..\..\..\components\libc\posix\io\eventfd;..\..\..\components\libc\posix\io\poll;..\..\..\components\drivers\include;..\libraries\hc32_drivers;..\libraries\hc32f448_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include;board\ports;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\epoll;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\posix\io\poll;..\..\..\include;..\libraries\hc32f448_ddl\cmsis\Include;..\libraries\hc32f448_ddl\hc32_ll_driver\inc;..\..\..\libcpu\arm\common;board;..\libraries\hc32_drivers;..\tests;..\..\..\components\libc\posix\io\epoll;..\..\..\components\drivers\include;board\ports;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\eventfd;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\finsh;..\platform\tca9539;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\drivers\include;..\..\..\components\drivers\smp_call;..\..\..\components\libc\compilers\common\extension;..\libraries\hc32f448_ddl\cmsis\Device\HDSC\hc32f4xx\Include;..\..\..\components\drivers\phy;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\include;board\config</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -381,16 +381,16 @@
           <GroupName>Applications</GroupName>
           <Files>
             <File>
-              <FileName>main.c</FileName>
+              <FileName>xtal32_fcm.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\main.c</FilePath>
+              <FilePath>applications\xtal32_fcm.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>xtal32_fcm.c</FileName>
+              <FileName>main.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\xtal32_fcm.c</FilePath>
+              <FilePath>applications\main.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -476,9 +476,104 @@
           </Files>
           <Files>
             <File>
-              <FileName>completion.c</FileName>
+              <FileName>dev_i2c_bit_ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>dev_i2c_core.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
+              <FilePath>..\..\..\components\drivers\i2c\dev_i2c_core.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>dev_i2c_dev.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\dev_i2c_dev.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>completion_comm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\completion_comm.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>completion_up.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\completion_up.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>condvar.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\condvar.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -609,9 +704,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>pin.c</FileName>
+              <FileName>dev_pin.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\pin\pin.c</FilePath>
+              <FilePath>..\..\..\components\drivers\pin\dev_pin.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -628,9 +723,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>serial.c</FileName>
+              <FileName>dev_serial.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
+              <FilePath>..\..\..\components\drivers\serial\dev_serial.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -666,7 +761,7 @@
             <File>
               <FileName>startup_hc32f448.s</FileName>
               <FileType>2</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\ARM\startup_hc32f448.s</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\cmsis\Device\HDSC\hc32f4xx\Source\ARM\startup_hc32f448.s</FilePath>
             </File>
           </Files>
           <Files>
@@ -683,6 +778,13 @@
               <FilePath>..\libraries\hc32_drivers\drv_gpio.c</FilePath>
             </File>
           </Files>
+          <Files>
+            <File>
+              <FileName>drv_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_i2c.c</FilePath>
+            </File>
+          </Files>
           <Files>
             <File>
               <FileName>drv_irq.c</FileName>
@@ -690,6 +792,13 @@
               <FilePath>..\libraries\hc32_drivers\drv_irq.c</FilePath>
             </File>
           </Files>
+          <Files>
+            <File>
+              <FileName>drv_soft_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_soft_i2c.c</FilePath>
+            </File>
+          </Files>
           <Files>
             <File>
               <FileName>drv_usart.c</FileName>
@@ -709,23 +818,23 @@
           </Files>
           <Files>
             <File>
-              <FileName>msh.c</FileName>
+              <FileName>cmd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\msh.c</FilePath>
+              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>msh_parse.c</FileName>
+              <FileName>msh.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
+              <FilePath>..\..\..\components\finsh\msh.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>cmd.c</FileName>
+              <FileName>msh_parse.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
+              <FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -771,9 +880,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>idle.c</FileName>
+              <FileName>cpu_up.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\idle.c</FilePath>
+              <FilePath>..\..\..\src\cpu_up.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -790,9 +899,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>ipc.c</FileName>
+              <FileName>defunct.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\ipc.c</FilePath>
+              <FilePath>..\..\..\src\defunct.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -809,9 +918,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>irq.c</FileName>
+              <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\irq.c</FilePath>
+              <FilePath>..\..\..\src\idle.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -828,9 +937,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>kstdio.c</FileName>
+              <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\klibc\kstdio.c</FilePath>
+              <FilePath>..\..\..\src\ipc.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -847,9 +956,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>kstring.c</FileName>
+              <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\klibc\kstring.c</FilePath>
+              <FilePath>..\..\..\src\irq.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -1017,6 +1126,44 @@
             </File>
           </Files>
         </Group>
+        <Group>
+          <GroupName>klibc</GroupName>
+          <Files>
+            <File>
+              <FileName>rt_vsscanf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\rt_vsscanf.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kstring.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\kstring.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>rt_vsnprintf_tiny.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\rt_vsnprintf_tiny.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kstdio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\kstdio.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kerrno.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\kerrno.c</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>libcpu</GroupName>
           <Files>
@@ -1061,119 +1208,167 @@
             <File>
               <FileName>hc32_ll_clk.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_clk.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_clk.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_icg.c</FileName>
+              <FileName>hc32_ll_pwc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_icg.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_pwc.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_utility.c</FileName>
+              <FileName>hc32_ll_sram.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_utility.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_sram.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_fcg.c</FileName>
+              <FileName>hc32_ll_tmr0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_fcg.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_tmr0.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_interrupts.c</FileName>
+              <FileName>hc32_ll_i2c.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_interrupts.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_i2c.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_sram.c</FileName>
+              <FileName>hc32_ll_interrupts.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_sram.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_interrupts.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_pwc.c</FileName>
+              <FileName>hc32_ll_usart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_pwc.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_usart.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_aos.c</FileName>
+              <FileName>hc32_ll.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_aos.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>hc32_ll_fcm.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_fcm.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_fcm.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll.c</FileName>
+              <FileName>hc32_ll_aos.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_aos.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_efm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_efm.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>system_hc32f448.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f448.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f448.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_efm.c</FileName>
+              <FileName>hc32_ll_fcg.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_efm.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_fcg.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>hc32_ll_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_gpio.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_gpio.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_usart.c</FileName>
+              <FileName>hc32_ll_icg.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_usart.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_icg.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>hc32_ll_rmu.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_rmu.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_rmu.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_tmr0.c</FileName>
+              <FileName>hc32_ll_utility.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_tmr0.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_utility.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>hc32_ll_dma.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f448_ddl\drivers\hc32_ll_driver\src\hc32_ll_dma.c</FilePath>
+              <FilePath>..\libraries\hc32f448_ddl\hc32_ll_driver\src\hc32_ll_dma.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Platform</GroupName>
+          <Files>
+            <File>
+              <FileName>tca9539.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\platform\tca9539\tca9539.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>Tests</GroupName>
+          <Files>
+            <File>
+              <FileName>test_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\tests\test_gpio.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>test_uart_v1.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\tests\test_uart_v1.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>test_soft_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\tests\test_soft_i2c.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>test_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\tests\test_i2c.c</FilePath>
             </File>
           </Files>
         </Group>

bsp/hc32/ev_hc32f448_lqfp80/rtconfig.h

@@ -1,11 +1,66 @@
 #ifndef RT_CONFIG_H__
 #define RT_CONFIG_H__
 
-/* Automatically generated file; DO NOT EDIT. */
-/* RT-Thread Configuration */
-
 /* RT-Thread Kernel */
 
+/* klibc options */
+
+/* rt_vsnprintf options */
+
+/* end of rt_vsnprintf options */
+
+/* rt_vsscanf options */
+
+/* end of rt_vsscanf options */
+
+/* rt_memset options */
+
+/* end of rt_memset options */
+
+/* rt_memcpy options */
+
+/* end of rt_memcpy options */
+
+/* rt_memmove options */
+
+/* end of rt_memmove options */
+
+/* rt_memcmp options */
+
+/* end of rt_memcmp options */
+
+/* rt_strstr options */
+
+/* end of rt_strstr options */
+
+/* rt_strcasecmp options */
+
+/* end of rt_strcasecmp options */
+
+/* rt_strncpy options */
+
+/* end of rt_strncpy options */
+
+/* rt_strcpy options */
+
+/* end of rt_strcpy options */
+
+/* rt_strncmp options */
+
+/* end of rt_strncmp options */
+
+/* rt_strcmp options */
+
+/* end of rt_strcmp options */
+
+/* rt_strlen options */
+
+/* end of rt_strlen options */
+
+/* rt_strnlen options */
+
+/* end of rt_strnlen options */
+/* end of klibc options */
 #define RT_NAME_MAX 8
 #define RT_CPUS_NR 1
 #define RT_ALIGN_SIZE 8
@@ -19,9 +74,11 @@
 #define RT_IDLE_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 256
 
-/* kservice optimization */
+/* kservice options */
 
+/* end of kservice options */
 #define RT_USING_DEBUG
+#define RT_DEBUGING_ASSERT
 #define RT_DEBUGING_COLOR
 #define RT_DEBUGING_CONTEXT
 
@@ -32,6 +89,7 @@
 #define RT_USING_EVENT
 #define RT_USING_MAILBOX
 #define RT_USING_MESSAGEQUEUE
+/* end of Inter-Thread communication */
 
 /* Memory Management */
 
@@ -39,12 +97,14 @@
 #define RT_USING_SMALL_MEM
 #define RT_USING_SMALL_MEM_AS_HEAP
 #define RT_USING_HEAP
+/* end of Memory Management */
 #define RT_USING_DEVICE
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart2"
-#define RT_VER_NUM 0x50100
+#define RT_VER_NUM 0x50200
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
+/* end of RT-Thread Kernel */
 #define RT_USING_HW_ATOMIC
 #define RT_USING_CPU_FFS
 #define ARCH_ARM
@@ -74,6 +134,7 @@
 
 /* DFS: device virtual file system */
 
+/* end of DFS: device virtual file system */
 
 /* Device Drivers */
 
@@ -86,10 +147,10 @@
 #define RT_USING_SERIAL_V1
 #define RT_SERIAL_USING_DMA
 #define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
 #define RT_USING_PIN
-
-/* Using USB */
-
+/* end of Device Drivers */
 
 /* C/C++ and POSIX layer */
 
@@ -101,6 +162,8 @@
 #define RT_LIBC_TZ_DEFAULT_HOUR 8
 #define RT_LIBC_TZ_DEFAULT_MIN 0
 #define RT_LIBC_TZ_DEFAULT_SEC 0
+/* end of Timezone and Daylight Saving Time */
+/* end of ISO-ANSI C layer */
 
 /* POSIX (Portable Operating System Interface) layer */
 
@@ -110,18 +173,30 @@
 
 /* Socket is in the 'Network' category */
 
+/* end of Interprocess Communication (IPC) */
+/* end of POSIX (Portable Operating System Interface) layer */
+/* end of C/C++ and POSIX layer */
 
 /* Network */
 
+/* end of Network */
 
 /* Memory protection */
 
+/* end of Memory protection */
 
 /* Utilities */
 
+/* end of Utilities */
+
+/* Using USB legacy version */
+
+/* end of Using USB legacy version */
+/* end of RT-Thread Components */
 
 /* RT-Thread Utestcases */
 
+/* end of RT-Thread Utestcases */
 
 /* RT-Thread online packages */
 
@@ -132,57 +207,78 @@
 
 /* Marvell WiFi */
 
+/* end of Marvell WiFi */
 
 /* Wiced WiFi */
 
+/* end of Wiced WiFi */
 
 /* CYW43012 WiFi */
 
+/* end of CYW43012 WiFi */
 
 /* BL808 WiFi */
 
+/* end of BL808 WiFi */
 
 /* CYW43439 WiFi */
 
+/* end of CYW43439 WiFi */
+/* end of Wi-Fi */
 
 /* IoT Cloud */
 
+/* end of IoT Cloud */
+/* end of IoT - internet of things */
 
 /* security packages */
 
+/* end of security packages */
 
 /* language packages */
 
 /* JSON: JavaScript Object Notation, a lightweight data-interchange format */
 
+/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */
 
 /* XML: Extensible Markup Language */
 
+/* end of XML: Extensible Markup Language */
+/* end of language packages */
 
 /* multimedia packages */
 
 /* LVGL: powerful and easy-to-use embedded GUI library */
 
+/* end of LVGL: powerful and easy-to-use embedded GUI library */
 
 /* u8g2: a monochrome graphic library */
 
+/* end of u8g2: a monochrome graphic library */
+/* end of multimedia packages */
 
 /* tools packages */
 
+/* end of tools packages */
 
 /* system packages */
 
 /* enhanced kernel services */
 
+/* end of enhanced kernel services */
 
 /* acceleration: Assembly language or algorithmic acceleration packages */
 
+/* end of acceleration: Assembly language or algorithmic acceleration packages */
 
 /* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
 
+/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
 
 /* Micrium: Micrium software products porting for RT-Thread */
 
+/* end of Micrium: Micrium software products porting for RT-Thread */
+/* end of system packages */
 
 /* peripheral libraries and drivers */
 
@@ -190,66 +286,94 @@
 
 /* STM32 HAL & SDK Drivers */
 
+/* end of STM32 HAL & SDK Drivers */
+
+/* Infineon HAL Packages */
+
+/* end of Infineon HAL Packages */
 
 /* Kendryte SDK */
 
+/* end of Kendryte SDK */
+/* end of HAL & SDK Drivers */
 
 /* sensors drivers */
 
+/* end of sensors drivers */
 
 /* touch drivers */
 
+/* end of touch drivers */
+/* end of peripheral libraries and drivers */
 
 /* AI packages */
 
+/* end of AI packages */
 
 /* Signal Processing and Control Algorithm Packages */
 
+/* end of Signal Processing and Control Algorithm Packages */
 
 /* miscellaneous packages */
 
 /* project laboratory */
 
+/* end of project laboratory */
+
 /* samples: kernel and components samples */
 
+/* end of samples: kernel and components samples */
 
 /* entertainment: terminal games and other interesting software packages */
 
+/* end of entertainment: terminal games and other interesting software packages */
+/* end of miscellaneous packages */
 
 /* Arduino libraries */
 
 
 /* Projects and Demos */
 
+/* end of Projects and Demos */
 
 /* Sensors */
 
+/* end of Sensors */
 
 /* Display */
 
+/* end of Display */
 
 /* Timing */
 
+/* end of Timing */
 
 /* Data Processing */
 
+/* end of Data Processing */
 
 /* Data Storage */
 
 /* Communication */
 
+/* end of Communication */
 
 /* Device Control */
 
+/* end of Device Control */
 
 /* Other */
 
+/* end of Other */
 
 /* Signal IO */
 
+/* end of Signal IO */
 
 /* Uncategorized */
 
+/* end of Arduino libraries */
+/* end of RT-Thread online packages */
 #define SOC_FAMILY_HC32
 #define SOC_SERIES_HC32F4
 
@@ -263,19 +387,26 @@
 #define BSP_USING_ON_CHIP_FLASH_ICODE_CACHE
 #define BSP_USING_ON_CHIP_FLASH_DCODE_CACHE
 #define BSP_USING_ON_CHIP_FLASH_ICODE_PREFETCH
+/* end of On-chip Drivers */
 
 /* Onboard Peripheral Drivers */
 
+#define BSP_USING_TCA9539
+#define BSP_USING_EXT_IO
+/* end of Onboard Peripheral Drivers */
 
 /* On-chip Peripheral Drivers */
 
 #define BSP_USING_GPIO
 #define BSP_USING_UART
 #define BSP_USING_UART2
-#define BSP_UART2_RX_USING_DMA
-#define BSP_UART2_TX_USING_DMA
+#define BSP_USING_I2C
+#define BSP_USING_I2C_HW
+#define BSP_USING_I2C1
+/* end of On-chip Peripheral Drivers */
 
 /* Board extended module Drivers */
 
+/* end of Hardware Drivers Config */
 
 #endif

bsp/hc32/ev_hc32f448_lqfp80/template.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -120,7 +120,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>CMSIS_AGDI</Key>
-          <Name>-X"" -O206 -S0 -C0 -P00 -FO15 -FD1FFF8000 -FC4000 -FN2 -FF0HC32F448_256K -FS00 -FL080000 -FP0($$Device:HC32F448MCTI$FlashARM\HC32F448_256K.FLM) -FF1HC32F448_otp -FS13000C00 -FL1400 -FP1($$Device:HC32F448MCTI$FlashARM\HC32F448_otp.FLM)</Name>
+          <Name>-X"" -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD1FFF8000 -FC4000 -FN2 -FF0HC32F448_256K.FLM -FS00 -FL080000 -FP0($$Device:HC32F448MCTI$FlashARM\HC32F448_256K.FLM) -FF1HC32F448_otp.FLM -FS13000C00 -FL1400 -FP1($$Device:HC32F448MCTI$FlashARM\HC32F448_otp.FLM)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -140,12 +140,12 @@
       <DebugFlag>
         <trace>0</trace>
         <periodic>0</periodic>
-        <aLwin>0</aLwin>
+        <aLwin>1</aLwin>
         <aCover>0</aCover>
         <aSer1>0</aSer1>
         <aSer2>0</aSer2>
         <aPa>0</aPa>
-        <viewmode>0</viewmode>
+        <viewmode>1</viewmode>
         <vrSel>0</vrSel>
         <aSym>0</aSym>
         <aTbox>0</aTbox>

bsp/hc32/ev_hc32f448_lqfp80/template.uvprojx

@@ -33,7 +33,7 @@
           <SLE66CMisc></SLE66CMisc>
           <SLE66AMisc></SLE66AMisc>
           <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>../libraries/hc32f448_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F448.SFR</SFDFile>
+          <SFDFile>../libraries/hc32f448_ddl/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F448.SFR</SFDFile>
           <bCustSvd>1</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath></BinPath>
@@ -245,7 +245,7 @@
               </Ocm6>
               <IRAM>
                 <Type>0</Type>
-                <StartAddress>0x1FFF8000</StartAddress>
+                <StartAddress>0x1fff8000</StartAddress>
                 <Size>0x10000</Size>
               </IRAM>
               <IROM>
@@ -280,7 +280,7 @@
               </OCR_RVCT4>
               <OCR_RVCT5>
                 <Type>1</Type>
-                <StartAddress>0x03000C00</StartAddress>
+                <StartAddress>0x3000c00</StartAddress>
                 <Size>0x400</Size>
               </OCR_RVCT5>
               <OCR_RVCT6>
@@ -300,12 +300,12 @@
               </OCR_RVCT8>
               <OCR_RVCT9>
                 <Type>0</Type>
-                <StartAddress>0x1FFF8000</StartAddress>
+                <StartAddress>0x1fff8000</StartAddress>
                 <Size>0x10000</Size>
               </OCR_RVCT9>
               <OCR_RVCT10>
                 <Type>0</Type>
-                <StartAddress>0x200F0000</StartAddress>
+                <StartAddress>0x200f0000</StartAddress>
                 <Size>0x1000</Size>
               </OCR_RVCT10>
             </OnChipMemories>

bsp/hc32/ev_hc32f460_lqfp100_v2/.config

@@ -1,15 +1,117 @@
+
 #
-# Automatically generated file; DO NOT EDIT.
-# RT-Thread Configuration
+# RT-Thread Kernel
 #
 
 #
-# RT-Thread Kernel
+# klibc options
+#
+
+#
+# rt_vsnprintf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set
+# end of rt_vsnprintf options
+
+#
+# rt_vsscanf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSSCANF is not set
+# end of rt_vsscanf options
+
+#
+# rt_memset options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMSET is not set
+# end of rt_memset options
+
+#
+# rt_memcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMCPY is not set
+# end of rt_memcpy options
+
+#
+# rt_memmove options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMMOVE is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMMOVE is not set
+# end of rt_memmove options
+
+#
+# rt_memcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCMP is not set
+# end of rt_memcmp options
+
+#
+# rt_strstr options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRSTR is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRSTR is not set
+# end of rt_strstr options
+
+#
+# rt_strcasecmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCASECMP is not set
+# end of rt_strcasecmp options
+
+#
+# rt_strncpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCPY is not set
+# end of rt_strncpy options
+
+#
+# rt_strcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCPY is not set
+# end of rt_strcpy options
+
+#
+# rt_strncmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCMP is not set
+# end of rt_strncmp options
+
+#
+# rt_strcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCMP is not set
+# end of rt_strcmp options
+
+#
+# rt_strlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRLEN is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRLEN is not set
+# end of rt_strlen options
+
 #
+# rt_strnlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set
+# end of rt_strnlen options
+
+# CONFIG_RT_UTEST_TC_USING_KLIBC is not set
+# end of klibc options
+
 CONFIG_RT_NAME_MAX=8
 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set
-# CONFIG_RT_USING_SMART is not set
 # CONFIG_RT_USING_NANO is not set
+# CONFIG_RT_USING_SMART is not set
 # CONFIG_RT_USING_AMP is not set
 # CONFIG_RT_USING_SMP is not set
 CONFIG_RT_CPUS_NR=1
@@ -27,18 +129,20 @@ CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=256
 # CONFIG_RT_USING_TIMER_SOFT is not set
+# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
 
 #
-# kservice optimization
+# kservice options
 #
-# CONFIG_RT_KSERVICE_USING_STDLIB is not set
-# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
 # CONFIG_RT_USING_TINY_FFS is not set
-# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
+# end of kservice options
+
 CONFIG_RT_USING_DEBUG=y
+CONFIG_RT_DEBUGING_ASSERT=y
 CONFIG_RT_DEBUGING_COLOR=y
 CONFIG_RT_DEBUGING_CONTEXT=y
 # CONFIG_RT_DEBUGING_AUTO_INIT is not set
+# CONFIG_RT_USING_CI_ACTION is not set
 
 #
 # Inter-Thread communication
@@ -50,6 +154,7 @@ CONFIG_RT_USING_MAILBOX=y
 CONFIG_RT_USING_MESSAGEQUEUE=y
 # CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
 # CONFIG_RT_USING_SIGNALS is not set
+# end of Inter-Thread communication
 
 #
 # Memory Management
@@ -66,21 +171,21 @@ CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
 # CONFIG_RT_USING_MEMTRACE is not set
 # CONFIG_RT_USING_HEAP_ISR is not set
 CONFIG_RT_USING_HEAP=y
+# end of Memory Management
+
 CONFIG_RT_USING_DEVICE=y
 # CONFIG_RT_USING_DEVICE_OPS is not set
 # CONFIG_RT_USING_INTERRUPT_INFO is not set
 # CONFIG_RT_USING_THREADSAFE_PRINTF is not set
-# CONFIG_RT_USING_SCHED_THREAD_CTX is not set
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
-CONFIG_RT_VER_NUM=0x50100
+CONFIG_RT_VER_NUM=0x50200
 # CONFIG_RT_USING_STDC_ATOMIC is not set
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
-# CONFIG_RT_USING_CACHE is not set
+# end of RT-Thread Kernel
+
 CONFIG_RT_USING_HW_ATOMIC=y
-# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set
-# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
 CONFIG_RT_USING_CPU_FFS=y
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM_CORTEX_M=y
@@ -115,12 +220,15 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y
 # DFS: device virtual file system
 #
 # CONFIG_RT_USING_DFS is not set
+# end of DFS: device virtual file system
+
 # CONFIG_RT_USING_FAL is not set
 
 #
 # Device Drivers
 #
 # CONFIG_RT_USING_DM is not set
+# CONFIG_RT_USING_DEV_BUS is not set
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_UNAMED_PIPE_NUMBER=64
 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@@ -131,16 +239,24 @@ CONFIG_RT_USING_SERIAL_V1=y
 # CONFIG_RT_USING_SERIAL_V2 is not set
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_SERIAL_BYPASS is not set
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+CONFIG_RT_USING_I2C_BITOPS=y
+# CONFIG_RT_I2C_BITOPS_DEBUG is not set
+# CONFIG_RT_USING_SOFT_I2C is not set
 # CONFIG_RT_USING_PHY is not set
+# CONFIG_RT_USING_PHY_V2 is not set
 # CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_NULL is not set
 # CONFIG_RT_USING_ZERO is not set
 # CONFIG_RT_USING_RANDOM is not set
 # CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_PM is not set
@@ -153,21 +269,14 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_TOUCH is not set
 # CONFIG_RT_USING_LCD is not set
 # CONFIG_RT_USING_HWCRYPTO is not set
-# CONFIG_RT_USING_PULSE_ENCODER is not set
-# CONFIG_RT_USING_INPUT_CAPTURE is not set
-# CONFIG_RT_USING_DEV_BUS is not set
 # CONFIG_RT_USING_WIFI is not set
+# CONFIG_RT_USING_BLK is not set
 # CONFIG_RT_USING_VIRTIO is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_KTIME is not set
 # CONFIG_RT_USING_HWTIMER is not set
-
-#
-# Using USB
-#
-# CONFIG_RT_USING_USB is not set
-# CONFIG_RT_USING_USB_HOST is not set
-# CONFIG_RT_USING_USB_DEVICE is not set
+# CONFIG_RT_USING_CHERRYUSB is not set
+# end of Device Drivers
 
 #
 # C/C++ and POSIX layer
@@ -185,6 +294,8 @@ CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y
 CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8
 CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0
 CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
+# end of Timezone and Daylight Saving Time
+# end of ISO-ANSI C layer
 
 #
 # POSIX (Portable Operating System Interface) layer
@@ -206,7 +317,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # Socket is in the 'Network' category
 #
+# end of Interprocess Communication (IPC)
+# end of POSIX (Portable Operating System Interface) layer
+
 # CONFIG_RT_USING_CPLUSPLUS is not set
+# end of C/C++ and POSIX layer
 
 #
 # Network
@@ -215,12 +330,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_RT_USING_NETDEV is not set
 # CONFIG_RT_USING_LWIP is not set
 # CONFIG_RT_USING_AT is not set
+# end of Network
 
 #
 # Memory protection
 #
 # CONFIG_RT_USING_MEM_PROTECTION is not set
 # CONFIG_RT_USING_HW_STACK_GUARD is not set
+# end of Memory protection
 
 #
 # Utilities
@@ -232,12 +349,25 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_RT_USING_RESOURCE_ID is not set
 # CONFIG_RT_USING_ADT is not set
 # CONFIG_RT_USING_RT_LINK is not set
+# end of Utilities
+
 # CONFIG_RT_USING_VBUS is not set
 
+#
+# Using USB legacy version
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+# end of Using USB legacy version
+
+# CONFIG_RT_USING_FDT is not set
+# end of RT-Thread Components
+
 #
 # RT-Thread Utestcases
 #
 # CONFIG_RT_USING_UTESTCASES is not set
+# end of RT-Thread Utestcases
 
 #
 # RT-Thread online packages
@@ -246,7 +376,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
 # CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
 # CONFIG_PKG_USING_UMQTT is not set
@@ -259,6 +388,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
 # CONFIG_PKG_USING_NANOPB is not set
+# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
 
 #
 # Wi-Fi
@@ -268,27 +398,35 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # Marvell WiFi
 #
 # CONFIG_PKG_USING_WLANMARVELL is not set
+# end of Marvell WiFi
 
 #
 # Wiced WiFi
 #
 # CONFIG_PKG_USING_WLAN_WICED is not set
+# end of Wiced WiFi
+
 # CONFIG_PKG_USING_RW007 is not set
 
 #
 # CYW43012 WiFi
 #
 # CONFIG_PKG_USING_WLAN_CYW43012 is not set
+# end of CYW43012 WiFi
 
 #
 # BL808 WiFi
 #
 # CONFIG_PKG_USING_WLAN_BL808 is not set
+# end of BL808 WiFi
 
 #
 # CYW43439 WiFi
 #
 # CONFIG_PKG_USING_WLAN_CYW43439 is not set
+# end of CYW43439 WiFi
+# end of Wi-Fi
+
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
@@ -311,6 +449,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
 # CONFIG_PKG_USING_JOYLINK is not set
 # CONFIG_PKG_USING_IOTSHARP_SDK is not set
+# end of IoT Cloud
+
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
@@ -353,6 +493,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ZEPHYR_POLLING is not set
 # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
 # CONFIG_PKG_USING_LHC_MODBUS is not set
+# CONFIG_PKG_USING_QMODBUS is not set
+# end of IoT - internet of things
 
 #
 # security packages
@@ -363,6 +505,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
 # CONFIG_PKG_USING_YD_CRYPTO is not set
+# end of security packages
 
 #
 # language packages
@@ -378,18 +521,22 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_AGILE_JSMN is not set
 # CONFIG_PKG_USING_PARSON is not set
+# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
 
 #
 # XML: Extensible Markup Language
 #
 # CONFIG_PKG_USING_SIMPLE_XML is not set
 # CONFIG_PKG_USING_EZXML is not set
+# end of XML: Extensible Markup Language
+
 # CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
 # CONFIG_PKG_USING_PIKASCRIPT is not set
 # CONFIG_PKG_USING_RTT_RUST is not set
+# end of language packages
 
 #
 # multimedia packages
@@ -401,12 +548,15 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_LVGL is not set
 # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
 # CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
+# end of LVGL: powerful and easy-to-use embedded GUI library
 
 #
 # u8g2: a monochrome graphic library
 #
 # CONFIG_PKG_USING_U8G2_OFFICIAL is not set
 # CONFIG_PKG_USING_U8G2 is not set
+# end of u8g2: a monochrome graphic library
+
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
@@ -427,6 +577,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_GUIENGINE is not set
 # CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_3GPP_AMRNB is not set
+# end of multimedia packages
 
 #
 # tools packages
@@ -476,6 +627,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_VOFA_PLUS is not set
 # CONFIG_PKG_USING_RT_TRACE is not set
 # CONFIG_PKG_USING_ZDEBUG is not set
+# end of tools packages
 
 #
 # system packages
@@ -487,6 +639,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_RT_MEMCPY_CM is not set
 # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
 # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
+# end of enhanced kernel services
+
+# CONFIG_PKG_USING_AUNITY is not set
 
 #
 # acceleration: Assembly language or algorithmic acceleration packages
@@ -494,6 +649,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
 # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
 # CONFIG_PKG_USING_QFPLIB_M3 is not set
+# end of acceleration: Assembly language or algorithmic acceleration packages
 
 #
 # CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
@@ -504,6 +660,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_CMSIS_NN is not set
 # CONFIG_PKG_USING_CMSIS_RTOS1 is not set
 # CONFIG_PKG_USING_CMSIS_RTOS2 is not set
+# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
 
 #
 # Micrium: Micrium software products porting for RT-Thread
@@ -514,6 +671,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_UC_CLK is not set
 # CONFIG_PKG_USING_UC_COMMON is not set
 # CONFIG_PKG_USING_UC_MODBUS is not set
+# end of Micrium: Micrium software products porting for RT-Thread
+
 # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
 # CONFIG_PKG_USING_LITEOS_SDK is not set
 # CONFIG_PKG_USING_TZ_DATABASE is not set
@@ -561,6 +720,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_RTP is not set
 # CONFIG_PKG_USING_REB is not set
 # CONFIG_PKG_USING_R_RHEALSTONE is not set
+# end of system packages
 
 #
 # peripheral libraries and drivers
@@ -573,9 +733,27 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # STM32 HAL & SDK Drivers
 #
-# CONFIG_PKG_USING_STM32L4XX_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
 # CONFIG_PKG_USING_STM32WB55_SDK is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
+# end of STM32 HAL & SDK Drivers
+
+#
+# Infineon HAL Packages
+#
+# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
+# CONFIG_PKG_USING_INFINEON_CMSIS is not set
+# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
+# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
+# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
+# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
+# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
+# CONFIG_PKG_USING_INFINEON_USBDEV is not set
+# end of Infineon HAL Packages
+
 # CONFIG_PKG_USING_BLUETRUM_SDK is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
 # CONFIG_PKG_USING_ESP_IDF is not set
@@ -585,9 +763,12 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # CONFIG_PKG_USING_K210_SDK is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# end of Kendryte SDK
+
 # CONFIG_PKG_USING_NRF5X_SDK is not set
 # CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
+# end of HAL & SDK Drivers
 
 #
 # sensors drivers
@@ -657,6 +838,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_PAJ7620 is not set
 # CONFIG_PKG_USING_STHS34PF80 is not set
+# end of sensors drivers
 
 #
 # touch drivers
@@ -671,6 +853,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_XPT2046_TOUCH is not set
 # CONFIG_PKG_USING_CST816X is not set
 # CONFIG_PKG_USING_CST812T is not set
+# end of touch drivers
+
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
@@ -743,6 +927,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_BT_MX01 is not set
 # CONFIG_PKG_USING_RGPOWER is not set
 # CONFIG_PKG_USING_SPI_TOOLS is not set
+# end of peripheral libraries and drivers
 
 #
 # AI packages
@@ -757,15 +942,18 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_QUEST is not set
 # CONFIG_PKG_USING_NAXOS is not set
 # CONFIG_PKG_USING_R_TINYMAIX is not set
+# end of AI packages
 
 #
 # Signal Processing and Control Algorithm Packages
 #
+# CONFIG_PKG_USING_APID is not set
 # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
 # CONFIG_PKG_USING_QPID is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_KISSFFT is not set
+# end of Signal Processing and Control Algorithm Packages
 
 #
 # miscellaneous packages
@@ -774,6 +962,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # project laboratory
 #
+# end of project laboratory
 
 #
 # samples: kernel and components samples
@@ -782,6 +971,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
 # CONFIG_PKG_USING_NETWORK_SAMPLES is not set
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# end of samples: kernel and components samples
 
 #
 # entertainment: terminal games and other interesting software packages
@@ -798,6 +988,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_MORSE is not set
 # CONFIG_PKG_USING_TINYSQUARE is not set
+# end of entertainment: terminal games and other interesting software packages
+
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
@@ -831,6 +1023,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_SOEM is not set
 # CONFIG_PKG_USING_QPARAM is not set
 # CONFIG_PKG_USING_CorevMCU_CLI is not set
+# end of miscellaneous packages
 
 #
 # Arduino libraries
@@ -846,6 +1039,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
 # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
 # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
+# end of Projects and Demos
 
 #
 # Sensors
@@ -985,6 +1179,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
 # CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set
+# end of Sensors
 
 #
 # Display
@@ -996,6 +1192,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
 # CONFIG_PKG_USING_SEEED_TM1637 is not set
+# end of Display
 
 #
 # Timing
@@ -1004,6 +1201,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
 # CONFIG_PKG_USING_ARDUINO_TICKER is not set
 # CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
+# end of Timing
 
 #
 # Data Processing
@@ -1011,6 +1209,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set
 # CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set
 # CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set
+# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set
+# end of Data Processing
 
 #
 # Data Storage
@@ -1021,6 +1221,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set
+# end of Communication
 
 #
 # Device Control
@@ -1032,12 +1233,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
+# end of Device Control
 
 #
 # Other
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
+# end of Other
 
 #
 # Signal IO
@@ -1050,10 +1253,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set
+# end of Signal IO
 
 #
 # Uncategorized
 #
+# end of Arduino libraries
+# end of RT-Thread online packages
+
 CONFIG_SOC_FAMILY_HC32=y
 CONFIG_SOC_SERIES_HC32F4=y
 
@@ -1066,11 +1273,13 @@ CONFIG_SOC_HC32F460PE=y
 # On-chip Drivers
 #
 CONFIG_BSP_USING_ON_CHIP_FLASH_CACHE=y
+# end of On-chip Drivers
 
 #
 # Onboard Peripheral Drivers
 #
 # CONFIG_BSP_USING_SPI_FLASH is not set
+# end of Onboard Peripheral Drivers
 
 #
 # On-chip Peripheral Drivers
@@ -1083,7 +1292,14 @@ CONFIG_BSP_USING_UART=y
 CONFIG_BSP_USING_UART4=y
 # CONFIG_BSP_UART4_RX_USING_DMA is not set
 # CONFIG_BSP_UART4_TX_USING_DMA is not set
-# CONFIG_BSP_USING_I2C is not set
+CONFIG_BSP_USING_I2C=y
+# CONFIG_BSP_USING_I2C1_SW is not set
+CONFIG_BSP_USING_I2C_HW=y
+# CONFIG_BSP_USING_I2C1 is not set
+# CONFIG_BSP_USING_I2C2 is not set
+CONFIG_BSP_USING_I2C3=y
+# CONFIG_BSP_I2C3_TX_USING_DMA is not set
+# CONFIG_BSP_I2C3_RX_USING_DMA is not set
 # CONFIG_BSP_USING_ON_CHIP_FLASH is not set
 # CONFIG_BSP_USING_SPI is not set
 # CONFIG_BSP_USING_ADC is not set
@@ -1098,7 +1314,10 @@ CONFIG_BSP_USING_UART4=y
 # CONFIG_BSP_USING_QSPI is not set
 # CONFIG_BSP_USING_PULSE_ENCODER is not set
 # CONFIG_BSP_USING_HWTIMER is not set
+# CONFIG_BSP_USING_INPUT_CAPTURE is not set
+# end of On-chip Peripheral Drivers
 
 #
 # Board extended module Drivers
 #
+# end of Hardware Drivers Config

bsp/hc32/ev_hc32f460_lqfp100_v2/.project

@@ -64,5 +64,15 @@
       <type>2</type>
       <locationURI>$%7BPARENT-1-PROJECT_LOC%7D/libraries</locationURI>
     </link>
+    <link>
+      <name>rt-thread/bsp/hc32/platform</name>
+      <type>2</type>
+      <locationURI>PARENT-1-PROJECT_LOC/platform</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/bsp/hc32/tests</name>
+      <type>2</type>
+      <locationURI>PARENT-1-PROJECT_LOC/tests</locationURI>
+    </link>
   </linkedResources>
 </projectDescription>

bsp/hc32/ev_hc32f460_lqfp100_v2/README.md

@@ -29,39 +29,37 @@ EV_F460_LQ100_V2 开发板常用 **板载资源** 如下：
 - 常用接口: USB转串口、SD卡接口、USB FS、3.5mm耳机接口、Line in接口、喇叭接口
 - 调试接口: 板载DAP调试器、标准JTAG/SWD
 
-开发板更多详细信息请参考小华半导体半导体[EV_F460_LQ100_V2](http://www.xhsc.com.cn)
+开发板更多详细信息请参考小华半导体半导体[EV_F460_LQ100_V2](https://www.xhsc.com.cn)
 
 ## 外设支持
 
 本 BSP 目前对外设的支持情况如下：
 
-| **板载外设**  | **支持情况** |               **备注**                |
-| :------------ | :-----------: | :-----------------------------------: |
-| USB 转串口    |      支持     |          使用 UART4                  |
-| LED           |     支持     |           LED                   |
-
-| **片上外设**   | **支持情况** |               **备注**                |
-| :------------ | :-----------: | :-----------------------------------: |
-| ADC           |     支持     | 				ADC1~2					  |
-| CAN           |     支持     |              CAN1                    |
-| GPIO          |     支持     | PA0, PA1... PH2 ---> PIN: 0, 1...82  |
-| I2C           |     支持     | 软件 								  |
-| UART          |     支持     |              UART1~4                 |
+| **板载外设** | **支持情况** | **备注**   |
+|:-------- |:--------:|:--------:|
+| USB 转串口  | 支持       | 使用 UART4 |
+| LED      | 支持       | LED      |
 
+| **片上外设** | **支持情况** | **备注**                              |
+|:-------- |:--------:|:-----------------------------------:|
+| ADC      | 支持       | ADC1~2                              |
+| CAN      | 支持       | CAN1                                |
+| GPIO     | 支持       | PA0, PA1... PH2 ---> PIN: 0, 1...82 |
+| I2C      | 支持       | 软件                                  |
+| UART     | 支持       | UART1~4                             |
 
 ## 使用说明
 
 使用说明分为如下两个章节：
 
 - 快速上手
-
+  
     本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
 
 - 进阶使用
-
+  
     本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
 
-
 ### 快速上手
 
 本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
@@ -104,8 +102,14 @@ msh >
 
 ## 注意事项
 
+| 板载外设 | 模式   | 注意事项                                                     |
+| -------- | ------ | ------------------------------------------------------------ |
+| USB      | device | 由于RTT抽象层的设计，当配置为CDC设备时，打开USB虚拟串口，需使能流控的DTR信号。（如使用SSCOM串口助手打开USB虚拟串口时，勾选DTR选框） |
+| USB      | host   | 若配置为U盘主机模式，出现部分U盘无法识别或者写入失败时，可以尝试将RTT抽象层中rt_udisk_run()函数的rt_usbh_storage_reset()操作注释掉，测试是否可以获得更好的兼容性。 |
+| USB      | host   | 目前仅实现并测试了对U盘的支持。                              |
+
 ## 联系人信息
 
 维护人:
 
--  [小华半导体MCU](https://www.xhsc.com.cn)，邮箱：<mcu_eco@xhsc.com.cn>
+- [小华半导体MCU](https://www.xhsc.com.cn)，邮箱：<xhsc_ae_cd_ap@xhsc.com.cn>

bsp/hc32/ev_hc32f460_lqfp100_v2/SConstruct

@@ -56,7 +56,13 @@ objs.extend(SConscript(os.path.join(libraries_path_prefix, hc32_library, 'SConsc
 # include drivers
 objs.extend(SConscript(os.path.join(libraries_path_prefix, 'hc32_drivers', 'SConscript')))
 
-objs.extend(SConscript(os.path.join(os.getcwd(), 'board', 'ports', 'SConscript')))
+# include platform
+platform_path_prefix = os.path.dirname(SDK_ROOT) + '/platform'
+objs.extend(SConscript(os.path.join(platform_path_prefix, 'SConscript')))
+
+# include tests
+test_path_prefix = os.path.dirname(SDK_ROOT) + '/tests'
+objs.extend(SConscript(os.path.join(test_path_prefix, 'SConscript')))
 
 # make a building
 DoBuilding(TARGET, objs)

bsp/hc32/ev_hc32f460_lqfp100_v2/applications/xtal32_fcm.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2023-10-27     CDT          first version
+ * 2024-06-13     CDT          modify FCM lower/upper margin to 10%
  */
 
 /*******************************************************************************
@@ -40,8 +41,8 @@ void xtal32_fcm_thread_entry(void *parameter)
     stcFcmInit.u32RefClockEdge   = FCM_REF_CLK_RISING;
     stcFcmInit.u32TargetClock    = FCM_TARGET_CLK_XTAL32;
     stcFcmInit.u32TargetClockDiv = FCM_TARGET_CLK_DIV1;
-    stcFcmInit.u16LowerLimit     = (uint16_t)((XTAL32_VALUE / (MRC_VALUE / 8192U)) * 96UL / 100UL);
-    stcFcmInit.u16UpperLimit     = (uint16_t)((XTAL32_VALUE / (MRC_VALUE / 8192U)) * 104UL / 100UL);
+    stcFcmInit.u16LowerLimit     = (uint16_t)((XTAL32_VALUE / (MRC_VALUE / 8192U)) * 90UL / 100UL);
+    stcFcmInit.u16UpperLimit     = (uint16_t)((XTAL32_VALUE / (MRC_VALUE / 8192U)) * 110UL / 100UL);
     (void)FCM_Init(&stcFcmInit);
     /* Enable FCM, to ensure xtal32 stable */
     FCM_Cmd(ENABLE);

bsp/hc32/ev_hc32f460_lqfp100_v2/board/Kconfig

@@ -162,11 +162,11 @@ menu "On-chip Peripheral Drivers"
                     config BSP_I2C1_SCL_PIN
                         int "i2c1 scl pin number"
                         range 1 100
-                        default 7
+                        default 36
                     config BSP_I2C1_SDA_PIN
                         int "I2C1 sda pin number"
                         range 1 100
-                        default 36
+                        default 7
                 endif
         endif
 
@@ -318,12 +318,22 @@ menu "On-chip Peripheral Drivers"
         default n
         select RT_USING_ADC
         if BSP_USING_ADC
-            config BSP_USING_ADC1
-                bool "using adc1"
+            menuconfig BSP_USING_ADC1
+                bool "Enable ADC1"
                 default n
-            config BSP_USING_ADC2
-                bool "using adc2"
+                if BSP_USING_ADC1
+                    config BSP_ADC1_USING_DMA
+                        bool "using adc1 dma"
+                        default n
+                endif
+            menuconfig BSP_USING_ADC2
+                bool "Enable ADC2"
                 default n
+                if BSP_USING_ADC2
+                    config BSP_ADC2_USING_DMA
+                        bool "using adc2 dma"
+                        default n
+                endif
         endif
 
     menuconfig BSP_USING_CAN
@@ -338,18 +348,17 @@ menu "On-chip Peripheral Drivers"
         endif
 
     menuconfig BSP_USING_WDT_TMR
-        bool "Enable Watchdog Timer"
+        bool "Enable Watchdog Timer: 10.7s(max)"
         default n
         select RT_USING_WDT
         if BSP_USING_WDT_TMR
             config BSP_USING_WDT
-                bool "Using WDT"
+                bool 
+                default y
+
+            config BSP_WDT_CONTINUE_COUNT
+                bool "Low Power Mode Keeps Counting"
                 default n
-                if BSP_USING_WDT
-                    config BSP_WDT_CONTINUE_COUNT
-                        bool "Low Power Mode Keeps Counting"
-                        default n
-                endif
         endif
 
     menuconfig BSP_USING_RTC
@@ -462,26 +471,21 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable timerA output PWM"
                 default n
                 if BSP_USING_PWM_TMRA
-                    menuconfig BSP_USING_PWM_TMRA_4
-                        bool "Enable timerA-4 output PWM"
+                    menuconfig BSP_USING_PWM_TMRA_1
+                        bool "Enable timerA-1 output PWM"
                         default n
-                        if BSP_USING_PWM_TMRA_4
-                            config BSP_USING_PWM_TMRA_4_CH1
-                                bool "Enable timerA-4 channel1"
+                        if BSP_USING_PWM_TMRA_1
+                            config BSP_USING_PWM_TMRA_1_CH1
+                                bool "Enable timerA-1 channel1"
                                 default n
-                            config BSP_USING_PWM_TMRA_4_CH2
-                                bool "Enable timerA-4 channel2"
+                            config BSP_USING_PWM_TMRA_1_CH2
+                                bool "Enable timerA-1 channel2"
                                 default n
-                        endif
-                    menuconfig BSP_USING_PWM_TMRA_5
-                        bool "Enable timerA-5 output PWM"
-                        default n
-                        if BSP_USING_PWM_TMRA_5
-                            config BSP_USING_PWM_TMRA_5_CH1
-                                bool "Enable timerA-5 channel1"
+                            config BSP_USING_PWM_TMRA_1_CH3
+                                bool "Enable timerA-1 channel3"
                                 default n
-                            config BSP_USING_PWM_TMRA_5_CH2
-                                bool "Enable timerA-5 channel2"
+                            config BSP_USING_PWM_TMRA_1_CH4
+                                bool "Enable timerA-1 channel4"
                                 default n
                         endif
                 endif
@@ -631,7 +635,23 @@ menu "On-chip Peripheral Drivers"
                 bool "Use Timer_a6 As The Hw Timer"
                 default n
         endif
-
+    menuconfig BSP_USING_INPUT_CAPTURE
+        bool "Enable Input Capture"
+        default n
+        select RT_USING_INPUT_CAPTURE
+        if BSP_USING_INPUT_CAPTURE
+            menuconfig BSP_USING_INPUT_CAPTURE_TMR6
+                bool "Use Timer6 As The Input Capture"
+                default n
+                if BSP_USING_INPUT_CAPTURE_TMR6
+                    config BSP_USING_INPUT_CAPTURE_TMR6_1
+                        bool "unit 1"
+                    config BSP_USING_INPUT_CAPTURE_TMR6_2
+                        bool "unit 2"
+                    config BSP_USING_INPUT_CAPTURE_TMR6_3
+                        bool "unit 3"
+                endif
+        endif
 endmenu
 
 menu "Board extended module Drivers"

bsp/hc32/ev_hc32f460_lqfp100_v2/board/SConscript

@@ -12,9 +12,6 @@ board.c
 board_config.c
 ''')
 
-if GetDepend(['BSP_USING_SPI_FLASH']):
-    src += Glob('ports/drv_spi_flash.c')
-
 path =  [cwd]
 path += [cwd + '/ports']
 path += [cwd + '/config']
@@ -23,11 +20,11 @@ path += [cwd + '/config/usb_config']
 startup_path_prefix = SDK_LIB
 
 if rtconfig.PLATFORM in ['gcc']:
-    src += [startup_path_prefix + '/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f460.S']
+    src += [startup_path_prefix + '/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/GCC/startup_hc32f460.S']
 elif rtconfig.PLATFORM in ['armcc', 'armclang']:
-    src += [startup_path_prefix + '/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f460.s']
+    src += [startup_path_prefix + '/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/ARM/startup_hc32f460.s']
 elif rtconfig.PLATFORM in ['iccarm']:
-    src += [startup_path_prefix + '/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f460.s']
+    src += [startup_path_prefix + '/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/startup_hc32f460.s']
 
 CPPDEFINES = ['HC32F460', '__DEBUG']
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)

bsp/hc32/ev_hc32f460_lqfp100_v2/board/board.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2022-04-28     CDT          first version
+ * 2024-06-11     CDT          remove CLK_Delay for usb, as it is already included in ddl API
  */
 
 #include "board.h"
@@ -16,28 +17,6 @@
                                          LL_PERIPH_PWC_CLK_RMU | LL_PERIPH_SRAM)
 #define EXAMPLE_PERIPH_WP               (LL_PERIPH_EFM | LL_PERIPH_FCG | LL_PERIPH_SRAM)
 
-#if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
-/**
- * @brief Switch clock stable time
- * @note Approx. 30us
- */
-#define CLK_SYSCLK_SW_STB               (HCLK_VALUE / 50000UL)
-/**
- * @brief Clk delay function
- * @param [in] u32Delay         count
- * @retval when switch clock source, should be delay some time to wait stable.
- */
-static void CLK_Delay(uint32_t u32Delay)
-{
-    __IO uint32_t u32Timeout = 0UL;
-
-    while (u32Timeout < u32Delay)
-    {
-        u32Timeout++;
-    }
-}
-#endif
-
 /** System Base Configuration
 */
 void SystemBase_Config(void)
@@ -136,8 +115,6 @@ void PeripheralClock_Config(void)
 
 #if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
     CLK_SetUSBClockSrc(CLK_USBCLK_PLLXP);
-    /* Wait stable here, since the current DDL API does not include this */
-    CLK_Delay(CLK_SYSCLK_SW_STB);
 #endif
 }
 
@@ -147,5 +124,3 @@ void PeripheralRegister_Unlock(void)
 {
     LL_PERIPH_WE(EXAMPLE_PERIPH_WE);
 }
-
-/*@}*/

bsp/hc32/ev_hc32f460_lqfp100_v2/board/board_config.c

@@ -104,6 +104,7 @@ void CanPhyEnable(void)
     GPIO_ResetPins(CAN1_STB_PORT, CAN1_STB_PIN);
     GPIO_OutputCmd(CAN1_STB_PORT, CAN1_STB_PIN, ENABLE);
 }
+
 rt_err_t rt_hw_board_can_init(CM_CAN_TypeDef *CANx)
 {
     rt_err_t result = RT_EOK;
@@ -207,38 +208,23 @@ rt_err_t rt_hw_board_pwm_tmra_init(CM_TMRA_TypeDef *TMRAx)
     rt_err_t result = RT_EOK;
     switch ((rt_uint32_t)TMRAx)
     {
-#if defined(BSP_USING_PWM_TMRA_4)
-    case (rt_uint32_t)CM_TMRA_4:
-#ifdef BSP_USING_PWM_TMRA_4_CH1
-        GPIO_SetFunc(PWM_TMRA_4_CH1_PORT, PWM_TMRA_4_CH1_PIN, PWM_TMRA_4_CH1_PIN_FUNC);
-#endif
-#ifdef BSP_USING_PWM_TMRA_4_CH2
-        GPIO_SetFunc(PWM_TMRA_4_CH2_PORT, PWM_TMRA_4_CH2_PIN, PWM_TMRA_4_CH2_PIN_FUNC);
-#endif
-#ifdef BSP_USING_PWM_TMRA_4_CH3
-        GPIO_SetFunc(PWM_TMRA_4_CH3_PORT, PWM_TMRA_4_CH3_PIN, PWM_TMRA_4_CH3_PIN_FUNC);
-#endif
-#ifdef BSP_USING_PWM_TMRA_4_CH4
-        GPIO_SetFunc(PWM_TMRA_4_CH4_PORT, PWM_TMRA_4_CH4_PIN, PWM_TMRA_4_CH4_PIN_FUNC);
+#if defined(BSP_USING_PWM_TMRA_1)
+    case (rt_uint32_t)CM_TMRA_1:
+#ifdef BSP_USING_PWM_TMRA_1_CH1
+        GPIO_SetFunc(PWM_TMRA_1_CH1_PORT, PWM_TMRA_1_CH1_PIN, PWM_TMRA_1_CH1_PIN_FUNC);
 #endif
-        break;
-#endif
-#if defined(BSP_USING_PWM_TMRA_5)
-    case (rt_uint32_t)CM_TMRA_5:
-#ifdef BSP_USING_PWM_TMRA_5_CH1
-        GPIO_SetFunc(PWM_TMRA_5_CH1_PORT, PWM_TMRA_5_CH1_PIN, PWM_TMRA_5_CH1_PIN_FUNC);
+#ifdef BSP_USING_PWM_TMRA_1_CH2
+        GPIO_SetFunc(PWM_TMRA_1_CH2_PORT, PWM_TMRA_1_CH2_PIN, PWM_TMRA_1_CH2_PIN_FUNC);
 #endif
-#ifdef BSP_USING_PWM_TMRA_5_CH2
-        GPIO_SetFunc(PWM_TMRA_5_CH2_PORT, PWM_TMRA_5_CH2_PIN, PWM_TMRA_5_CH2_PIN_FUNC);
+#ifdef BSP_USING_PWM_TMRA_1_CH3
+        GPIO_SetFunc(PWM_TMRA_1_CH3_PORT, PWM_TMRA_1_CH3_PIN, PWM_TMRA_1_CH3_PIN_FUNC);
 #endif
-#ifdef BSP_USING_PWM_TMRA_5_CH3
-        GPIO_SetFunc(PWM_TMRA_5_CH3_PORT, PWM_TMRA_5_CH3_PIN, PWM_TMRA_5_CH3_PIN_FUNC);
-#endif
-#ifdef BSP_USING_PWM_TMRA_5_CH4
-        GPIO_SetFunc(PWM_TMRA_5_CH4_PORT, PWM_TMRA_5_CH4_PIN, PWM_TMRA_5_CH4_PIN_FUNC);
+#ifdef BSP_USING_PWM_TMRA_1_CH4
+        GPIO_SetFunc(PWM_TMRA_1_CH4_PORT, PWM_TMRA_1_CH4_PIN, PWM_TMRA_1_CH4_PIN_FUNC);
 #endif
         break;
 #endif
+
     default:
         result = -RT_ERROR;
         break;
@@ -276,6 +262,7 @@ rt_err_t rt_hw_board_pwm_tmr4_init(CM_TMR4_TypeDef *TMR4x)
 #endif
         break;
 #endif
+
     default:
         result = -RT_ERROR;
         break;
@@ -300,6 +287,7 @@ rt_err_t rt_hw_board_pwm_tmr6_init(CM_TMR6_TypeDef *TMR6x)
 #endif
         break;
 #endif
+
     default:
         result = -RT_ERROR;
         break;
@@ -310,6 +298,35 @@ rt_err_t rt_hw_board_pwm_tmr6_init(CM_TMR6_TypeDef *TMR6x)
 #endif
 #endif
 
+#if defined (BSP_USING_INPUT_CAPTURE)
+rt_err_t rt_hw_board_input_capture_init(uint32_t *tmr_instance)
+{
+    rt_err_t result = RT_EOK;
+
+    switch ((rt_uint32_t)tmr_instance)
+    {
+#if defined (BSP_USING_INPUT_CAPTURE_TMR6_1)
+    case (rt_uint32_t)CM_TMR6_1:
+        GPIO_SetFunc(INPUT_CAPTURE_TMR6_1_PORT, INPUT_CAPTURE_TMR6_1_PIN, GPIO_FUNC_3);
+        break;
+#endif
+#if defined (BSP_USING_INPUT_CAPTURE_TMR6_2)
+    case (rt_uint32_t)CM_TMR6_2:
+        GPIO_SetFunc(INPUT_CAPTURE_TMR6_2_PORT, INPUT_CAPTURE_TMR6_2_PIN, GPIO_FUNC_3);
+        break;
+#endif
+#if defined (BSP_USING_INPUT_CAPTURE_TMR6_3)
+    case (rt_uint32_t)CM_TMR6_3:
+        GPIO_SetFunc(INPUT_CAPTURE_TMR6_3_PORT, INPUT_CAPTURE_TMR6_3_PIN, GPIO_FUNC_3);
+        break;
+#endif
+    default:
+        result = -RT_ERROR;
+        break;
+    }
+    return result;
+}
+#endif
 #ifdef RT_USING_PM
 void rt_hw_board_pm_sysclk_cfg(uint8_t run_mode)
 {
@@ -317,12 +334,12 @@ void rt_hw_board_pm_sysclk_cfg(uint8_t run_mode)
     {
     case PM_RUN_MODE_HIGH_SPEED:
     case PM_RUN_MODE_NORMAL_SPEED:
-        SystemClock_Config();
+        CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
         break;
-
     case PM_RUN_MODE_LOW_SPEED:
+        /* Ensure that system clock less than 8M */
         CLK_SetSysClockSrc(CLK_SYSCLK_SRC_XTAL);
-
+        break;
     default:
         break;
     }
@@ -330,7 +347,7 @@ void rt_hw_board_pm_sysclk_cfg(uint8_t run_mode)
 #endif
 
 #if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
-rt_err_t rt_hw_usb_board_init(void)
+rt_err_t rt_hw_usbfs_board_init(void)
 {
     stc_gpio_init_t stcGpioCfg;
     (void)GPIO_StructInit(&stcGpioCfg);

bsp/hc32/ev_hc32f460_lqfp100_v2/board/board_config.h

@@ -44,6 +44,16 @@
 #endif
 
 /************************ I2C port **********************/
+#if defined(BSP_USING_I2C1)
+    #define I2C1_SDA_PORT                   (GPIO_PORT_A)
+    #define I2C1_SDA_PIN                    (GPIO_PIN_07)
+    #define I2C1_SDA_FUNC                   (GPIO_FUNC_48)
+
+    #define I2C1_SCL_PORT                   (GPIO_PORT_C)
+    #define I2C1_SCL_PIN                    (GPIO_PIN_04)
+    #define I2C1_SCL_FUNC                   (GPIO_FUNC_49)
+#endif
+
 #if defined(BSP_USING_I2C3)
     #define I2C3_SDA_PORT                   (GPIO_PORT_B)
     #define I2C3_SDA_PIN                    (GPIO_PIN_05)
@@ -56,12 +66,12 @@
 
 /***********  ADC configure *********/
 #if defined(BSP_USING_ADC1)
-    #define ADC1_CH_PORT                    (GPIO_PORT_C)
+    #define ADC1_CH_PORT                    (GPIO_PORT_C)   /* Default ADC12_IN10 */
     #define ADC1_CH_PIN                     (GPIO_PIN_00)
 #endif
 
 #if defined(BSP_USING_ADC2)
-    #define ADC2_CH_PORT                    (GPIO_PORT_C)
+    #define ADC2_CH_PORT                    (GPIO_PORT_C)   /* Default ADC12_IN11 */
     #define ADC2_CH_PIN                     (GPIO_PIN_01)
 #endif
 
@@ -141,49 +151,26 @@
 
 #if defined(RT_USING_PWM)
     /***********  PWM_TMRA configure *********/
-    #if defined(BSP_USING_PWM_TMRA_4)
-        #if defined(BSP_USING_PWM_TMRA_4_CH1)
-            #define PWM_TMRA_4_CH1_PORT             (GPIO_PORT_D)
-            #define PWM_TMRA_4_CH1_PIN              (GPIO_PIN_12)
-            #define PWM_TMRA_4_CH1_PIN_FUNC         (GPIO_FUNC_4)
-        #endif
-        #if defined(BSP_USING_PWM_TMRA_4_CH2)
-            #define PWM_TMRA_4_CH2_PORT             (GPIO_PORT_D)
-            #define PWM_TMRA_4_CH2_PIN              (GPIO_PIN_13)
-            #define PWM_TMRA_4_CH2_PIN_FUNC         (GPIO_FUNC_4)
-        #endif
-        #if defined(BSP_USING_PWM_TMRA_4_CH3)
-            #define PWM_TMRA_4_CH3_PORT             (GPIO_PORT_D)
-            #define PWM_TMRA_4_CH3_PIN              (GPIO_PIN_14)
-            #define PWM_TMRA_4_CH3_PIN_FUNC         (GPIO_FUNC_4)
-        #endif
-        #if defined(BSP_USING_PWM_TMRA_4_CH4)
-            #define PWM_TMRA_4_CH4_PORT             (GPIO_PORT_D)
-            #define PWM_TMRA_4_CH4_PIN              (GPIO_PIN_15)
-            #define PWM_TMRA_4_CH4_PIN_FUNC         (GPIO_FUNC_4)
-        #endif
-    #endif
-
-    #if defined(BSP_USING_PWM_TMRA_5)
-        #if defined(BSP_USING_PWM_TMRA_5_CH1)
-            #define PWM_TMRA_5_CH1_PORT             (GPIO_PORT_C)
-            #define PWM_TMRA_5_CH1_PIN              (GPIO_PIN_10)
-            #define PWM_TMRA_5_CH1_PIN_FUNC         (GPIO_FUNC_5)
+    #if defined(BSP_USING_PWM_TMRA_1)
+        #if defined(BSP_USING_PWM_TMRA_1_CH1)
+            #define PWM_TMRA_1_CH1_PORT             (GPIO_PORT_A)
+            #define PWM_TMRA_1_CH1_PIN              (GPIO_PIN_08)
+            #define PWM_TMRA_1_CH1_PIN_FUNC         (GPIO_FUNC_4)
         #endif
-        #if defined(BSP_USING_PWM_TMRA_5_CH2)
-            #define PWM_TMRA_5_CH2_PORT             (GPIO_PORT_C)
-            #define PWM_TMRA_5_CH2_PIN              (GPIO_PIN_11)
-            #define PWM_TMRA_5_CH2_PIN_FUNC         (GPIO_FUNC_5)
+        #if defined(BSP_USING_PWM_TMRA_1_CH2)
+            #define PWM_TMRA_1_CH2_PORT             (GPIO_PORT_A)
+            #define PWM_TMRA_1_CH2_PIN              (GPIO_PIN_09)
+            #define PWM_TMRA_1_CH2_PIN_FUNC         (GPIO_FUNC_4)
         #endif
-        #if defined(BSP_USING_PWM_TMRA_5_CH3)
-            #define PWM_TMRA_5_CH3_PORT             (GPIO_PORT_C)
-            #define PWM_TMRA_5_CH3_PIN              (GPIO_PIN_12)
-            #define PWM_TMRA_5_CH3_PIN_FUNC         (GPIO_FUNC_5)
+        #if defined(BSP_USING_PWM_TMRA_1_CH3)
+            #define PWM_TMRA_1_CH3_PORT             (GPIO_PORT_A)
+            #define PWM_TMRA_1_CH3_PIN              (GPIO_PIN_10)
+            #define PWM_TMRA_1_CH3_PIN_FUNC         (GPIO_FUNC_4)
         #endif
-        #if defined(BSP_USING_PWM_TMRA_5_CH4)
-            #define PWM_TMRA_5_CH4_PORT             (GPIO_PORT_D)
-            #define PWM_TMRA_5_CH4_PIN              (GPIO_PIN_00)
-            #define PWM_TMRA_5_CH4_PIN_FUNC         (GPIO_FUNC_5)
+        #if defined(BSP_USING_PWM_TMRA_1_CH4)
+            #define PWM_TMRA_1_CH4_PORT             (GPIO_PORT_A)
+            #define PWM_TMRA_1_CH4_PIN              (GPIO_PIN_11)
+            #define PWM_TMRA_1_CH4_PIN_FUNC         (GPIO_FUNC_4)
         #endif
     #endif
 
@@ -234,6 +221,25 @@
             #define PWM_TMR6_1_B_PIN_FUNC           (GPIO_FUNC_3)
         #endif
     #endif
+
+#endif
+
+#if defined(BSP_USING_INPUT_CAPTURE)
+    #if defined(BSP_USING_INPUT_CAPTURE_TMR6_1)
+        #define INPUT_CAPTURE_TMR6_1_PORT           (GPIO_PORT_A)
+        #define INPUT_CAPTURE_TMR6_1_PIN            (GPIO_PIN_08)
+        #define INPUT_CAPTURE_TMR6_1_PIN_FUNC       (GPIO_FUNC_3)
+    #endif
+    #if defined(BSP_USING_INPUT_CAPTURE_TMR6_2)
+        #define INPUT_CAPTURE_TMR6_2_PORT           (GPIO_PORT_B)
+        #define INPUT_CAPTURE_TMR6_2_PIN            (GPIO_PIN_02)
+        #define INPUT_CAPTURE_TMR6_2_PIN_FUNC       (GPIO_FUNC_3)
+    #endif
+    #if defined(BSP_USING_INPUT_CAPTURE_TMR6_3)
+        #define INPUT_CAPTURE_TMR6_3_PORT           (GPIO_PORT_A)
+        #define INPUT_CAPTURE_TMR6_3_PIN            (GPIO_PIN_12)
+        #define INPUT_CAPTURE_TMR6_3_PIN_FUNC       (GPIO_FUNC_3)
+    #endif
 #endif
 
 #if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
@@ -241,10 +247,8 @@
         /* USBFS Core*/
         #define USBF_DP_PORT                    (GPIO_PORT_A)
         #define USBF_DP_PIN                     (GPIO_PIN_12)
-        #define USBF_DP_FUNC                    (GPIO_FUNC_10)
         #define USBF_DM_PORT                    (GPIO_PORT_A)
         #define USBF_DM_PIN                     (GPIO_PIN_11)
-        #define USBF_DM_FUNC                    (GPIO_FUNC_10)
         #define USBF_VBUS_PORT                  (GPIO_PORT_A)
         #define USBF_VBUS_PIN                   (GPIO_PIN_09)
         #define USBF_VBUS_FUNC                  (GPIO_FUNC_10)

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/adc_config.h

@@ -28,10 +28,10 @@ extern "C" {
        .data_align                      = ADC_DATAALIGN_RIGHT,                  \
        .eoc_poll_time_max               = 100,                                  \
        .hard_trig_enable                = RT_FALSE,                             \
-       .hard_trig_src                   = ADC_HARDTRIG_ADTRG_PIN,               \
+       .hard_trig_src                   = ADC_HARDTRIG_EVT0,                    \
        .internal_trig0_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig0_comtrg1_enable   = RT_FALSE,                             \
-       .internal_trig0_sel              = EVT_SRC_MAX,                          \
+       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_B,                 \
        .internal_trig1_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig1_comtrg1_enable   = RT_FALSE,                             \
        .internal_trig1_sel              = EVT_SRC_MAX,                          \
@@ -39,6 +39,26 @@ extern "C" {
        .data_reg_auto_clear             = RT_TRUE,                              \
     }
 #endif /* ADC1_INIT_PARAMS */
+
+#if defined (BSP_ADC1_USING_DMA)
+#ifndef ADC1_EOCA_DMA_CONFIG
+#define ADC1_EOCA_DMA_CONFIG                                                    \
+    {                                                                           \
+        .Instance                       = ADC1_EOCA_DMA_INSTANCE,               \
+        .channel                        = ADC1_EOCA_DMA_CHANNEL,                \
+        .clock                          = ADC1_EOCA_DMA_CLOCK,                  \
+        .trigger_select                 = ADC1_EOCA_DMA_TRIG_SELECT,            \
+        .trigger_event                  = EVT_SRC_ADC1_EOCA,                    \
+        .flag                           = ADC1_EOCA_DMA_TRANS_FLAG,             \
+        .irq_config                     =                                       \
+        {                                                                       \
+            .irq_num                    = ADC1_EOCA_DMA_IRQn,                   \
+            .irq_prio                   = ADC1_EOCA_DMA_INT_PRIO,               \
+            .int_src                    = ADC1_EOCA_DMA_INT_SRC,                \
+        },                                                                      \
+    }
+#endif /* ADC1_EOCA_DMA_CONFIG */
+#endif /* BSP_ADC1_USING_DMA */
 #endif /* BSP_USING_ADC1 */
 
 #ifdef BSP_USING_ADC2
@@ -51,10 +71,10 @@ extern "C" {
        .data_align                      = ADC_DATAALIGN_RIGHT,                  \
        .eoc_poll_time_max               = 100,                                  \
        .hard_trig_enable                = RT_FALSE,                             \
-       .hard_trig_src                   = ADC_HARDTRIG_ADTRG_PIN,               \
+       .hard_trig_src                   = ADC_HARDTRIG_EVT0,                    \
        .internal_trig0_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig0_comtrg1_enable   = RT_FALSE,                             \
-       .internal_trig0_sel              = EVT_SRC_MAX,                          \
+       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_B,                 \
        .internal_trig1_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig1_comtrg1_enable   = RT_FALSE,                             \
        .internal_trig1_sel              = EVT_SRC_MAX,                          \
@@ -62,6 +82,26 @@ extern "C" {
        .data_reg_auto_clear             = RT_TRUE,                              \
     }
 #endif /* ADC2_INIT_PARAMS */
+
+#if defined (BSP_ADC2_USING_DMA)
+#ifndef ADC2_EOCA_DMA_CONFIG
+#define ADC2_EOCA_DMA_CONFIG                                                    \
+    {                                                                           \
+        .Instance                       = ADC2_EOCA_DMA_INSTANCE,               \
+        .channel                        = ADC2_EOCA_DMA_CHANNEL,                \
+        .clock                          = ADC2_EOCA_DMA_CLOCK,                  \
+        .trigger_select                 = ADC2_EOCA_DMA_TRIG_SELECT,            \
+        .trigger_event                  = EVT_SRC_ADC2_EOCA,                    \
+        .flag                           = ADC2_EOCA_DMA_TRANS_FLAG,             \
+        .irq_config                     =                                       \
+        {                                                                       \
+            .irq_num                    = ADC2_EOCA_DMA_IRQn,                   \
+            .irq_prio                   = ADC2_EOCA_DMA_INT_PRIO,               \
+            .int_src                    = ADC2_EOCA_DMA_INT_SRC,                \
+        },                                                                      \
+    }
+#endif /* ADC2_EOCA_DMA_CONFIG */
+#endif /* BSP_ADC2_USING_DMA */
 #endif /* BSP_USING_ADC2 */
 
 #ifdef __cplusplus

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/can_config.h

@@ -19,10 +19,6 @@ extern "C" {
 #endif
 
 #ifdef BSP_USING_CAN1
-#define CAN1_CLOCK_SEL                  (CAN_CLOCK_SRC_40M)
-#ifdef RT_CAN_USING_CANFD
-#define CAN1_CANFD_MODE                 (CAN_FD_MD_ISO)
-#endif
 #define CAN1_NAME                       ("can1")
 #ifndef CAN1_INIT_PARAMS
 #define CAN1_INIT_PARAMS                                    \
@@ -40,51 +36,51 @@ extern "C" {
   TQ = u32Prescaler / CANClock.
   Bit time = (u32TimeSeg2 + u32TimeSeg2) x TQ.
 
-  The following bit time configures are based on CAN Clock 40M
+  The following bit time configures are based on CAN Clock 8M
 */
 #define CAN_BIT_TIME_CONFIG_1M_BAUD                         \
     {                                                       \
-        .u32Prescaler = 2,                                  \
-        .u32TimeSeg1 = 16,                                  \
-        .u32TimeSeg2 = 4,                                   \
-        .u32SJW = 4                                         \
+        .u32Prescaler = 1,                                  \
+        .u32TimeSeg1 = 6,                                   \
+        .u32TimeSeg2 = 2,                                   \
+        .u32SJW = 2                                         \
     }
 
 #define CAN_BIT_TIME_CONFIG_800K_BAUD                       \
     {                                                       \
-        .u32Prescaler = 2,                                  \
-        .u32TimeSeg1 = 20,                                  \
-        .u32TimeSeg2 = 5,                                   \
-        .u32SJW = 4                                         \
+        .u32Prescaler = 1,                                  \
+        .u32TimeSeg1 = 7,                                   \
+        .u32TimeSeg2 = 3,                                   \
+        .u32SJW = 3                                         \
     }
 
 #define CAN_BIT_TIME_CONFIG_500K_BAUD                       \
     {                                                       \
-        .u32Prescaler = 4,                                  \
-        .u32TimeSeg1 = 16,                                  \
+        .u32Prescaler = 1,                                  \
+        .u32TimeSeg1 = 12,                                  \
         .u32TimeSeg2 = 4,                                   \
         .u32SJW = 4                                         \
     }
 
 #define CAN_BIT_TIME_CONFIG_250K_BAUD                       \
     {                                                       \
-        .u32Prescaler = 8,                                  \
-        .u32TimeSeg1 = 16,                                  \
+        .u32Prescaler = 2,                                  \
+        .u32TimeSeg1 = 12,                                  \
         .u32TimeSeg2 = 4,                                   \
         .u32SJW = 4                                         \
     }
 
 #define CAN_BIT_TIME_CONFIG_125K_BAUD                       \
     {                                                       \
-        .u32Prescaler = 16,                                 \
-        .u32TimeSeg1 = 16,                                  \
+        .u32Prescaler = 4,                                  \
+        .u32TimeSeg1 = 12,                                  \
         .u32TimeSeg2 = 4,                                   \
         .u32SJW = 4                                         \
     }
 
 #define CAN_BIT_TIME_CONFIG_100K_BAUD                       \
     {                                                       \
-        .u32Prescaler = 20,                                 \
+        .u32Prescaler = 4,                                  \
         .u32TimeSeg1 = 16,                                  \
         .u32TimeSeg2 = 4,                                   \
         .u32SJW = 4                                         \
@@ -92,7 +88,7 @@ extern "C" {
 
 #define CAN_BIT_TIME_CONFIG_50K_BAUD                        \
     {                                                       \
-        .u32Prescaler = 40,                                 \
+        .u32Prescaler = 8,                                  \
         .u32TimeSeg1 = 16,                                  \
         .u32TimeSeg2 = 4,                                   \
         .u32SJW = 4                                         \
@@ -100,7 +96,7 @@ extern "C" {
 
 #define CAN_BIT_TIME_CONFIG_20K_BAUD                        \
     {                                                       \
-        .u32Prescaler = 100,                                \
+        .u32Prescaler = 20,                                 \
         .u32TimeSeg1 = 16,                                  \
         .u32TimeSeg2 = 4,                                   \
         .u32SJW = 4                                         \
@@ -108,7 +104,7 @@ extern "C" {
 
 #define CAN_BIT_TIME_CONFIG_10K_BAUD                        \
     {                                                       \
-        .u32Prescaler = 200,                                \
+        .u32Prescaler = 40,                                 \
         .u32TimeSeg1 = 16,                                  \
         .u32TimeSeg2 = 4,                                   \
         .u32SJW = 4                                         \

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/dma_config.h

@@ -133,6 +133,15 @@ extern "C" {
 #define UART3_RX_DMA_IRQn               BSP_DMA1_CH2_IRQ_NUM
 #define UART3_RX_DMA_INT_PRIO           BSP_DMA1_CH2_IRQ_PRIO
 #define UART3_RX_DMA_INT_SRC            INT_SRC_DMA1_TC2
+#elif defined(BSP_ADC1_USING_DMA) && !defined(ADC1_EOCA_DMA_INSTANCE)
+#define ADC1_EOCA_DMA_INSTANCE          CM_DMA1
+#define ADC1_EOCA_DMA_CHANNEL           DMA_CH2
+#define ADC1_EOCA_DMA_CLOCK             (PWC_FCG0_DMA1 | PWC_FCG0_AOS)
+#define ADC1_EOCA_DMA_TRIG_SELECT       AOS_DMA1_2
+#define ADC1_EOCA_DMA_TRANS_FLAG        DMA_FLAG_TC_CH2
+#define ADC1_EOCA_DMA_IRQn              BSP_DMA1_CH2_IRQ_NUM
+#define ADC1_EOCA_DMA_INT_PRIO          BSP_DMA1_CH2_IRQ_PRIO
+#define ADC1_EOCA_DMA_INT_SRC           INT_SRC_DMA1_TC2
 #endif
 
 /* DMA1 ch3 */
@@ -202,6 +211,15 @@ extern "C" {
 #define UART1_TX_DMA_IRQn               BSP_DMA2_CH0_IRQ_NUM
 #define UART1_TX_DMA_INT_PRIO           BSP_DMA2_CH0_IRQ_PRIO
 #define UART1_TX_DMA_INT_SRC            INT_SRC_DMA2_TC0
+#elif defined(BSP_ADC2_USING_DMA) && !defined(ADC2_EOCA_DMA_INSTANCE)
+#define ADC2_EOCA_DMA_INSTANCE          CM_DMA2
+#define ADC2_EOCA_DMA_CHANNEL           DMA_CH0
+#define ADC2_EOCA_DMA_CLOCK             (PWC_FCG0_DMA2 | PWC_FCG0_AOS)
+#define ADC2_EOCA_DMA_TRIG_SELECT       AOS_DMA2_0
+#define ADC2_EOCA_DMA_TRANS_FLAG        DMA_FLAG_TC_CH0
+#define ADC2_EOCA_DMA_IRQn              BSP_DMA2_CH0_IRQ_NUM
+#define ADC2_EOCA_DMA_INT_PRIO          BSP_DMA2_CH0_IRQ_PRIO
+#define ADC2_EOCA_DMA_INT_SRC           INT_SRC_DMA2_TC0
 #endif
 
 /* DMA2 ch1 */

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/irq_config.h

@@ -205,8 +205,8 @@ extern "C" {
 #endif/* RT_USING_ALARM */
 
 #if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
-#define BSP_USB_GLB_IRQ_NUM             INT003_IRQn
-#define BSP_USB_GLB_IRQ_PRIO            DDL_IRQ_PRIO_DEFAULT
+#define BSP_USBFS_GLB_IRQ_NUM           INT003_IRQn
+#define BSP_USBFS_GLB_IRQ_PRIO          DDL_IRQ_PRIO_DEFAULT
 #endif/* BSP_USING_USBD */
 
 #if defined (BSP_USING_QSPI)
@@ -214,12 +214,67 @@ extern "C" {
 #define BSP_QSPI_ERR_IRQ_PRIO           DDL_IRQ_PRIO_DEFAULT
 #endif /* BSP_USING_QSPI */
 
+#if defined(BSP_USING_TMRA_1)
+#define BSP_USING_TMRA_1_IRQ_NUM        INT080_IRQn
+#define BSP_USING_TMRA_1_IRQ_PRIO       DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_TMRA_1 */
+#if defined(BSP_USING_TMRA_2)
+#define BSP_USING_TMRA_2_IRQ_NUM        INT081_IRQn
+#define BSP_USING_TMRA_2_IRQ_PRIO       DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_TMRA_2 */
+#if defined(BSP_USING_TMRA_3)
+#define BSP_USING_TMRA_3_IRQ_NUM        INT082_IRQn
+#define BSP_USING_TMRA_3_IRQ_PRIO       DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_TMRA_3 */
+#if defined(BSP_USING_TMRA_4)
+#define BSP_USING_TMRA_4_IRQ_NUM        INT083_IRQn
+#define BSP_USING_TMRA_4_IRQ_PRIO       DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_TMRA_4 */
+#if defined(BSP_USING_TMRA_5)
+#define BSP_USING_TMRA_5_IRQ_NUM        INT084_IRQn
+#define BSP_USING_TMRA_5_IRQ_PRIO       DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_TMRA_5 */
+#if defined(BSP_USING_TMRA_6)
+#define BSP_USING_TMRA_6_IRQ_NUM        INT085_IRQn
+#define BSP_USING_TMRA_6_IRQ_PRIO       DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_TMRA_6 */
+
 #if defined(BSP_USING_PULSE_ENCODER_TMRA_1)
 #define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM   INT080_IRQn
 #define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
 #define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM   INT081_IRQn
 #define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
 #endif/* BSP_USING_PULSE_ENCODER_TMRA_1 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_2)
+#define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM   INT082_IRQn
+#define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM   INT083_IRQn
+#define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_2 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_3)
+#define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM   INT084_IRQn
+#define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM   INT085_IRQn
+#define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_3 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_4)
+#define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM   INT080_IRQn
+#define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM   INT081_IRQn
+#define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_4 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_5)
+#define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM   INT082_IRQn
+#define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM   INT083_IRQn
+#define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_5 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_6)
+#define BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM   INT084_IRQn
+#define BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM   INT085_IRQn
+#define BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_6 */
 
 #if defined(BSP_USING_PULSE_ENCODER_TMR6_1)
 #define BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM   INT050_IRQn
@@ -227,6 +282,18 @@ extern "C" {
 #define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM   INT051_IRQn
 #define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
 #endif/* BSP_USING_PULSE_ENCODER_TMR6_1 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_2)
+#define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM   INT052_IRQn
+#define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM   INT053_IRQn
+#define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_2 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_3)
+#define BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM   INT054_IRQn
+#define BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM   INT055_IRQn
+#define BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_3 */
 
 #if defined(BSP_USING_TMR0_1A)
 #define BSP_USING_TMR0_1A_IRQ_NUM       INT046_IRQn
@@ -245,6 +312,23 @@ extern "C" {
 #define BSP_USING_TMR0_2B_IRQ_PRIO      DDL_IRQ_PRIO_DEFAULT
 #endif/* BSP_USING_TMR0_2B */
 
+#if defined(BSP_USING_INPUT_CAPTURE)
+#define BSP_INPUT_CAPTURE_TMR6_1_OVF_IRQ_NUM                (INT012_IRQn)
+#define BSP_INPUT_CAPTURE_TMR6_1_OVF_IRQ_PRIO               (DDL_IRQ_PRIO_DEFAULT)
+#define BSP_INPUT_CAPTURE_TMR6_1_CAP_IRQ_NUM                (INT013_IRQn)
+#define BSP_INPUT_CAPTURE_TMR6_1_CAP_IRQ_PRIO               (DDL_IRQ_PRIO_DEFAULT)
+
+#define BSP_INPUT_CAPTURE_TMR6_2_OVF_IRQ_NUM                (INT014_IRQn)
+#define BSP_INPUT_CAPTURE_TMR6_2_OVF_IRQ_PRIO               (DDL_IRQ_PRIO_DEFAULT)
+#define BSP_INPUT_CAPTURE_TMR6_2_CAP_IRQ_NUM                (INT015_IRQn)
+#define BSP_INPUT_CAPTURE_TMR6_2_CAP_IRQ_PRIO               (DDL_IRQ_PRIO_DEFAULT)
+
+#define BSP_INPUT_CAPTURE_TMR6_3_OVF_IRQ_NUM                (INT016_IRQn)
+#define BSP_INPUT_CAPTURE_TMR6_3_OVF_IRQ_PRIO               (DDL_IRQ_PRIO_DEFAULT)
+#define BSP_INPUT_CAPTURE_TMR6_3_CAP_IRQ_NUM                (INT017_IRQn)
+#define BSP_INPUT_CAPTURE_TMR6_3_CAP_IRQ_PRIO               (DDL_IRQ_PRIO_DEFAULT)
+#endif
+
 #ifdef __cplusplus
 }
 #endif

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/pm_config.h

@@ -6,6 +6,8 @@
  * Change Logs:
  * Date           Author       Notes
  * 2023-05-12     CDT          first version
+ * 2024-06-13     CDT          disable pm tickless timer
+ *                             delete member u16ExBusHold of PM_SLEEP_DEEP_CFG
  */
 
 #ifndef __PM_CONFIG_H__
@@ -21,9 +23,7 @@ extern "C" {
 extern void rt_hw_board_pm_sysclk_cfg(uint8_t run_mode);
 
 #ifndef PM_TICKLESS_TIMER_ENABLE_MASK
-#define PM_TICKLESS_TIMER_ENABLE_MASK                                          \
-(   (1UL << PM_SLEEP_MODE_IDLE)  |                                             \
-    (1UL << PM_SLEEP_MODE_DEEP))
+#define PM_TICKLESS_TIMER_ENABLE_MASK           (0UL)
 #endif
 
 /**
@@ -55,7 +55,6 @@ extern void rt_hw_board_pm_sysclk_cfg(uint8_t run_mode);
     {                                                                          \
         .u16Clock = PWC_STOP_CLK_KEEP,                                         \
         .u8StopDrv = PWC_STOP_DRV_HIGH,                                        \
-        .u16ExBusHold = PWC_STOP_EXBUS_HIZ,                                    \
         .u16FlashWait = PWC_STOP_FLASH_WAIT_ON,                                \
     },                                                                         \
     .pwc_stop_type = PWC_STOP_WFE_INT,                                         \

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/pulse_encoder_config.h

@@ -24,7 +24,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_1_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_1,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_1,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_1,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -32,12 +32,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_1_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_1_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_1_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_1_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue      = 1000UL,                                           \
        .name                = "pulse_a1"                                        \
@@ -50,7 +50,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_2_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_2,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_2,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_2,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -58,12 +58,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_2_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_2_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_2_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_2_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a2"                                            \
@@ -76,7 +76,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_3_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_3,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_3,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_3,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -84,12 +84,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_3_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_3_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_3_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_3_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a3"                                            \
@@ -102,7 +102,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_4_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_4,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_4,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_4,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -110,12 +110,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_4_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_4_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_4_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_4_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a4"                                            \
@@ -128,7 +128,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_5_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_5,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_5,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_5,                                   \
        .hw_count =                                                              \
         {                                                                       \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -136,12 +136,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_5_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_5_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_5_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_5_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a5"                                            \
@@ -154,7 +154,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_6_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_6,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_6,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_6,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -162,12 +162,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_6_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_6_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_6_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_6_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a6"                                            \
@@ -180,7 +180,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_1_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_1,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_1,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_1,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -188,12 +188,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_1_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_1_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_1_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_1_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_61"                                            \
@@ -206,7 +206,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_2_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_2,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_2,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_2,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -214,12 +214,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_2_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_2_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_2_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_2_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_62"                                            \
@@ -232,7 +232,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_3_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_3,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_3,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_3,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -240,12 +240,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_3_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_3_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_3_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_3_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_63"                                            \

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/tmr_capture_config.h

@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-01-10     CDT          first version
+ */
+
+#ifndef __IC_CONFIG_H__
+#define __IC_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined (BSP_USING_INPUT_CAPTURE_TMR6_1)
+#define IC1_NAME "ic1"
+#define INPUT_CAPTURE_CFG_TMR6_1                                                \
+{                                                                               \
+    .name = IC1_NAME,                                                           \
+    .ch = TMR6_CH_A,                                                            \
+    .clk_div = TMR6_CLK_DIV4,                                                   \
+    .first_edge = TMR6_CAPT_COND_PWMA_FALLING,                                  \
+    .irq_num_cap = BSP_INPUT_CAPTURE_TMR6_1_CAP_IRQ_NUM,                        \
+    .irq_prio_cap = BSP_INPUT_CAPTURE_TMR6_1_CAP_IRQ_PRIO,                      \
+    .irq_num_ovf = BSP_INPUT_CAPTURE_TMR6_1_OVF_IRQ_NUM,                        \
+    .irq_prio_ovf = BSP_INPUT_CAPTURE_TMR6_1_OVF_IRQ_PRIO,                      \
+}
+#endif
+
+#if defined (BSP_USING_INPUT_CAPTURE_TMR6_2)
+#define IC2_NAME "ic2"
+#define INPUT_CAPTURE_CFG_TMR6_2                                                \
+{                                                                               \
+    .name = IC2_NAME,                                                           \
+    .ch = TMR6_CH_A,                                                            \
+    .clk_div = TMR6_CLK_DIV8,                                                   \
+    .first_edge = TMR6_CAPT_COND_TRIGB_RISING,                                  \
+    .irq_num_cap = BSP_INPUT_CAPTURE_TMR6_2_CAP_IRQ_NUM,                        \
+    .irq_prio_cap = BSP_INPUT_CAPTURE_TMR6_2_CAP_IRQ_PRIO,                      \
+    .irq_num_ovf = BSP_INPUT_CAPTURE_TMR6_2_OVF_IRQ_NUM,                        \
+    .irq_prio_ovf = BSP_INPUT_CAPTURE_TMR6_2_OVF_IRQ_PRIO,                      \
+}
+#endif
+
+#if defined (BSP_USING_INPUT_CAPTURE_TMR6_3)
+#define IC3_NAME "ic3"
+#define INPUT_CAPTURE_CFG_TMR6_3                                                \
+{                                                                               \
+    .name = IC3_NAME,                                                           \
+    .ch = TMR6_CH_B,                                                            \
+    .clk_div = TMR6_CLK_DIV16,                                                  \
+    .first_edge = TMR6_CAPT_COND_TRIGA_FALLING,                                 \
+    .irq_num_cap = BSP_INPUT_CAPTURE_TMR6_3_CAP_IRQ_NUM,                        \
+    .irq_prio_cap = BSP_INPUT_CAPTURE_TMR6_3_CAP_IRQ_PRIO,                      \
+    .irq_num_ovf = BSP_INPUT_CAPTURE_TMR6_3_OVF_IRQ_NUM,                        \
+    .irq_prio_ovf = BSP_INPUT_CAPTURE_TMR6_3_OVF_IRQ_PRIO,                      \
+}
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __IC_CONFIG_H__ */

bsp/hc32/ev_hc32f460_lqfp100_v2/board/config/uart_config.h

@@ -451,7 +451,7 @@ extern "C" {
         .clock          = UART4_TX_DMA_CLOCK,                   \
         .trigger_select = UART4_TX_DMA_TRIG_SELECT,             \
         .trigger_event  = EVT_SRC_USART4_TI,                    \
-        .flag           = UART1_TX_DMA_TRANS_FLAG,              \
+        .flag           = UART4_TX_DMA_TRANS_FLAG,              \
         .irq_config     =                                       \
         {                                                       \
             .irq_num    = UART4_TX_DMA_IRQn,                    \

bsp/hc32/ev_hc32f460_lqfp100_v2/board/drv_config.h

@@ -30,6 +30,7 @@ extern "C" {
 #include "qspi_config.h"
 #include "pulse_encoder_config.h"
 #include "timer_config.h"
+#include "tmr_capture_config.h"
 
 #ifdef __cplusplus
 }

bsp/hc32/ev_hc32f460_lqfp100_v2/board/hc32f4xx_conf.h

@@ -105,7 +105,7 @@ extern "C"
  * @note  If there is no supported BSP board or the BSP function is not used,
  * the value needs to be set to 0U.
  */
-#define BSP_EV_HC32F4XX                             (BSP_EV_HC32F460_LQFP100_V2)
+#define BSP_EV_HC32F4XX                             (0U)
 
 /**
  * @brief This is the list of BSP components to be used.

bsp/hc32/ev_hc32f460_lqfp100_v2/board/ports/SConscript

@@ -1,12 +0,0 @@
-import os
-from building import *
-
-objs = []
-cwd  = GetCurrentDir()
-
-list = os.listdir(cwd)
-for item in list:
-    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
-        objs = objs + SConscript(os.path.join(item, 'SConscript'))
-
-Return('objs')

bsp/hc32/ev_hc32f460_lqfp100_v2/board/ports/drv_spi_flash.c

@@ -1,121 +0,0 @@
-/*
- * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#include <board.h>
-#include <drv_spi.h>
-#include <rtdevice.h>
-#include <rthw.h>
-#include <finsh.h>
-#include <dfs_fs.h>
-#include <fal.h>
-
-#ifdef BSP_USING_SPI_FLASH
-
-#include "dev_spi_flash.h"
-#ifdef RT_USING_SFUD
-    #include "dev_spi_flash_sfud.h"
-#endif
-
-#define SPI_BUS_NAME                    "spi3"
-#define SPI_FLASH_DEVICE_NAME           "spi30"
-#define SPI_FLASH_CHIP                  "w25q64"
-#define SPI_FLASH_SS_PIN                GET_PIN(C, 7)
-/* Partition Name */
-#define FS_PARTITION_NAME              "filesystem"
-
-#ifdef RT_USING_SFUD
-static void rt_hw_spi_flash_reset(char *spi_dev_name)
-{
-    struct rt_spi_device *spi_dev_w25;
-    rt_uint8_t w25_en_reset = 0x66;
-    rt_uint8_t w25_reset_dev = 0x99;
-
-    spi_dev_w25 = (struct rt_spi_device *)rt_device_find(spi_dev_name);
-    if (!spi_dev_w25)
-    {
-        rt_kprintf("Can't find %s device!\n", spi_dev_name);
-    }
-    else
-    {
-        rt_spi_send(spi_dev_w25, &w25_en_reset, 1U);
-        rt_spi_send(spi_dev_w25, &w25_reset_dev, 1U);
-        DDL_DelayMS(1U);
-        rt_kprintf("Reset ext flash!\n");
-    }
-}
-
-static int rt_hw_spi_flash_with_sfud_init(void)
-{
-    rt_hw_spi_device_attach(SPI_BUS_NAME, SPI_FLASH_DEVICE_NAME, SPI_FLASH_SS_PIN);
-
-    if (RT_NULL == rt_sfud_flash_probe(SPI_FLASH_CHIP, SPI_FLASH_DEVICE_NAME))
-    {
-        rt_hw_spi_flash_reset(SPI_FLASH_DEVICE_NAME);
-        if (RT_NULL == rt_sfud_flash_probe(SPI_FLASH_CHIP, SPI_FLASH_DEVICE_NAME))
-        {
-            return -RT_ERROR;
-        }
-    }
-
-    return RT_EOK;
-}
-INIT_COMPONENT_EXPORT(rt_hw_spi_flash_with_sfud_init);
-
-static int rt_hw_fs_init(void)
-{
-    struct rt_device *mtd_dev = RT_NULL;
-
-    /* 初始化 fal */
-    fal_init();
-    /* 生成 mtd 设备 */
-    mtd_dev = fal_mtd_nor_device_create(FS_PARTITION_NAME);
-    if (!mtd_dev)
-    {
-        LOG_E("Can't create a mtd device on '%s' partition.", FS_PARTITION_NAME);
-        return -RT_ERROR;
-    }
-    else
-    {
-        /* 挂载 littlefs */
-        if (RT_EOK == dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0))
-        {
-            LOG_I("Filesystem initialized!");
-            return RT_EOK;
-        }
-        else
-        {
-            /* 格式化文件系统 */
-            if (RT_EOK == dfs_mkfs("lfs", FS_PARTITION_NAME))
-            {
-                /* 挂载 littlefs */
-                if (RT_EOK == dfs_mount(FS_PARTITION_NAME, "/", "lfs", 0, 0))
-                {
-                    LOG_I("Filesystem initialized!");
-                    return RT_EOK;
-                }
-                else
-                {
-                    LOG_E("Failed to initialize filesystem!");
-                    return -RT_ERROR;
-                }
-            }
-            else
-            {
-                LOG_E("Failed to Format fs!");
-                return -RT_ERROR;
-            }
-        }
-    }
-}
-INIT_APP_EXPORT(rt_hw_fs_init);
-
-#endif /* RT_USING_SFUD */
-
-#endif /* BSP_USING_SPI_FLASH */

bsp/hc32/ev_hc32f460_lqfp100_v2/board/ports/fal/SConscript

@@ -1,20 +0,0 @@
-
-from building import *
-import rtconfig
-
-cwd     = GetCurrentDir()
-
-src = []
-
-src     += Glob('*.c')
-CPPPATH = [cwd]
-LOCAL_CFLAGS = ''
-
-if rtconfig.PLATFORM in ['gcc', 'armclang']:
-    LOCAL_CFLAGS += ' -std=c99'
-elif rtconfig.PLATFORM in ['armcc']:
-    LOCAL_CFLAGS += ' --c99'
-
-group = DefineGroup('FAL', src, depend = ['RT_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS)
-
-Return('group')

bsp/hc32/ev_hc32f460_lqfp100_v2/board/ports/fal/fal_flash_sfud_port.c

@@ -1,84 +0,0 @@
-/*
- * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Change Logs:
- * Date           Author       Notes
- * 2022-04-28     CDT          first version
- */
-
-#include <fal.h>
-
-#include <sfud.h>
-#ifdef RT_USING_SFUD
-    #include <dev_spi_flash_sfud.h>
-#endif
-
-#ifndef FAL_USING_NOR_FLASH_DEV_NAME
-    #define FAL_USING_NOR_FLASH_DEV_NAME            "w25q64"
-#endif
-
-static int init(void);
-static int read(long offset, rt_uint8_t *buf, rt_size_t size);
-static int write(long offset, const rt_uint8_t *buf, rt_size_t size);
-static int erase(long offset, rt_size_t size);
-
-static sfud_flash_t sfud_dev = NULL;
-struct fal_flash_dev ext_nor_flash0 =
-{
-    .name       = FAL_USING_NOR_FLASH_DEV_NAME,
-    .addr       = 0,
-    .len        = 8 * 1024 * 1024,
-    .blk_size   = 4096,
-    .ops        = {init, read, write, erase},
-    .write_gran = 1
-};
-
-static int init(void)
-{
-    /* RT-Thread RTOS platform */
-    sfud_dev = rt_sfud_flash_find_by_dev_name(FAL_USING_NOR_FLASH_DEV_NAME);
-    if (NULL == sfud_dev)
-    {
-        return -1;
-    }
-    /* update the flash chip information */
-    ext_nor_flash0.blk_size = sfud_dev->chip.erase_gran;
-    ext_nor_flash0.len      = sfud_dev->chip.capacity;
-
-    return 0;
-}
-
-static int read(long offset, rt_uint8_t *buf, rt_size_t size)
-{
-    RT_ASSERT(sfud_dev);
-    RT_ASSERT(sfud_dev->init_ok);
-    sfud_read(sfud_dev, ext_nor_flash0.addr + offset, size, buf);
-
-    return size;
-}
-
-static int write(long offset, const rt_uint8_t *buf, rt_size_t size)
-{
-    RT_ASSERT(sfud_dev);
-    RT_ASSERT(sfud_dev->init_ok);
-    if (sfud_write(sfud_dev, ext_nor_flash0.addr + offset, size, buf) != SFUD_SUCCESS)
-    {
-        return -1;
-    }
-
-    return size;
-}
-
-static int erase(long offset, rt_size_t size)
-{
-    RT_ASSERT(sfud_dev);
-    RT_ASSERT(sfud_dev->init_ok);
-    if (sfud_erase(sfud_dev, ext_nor_flash0.addr + offset, size) != SFUD_SUCCESS)
-    {
-        return -1;
-    }
-
-    return size;
-}

bsp/hc32/ev_hc32f460_lqfp100_v2/jlink/ev_hc32f460_lqfp100_v2 Debug.launch

@@ -41,7 +41,7 @@
     <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
     <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
     <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
-    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/GCC/svd/HC32F460.svd"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/../libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/GCC/svd/HC32F460.svd"/>
     <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
     <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
     <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>

bsp/hc32/ev_hc32f460_lqfp100_v2/project.ewd

@@ -44,7 +44,7 @@
                 </option>
                 <option>
                     <name>MemFile</name>
-                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F460.svd</state>
+                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F460.svd</state>
                 </option>
                 <option>
                     <name>RunToEnable</name>
@@ -112,7 +112,7 @@
                 </option>
                 <option>
                     <name>FlashLoadersV3</name>
-                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/config/flashloader/FlashHC32F460xE.board</state>
+                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460xE.board</state>
                 </option>
                 <option>
                     <name>OCImagesSuppressCheck1</name>
@@ -1529,7 +1529,7 @@
                 </option>
                 <option>
                     <name>MemFile</name>
-                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F460.svd</state>
+                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F460.svd</state>
                 </option>
                 <option>
                     <name>RunToEnable</name>
@@ -1597,7 +1597,7 @@
                 </option>
                 <option>
                     <name>FlashLoadersV3</name>
-                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/config/flashloader/FlashHC32F460xE.board</state>
+                    <state>$PROJ_DIR$/../libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/flashloader/FlashHC32F460xE.board</state>
                 </option>
                 <option>
                     <name>OCImagesSuppressCheck1</name>

bsp/hc32/ev_hc32f460_lqfp100_v2/project.ewp

@@ -319,28 +319,31 @@
         <option>
           <name>CCIncludePath2</name>
           <state />
-          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
-          <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
-          <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\cmsis\Include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
-          <state>$PROJ_DIR$\.</state>
-          <state>$PROJ_DIR$\board</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\inc</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\epoll</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
-          <state>$PROJ_DIR$\board\ports</state>
-          <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
-          <state>$PROJ_DIR$\..\..\..\include</state>
           <state>$PROJ_DIR$\board\config\usb_config</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
+          <state>$PROJ_DIR$\board\ports</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\inc</state>
+          <state>$PROJ_DIR$\.</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
+          <state>$PROJ_DIR$\applications</state>
+          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\board\config</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\smp_call</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\cmsis\Device\HDSC\hc32f4xx\Include</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\phy</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\cmsis\Include</state>
+          <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
+          <state>$PROJ_DIR$\..\..\..\include</state>
+          <state>$PROJ_DIR$\board</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
+          <state>$PROJ_DIR$\..\tests</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
         </option>
         <option>
           <name>CCStdIncCheck</name>
@@ -1311,28 +1314,31 @@
         <option>
           <name>CCIncludePath2</name>
           <state />
-          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
-          <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
-          <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\cmsis\Include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
-          <state>$PROJ_DIR$\.</state>
-          <state>$PROJ_DIR$\board</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\inc</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\epoll</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
-          <state>$PROJ_DIR$\board\ports</state>
-          <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
-          <state>$PROJ_DIR$\..\..\..\include</state>
           <state>$PROJ_DIR$\board\config\usb_config</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
+          <state>$PROJ_DIR$\board\ports</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\inc</state>
+          <state>$PROJ_DIR$\.</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
+          <state>$PROJ_DIR$\applications</state>
+          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\board\config</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\smp_call</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\cmsis\Device\HDSC\hc32f4xx\Include</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\phy</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f460_ddl\cmsis\Include</state>
+          <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
+          <state>$PROJ_DIR$\..\..\..\include</state>
+          <state>$PROJ_DIR$\board</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
+          <state>$PROJ_DIR$\..\tests</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
         </option>
         <option>
           <name>CCStdIncCheck</name>
@@ -1987,10 +1993,10 @@
   <group>
     <name>Applications</name>
     <file>
-      <name>$PROJ_DIR$\applications\main.c</name>
+      <name>$PROJ_DIR$\applications\xtal32_fcm.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\applications\xtal32_fcm.c</name>
+      <name>$PROJ_DIR$\applications\main.c</name>
     </file>
   </group>
   <group>
@@ -2047,7 +2053,22 @@
       <name>$PROJ_DIR$\..\..\..\components\drivers\core\device.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_core.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_dev.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion_comm.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion_up.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\condvar.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\dataqueue.c</name>
@@ -2068,10 +2089,10 @@
       <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\workqueue.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\pin\pin.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\pin\dev_pin.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\serial\dev_serial.c</name>
     </file>
   </group>
   <group>
@@ -2083,7 +2104,7 @@
       <name>$PROJ_DIR$\board\board_config.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\IAR\startup_hc32f460.s</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\cmsis\Device\HDSC\hc32f4xx\Source\IAR\startup_hc32f460.s</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_common.c</name>
@@ -2091,9 +2112,15 @@
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_gpio.c</name>
     </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_i2c.c</name>
+    </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_irq.c</name>
     </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_soft_i2c.c</name>
+    </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_usart.c</name>
     </file>
@@ -2101,16 +2128,16 @@
   <group>
     <name>Finsh</name>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\shell.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\msh_parse.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\msh.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\cmd.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\msh_parse.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\shell.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\cmd.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\msh.c</name>
     </file>
   </group>
   <group>
@@ -2122,19 +2149,19 @@
       <name>$PROJ_DIR$\..\..\..\src\components.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\idle.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\cpu_up.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\defunct.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\irq.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\idle.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\klibc\kstdio.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\ipc.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\src\klibc\kstring.c</name>
+      <name>$PROJ_DIR$\..\..\..\src\irq.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
@@ -2161,6 +2188,24 @@
       <name>$PROJ_DIR$\..\..\..\src\timer.c</name>
     </file>
   </group>
+  <group>
+    <name>klibc</name>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\kerrno.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\kstdio.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\kstring.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\rt_vsnprintf_tiny.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\rt_vsscanf.c</name>
+    </file>
+  </group>
   <group>
     <name>libcpu</name>
     <file>
@@ -2182,58 +2227,109 @@
   <group>
     <name>Libraries</name>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_clk.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_emb.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f460.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_aos.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_icg.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f460.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_utility.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_dma.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_fcg.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_sram.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_interrupts.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_gpio.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_pwc.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_dbgc.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_aos.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_fcg.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_sram.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_rmu.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_cmp.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_usart.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_usart.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_efm.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_interrupts.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_gpio.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_i2s.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32f460_ll_interrupts_share.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_mpu.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_rmu.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_tmr0.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_ots.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_dma.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_event_port.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_pwc.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_keyscan.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_icg.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32f460_ll_interrupts_share.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_dcu.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_clk.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_efm.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_utility.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_i2c.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_tmr0.c</name>
     </file>
   </group>
   <group>
     <name>POSIX</name>
   </group>
+  <group>
+    <name>smp</name>
+  </group>
+  <group>
+    <name>Tests</name>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_uart_v1.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_gpio.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_soft_i2c.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_i2c.c</name>
+    </file>
+  </group>
+  <group>
+    <name>utestcases</name>
+  </group>
 </project>

bsp/hc32/ev_hc32f460_lqfp100_v2/project.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -120,7 +120,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>CMSIS_AGDI</Key>
-          <Name>-X"" -O206 -S0 -C0 -P00 -FO7 -FD1FFF8000 -FC1000 -FN2 -FF0HC32F460_512K -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM) -FF1HC32F460_otp -FS13000C00 -FL13FC -FP1($$Device:HC32F460PETB$FlashARM\HC32F460_otp.FLM)</Name>
+          <Name>-X"Any" -UAny -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD1FFF8000 -FC1000 -FN2 -FF0HC32F460_512K.FLM -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM) -FF1HC32F460_otp.FLM -FS13000C00 -FL13FC -FP1($$Device:HC32F460PETB$FlashARM\HC32F460_otp.FLM)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -129,7 +129,7 @@
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
-          <Key>JL2CM3</Key>
+          <Key>CMSIS_AGDI</Key>
           <Name>-U261009725 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST2 -TO18 -TC10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD1FFF8000 -FC1000 -FN1 -FF0HC32F460_512K.FLM -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM)</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>

bsp/hc32/ev_hc32f460_lqfp100_v2/project.uvprojx

@@ -30,7 +30,7 @@
           <SLE66CMisc />
           <SLE66AMisc />
           <SLE66LinkerMisc />
-          <SFDFile>../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F460.SFR</SFDFile>
+          <SFDFile>../libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F460.SFR</SFDFile>
           <bCustSvd>1</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath />
@@ -334,9 +334,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls />
-              <Define>__STDC_LIMIT_MACROS, RT_USING_ARMLIBC, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, HC32F460, USE_DDL_DRIVER, __RTTHREAD__, __DEBUG</Define>
+              <Define>__CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, __STDC_LIMIT_MACROS, HC32F460, __DEBUG, USE_DDL_DRIVER, RT_USING_LIBC, RT_USING_ARMLIBC</Define>
               <Undefine />
-              <IncludePath>..\libraries\hc32f460_ddl\drivers\cmsis\Include;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\libc\compilers\common\extension\fcntl\octal;board\ports;.;board\config\usb_config;..\..\..\components\libc\compilers\common\include;..\..\..\components\finsh;..\..\..\components\drivers\include;board;..\..\..\libcpu\arm\common;..\..\..\components\drivers\include;..\..\..\include;..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\inc;..\..\..\components\libc\posix\io\eventfd;..\..\..\components\libc\posix\io\poll;..\..\..\components\drivers\include;..\libraries\hc32_drivers;applications;..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Include;board\config;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\epoll;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>..\..\..\components\finsh;.;applications;..\..\..\components\drivers\include;..\..\..\libcpu\arm\common;..\..\..\include;board\config;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\compilers\common\extension;..\libraries\hc32f460_ddl\cmsis\Device\HDSC\hc32f4xx\Include;board\config\usb_config;..\..\..\components\libc\compilers\common\include;..\..\..\components\drivers\include;..\libraries\hc32f460_ddl\cmsis\Include;..\..\..\components\drivers\include;board;..\tests;..\..\..\components\libc\posix\io\poll;board\ports;..\..\..\components\libc\posix\io\eventfd;..\..\..\components\libc\posix\ipc;..\..\..\components\libc\posix\io\epoll;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m4;..\libraries\hc32_drivers;..\..\..\components\drivers\include;..\libraries\hc32f460_ddl\hc32_ll_driver\inc;..\..\..\components\drivers\smp_call;..\..\..\components\drivers\phy;..\..\..\components\drivers\include</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -349,7 +349,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <ClangAsOpt>4</ClangAsOpt>
+            <uClangAs>0</uClangAs>
             <VariousControls>
               <MiscControls />
               <Define />
@@ -476,9 +476,104 @@
           </Files>
           <Files>
             <File>
-              <FileName>completion.c</FileName>
+              <FileName>dev_i2c_bit_ops.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
+              <FilePath>..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>dev_i2c_core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\dev_i2c_core.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>dev_i2c_dev.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\dev_i2c_dev.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>completion_comm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\completion_comm.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>completion_up.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\completion_up.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>condvar.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\condvar.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -609,9 +704,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>pin.c</FileName>
+              <FileName>dev_pin.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\pin\pin.c</FilePath>
+              <FilePath>..\..\..\components\drivers\pin\dev_pin.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -628,9 +723,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>serial.c</FileName>
+              <FileName>dev_serial.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
+              <FilePath>..\..\..\components\drivers\serial\dev_serial.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -666,7 +761,7 @@
             <File>
               <FileName>startup_hc32f460.s</FileName>
               <FileType>2</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\ARM\startup_hc32f460.s</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\cmsis\Device\HDSC\hc32f4xx\Source\ARM\startup_hc32f460.s</FilePath>
             </File>
           </Files>
           <Files>
@@ -683,6 +778,13 @@
               <FilePath>..\libraries\hc32_drivers\drv_gpio.c</FilePath>
             </File>
           </Files>
+          <Files>
+            <File>
+              <FileName>drv_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_i2c.c</FilePath>
+            </File>
+          </Files>
           <Files>
             <File>
               <FileName>drv_irq.c</FileName>
@@ -690,6 +792,13 @@
               <FilePath>..\libraries\hc32_drivers\drv_irq.c</FilePath>
             </File>
           </Files>
+          <Files>
+            <File>
+              <FileName>drv_soft_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_soft_i2c.c</FilePath>
+            </File>
+          </Files>
           <Files>
             <File>
               <FileName>drv_usart.c</FileName>
@@ -702,30 +811,30 @@
           <GroupName>Finsh</GroupName>
           <Files>
             <File>
-              <FileName>shell.c</FileName>
+              <FileName>cmd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\shell.c</FilePath>
+              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>msh.c</FileName>
+              <FileName>msh_parse.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\msh.c</FilePath>
+              <FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>msh_parse.c</FileName>
+              <FileName>shell.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
+              <FilePath>..\..\..\components\finsh\shell.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>cmd.c</FileName>
+              <FileName>msh.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
+              <FilePath>..\..\..\components\finsh\msh.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -771,9 +880,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>idle.c</FileName>
+              <FileName>cpu_up.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\idle.c</FilePath>
+              <FilePath>..\..\..\src\cpu_up.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -790,9 +899,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>ipc.c</FileName>
+              <FileName>defunct.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\ipc.c</FilePath>
+              <FilePath>..\..\..\src\defunct.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -809,9 +918,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>irq.c</FileName>
+              <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\irq.c</FilePath>
+              <FilePath>..\..\..\src\idle.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -828,9 +937,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>kstdio.c</FileName>
+              <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\klibc\kstdio.c</FilePath>
+              <FilePath>..\..\..\src\ipc.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -847,9 +956,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>kstring.c</FileName>
+              <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\klibc\kstring.c</FilePath>
+              <FilePath>..\..\..\src\irq.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -1017,6 +1126,44 @@
             </File>
           </Files>
         </Group>
+        <Group>
+          <GroupName>klibc</GroupName>
+          <Files>
+            <File>
+              <FileName>kstring.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\kstring.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>rt_vsnprintf_tiny.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\rt_vsnprintf_tiny.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>rt_vsscanf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\rt_vsscanf.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kstdio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\kstdio.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kerrno.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\kerrno.c</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>libcpu</GroupName>
           <Files>
@@ -1059,121 +1206,222 @@
           <GroupName>Libraries</GroupName>
           <Files>
             <File>
-              <FileName>hc32_ll_clk.c</FileName>
+              <FileName>hc32_ll_cmp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_clk.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_cmp.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>system_hc32f460.c</FileName>
+              <FileName>hc32_ll_i2s.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f460.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_i2s.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_icg.c</FileName>
+              <FileName>hc32_ll_mpu.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_icg.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_mpu.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_utility.c</FileName>
+              <FileName>hc32_ll_interrupts.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_interrupts.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_usart.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_keyscan.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_keyscan.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_sram.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_utility.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_sram.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>hc32_ll_fcg.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_fcg.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_fcg.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_interrupts.c</FileName>
+              <FileName>hc32_ll_emb.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_interrupts.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_emb.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_pwc.c</FileName>
+              <FileName>system_hc32f460.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_pwc.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f460.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32f460_ll_interrupts_share.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32f460_ll_interrupts_share.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_icg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_icg.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_tmr0.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_tmr0.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_i2c.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>hc32_ll_aos.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_aos.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_aos.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_sram.c</FileName>
+              <FileName>hc32_ll_utility.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_utility.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_dbgc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_sram.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_dbgc.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>hc32_ll.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_usart.c</FileName>
+              <FileName>hc32_ll_clk.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_usart.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_clk.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_dcu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_dcu.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_rmu.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_rmu.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>hc32_ll_efm.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_efm.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_efm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_dma.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_ots.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_ots.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_event_port.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_event_port.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_pwc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_pwc.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
               <FileName>hc32_ll_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_gpio.c</FilePath>
+              <FilePath>..\libraries\hc32f460_ddl\hc32_ll_driver\src\hc32_ll_gpio.c</FilePath>
             </File>
           </Files>
+        </Group>
+        <Group>
+          <GroupName>Tests</GroupName>
           <Files>
             <File>
-              <FileName>hc32f460_ll_interrupts_share.c</FileName>
+              <FileName>test_i2c.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32f460_ll_interrupts_share.c</FilePath>
+              <FilePath>..\tests\test_i2c.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_rmu.c</FileName>
+              <FileName>test_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_rmu.c</FilePath>
+              <FilePath>..\tests\test_gpio.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_tmr0.c</FileName>
+              <FileName>test_uart_v1.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_tmr0.c</FilePath>
+              <FilePath>..\tests\test_uart_v1.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_dma.c</FileName>
+              <FileName>test_soft_i2c.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f460_ddl\drivers\hc32_ll_driver\src\hc32_ll_dma.c</FilePath>
+              <FilePath>..\tests\test_soft_i2c.c</FilePath>
             </File>
           </Files>
         </Group>

bsp/hc32/ev_hc32f460_lqfp100_v2/rtconfig.h

@@ -1,11 +1,66 @@
 #ifndef RT_CONFIG_H__
 #define RT_CONFIG_H__
 
-/* Automatically generated file; DO NOT EDIT. */
-/* RT-Thread Configuration */
-
 /* RT-Thread Kernel */
 
+/* klibc options */
+
+/* rt_vsnprintf options */
+
+/* end of rt_vsnprintf options */
+
+/* rt_vsscanf options */
+
+/* end of rt_vsscanf options */
+
+/* rt_memset options */
+
+/* end of rt_memset options */
+
+/* rt_memcpy options */
+
+/* end of rt_memcpy options */
+
+/* rt_memmove options */
+
+/* end of rt_memmove options */
+
+/* rt_memcmp options */
+
+/* end of rt_memcmp options */
+
+/* rt_strstr options */
+
+/* end of rt_strstr options */
+
+/* rt_strcasecmp options */
+
+/* end of rt_strcasecmp options */
+
+/* rt_strncpy options */
+
+/* end of rt_strncpy options */
+
+/* rt_strcpy options */
+
+/* end of rt_strcpy options */
+
+/* rt_strncmp options */
+
+/* end of rt_strncmp options */
+
+/* rt_strcmp options */
+
+/* end of rt_strcmp options */
+
+/* rt_strlen options */
+
+/* end of rt_strlen options */
+
+/* rt_strnlen options */
+
+/* end of rt_strnlen options */
+/* end of klibc options */
 #define RT_NAME_MAX 8
 #define RT_CPUS_NR 1
 #define RT_ALIGN_SIZE 8
@@ -19,9 +74,11 @@
 #define RT_IDLE_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 256
 
-/* kservice optimization */
+/* kservice options */
 
+/* end of kservice options */
 #define RT_USING_DEBUG
+#define RT_DEBUGING_ASSERT
 #define RT_DEBUGING_COLOR
 #define RT_DEBUGING_CONTEXT
 
@@ -32,6 +89,7 @@
 #define RT_USING_EVENT
 #define RT_USING_MAILBOX
 #define RT_USING_MESSAGEQUEUE
+/* end of Inter-Thread communication */
 
 /* Memory Management */
 
@@ -39,12 +97,14 @@
 #define RT_USING_SMALL_MEM
 #define RT_USING_SMALL_MEM_AS_HEAP
 #define RT_USING_HEAP
+/* end of Memory Management */
 #define RT_USING_DEVICE
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart4"
-#define RT_VER_NUM 0x50100
+#define RT_VER_NUM 0x50200
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
+/* end of RT-Thread Kernel */
 #define RT_USING_HW_ATOMIC
 #define RT_USING_CPU_FFS
 #define ARCH_ARM
@@ -74,6 +134,7 @@
 
 /* DFS: device virtual file system */
 
+/* end of DFS: device virtual file system */
 
 /* Device Drivers */
 
@@ -86,10 +147,10 @@
 #define RT_USING_SERIAL_V1
 #define RT_SERIAL_USING_DMA
 #define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
 #define RT_USING_PIN
-
-/* Using USB */
-
+/* end of Device Drivers */
 
 /* C/C++ and POSIX layer */
 
@@ -101,6 +162,8 @@
 #define RT_LIBC_TZ_DEFAULT_HOUR 8
 #define RT_LIBC_TZ_DEFAULT_MIN 0
 #define RT_LIBC_TZ_DEFAULT_SEC 0
+/* end of Timezone and Daylight Saving Time */
+/* end of ISO-ANSI C layer */
 
 /* POSIX (Portable Operating System Interface) layer */
 
@@ -110,18 +173,30 @@
 
 /* Socket is in the 'Network' category */
 
+/* end of Interprocess Communication (IPC) */
+/* end of POSIX (Portable Operating System Interface) layer */
+/* end of C/C++ and POSIX layer */
 
 /* Network */
 
+/* end of Network */
 
 /* Memory protection */
 
+/* end of Memory protection */
 
 /* Utilities */
 
+/* end of Utilities */
+
+/* Using USB legacy version */
+
+/* end of Using USB legacy version */
+/* end of RT-Thread Components */
 
 /* RT-Thread Utestcases */
 
+/* end of RT-Thread Utestcases */
 
 /* RT-Thread online packages */
 
@@ -132,57 +207,78 @@
 
 /* Marvell WiFi */
 
+/* end of Marvell WiFi */
 
 /* Wiced WiFi */
 
+/* end of Wiced WiFi */
 
 /* CYW43012 WiFi */
 
+/* end of CYW43012 WiFi */
 
 /* BL808 WiFi */
 
+/* end of BL808 WiFi */
 
 /* CYW43439 WiFi */
 
+/* end of CYW43439 WiFi */
+/* end of Wi-Fi */
 
 /* IoT Cloud */
 
+/* end of IoT Cloud */
+/* end of IoT - internet of things */
 
 /* security packages */
 
+/* end of security packages */
 
 /* language packages */
 
 /* JSON: JavaScript Object Notation, a lightweight data-interchange format */
 
+/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */
 
 /* XML: Extensible Markup Language */
 
+/* end of XML: Extensible Markup Language */
+/* end of language packages */
 
 /* multimedia packages */
 
 /* LVGL: powerful and easy-to-use embedded GUI library */
 
+/* end of LVGL: powerful and easy-to-use embedded GUI library */
 
 /* u8g2: a monochrome graphic library */
 
+/* end of u8g2: a monochrome graphic library */
+/* end of multimedia packages */
 
 /* tools packages */
 
+/* end of tools packages */
 
 /* system packages */
 
 /* enhanced kernel services */
 
+/* end of enhanced kernel services */
 
 /* acceleration: Assembly language or algorithmic acceleration packages */
 
+/* end of acceleration: Assembly language or algorithmic acceleration packages */
 
 /* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
 
+/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
 
 /* Micrium: Micrium software products porting for RT-Thread */
 
+/* end of Micrium: Micrium software products porting for RT-Thread */
+/* end of system packages */
 
 /* peripheral libraries and drivers */
 
@@ -190,66 +286,94 @@
 
 /* STM32 HAL & SDK Drivers */
 
+/* end of STM32 HAL & SDK Drivers */
+
+/* Infineon HAL Packages */
+
+/* end of Infineon HAL Packages */
 
 /* Kendryte SDK */
 
+/* end of Kendryte SDK */
+/* end of HAL & SDK Drivers */
 
 /* sensors drivers */
 
+/* end of sensors drivers */
 
 /* touch drivers */
 
+/* end of touch drivers */
+/* end of peripheral libraries and drivers */
 
 /* AI packages */
 
+/* end of AI packages */
 
 /* Signal Processing and Control Algorithm Packages */
 
+/* end of Signal Processing and Control Algorithm Packages */
 
 /* miscellaneous packages */
 
 /* project laboratory */
 
+/* end of project laboratory */
+
 /* samples: kernel and components samples */
 
+/* end of samples: kernel and components samples */
 
 /* entertainment: terminal games and other interesting software packages */
 
+/* end of entertainment: terminal games and other interesting software packages */
+/* end of miscellaneous packages */
 
 /* Arduino libraries */
 
 
 /* Projects and Demos */
 
+/* end of Projects and Demos */
 
 /* Sensors */
 
+/* end of Sensors */
 
 /* Display */
 
+/* end of Display */
 
 /* Timing */
 
+/* end of Timing */
 
 /* Data Processing */
 
+/* end of Data Processing */
 
 /* Data Storage */
 
 /* Communication */
 
+/* end of Communication */
 
 /* Device Control */
 
+/* end of Device Control */
 
 /* Other */
 
+/* end of Other */
 
 /* Signal IO */
 
+/* end of Signal IO */
 
 /* Uncategorized */
 
+/* end of Arduino libraries */
+/* end of RT-Thread online packages */
 #define SOC_FAMILY_HC32
 #define SOC_SERIES_HC32F4
 
@@ -260,17 +384,24 @@
 /* On-chip Drivers */
 
 #define BSP_USING_ON_CHIP_FLASH_CACHE
+/* end of On-chip Drivers */
 
 /* Onboard Peripheral Drivers */
 
+/* end of Onboard Peripheral Drivers */
 
 /* On-chip Peripheral Drivers */
 
 #define BSP_USING_GPIO
 #define BSP_USING_UART
 #define BSP_USING_UART4
+#define BSP_USING_I2C
+#define BSP_USING_I2C_HW
+#define BSP_USING_I2C3
+/* end of On-chip Peripheral Drivers */
 
 /* Board extended module Drivers */
 
+/* end of Hardware Drivers Config */
 
 #endif

bsp/hc32/ev_hc32f460_lqfp100_v2/settings/project.dni

@@ -1,5 +1,5 @@
 [PlDriver]
-MemConfigValue=$PROJ_DIR$/../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F460.svd
+MemConfigValue=$PROJ_DIR$/../libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/IAR/svd/HC32F460.svd
 [PlCacheRanges]
 CustomRanges0=0 0 524288 1 2048
 CustomRangesText0=Flash

bsp/hc32/ev_hc32f460_lqfp100_v2/template.uvoptx

@@ -10,7 +10,7 @@
     <aExt>*.s*; *.src; *.a*</aExt>
     <oExt>*.obj; *.o</oExt>
     <lExt>*.lib</lExt>
-    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
     <pExt>*.plm</pExt>
     <CppX>*.cpp</CppX>
     <nMigrate>0</nMigrate>
@@ -120,7 +120,7 @@
         <SetRegEntry>
           <Number>0</Number>
           <Key>CMSIS_AGDI</Key>
-          <Name>-X"" -O206 -S0 -C0 -P00 -FO7 -FD1FFF8000 -FC1000 -FN2 -FF0HC32F460_512K -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM) -FF1HC32F460_otp -FS13000C00 -FL13FC -FP1($$Device:HC32F460PETB$FlashARM\HC32F460_otp.FLM)</Name>
+          <Name>-X"Any" -UAny -O206 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD1FFF8000 -FC1000 -FN2 -FF0HC32F460_512K.FLM -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM) -FF1HC32F460_otp.FLM -FS13000C00 -FL13FC -FP1($$Device:HC32F460PETB$FlashARM\HC32F460_otp.FLM)</Name>
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
@@ -129,7 +129,7 @@
         </SetRegEntry>
         <SetRegEntry>
           <Number>0</Number>
-          <Key>JL2CM3</Key>
+          <Key>CMSIS_AGDI</Key>
           <Name>-U261009725 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST2 -TO18 -TC10000000 -TP21 -TDS8000 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD1FFF8000 -FC1000 -FN1 -FF0HC32F460_512K.FLM -FS00 -FL080000 -FP0($$Device:HC32F460PETB$FlashARM\HC32F460_512K.FLM)</Name>
         </SetRegEntry>
       </TargetDriverDllRegistry>

bsp/hc32/ev_hc32f460_lqfp100_v2/template.uvprojx

@@ -33,7 +33,7 @@
           <SLE66CMisc></SLE66CMisc>
           <SLE66AMisc></SLE66AMisc>
           <SLE66LinkerMisc></SLE66LinkerMisc>
-          <SFDFile>../libraries/hc32f460_ddl/drivers/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F460.SFR</SFDFile>
+          <SFDFile>../libraries/hc32f460_ddl/cmsis/Device/HDSC/hc32f4xx/Source/ARM/sfr/HC32F460.SFR</SFDFile>
           <bCustSvd>1</bCustSvd>
           <UseEnv>0</UseEnv>
           <BinPath></BinPath>
@@ -352,7 +352,7 @@
             <NoWarn>0</NoWarn>
             <uSurpInc>0</uSurpInc>
             <useXO>0</useXO>
-            <ClangAsOpt>4</ClangAsOpt>
+            <uClangAs>0</uClangAs>
             <VariousControls>
               <MiscControls></MiscControls>
               <Define></Define>

bsp/hc32/ev_hc32f472_lqfp100/.config

@@ -1,15 +1,117 @@
+
 #
-# Automatically generated file; DO NOT EDIT.
-# RT-Thread Configuration
+# RT-Thread Kernel
 #
 
 #
-# RT-Thread Kernel
+# klibc options
+#
+
+#
+# rt_vsnprintf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set
+# end of rt_vsnprintf options
+
+#
+# rt_vsscanf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSSCANF is not set
+# end of rt_vsscanf options
+
+#
+# rt_memset options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMSET is not set
+# end of rt_memset options
+
+#
+# rt_memcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMCPY is not set
+# end of rt_memcpy options
+
+#
+# rt_memmove options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMMOVE is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMMOVE is not set
+# end of rt_memmove options
+
+#
+# rt_memcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCMP is not set
+# end of rt_memcmp options
+
+#
+# rt_strstr options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRSTR is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRSTR is not set
+# end of rt_strstr options
+
+#
+# rt_strcasecmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCASECMP is not set
+# end of rt_strcasecmp options
+
+#
+# rt_strncpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCPY is not set
+# end of rt_strncpy options
+
+#
+# rt_strcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCPY is not set
+# end of rt_strcpy options
+
+#
+# rt_strncmp options
 #
+# CONFIG_RT_KLIBC_USING_USER_STRNCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCMP is not set
+# end of rt_strncmp options
+
+#
+# rt_strcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCMP is not set
+# end of rt_strcmp options
+
+#
+# rt_strlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRLEN is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRLEN is not set
+# end of rt_strlen options
+
+#
+# rt_strnlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set
+# end of rt_strnlen options
+
+# CONFIG_RT_UTEST_TC_USING_KLIBC is not set
+# end of klibc options
+
 CONFIG_RT_NAME_MAX=8
 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set
-# CONFIG_RT_USING_SMART is not set
 # CONFIG_RT_USING_NANO is not set
+# CONFIG_RT_USING_SMART is not set
 # CONFIG_RT_USING_AMP is not set
 # CONFIG_RT_USING_SMP is not set
 CONFIG_RT_CPUS_NR=1
@@ -27,22 +129,20 @@ CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=256
 # CONFIG_RT_USING_TIMER_SOFT is not set
+# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
 
 #
-# kservice optimization
+# kservice options
 #
 # CONFIG_RT_USING_TINY_FFS is not set
+# end of kservice options
 
-#
-# klibc optimization
-#
-# CONFIG_RT_KLIBC_USING_STDLIB is not set
-# CONFIG_RT_KLIBC_USING_TINY_SIZE is not set
-# CONFIG_RT_KLIBC_USING_PRINTF_LONGLONG is not set
 CONFIG_RT_USING_DEBUG=y
+CONFIG_RT_DEBUGING_ASSERT=y
 CONFIG_RT_DEBUGING_COLOR=y
 CONFIG_RT_DEBUGING_CONTEXT=y
 # CONFIG_RT_DEBUGING_AUTO_INIT is not set
+# CONFIG_RT_USING_CI_ACTION is not set
 
 #
 # Inter-Thread communication
@@ -54,6 +154,7 @@ CONFIG_RT_USING_MAILBOX=y
 CONFIG_RT_USING_MESSAGEQUEUE=y
 # CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
 # CONFIG_RT_USING_SIGNALS is not set
+# end of Inter-Thread communication
 
 #
 # Memory Management
@@ -70,21 +171,21 @@ CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
 # CONFIG_RT_USING_MEMTRACE is not set
 # CONFIG_RT_USING_HEAP_ISR is not set
 CONFIG_RT_USING_HEAP=y
+# end of Memory Management
+
 CONFIG_RT_USING_DEVICE=y
 # CONFIG_RT_USING_DEVICE_OPS is not set
 # CONFIG_RT_USING_INTERRUPT_INFO is not set
 # CONFIG_RT_USING_THREADSAFE_PRINTF is not set
-# CONFIG_RT_USING_SCHED_THREAD_CTX is not set
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart2"
 CONFIG_RT_VER_NUM=0x50200
 # CONFIG_RT_USING_STDC_ATOMIC is not set
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
-# CONFIG_RT_USING_CACHE is not set
+# end of RT-Thread Kernel
+
 CONFIG_RT_USING_HW_ATOMIC=y
-# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set
-# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
 CONFIG_RT_USING_CPU_FFS=y
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM_CORTEX_M=y
@@ -119,12 +220,15 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y
 # DFS: device virtual file system
 #
 # CONFIG_RT_USING_DFS is not set
+# end of DFS: device virtual file system
+
 # CONFIG_RT_USING_FAL is not set
 
 #
 # Device Drivers
 #
 # CONFIG_RT_USING_DM is not set
+# CONFIG_RT_USING_DEV_BUS is not set
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_UNAMED_PIPE_NUMBER=64
 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@@ -135,16 +239,24 @@ CONFIG_RT_USING_SERIAL_V1=y
 # CONFIG_RT_USING_SERIAL_V2 is not set
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_SERIAL_BYPASS is not set
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+CONFIG_RT_USING_I2C_BITOPS=y
+# CONFIG_RT_I2C_BITOPS_DEBUG is not set
+# CONFIG_RT_USING_SOFT_I2C is not set
 # CONFIG_RT_USING_PHY is not set
+# CONFIG_RT_USING_PHY_V2 is not set
 # CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_NULL is not set
 # CONFIG_RT_USING_ZERO is not set
 # CONFIG_RT_USING_RANDOM is not set
 # CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_PM is not set
@@ -157,21 +269,14 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_TOUCH is not set
 # CONFIG_RT_USING_LCD is not set
 # CONFIG_RT_USING_HWCRYPTO is not set
-# CONFIG_RT_USING_PULSE_ENCODER is not set
-# CONFIG_RT_USING_INPUT_CAPTURE is not set
-# CONFIG_RT_USING_DEV_BUS is not set
 # CONFIG_RT_USING_WIFI is not set
+# CONFIG_RT_USING_BLK is not set
 # CONFIG_RT_USING_VIRTIO is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_KTIME is not set
 # CONFIG_RT_USING_HWTIMER is not set
-
-#
-# Using USB
-#
-# CONFIG_RT_USING_USB is not set
-# CONFIG_RT_USING_USB_HOST is not set
-# CONFIG_RT_USING_USB_DEVICE is not set
+# CONFIG_RT_USING_CHERRYUSB is not set
+# end of Device Drivers
 
 #
 # C/C++ and POSIX layer
@@ -189,6 +294,8 @@ CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y
 CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8
 CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0
 CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
+# end of Timezone and Daylight Saving Time
+# end of ISO-ANSI C layer
 
 #
 # POSIX (Portable Operating System Interface) layer
@@ -210,7 +317,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # Socket is in the 'Network' category
 #
+# end of Interprocess Communication (IPC)
+# end of POSIX (Portable Operating System Interface) layer
+
 # CONFIG_RT_USING_CPLUSPLUS is not set
+# end of C/C++ and POSIX layer
 
 #
 # Network
@@ -219,12 +330,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_RT_USING_NETDEV is not set
 # CONFIG_RT_USING_LWIP is not set
 # CONFIG_RT_USING_AT is not set
+# end of Network
 
 #
 # Memory protection
 #
 # CONFIG_RT_USING_MEM_PROTECTION is not set
 # CONFIG_RT_USING_HW_STACK_GUARD is not set
+# end of Memory protection
 
 #
 # Utilities
@@ -236,12 +349,25 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_RT_USING_RESOURCE_ID is not set
 # CONFIG_RT_USING_ADT is not set
 # CONFIG_RT_USING_RT_LINK is not set
+# end of Utilities
+
 # CONFIG_RT_USING_VBUS is not set
 
+#
+# Using USB legacy version
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+# end of Using USB legacy version
+
+# CONFIG_RT_USING_FDT is not set
+# end of RT-Thread Components
+
 #
 # RT-Thread Utestcases
 #
 # CONFIG_RT_USING_UTESTCASES is not set
+# end of RT-Thread Utestcases
 
 #
 # RT-Thread online packages
@@ -250,7 +376,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
 # CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
 # CONFIG_PKG_USING_UMQTT is not set
@@ -263,6 +388,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
 # CONFIG_PKG_USING_NANOPB is not set
+# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
 
 #
 # Wi-Fi
@@ -272,12 +398,35 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # Marvell WiFi
 #
 # CONFIG_PKG_USING_WLANMARVELL is not set
+# end of Marvell WiFi
 
 #
 # Wiced WiFi
 #
 # CONFIG_PKG_USING_WLAN_WICED is not set
+# end of Wiced WiFi
+
 # CONFIG_PKG_USING_RW007 is not set
+
+#
+# CYW43012 WiFi
+#
+# CONFIG_PKG_USING_WLAN_CYW43012 is not set
+# end of CYW43012 WiFi
+
+#
+# BL808 WiFi
+#
+# CONFIG_PKG_USING_WLAN_BL808 is not set
+# end of BL808 WiFi
+
+#
+# CYW43439 WiFi
+#
+# CONFIG_PKG_USING_WLAN_CYW43439 is not set
+# end of CYW43439 WiFi
+# end of Wi-Fi
+
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
@@ -299,8 +448,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
 # CONFIG_PKG_USING_JOYLINK is not set
-# CONFIG_PKG_USING_EZ_IOT_OS is not set
 # CONFIG_PKG_USING_IOTSHARP_SDK is not set
+# end of IoT Cloud
+
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
@@ -320,6 +470,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_NMEALIB is not set
 # CONFIG_PKG_USING_PDULIB is not set
 # CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_BT_CYW43012 is not set
+# CONFIG_PKG_USING_CYW43XX is not set
 # CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
 # CONFIG_PKG_USING_WAYZ_IOTKIT is not set
 # CONFIG_PKG_USING_MAVLINK is not set
@@ -339,6 +491,10 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ZFTP is not set
 # CONFIG_PKG_USING_WOL is not set
 # CONFIG_PKG_USING_ZEPHYR_POLLING is not set
+# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
+# CONFIG_PKG_USING_LHC_MODBUS is not set
+# CONFIG_PKG_USING_QMODBUS is not set
+# end of IoT - internet of things
 
 #
 # security packages
@@ -349,6 +505,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
 # CONFIG_PKG_USING_YD_CRYPTO is not set
+# end of security packages
 
 #
 # language packages
@@ -364,18 +521,22 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_AGILE_JSMN is not set
 # CONFIG_PKG_USING_PARSON is not set
+# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
 
 #
 # XML: Extensible Markup Language
 #
 # CONFIG_PKG_USING_SIMPLE_XML is not set
 # CONFIG_PKG_USING_EZXML is not set
+# end of XML: Extensible Markup Language
+
 # CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
 # CONFIG_PKG_USING_PIKASCRIPT is not set
 # CONFIG_PKG_USING_RTT_RUST is not set
+# end of language packages
 
 #
 # multimedia packages
@@ -385,15 +546,17 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # LVGL: powerful and easy-to-use embedded GUI library
 #
 # CONFIG_PKG_USING_LVGL is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
 # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
 # CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
+# end of LVGL: powerful and easy-to-use embedded GUI library
 
 #
 # u8g2: a monochrome graphic library
 #
 # CONFIG_PKG_USING_U8G2_OFFICIAL is not set
 # CONFIG_PKG_USING_U8G2 is not set
+# end of u8g2: a monochrome graphic library
+
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
@@ -414,6 +577,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_GUIENGINE is not set
 # CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_3GPP_AMRNB is not set
+# end of multimedia packages
 
 #
 # tools packages
@@ -462,6 +626,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 # CONFIG_PKG_USING_VOFA_PLUS is not set
 # CONFIG_PKG_USING_RT_TRACE is not set
+# CONFIG_PKG_USING_ZDEBUG is not set
+# end of tools packages
 
 #
 # system packages
@@ -473,6 +639,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_RT_MEMCPY_CM is not set
 # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
 # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
+# end of enhanced kernel services
+
+# CONFIG_PKG_USING_AUNITY is not set
 
 #
 # acceleration: Assembly language or algorithmic acceleration packages
@@ -480,13 +649,18 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
 # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
 # CONFIG_PKG_USING_QFPLIB_M3 is not set
+# end of acceleration: Assembly language or algorithmic acceleration packages
 
 #
 # CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
 #
 # CONFIG_PKG_USING_CMSIS_5 is not set
+# CONFIG_PKG_USING_CMSIS_CORE is not set
+# CONFIG_PKG_USING_CMSIS_DSP is not set
+# CONFIG_PKG_USING_CMSIS_NN is not set
 # CONFIG_PKG_USING_CMSIS_RTOS1 is not set
 # CONFIG_PKG_USING_CMSIS_RTOS2 is not set
+# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
 
 #
 # Micrium: Micrium software products porting for RT-Thread
@@ -497,11 +671,17 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_UC_CLK is not set
 # CONFIG_PKG_USING_UC_COMMON is not set
 # CONFIG_PKG_USING_UC_MODBUS is not set
+# end of Micrium: Micrium software products porting for RT-Thread
+
 # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
+# CONFIG_PKG_USING_LITEOS_SDK is not set
+# CONFIG_PKG_USING_TZ_DATABASE is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
 # CONFIG_PKG_USING_PARTITION is not set
 # CONFIG_PKG_USING_PERF_COUNTER is not set
+# CONFIG_PKG_USING_FILEX is not set
+# CONFIG_PKG_USING_LEVELX is not set
 # CONFIG_PKG_USING_FLASHDB is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
@@ -521,6 +701,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_QBOOT is not set
 # CONFIG_PKG_USING_PPOOL is not set
 # CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RPMSG_LITE is not set
 # CONFIG_PKG_USING_LPM is not set
 # CONFIG_PKG_USING_TLSF is not set
 # CONFIG_PKG_USING_EVENT_RECORDER is not set
@@ -534,11 +715,61 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_AGILE_UPGRADE is not set
 # CONFIG_PKG_USING_FLASH_BLOB is not set
 # CONFIG_PKG_USING_MLIBC is not set
+# CONFIG_PKG_USING_TASK_MSG_BUS is not set
+# CONFIG_PKG_USING_SFDB is not set
+# CONFIG_PKG_USING_RTP is not set
+# CONFIG_PKG_USING_REB is not set
+# CONFIG_PKG_USING_R_RHEALSTONE is not set
+# end of system packages
 
 #
 # peripheral libraries and drivers
 #
 
+#
+# HAL & SDK Drivers
+#
+
+#
+# STM32 HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# end of STM32 HAL & SDK Drivers
+
+#
+# Infineon HAL Packages
+#
+# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
+# CONFIG_PKG_USING_INFINEON_CMSIS is not set
+# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
+# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
+# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
+# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
+# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
+# CONFIG_PKG_USING_INFINEON_USBDEV is not set
+# end of Infineon HAL Packages
+
+# CONFIG_PKG_USING_BLUETRUM_SDK is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_ESP_IDF is not set
+
+#
+# Kendryte SDK
+#
+# CONFIG_PKG_USING_K210_SDK is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# end of Kendryte SDK
+
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
+# end of HAL & SDK Drivers
+
 #
 # sensors drivers
 #
@@ -598,6 +829,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_BALANCE is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_SHT4X is not set
 # CONFIG_PKG_USING_AD7746 is not set
 # CONFIG_PKG_USING_ADT74XX is not set
 # CONFIG_PKG_USING_MAX17048 is not set
@@ -606,6 +838,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_PAJ7620 is not set
 # CONFIG_PKG_USING_STHS34PF80 is not set
+# end of sensors drivers
 
 #
 # touch drivers
@@ -619,9 +852,10 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_FT6236 is not set
 # CONFIG_PKG_USING_XPT2046_TOUCH is not set
 # CONFIG_PKG_USING_CST816X is not set
+# CONFIG_PKG_USING_CST812T is not set
+# end of touch drivers
+
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
-# CONFIG_PKG_USING_STM32_SDIO is not set
-# CONFIG_PKG_USING_ESP_IDF is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
@@ -629,14 +863,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_LEDBLINK is not set
 # CONFIG_PKG_USING_LITTLED is not set
 # CONFIG_PKG_USING_LKDGUI is not set
-# CONFIG_PKG_USING_NRF5X_SDK is not set
-# CONFIG_PKG_USING_NRFX is not set
-
-#
-# Kendryte SDK
-#
-# CONFIG_PKG_USING_K210_SDK is not set
-# CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
 # CONFIG_PKG_USING_MULTI_INFRARED is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
@@ -651,7 +877,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
 # CONFIG_PKG_USING_WS2812B is not set
-# CONFIG_PKG_USING_EMBARC_BSP is not set
 # CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
 # CONFIG_PKG_USING_MULTI_RTIMER is not set
 # CONFIG_PKG_USING_MAX7219 is not set
@@ -674,7 +899,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
 # CONFIG_PKG_USING_VDEVICE is not set
 # CONFIG_PKG_USING_SGM706 is not set
-# CONFIG_PKG_USING_STM32WB55_SDK is not set
 # CONFIG_PKG_USING_RDA58XX is not set
 # CONFIG_PKG_USING_LIBNFC is not set
 # CONFIG_PKG_USING_MFOC is not set
@@ -684,7 +908,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ROSSERIAL is not set
 # CONFIG_PKG_USING_MICRO_ROS is not set
 # CONFIG_PKG_USING_MCP23008 is not set
-# CONFIG_PKG_USING_BLUETRUM_SDK is not set
 # CONFIG_PKG_USING_MISAKA_AT24CXX is not set
 # CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
 # CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
@@ -692,13 +915,19 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_MB85RS16 is not set
 # CONFIG_PKG_USING_RFM300 is not set
 # CONFIG_PKG_USING_IO_INPUT_FILTER is not set
-# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
 # CONFIG_PKG_USING_LRF_NV7LIDAR is not set
 # CONFIG_PKG_USING_AIP650 is not set
 # CONFIG_PKG_USING_FINGERPRINT is not set
 # CONFIG_PKG_USING_BT_ECB02C is not set
 # CONFIG_PKG_USING_UAT is not set
+# CONFIG_PKG_USING_ST7789 is not set
+# CONFIG_PKG_USING_VS1003 is not set
+# CONFIG_PKG_USING_X9555 is not set
+# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
+# CONFIG_PKG_USING_BT_MX01 is not set
+# CONFIG_PKG_USING_RGPOWER is not set
 # CONFIG_PKG_USING_SPI_TOOLS is not set
+# end of peripheral libraries and drivers
 
 #
 # AI packages
@@ -712,15 +941,19 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_QUEST is not set
 # CONFIG_PKG_USING_NAXOS is not set
+# CONFIG_PKG_USING_R_TINYMAIX is not set
+# end of AI packages
 
 #
 # Signal Processing and Control Algorithm Packages
 #
+# CONFIG_PKG_USING_APID is not set
 # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
 # CONFIG_PKG_USING_QPID is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_KISSFFT is not set
+# end of Signal Processing and Control Algorithm Packages
 
 #
 # miscellaneous packages
@@ -729,6 +962,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # project laboratory
 #
+# end of project laboratory
 
 #
 # samples: kernel and components samples
@@ -737,6 +971,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
 # CONFIG_PKG_USING_NETWORK_SAMPLES is not set
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# end of samples: kernel and components samples
 
 #
 # entertainment: terminal games and other interesting software packages
@@ -752,12 +987,16 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_DONUT is not set
 # CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_MORSE is not set
+# CONFIG_PKG_USING_TINYSQUARE is not set
+# end of entertainment: terminal games and other interesting software packages
+
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
 # CONFIG_PKG_USING_LZMA is not set
+# CONFIG_PKG_USING_RALARAM is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
@@ -784,6 +1023,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_SOEM is not set
 # CONFIG_PKG_USING_QPARAM is not set
 # CONFIG_PKG_USING_CorevMCU_CLI is not set
+# end of miscellaneous packages
 
 #
 # Arduino libraries
@@ -794,21 +1034,24 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # Projects and Demos
 #
 # CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
+# CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set
 # CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
+# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
 # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
 # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
+# end of Projects and Demos
 
 #
 # Sensors
 #
 # CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set
-# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set
-# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set
-# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31855 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set
@@ -853,7 +1096,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set
-# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MSA301 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set
@@ -892,7 +1135,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set
-# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set
@@ -915,7 +1157,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set
-# CONFIG_PKG_USING_SEEED_ITG3200 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_ITG3200 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set
@@ -923,7 +1165,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set
-# CONFIG_PKG_USING_SEEED_MP503 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_MP503 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set
@@ -936,29 +1178,39 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
+# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set
+# end of Sensors
 
 #
 # Display
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
 # CONFIG_PKG_USING_ARDUINO_U8G2 is not set
+# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
 # CONFIG_PKG_USING_SEEED_TM1637 is not set
+# end of Display
 
 #
 # Timing
 #
+# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set
 # CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
 # CONFIG_PKG_USING_ARDUINO_TICKER is not set
 # CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
+# end of Timing
 
 #
 # Data Processing
 #
 # CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set
 # CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set
+# CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set
+# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set
+# end of Data Processing
 
 #
 # Data Storage
@@ -969,24 +1221,26 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set
+# end of Communication
 
 #
 # Device Control
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
+# end of Device Control
 
 #
 # Other
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
-# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set
+# end of Other
 
 #
 # Signal IO
@@ -999,10 +1253,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set
+# end of Signal IO
 
 #
 # Uncategorized
 #
+# end of Arduino libraries
+# end of RT-Thread online packages
+
 CONFIG_SOC_FAMILY_HC32=y
 CONFIG_SOC_SERIES_HC32F4=y
 
@@ -1018,13 +1276,15 @@ CONFIG_BSP_USING_ON_CHIP_FLASH_CACHE=y
 CONFIG_BSP_USING_ON_CHIP_FLASH_ICODE_CACHE=y
 CONFIG_BSP_USING_ON_CHIP_FLASH_DCODE_CACHE=y
 CONFIG_BSP_USING_ON_CHIP_FLASH_ICODE_PREFETCH=y
+# end of On-chip Drivers
 
 #
 # Onboard Peripheral Drivers
 #
-# CONFIG_BSP_USING_TCA9539 is not set
+CONFIG_BSP_USING_TCA9539=y
 # CONFIG_BSP_USING_SPI_FLASH is not set
 CONFIG_BSP_USING_EXT_IO=y
+# end of Onboard Peripheral Drivers
 
 #
 # On-chip Peripheral Drivers
@@ -1033,13 +1293,19 @@ CONFIG_BSP_USING_GPIO=y
 CONFIG_BSP_USING_UART=y
 # CONFIG_BSP_USING_UART1 is not set
 CONFIG_BSP_USING_UART2=y
-CONFIG_BSP_UART2_RX_USING_DMA=y
-CONFIG_BSP_UART2_TX_USING_DMA=y
+# CONFIG_BSP_UART2_RX_USING_DMA is not set
+# CONFIG_BSP_UART2_TX_USING_DMA is not set
 # CONFIG_BSP_USING_UART3 is not set
 # CONFIG_BSP_USING_UART4 is not set
 # CONFIG_BSP_USING_UART5 is not set
 # CONFIG_BSP_USING_UART6 is not set
-# CONFIG_BSP_USING_I2C is not set
+CONFIG_BSP_USING_I2C=y
+# CONFIG_BSP_USING_I2C1_SW is not set
+CONFIG_BSP_USING_I2C_HW=y
+CONFIG_BSP_USING_I2C1=y
+# CONFIG_BSP_I2C1_TX_USING_DMA is not set
+# CONFIG_BSP_I2C1_RX_USING_DMA is not set
+# CONFIG_BSP_USING_I2C2 is not set
 # CONFIG_BSP_USING_ON_CHIP_FLASH is not set
 # CONFIG_BSP_USING_SPI is not set
 # CONFIG_BSP_USING_ADC is not set
@@ -1054,7 +1320,10 @@ CONFIG_BSP_UART2_TX_USING_DMA=y
 # CONFIG_BSP_USING_PULSE_ENCODER is not set
 # CONFIG_BSP_USING_HWTIMER is not set
 # CONFIG_BSP_USING_SENSOR is not set
+# CONFIG_BSP_USING_USB is not set
+# end of On-chip Peripheral Drivers
 
 #
 # Board extended module Drivers
 #
+# end of Hardware Drivers Config

bsp/hc32/ev_hc32f472_lqfp100/.project

@@ -0,0 +1,78 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+  <name>project</name>
+  <comment />
+  <projects>
+	</projects>
+  <buildSpec>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+      <triggers>clean,full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+    <buildCommand>
+      <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+      <triggers>full,incremental,</triggers>
+      <arguments>
+			</arguments>
+    </buildCommand>
+  </buildSpec>
+  <natures>
+    <nature>org.eclipse.cdt.core.cnature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+    <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+  </natures>
+  <linkedResources>
+    <link>
+      <name>rt-thread</name>
+      <type>2</type>
+      <locationURI>virtual:/virtual</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/bsp</name>
+      <type>2</type>
+      <locationURI>virtual:/virtual</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/components</name>
+      <type>2</type>
+      <locationURI>$%7BPARENT-3-PROJECT_LOC%7D/components</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/include</name>
+      <type>2</type>
+      <locationURI>$%7BPARENT-3-PROJECT_LOC%7D/include</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/libcpu</name>
+      <type>2</type>
+      <locationURI>$%7BPARENT-3-PROJECT_LOC%7D/libcpu</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/src</name>
+      <type>2</type>
+      <locationURI>$%7BPARENT-3-PROJECT_LOC%7D/src</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/bsp/hc32</name>
+      <type>2</type>
+      <locationURI>virtual:/virtual</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/bsp/hc32/libraries</name>
+      <type>2</type>
+      <locationURI>$%7BPARENT-1-PROJECT_LOC%7D/libraries</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/bsp/hc32/platform</name>
+      <type>2</type>
+      <locationURI>PARENT-1-PROJECT_LOC/platform</locationURI>
+    </link>
+    <link>
+      <name>rt-thread/bsp/hc32/tests</name>
+      <type>2</type>
+      <locationURI>PARENT-1-PROJECT_LOC/tests</locationURI>
+    </link>
+  </linkedResources>
+</projectDescription>

bsp/hc32/ev_hc32f472_lqfp100/README.md

@@ -1,8 +1,8 @@
-# XHSC EV_F472_LQ100_Rev1.0 开发板 BSP 说明
+# XHSC EV_F472_LQ80_Rev1.0 开发板 BSP 说明
 
 ## 简介
 
-本文档为小华半导体为 EV_F472_LQ100_Rev1.0 开发板提供的 BSP (板级支持包) 说明。
+本文档为小华半导体为 EV_F472_LQ80_Rev1.0 开发板提供的 BSP (板级支持包) 说明。
 
 主要内容如下：
 
@@ -14,71 +14,72 @@
 
 ## 开发板介绍
 
-EV_F472_LQ100_Rev1.0 是 XHSC 官方推出的开发板，搭载 HC32F472PETI 芯片，基于 ARM Cortex-M4 内核，最高主频 120 MHz，具有丰富的板载资源，可以充分发挥 HC32F472PETI 的芯片性能。
+EV_F472_LQ80_Rev1.0 是 XHSC 官方推出的开发板，搭载 HC32F472PETI 芯片，基于 ARM Cortex-M4 内核，最高主频 200 MHz，具有丰富的板载资源，可以充分发挥 HC32F472PETI 的芯片性能。
 
 开发板外观如下图所示：
 
  ![board](figures/board.png)
 
-EV_F472_LQ100_Rev1.0 开发板常用 **板载资源** 如下：
+EV_F472_LQ80_Rev1.0 开发板常用 **板载资源** 如下：
 
 - **MCU**
   - HC32F472PETI
-  - 主频120MHz
-  - 512KB FLASH
+  - 主频200MHz
+  - 256KB FLASH
   - 68KB RAM
 - **外部Memory**
   - BL24C256（EEPROM, 256Kbits）
   - W25Q64（SPI NOR，64MB）
   - IS62WV51216（SRAM， 1MB）
 - **常用外设**
-  - LED: 4 个，User LED（LED0，LED1，LED2，LED5）。
-  - 按键: 9 个，矩阵键盘（K1~K9）， WAKEUP（K10），RESET（K0）
+  - LED: 4 个，User LED（LED0，LED1，LED2，LED3）。
+  - 按键: 5 个，矩阵键盘（K1~K4）， WAKEUP（K5），RESET（K0）
 - **常用接口**
   - USB转串口
-  - CAN DB9接口 * 3
+  - CAN DB9接口 * 2
+  - TFT接口
   - SmartCard接口
   - I2C/USART/SPI接口
 - **调试接口**
   - 板载DAP调试器
   - 标准JTAG/SWD/Trace
 
-开发板更多详细信息请参考小华半导体半导体[EV_F472_LQ100_Rev1.0](https://www.xhsc.com.cn)
+开发板更多详细信息请参考小华半导体半导体[EV_F472_LQ80_Rev1.0](https://www.xhsc.com.cn)
 
 ## 外设支持
 
 本 BSP 目前对外设的支持情况如下：
 
-| **板载外设**  | **支持情况** |               **备注**                |
-| :------------ | :-----------: | :-----------------------------------: |
-| USB 转串口    |      支持     |          使用 UART2                  |
-| LED           |     支持     |           LED1~4                   |
-
-| **片上外设**  | **支持情况** |               **备注**                |
-| :------------ | :-----------: | :-----------------------------------: |
-| GPIO          |     支持     | PA0, PA1... PF8 ---> PIN: 0, 1...88 |
-| I2C           |     支持     | 软件模拟<br>硬件I2C1~2<br>I2C1支持EEPROM（BL24C256） |
-| SPI           |     支持     | SPI1~3<br>SPI1支持W25Q |
-| QSPI          |     支持     | 支持W25Q |
-| UART          |     支持     |              UART1~6<br>UART2为console使用                 |
-
+| **板载外设** | **支持情况** | **备注**   |
+|:-------- |:--------:|:--------:|
+| USB 转串口  | 支持       | 使用 UART2 |
+| LED      | 支持       | LED1~4   |
+
+| **片上外设** | **支持情况** | **备注**                                     |
+|:-------- |:--------:|:------------------------------------------:|
+| ADC      | 支持       | ADC1: CH10, CH11, <br>ADC3: CH1            |
+| CAN      | 支持       | CAN1、CAN2                                  |
+| GPIO     | 支持       | PA0, PA1... PH2 ---> PIN: 0, 1...82        |
+| I2C      | 支持       | 软件模拟<br>硬件I2C1~2<br>I2C1支持EEPROM（BL24C256） |
+| Hwtimer  | 支持       | Hwtimer1~5                                 |
+| SPI      | 支持       | SPI1~3<br>SPI1支持W25Q                       |
+| UART     | 支持       | UART1~6<br>UART2为console使用                 |
 
 ## 使用说明
 
 使用说明分为如下两个章节：
 
 - 快速上手
-
+  
     本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。
 
 - 进阶使用
-
+  
     本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。
 
-
 ### 快速上手
 
-本 BSP 为开发者提供 MDK5 和 IAR 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
+本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。
 
 #### 硬件连接
 
@@ -92,7 +93,7 @@ EV_F472_LQ100_Rev1.0 开发板常用 **板载资源** 如下：
 
 #### 运行结果
 
-下载程序成功之后，系统会自动运行，观察开发板上LED的运行效果，绿色LED5会周期性闪烁。
+下载程序成功之后，系统会自动运行，观察开发板上LED的运行效果，绿色LED3会周期性闪烁。
 
 USB虚拟COM端口默认连接串口2，在终端工具里打开相应的串口，复位设备后，可以看到 RT-Thread 的输出信息:
 
@@ -117,9 +118,17 @@ msh >
 4. 输入`scons --target=mdk5/iar` 命令重新生成工程。
 
 ## 注意事项
-无
+
+| 板载外设 | 模式   | 注意事项                                                     |
+| -------- | ------ | ------------------------------------------------------------ |
+| USB      | device | 由于RTT抽象层的设计，当配置为CDC设备时，打开USB虚拟串口，需使能流控的DTR信号。（如使用SSCOM串口助手打开USB虚拟串口时，勾选DTR选框） |
+| USB      | host   | 由于main()函数中的LED闪烁示例，使用的是USBFS主机口的供电控制管脚，因而当配置为使用USBFS 的主机模式时，需要将main()函数中的LED示例代码手动屏蔽。 |
+| USB      | host   | 若配置为U盘主机模式，出现部分U盘无法识别或者写入失败时，可以尝试将RTT抽象层中rt_udisk_run()函数的rt_usbh_storage_reset()操作注释掉，测试是否可以获得更好的兼容性。 |
+| USB      | host   | 为确保USB主机对外供电充足，建议通过J7外接5V电源供电，并短接J8的VIN跳帽。 |
+| USB      | host   | 目前仅实现并测试了对U盘的支持。                              |
+
 ## 联系人信息
 
 维护人:
 
--  [小华半导体MCU](https://www.xhsc.com.cn)，邮箱：<xhsc_mcu@xhsc.com.cn>
+- [小华半导体MCU](https://www.xhsc.com.cn)，邮箱：<xhsc_ae_cd_ap@xhsc.com.cn>

bsp/hc32/ev_hc32f472_lqfp100/SConstruct

@@ -60,5 +60,9 @@ objs.extend(SConscript(os.path.join(libraries_path_prefix, 'hc32_drivers', 'SCon
 platform_path_prefix = os.path.dirname(SDK_ROOT) + '/platform'
 objs.extend(SConscript(os.path.join(platform_path_prefix, 'SConscript')))
 
+# include tests
+test_path_prefix = os.path.dirname(SDK_ROOT) + '/tests'
+objs.extend(SConscript(os.path.join(test_path_prefix, 'SConscript')))
+
 # make a building
 DoBuilding(TARGET, objs)

bsp/hc32/ev_hc32f472_lqfp100/board/Kconfig

@@ -52,6 +52,7 @@ menu "On-chip Peripheral Drivers"
     config BSP_USING_GPIO
         bool "Enable GPIO"
         select RT_USING_PIN
+        select BSP_USING_TCA9539
         default y
 
     menuconfig BSP_USING_UART
@@ -61,7 +62,7 @@ menu "On-chip Peripheral Drivers"
         if BSP_USING_UART
             menuconfig BSP_USING_UART1
                 bool "Enable UART1"
-                default y
+                default n
                 if BSP_USING_UART1
                     config BSP_UART1_RX_USING_DMA
                         bool "Enable UART1 RX DMA"
@@ -88,7 +89,7 @@ menu "On-chip Peripheral Drivers"
 
             menuconfig BSP_USING_UART2
                 bool "Enable UART2"
-                default n
+                default y
                 if BSP_USING_UART2
                     config BSP_UART2_RX_USING_DMA
                         bool "Enable UART2 RX DMA"
@@ -216,12 +217,12 @@ menu "On-chip Peripheral Drivers"
                 if BSP_USING_I2C1_SW
                     config BSP_I2C1_SCL_PIN
                         int "i2c1 scl pin number"
-                        range 1 176
-                        default 51
+                        range 1 100
+                        default 10
                     config BSP_I2C1_SDA_PIN
                         int "I2C1 sda pin number"
-                        range 1 176
-                        default 90
+                        range 1 100
+                        default 9
                 endif
         endif
 
@@ -390,6 +391,12 @@ menu "On-chip Peripheral Drivers"
             config BSP_USING_DAC2
                 bool "using dac2"
                 default n
+            config BSP_USING_DAC3
+                bool "using dac3"
+                default n
+            config BSP_USING_DAC4
+                bool "using dac4"
+                default n
         endif
 
     menuconfig BSP_USING_CAN
@@ -405,6 +412,9 @@ menu "On-chip Peripheral Drivers"
             config BSP_USING_CAN2
                 bool "using can2"
                 default n
+            config BSP_USING_CAN3
+                bool "using can3"
+                default n
         endif
 
     menuconfig BSP_USING_WDT_TMR
@@ -437,10 +447,17 @@ menu "On-chip Peripheral Drivers"
                 default BSP_RTC_USING_XTAL32
 
                 config BSP_RTC_USING_XTAL32
-                    bool "RTC USING XTAL32"
+                    bool "RTC Using XTAL32"
 
                 config BSP_RTC_USING_LRC
-                    bool "RTC USING LRC"
+                    bool "RTC Using LRC"
+
+                config BSP_RTC_USING_XTAL_DIV
+                    bool "RTC Using XTAL Division"
+
+                config BSP_RTC_USING_EXTCLK
+                    bool "RTC Using EXTCLK input from pin(PA1)"
+                    depends on !BSP_USING_EXMC
             endchoice
         endif
 
@@ -650,6 +667,9 @@ menu "On-chip Peripheral Drivers"
             config BSP_USING_TMRA_5
                 bool "Use Timer_a5 As The Hw Timer"
                 default n
+            config BSP_USING_TMRA_6
+                bool "Use Timer_a6 As The Hw Timer"
+                default n
         endif
 
     menuconfig BSP_USING_SENSOR
@@ -662,6 +682,45 @@ menu "On-chip Peripheral Drivers"
                 select RT_USING_KEYSCAN
                 default n
         endif
+
+    menuconfig BSP_USING_USB
+        bool "Enable USB"
+        default n
+        select RT_USING_USB_DEVICE if BSP_USING_USBD
+        select RT_USING_USB_HOST if BSP_USING_USBH
+        if BSP_USING_USB
+            config BSP_USING_USBFS
+                bool
+                default y
+
+            choice
+                prompt "Select USB Mode"
+                default BSP_USING_USBD
+
+                config BSP_USING_USBD
+                    bool "USB Device Mode"
+
+                config BSP_USING_USBH
+                    bool "USB Host Mode"
+            endchoice
+
+            if BSP_USING_USBD
+                config BSP_USING_USBD_VBUS_SENSING
+                    bool "Enable VBUS Sensing"
+                    default y
+            endif
+
+            if BSP_USING_USBH
+                menuconfig RT_USBH_MSTORAGE
+                    bool "Enable Udisk Drivers"
+                    default n
+                    if RT_USBH_MSTORAGE
+                        config UDISK_MOUNTPOINT
+                        string "Udisk mount dir"
+                        default "/"
+                    endif
+            endif
+        endif
 endmenu
 
 menu "Board extended module Drivers"

bsp/hc32/ev_hc32f472_lqfp100/board/SConscript

@@ -15,6 +15,7 @@ board_config.c
 path =  [cwd]
 path += [cwd + '/ports']
 path += [cwd + '/config']
+path += [cwd + '/config/usb_config']
 
 startup_path_prefix = SDK_LIB
 

bsp/hc32/ev_hc32f472_lqfp100/board/board.c

@@ -7,6 +7,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2024-02-20     CDT          first version
+ * 2024-06-07     CDT          Add XTAL divider config code for RTC
  */
 
 #include "board.h"
@@ -41,14 +42,15 @@ void SystemClock_Config(void)
 #if defined(BSP_RTC_USING_XTAL32) || defined(RT_USING_PM)
     stc_clock_xtal32_init_t stcXtal32Init;
 #endif
+#if defined(BSP_RTC_USING_XTAL_DIV)
+    stc_clock_xtaldiv_init_t stcXtaldivInit;
+#endif
 
-    /* PCLK0, HCLK Max 200MHz */
-    /* PCLK1, PCLK4 Max 100MHz */
-    /* PCLK2, EXCLK Max 60MHz */
-    /* PCLK3 Max 50MHz */
+    /* PCLK0, HCLK  Max 120MHz */
+    /* PCLK1, PCLK2, PCLK3, PCLK4, EX BUS Max 60MHz */
     CLK_SetClockDiv(CLK_BUS_CLK_ALL,
-                    (CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | CLK_PCLK2_DIV4 |
-                     CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2 | CLK_EXCLK_DIV4 |
+                    (CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | CLK_PCLK2_DIV2 |
+                     CLK_PCLK3_DIV2 | CLK_PCLK4_DIV2 | CLK_EXCLK_DIV2 |
                      CLK_HCLK_DIV1));
 
     GPIO_AnalogCmd(XTAL_PORT, XTAL_IN_PIN | XTAL_OUT_PIN, ENABLE);
@@ -67,7 +69,7 @@ void SystemClock_Config(void)
     stcPLLHInit.PLLCFGR_f.PLLM = 1UL - 1UL;
     stcPLLHInit.PLLCFGR_f.PLLN = 40UL - 1UL;
     stcPLLHInit.PLLCFGR_f.PLLP = 4UL - 1UL;
-    stcPLLHInit.PLLCFGR_f.PLLQ = 4UL - 1UL;
+    stcPLLHInit.PLLCFGR_f.PLLQ = 10UL - 1UL; /* 48M for USB */
     stcPLLHInit.PLLCFGR_f.PLLR = 4UL - 1UL;
     stcPLLHInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL;
     (void)CLK_PLLInit(&stcPLLHInit);
@@ -87,6 +89,16 @@ void SystemClock_Config(void)
     stcXtal32Init.u8Filter = CLK_XTAL32_FILTER_RUN_MD;
     (void)CLK_Xtal32Init(&stcXtal32Init);
 #endif
+
+#if defined(BSP_RTC_USING_XTAL_DIV)
+    /* Xtal Div config */
+    (void)CLK_XtalDivStructInit(&stcXtaldivInit);
+    /* 8000000Hz / 32768Hz = 0x7A12 / 0x80 */
+    stcXtaldivInit.u32Num = 0x7A12UL;
+    stcXtaldivInit.u32Den = 0x80UL;
+    stcXtaldivInit.u32State = CLK_XTALDIV_ON;
+    (void)CLK_XtalDivInit(&stcXtaldivInit);
+#endif
 }
 
 /** Peripheral Clock Configuration
@@ -94,15 +106,21 @@ void SystemClock_Config(void)
 void PeripheralClock_Config(void)
 {
 #if defined(BSP_USING_CAN1)
-    CLK_SetCANClockSrc(CLK_CAN1, CLK_CANCLK_SYSCLK_DIV6);
+    CLK_SetCANClockSrc(CLK_CAN1, CLK_CANCLK_SYSCLK_DIV3);
 #endif
 #if defined(BSP_USING_CAN2)
-    CLK_SetCANClockSrc(CLK_CAN2, CLK_CANCLK_SYSCLK_DIV6);
+    CLK_SetCANClockSrc(CLK_CAN2, CLK_CANCLK_SYSCLK_DIV3);
+#endif
+#if defined(BSP_USING_CAN3)
+    CLK_SetCANClockSrc(CLK_CAN3, CLK_CANCLK_SYSCLK_DIV3);
 #endif
 
 #if defined(RT_USING_ADC)
     CLK_SetPeriClockSrc(CLK_PERIPHCLK_PCLK);
 #endif
+#if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
+    CLK_SetUSBClockSrc(CLK_USBCLK_PLLQ);
+#endif
 }
 
 /** Peripheral Registers Unlock

bsp/hc32/ev_hc32f472_lqfp100/board/board_config.c

@@ -11,9 +11,7 @@
 
 #include <rtdevice.h>
 #include "board_config.h"
-#if defined(RT_USING_CAN)
 #include "tca9539_port.h"
-#endif
 
 /**
  * The below functions will initialize HC32 board.
@@ -157,6 +155,10 @@ void CanPhyEnable(void)
     TCA9539_WritePin(CAN2_STB_PORT, CAN2_STB_PIN, TCA9539_PIN_RESET);
     TCA9539_ConfigPin(CAN2_STB_PORT, CAN2_STB_PIN, TCA9539_DIR_OUT);
 #endif
+#if defined(BSP_USING_CAN3)
+    TCA9539_WritePin(CAN3_STB_PORT, CAN3_STB_PIN, TCA9539_PIN_RESET);
+    TCA9539_ConfigPin(CAN3_STB_PORT, CAN3_STB_PIN, TCA9539_DIR_OUT);
+#endif
 }
 rt_err_t rt_hw_board_can_init(CM_CAN_TypeDef *CANx)
 {
@@ -175,6 +177,12 @@ rt_err_t rt_hw_board_can_init(CM_CAN_TypeDef *CANx)
         GPIO_SetFunc(CAN2_TX_PORT, CAN2_TX_PIN, CAN2_TX_PIN_FUNC);
         GPIO_SetFunc(CAN2_RX_PORT, CAN2_RX_PIN, CAN2_RX_PIN_FUNC);
         break;
+#endif
+#if defined(BSP_USING_CAN3)
+    case (rt_uint32_t)CM_CAN3:
+        GPIO_SetFunc(CAN3_TX_PORT, CAN3_TX_PIN, CAN3_TX_PIN_FUNC);
+        GPIO_SetFunc(CAN3_RX_PORT, CAN3_RX_PIN, CAN3_RX_PIN_FUNC);
+        break;
 #endif
     default:
         result = -RT_ERROR;
@@ -279,7 +287,7 @@ rt_err_t rt_hw_board_pwm_tmr4_init(CM_TMR4_TypeDef *TMR4x)
     switch ((rt_uint32_t)TMR4x)
     {
 #if defined(BSP_USING_PWM_TMR4_1)
-    case (rt_uint32_t)CM_TMR4_1:
+    case (rt_uint32_t)CM_TMR4:
 #ifdef BSP_USING_PWM_TMR4_1_OUH
         GPIO_SetFunc(PWM_TMR4_1_OUH_PORT, PWM_TMR4_1_OUH_PIN, PWM_TMR4_1_OUH_PIN_FUNC);
 #endif
@@ -335,103 +343,8 @@ rt_err_t rt_hw_board_pwm_tmr6_init(CM_TMR6_TypeDef *TMR6x)
 #endif
 
 #ifdef RT_USING_PM
-#define EFM_ERASE_TIME_MAX_IN_MILLISECOND                   (20)
 #define PLL_SRC                                             ((CM_CMU->PLLHCFGR & CMU_PLLHCFGR_PLLSRC) >> CMU_PLLHCFGR_PLLSRC_POS)
 
-static void _pm_sleep_common_init(rt_bool_t b_disable_unused_clk)
-{
-    CLK_Xtal32Cmd(ENABLE);
-
-    rt_tick_t tick_start = rt_tick_get_millisecond();
-    rt_err_t rt_stat = RT_EOK;
-    //wait flash idle
-    while (SET != EFM_GetStatus(EFM_FLAG_RDY))
-    {
-        if (rt_tick_get_millisecond() - tick_start > EFM_ERASE_TIME_MAX_IN_MILLISECOND)
-        {
-            rt_stat = RT_ERROR;
-            break;
-        }
-    }
-    RT_ASSERT(rt_stat == RT_EOK);
-
-    if (b_disable_unused_clk)
-    {
-        uint32_t cur_clk_src = READ_REG8_BIT(CM_CMU->CKSWR, CMU_CKSWR_CKSW);
-
-        switch (cur_clk_src)
-        {
-        case CLK_SYSCLK_SRC_HRC:
-            CLK_PLLCmd(DISABLE);
-            CLK_MrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            CLK_XtalCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_PLL, DISABLE);
-            break;
-        case CLK_SYSCLK_SRC_MRC:
-            CLK_PLLCmd(DISABLE);
-            CLK_HrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            CLK_XtalCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE);
-
-            break;
-        case CLK_SYSCLK_SRC_XTAL:
-            CLK_PLLCmd(DISABLE);
-            CLK_HrcCmd(DISABLE);
-            CLK_MrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE);
-
-            break;
-        case CLK_SYSCLK_SRC_XTAL32:
-            CLK_PLLCmd(DISABLE);
-            CLK_HrcCmd(DISABLE);
-            CLK_MrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            CLK_XtalCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE);
-
-            break;
-        case CLK_SYSCLK_SRC_PLL:
-            if (CLK_PLL_SRC_XTAL == PLL_SRC)
-            {
-                CLK_HrcCmd(DISABLE);
-            }
-            else
-            {
-                CLK_XtalCmd(DISABLE);
-            }
-            CLK_MrcCmd(DISABLE);
-            CLK_LrcCmd(DISABLE);
-            PWC_LDO_Cmd(PWC_LDO_HRC, DISABLE);
-
-            break;
-        default:
-            break;
-        }
-    }
-}
-
-void rt_hw_board_pm_sleep_deep_init(void)
-{
-#if (PM_SLEEP_DEEP_CFG_CLK   == PWC_STOP_CLK_KEEP)
-    _pm_sleep_common_init(RT_TRUE);
-#else
-    _pm_sleep_common_init(RT_FALSE);
-    CLK_PLLCmd(DISABLE);
-    CLK_HrcCmd(DISABLE);
-    CLK_LrcCmd(DISABLE);
-    CLK_XtalCmd(DISABLE);
-    PWC_LDO_Cmd(PWC_LDO_PLL | PWC_LDO_HRC, DISABLE);
-#endif
-}
-
-void rt_hw_board_pm_sleep_shutdown_init(void)
-{
-    _pm_sleep_common_init(RT_TRUE);
-}
-
 void rt_hw_board_pm_sysclk_cfg(uint8_t run_mode)
 {
     switch (run_mode)
@@ -497,3 +410,17 @@ rt_err_t rt_hw_board_pulse_encoder_tmr6_init(void)
     return RT_EOK;
 }
 #endif
+
+#if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
+rt_err_t rt_hw_usbfs_board_init(void)
+{
+    stc_gpio_init_t stcGpioCfg;
+    (void)GPIO_StructInit(&stcGpioCfg);
+#if defined(BSP_USING_USBFS)
+    stcGpioCfg.u16PinAttr = PIN_ATTR_ANALOG;
+    (void)GPIO_Init(USBF_DM_PORT, USBF_DM_PIN, &stcGpioCfg);
+    (void)GPIO_Init(USBF_DP_PORT, USBF_DP_PIN, &stcGpioCfg);
+#endif
+    return RT_EOK;
+}
+#endif

bsp/hc32/ev_hc32f472_lqfp100/board/board_config.h

@@ -64,7 +64,7 @@
     #define I2C1_SCL_PIN                    (GPIO_PIN_06)
     #define I2C1_SCL_FUNC                   (GPIO_FUNC_55)
 #endif
- // TODO, ch2/3 for test only
+// TODO, ch2/3 for test only
 #if defined(BSP_USING_I2C2)
     #define I2C2_SDA_PORT                   (GPIO_PORT_A)
     #define I2C2_SDA_PIN                    (GPIO_PIN_09)
@@ -87,18 +87,18 @@
 
 /***********  ADC configure *********/
 #if defined(BSP_USING_ADC1)
-    #define ADC1_CH_PORT                    (GPIO_PORT_A)
-    #define ADC1_CH_PIN                     (GPIO_PIN_06)
+    #define ADC1_CH_PORT                    (GPIO_PORT_C)   /* Default ADC123_IN10 */
+    #define ADC1_CH_PIN                     (GPIO_PIN_00)
 #endif
 
 #if defined(BSP_USING_ADC2)
-    #define ADC2_CH_PORT                    (GPIO_PORT_C)
-    #define ADC2_CH_PIN                     (GPIO_PIN_04)
+    #define ADC2_CH_PORT                    (GPIO_PORT_C)   /* Default ADC123_IN11 */
+    #define ADC2_CH_PIN                     (GPIO_PIN_01)
 #endif
 
 #if defined(BSP_USING_ADC3)
-    #define ADC3_CH_PORT                    (GPIO_PORT_C)
-    #define ADC3_CH_PIN                     (GPIO_PIN_01)
+    #define ADC3_CH_PORT                    (GPIO_PORT_C)   /* Default ADC123_IN12 */
+    #define ADC3_CH_PIN                     (GPIO_PIN_02)
 #endif
 
 /***********  DAC configure *********/
@@ -127,7 +127,7 @@
 
     #define CAN2_RX_PORT                    (GPIO_PORT_D)
     #define CAN2_RX_PIN                     (GPIO_PIN_11)
-    #define CAN2_RX_PIN_FUNC                (GPIO_FUNC_61)
+    #define CAN2_RX_PIN_FUNC                (GPIO_FUNC_63)
 #endif
 
 #if defined(BSP_USING_CAN3)
@@ -178,80 +178,80 @@
     #if defined(BSP_USING_PWM_TMRA_1)
         #if defined(BSP_USING_PWM_TMRA_1_CH1)
             #define PWM_TMRA_1_CH1_PORT             (GPIO_PORT_A)
-            #define PWM_TMRA_1_CH1_PIN              (GPIO_PIN_08)
-            #define PWM_TMRA_1_CH1_PIN_FUNC         (GPIO_FUNC_4)
+            #define PWM_TMRA_1_CH1_PIN              (GPIO_PIN_00)
+            #define PWM_TMRA_1_CH1_PIN_FUNC         (GPIO_FUNC_15)
         #endif
         #if defined(BSP_USING_PWM_TMRA_1_CH2)
             #define PWM_TMRA_1_CH2_PORT             (GPIO_PORT_A)
-            #define PWM_TMRA_1_CH2_PIN              (GPIO_PIN_09)
-            #define PWM_TMRA_1_CH2_PIN_FUNC         (GPIO_FUNC_4)
+            #define PWM_TMRA_1_CH2_PIN              (GPIO_PIN_01)
+            #define PWM_TMRA_1_CH2_PIN_FUNC         (GPIO_FUNC_15)
         #endif
         #if defined(BSP_USING_PWM_TMRA_1_CH3)
             #define PWM_TMRA_1_CH3_PORT             (GPIO_PORT_A)
-            #define PWM_TMRA_1_CH3_PIN              (GPIO_PIN_10)
-            #define PWM_TMRA_1_CH3_PIN_FUNC         (GPIO_FUNC_4)
+            #define PWM_TMRA_1_CH3_PIN              (GPIO_PIN_02)
+            #define PWM_TMRA_1_CH3_PIN_FUNC         (GPIO_FUNC_15)
         #endif
         #if defined(BSP_USING_PWM_TMRA_1_CH4)
             #define PWM_TMRA_1_CH4_PORT             (GPIO_PORT_A)
-            #define PWM_TMRA_1_CH4_PIN              (GPIO_PIN_11)
-            #define PWM_TMRA_1_CH4_PIN_FUNC         (GPIO_FUNC_4)
+            #define PWM_TMRA_1_CH4_PIN              (GPIO_PIN_03)
+            #define PWM_TMRA_1_CH4_PIN_FUNC         (GPIO_FUNC_15)
         #endif
     #endif
 
     #if defined(BSP_USING_PWM_TMRA_2)
         #if defined(BSP_USING_PWM_TMRA_2_CH1)
-            #define PWM_TMRA_2_CH1_PORT             (GPIO_PORT_A)
-            #define PWM_TMRA_2_CH1_PIN              (GPIO_PIN_00)
-            #define PWM_TMRA_2_CH1_PIN_FUNC         (GPIO_FUNC_4)
+            #define PWM_TMRA_2_CH1_PORT             (GPIO_PORT_C)
+            #define PWM_TMRA_2_CH1_PIN              (GPIO_PIN_06)
+            #define PWM_TMRA_2_CH1_PIN_FUNC         (GPIO_FUNC_16)
         #endif
         #if defined(BSP_USING_PWM_TMRA_2_CH2)
-            #define PWM_TMRA_2_CH2_PORT             (GPIO_PORT_A)
-            #define PWM_TMRA_2_CH2_PIN              (GPIO_PIN_01)
-            #define PWM_TMRA_2_CH2_PIN_FUNC         (GPIO_FUNC_4)
+            #define PWM_TMRA_2_CH2_PORT             (GPIO_PORT_C)
+            #define PWM_TMRA_2_CH2_PIN              (GPIO_PIN_07)
+            #define PWM_TMRA_2_CH2_PIN_FUNC         (GPIO_FUNC_16)
         #endif
         #if defined(BSP_USING_PWM_TMRA_2_CH3)
-            #define PWM_TMRA_2_CH3_PORT             (GPIO_PORT_A)
-            #define PWM_TMRA_2_CH3_PIN              (GPIO_PIN_02)
-            #define PWM_TMRA_2_CH3_PIN_FUNC         (GPIO_FUNC_4)
+            #define PWM_TMRA_2_CH3_PORT             (GPIO_PORT_C)
+            #define PWM_TMRA_2_CH3_PIN              (GPIO_PIN_08)
+            #define PWM_TMRA_2_CH3_PIN_FUNC         (GPIO_FUNC_16)
         #endif
         #if defined(BSP_USING_PWM_TMRA_2_CH4)
-            #define PWM_TMRA_2_CH4_PORT             (GPIO_PORT_A)
-            #define PWM_TMRA_2_CH4_PIN              (GPIO_PIN_03)
-            #define PWM_TMRA_2_CH4_PIN_FUNC         (GPIO_FUNC_4)
+            #define PWM_TMRA_2_CH4_PORT             (GPIO_PORT_C)
+            #define PWM_TMRA_2_CH4_PIN              (GPIO_PIN_09)
+            #define PWM_TMRA_2_CH4_PIN_FUNC         (GPIO_FUNC_16)
         #endif
     #endif
 
     /***********  PWM_TMR4 configure *********/
     #if defined(BSP_USING_PWM_TMR4_1)
         #if defined(BSP_USING_PWM_TMR4_1_OUH)
-            #define PWM_TMR4_1_OUH_PORT             (GPIO_PORT_A)
-            #define PWM_TMR4_1_OUH_PIN              (GPIO_PIN_08)
-            #define PWM_TMR4_1_OUH_PIN_FUNC         (GPIO_FUNC_2)
+            #define PWM_TMR4_1_OUH_PORT             (GPIO_PORT_B)
+            #define PWM_TMR4_1_OUH_PIN              (GPIO_PIN_14)
+            #define PWM_TMR4_1_OUH_PIN_FUNC         (GPIO_FUNC_20)
         #endif
         #if defined(BSP_USING_PWM_TMR4_1_OUL)
-            #define PWM_TMR4_1_OUL_PORT             (GPIO_PORT_A)
-            #define PWM_TMR4_1_OUL_PIN              (GPIO_PIN_07)
-            #define PWM_TMR4_1_OUL_PIN_FUNC         (GPIO_FUNC_2)
+            #define PWM_TMR4_1_OUL_PORT             (GPIO_PORT_B)
+            #define PWM_TMR4_1_OUL_PIN              (GPIO_PIN_15)
+            #define PWM_TMR4_1_OUL_PIN_FUNC         (GPIO_FUNC_20)
         #endif
         #if defined(BSP_USING_PWM_TMR4_1_OVH)
-            #define PWM_TMR4_1_OVH_PORT             (GPIO_PORT_A)
-            #define PWM_TMR4_1_OVH_PIN              (GPIO_PIN_09)
-            #define PWM_TMR4_1_OVH_PIN_FUNC         (GPIO_FUNC_2)
+            #define PWM_TMR4_1_OVH_PORT             (GPIO_PORT_D)
+            #define PWM_TMR4_1_OVH_PIN              (GPIO_PIN_08)
+            #define PWM_TMR4_1_OVH_PIN_FUNC         (GPIO_FUNC_20)
         #endif
         #if defined(BSP_USING_PWM_TMR4_1_OVL)
-            #define PWM_TMR4_1_OVL_PORT             (GPIO_PORT_B)
-            #define PWM_TMR4_1_OVL_PIN              (GPIO_PIN_00)
-            #define PWM_TMR4_1_OVL_PIN_FUNC         (GPIO_FUNC_2)
+            #define PWM_TMR4_1_OVL_PORT             (GPIO_PORT_D)
+            #define PWM_TMR4_1_OVL_PIN              (GPIO_PIN_09)
+            #define PWM_TMR4_1_OVL_PIN_FUNC         (GPIO_FUNC_20)
         #endif
         #if defined(BSP_USING_PWM_TMR4_1_OWH)
-            #define PWM_TMR4_1_OWH_PORT             (GPIO_PORT_A)
+            #define PWM_TMR4_1_OWH_PORT             (GPIO_PORT_D)
             #define PWM_TMR4_1_OWH_PIN              (GPIO_PIN_10)
-            #define PWM_TMR4_1_OWH_PIN_FUNC         (GPIO_FUNC_2)
+            #define PWM_TMR4_1_OWH_PIN_FUNC         (GPIO_FUNC_20)
         #endif
         #if defined(BSP_USING_PWM_TMR4_1_OWL)
-            #define PWM_TMR4_1_OWL_PORT             (GPIO_PORT_B)
-            #define PWM_TMR4_1_OWL_PIN              (GPIO_PIN_01)
-            #define PWM_TMR4_1_OWL_PIN_FUNC         (GPIO_FUNC_2)
+            #define PWM_TMR4_1_OWL_PORT             (GPIO_PORT_D)
+            #define PWM_TMR4_1_OWL_PIN              (GPIO_PIN_11)
+            #define PWM_TMR4_1_OWL_PIN_FUNC         (GPIO_FUNC_20)
         #endif
     #endif
 
@@ -260,12 +260,12 @@
         #if defined(BSP_USING_PWM_TMR6_1_A)
             #define PWM_TMR6_1_A_PORT               (GPIO_PORT_A)
             #define PWM_TMR6_1_A_PIN                (GPIO_PIN_08)
-            #define PWM_TMR6_1_A_PIN_FUNC           (GPIO_FUNC_3)
+            #define PWM_TMR6_1_A_PIN_FUNC           (GPIO_FUNC_13)
         #endif
         #if defined(BSP_USING_PWM_TMR6_1_B)
-            #define PWM_TMR6_1_B_PORT               (GPIO_PORT_A)
-            #define PWM_TMR6_1_B_PIN                (GPIO_PIN_07)
-            #define PWM_TMR6_1_B_PIN_FUNC           (GPIO_FUNC_3)
+            #define PWM_TMR6_1_B_PORT               (GPIO_PORT_C)
+            #define PWM_TMR6_1_B_PIN                (GPIO_PIN_10)
+            #define PWM_TMR6_1_B_PIN_FUNC           (GPIO_FUNC_12)
         #endif
     #endif
 
@@ -305,25 +305,39 @@
     #if defined(BSP_USING_TMRA_PULSE_ENCODER)
         #if defined(BSP_USING_PULSE_ENCODER_TMRA_1)
             #define PULSE_ENCODER_TMRA_1_A_PORT      (GPIO_PORT_A)
-            #define PULSE_ENCODER_TMRA_1_A_PIN       (GPIO_PIN_08)
-            #define PULSE_ENCODER_TMRA_1_A_PIN_FUNC  (GPIO_FUNC_4)
+            #define PULSE_ENCODER_TMRA_1_A_PIN       (GPIO_PIN_00)
+            #define PULSE_ENCODER_TMRA_1_A_PIN_FUNC  (GPIO_FUNC_15)
             #define PULSE_ENCODER_TMRA_1_B_PORT      (GPIO_PORT_A)
-            #define PULSE_ENCODER_TMRA_1_B_PIN       (GPIO_PIN_09)
-            #define PULSE_ENCODER_TMRA_1_B_PIN_FUNC  (GPIO_FUNC_4)
+            #define PULSE_ENCODER_TMRA_1_B_PIN       (GPIO_PIN_01)
+            #define PULSE_ENCODER_TMRA_1_B_PIN_FUNC  (GPIO_FUNC_15)
         #endif /* BSP_USING_PULSE_ENCODER_TMRA_1 */
     #endif /* BSP_USING_TMRA_PULSE_ENCODER */
 
     #if defined(BSP_USING_TMR6_PULSE_ENCODER)
         #if defined(BSP_USING_PULSE_ENCODER_TMR6_1)
             #define PULSE_ENCODER_TMR6_1_A_PORT      (GPIO_PORT_A)
-            #define PULSE_ENCODER_TMR6_1_A_PIN       (GPIO_PIN_08)
-            #define PULSE_ENCODER_TMR6_1_A_PIN_FUNC  (GPIO_FUNC_3)
+            #define PULSE_ENCODER_TMR6_1_A_PIN       (GPIO_PIN_03)
+            #define PULSE_ENCODER_TMR6_1_A_PIN_FUNC  (GPIO_FUNC_11)
             #define PULSE_ENCODER_TMR6_1_B_PORT      (GPIO_PORT_A)
             #define PULSE_ENCODER_TMR6_1_B_PIN       (GPIO_PIN_07)
-            #define PULSE_ENCODER_TMR6_1_B_PIN_FUNC  (GPIO_FUNC_3)
+            #define PULSE_ENCODER_TMR6_1_B_PIN_FUNC  (GPIO_FUNC_14)
         #endif /* BSP_USING_PULSE_ENCODER_TMR6_1 */
     #endif /* BSP_USING_TMR6_PULSE_ENCODER */
 #endif /* RT_USING_PULSE_ENCODER */
 
+#if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
+    #if defined(BSP_USING_USBFS)
+        /* USBFS Core*/
+        #define USBF_DP_PORT                    (GPIO_PORT_A)
+        #define USBF_DP_PIN                     (GPIO_PIN_12)
+        #define USBF_DM_PORT                    (GPIO_PORT_A)
+        #define USBF_DM_PIN                     (GPIO_PIN_11)
+        #define USBF_VBUS_PORT                  (GPIO_PORT_A)
+        #define USBF_VBUS_PIN                   (GPIO_PIN_09)
+        #define USBF_DRVVBUS_PORT               (GPIO_PORT_C)
+        #define USBF_DRVVBUS_PIN                (GPIO_PIN_09)
+    #endif
+#endif
+
 #endif
 

bsp/hc32/ev_hc32f472_lqfp100/board/config/adc_config.h

@@ -1,6 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -32,7 +31,7 @@ extern "C" {
        .hard_trig_src                   = ADC_HARDTRIG_EVT0,                    \
        .internal_trig0_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig0_comtrg1_enable   = RT_FALSE,                             \
-       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_A,                 \
+       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_B,                 \
        .internal_trig1_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig1_comtrg1_enable   = RT_FALSE,                             \
        .internal_trig1_sel              = EVT_SRC_MAX,                          \
@@ -75,7 +74,7 @@ extern "C" {
        .hard_trig_src                   = ADC_HARDTRIG_EVT0,                    \
        .internal_trig0_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig0_comtrg1_enable   = RT_FALSE,                             \
-       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_A,                 \
+       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_B,                 \
        .internal_trig1_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig1_comtrg1_enable   = RT_FALSE,                             \
        .internal_trig1_sel              = EVT_SRC_MAX,                          \
@@ -118,7 +117,7 @@ extern "C" {
        .hard_trig_src                   = ADC_HARDTRIG_EVT0,                    \
        .internal_trig0_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig0_comtrg1_enable   = RT_FALSE,                             \
-       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_A,                 \
+       .internal_trig0_sel              = EVT_SRC_TMR0_1_CMP_B,                 \
        .internal_trig1_comtrg0_enable   = RT_FALSE,                             \
        .internal_trig1_comtrg1_enable   = RT_FALSE,                             \
        .internal_trig1_sel              = EVT_SRC_MAX,                          \

bsp/hc32/ev_hc32f472_lqfp100/board/config/can_config.h

@@ -1,6 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -49,6 +48,21 @@ extern "C" {
 #endif /* CAN2_INIT_PARAMS */
 #endif /* BSP_USING_CAN2 */
 
+#ifdef BSP_USING_CAN3
+#define CAN3_CLOCK_SEL                  (CAN_CLOCK_SRC_40M)
+#ifdef RT_CAN_USING_CANFD
+#define CAN3_CANFD_MODE                 (CAN_FD_MD_ISO)
+#endif
+#define CAN3_NAME                       ("can3")
+#ifndef CAN3_INIT_PARAMS
+#define CAN3_INIT_PARAMS                                    \
+    {                                                       \
+       .name = CAN3_NAME,                                   \
+       .single_trans_mode = RT_FALSE                        \
+    }
+#endif /* CAN3_INIT_PARAMS */
+#endif /* BSP_USING_CAN3 */
+
 /* Bit time config
   Restrictions: u32TimeSeg1 >= u32TimeSeg2 + 1, u32TimeSeg2 >= u32SJW.
 

bsp/hc32/ev_hc32f472_lqfp100/board/config/dac_config.h

@@ -36,6 +36,24 @@ extern "C" {
 #endif /* DAC2_INIT_PARAMS */
 #endif /* BSP_USING_DAC2 */
 
+#ifdef BSP_USING_DAC3
+#ifndef DAC3_INIT_PARAMS
+#define DAC3_INIT_PARAMS                                                    \
+    {                                                                       \
+       .name                      = "dac3",                                 \
+    }
+#endif /* DAC3_INIT_PARAMS */
+#endif /* BSP_USING_DAC3 */
+
+#ifdef BSP_USING_DAC4
+#ifndef DAC4_INIT_PARAMS
+#define DAC4_INIT_PARAMS                                                    \
+    {                                                                       \
+       .name                      = "dac4",                                 \
+    }
+#endif /* DAC4_INIT_PARAMS */
+#endif /* BSP_USING_DAC4 */
+
 #ifdef __cplusplus
 }
 #endif

bsp/hc32/ev_hc32f472_lqfp100/board/config/irq_config.h

@@ -199,15 +199,128 @@ extern "C" {
 #endif/* BSP_USING_TMRA_6 */
 
 #if defined(BSP_USING_CAN1)
-#define BSP_CAN1_IRQ_NUM                MCAN1_INT0_IRQn
+#define BSP_CAN1_IRQ_NUM                CAN1_INT_IRQn
 #define BSP_CAN1_IRQ_PRIO               DDL_IRQ_PRIO_DEFAULT
 #endif/* BSP_USING_CAN1 */
 
+#if defined(BSP_USING_CAN2)
+#define BSP_CAN2_IRQ_NUM                CAN2_INT_IRQn
+#define BSP_CAN2_IRQ_PRIO               DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_CAN2 */
+
+#if defined(BSP_USING_CAN3)
+#define BSP_CAN3_IRQ_NUM                CAN3_INT_IRQn
+#define BSP_CAN3_IRQ_PRIO               DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_CAN3 */
+
 #if defined(RT_USING_ALARM)
 #define BSP_RTC_ALARM_IRQ_NUM           RTC_IRQn
 #define BSP_RTC_ALARM_IRQ_PRIO          DDL_IRQ_PRIO_DEFAULT
 #endif/* RT_USING_ALARM */
 
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_1)
+#define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM   TMRA_1_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM   TMRA_1_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_1 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_2)
+#define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM   TMRA_2_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM   TMRA_2_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_2 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_3)
+#define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM   TMRA_3_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM   TMRA_3_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_3 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_4)
+#define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM   TMRA_4_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM   TMRA_4_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_4 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_5)
+#define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM   TMRA_5_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM   TMRA_5_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_5 */
+#if defined(BSP_USING_PULSE_ENCODER_TMRA_6)
+#define BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM   TMRA_6_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM   TMRA_6_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMRA_6 */
+
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_1)
+#define BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM   TMR6_1_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM   TMR6_1_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_1 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_2)
+#define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM   TMR6_2_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM   TMR6_2_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_2 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_3)
+#define BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM   TMR6_3_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM   TMR6_3_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_3 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_4)
+#define BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_NUM   TMR6_4_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_NUM   TMR6_4_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_4 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_5)
+#define BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_NUM   TMR6_5_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_NUM   TMR6_5_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_5 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_6)
+#define BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_NUM   TMR6_6_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_NUM   TMR6_6_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_6 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_7)
+#define BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_NUM   TMR6_7_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_NUM   TMR6_7_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_7 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_8)
+#define BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_NUM   TMR6_8_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_NUM   TMR6_8_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_8 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_9)
+#define BSP_PULSE_ENCODER_TMR6_9_OVF_IRQ_NUM   TMR6_9_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_9_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_9_UDF_IRQ_NUM   TMR6_9_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_9_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_9 */
+#if defined(BSP_USING_PULSE_ENCODER_TMR6_10)
+#define BSP_PULSE_ENCODER_TMR6_10_OVF_IRQ_NUM   TMR6_10_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_10_OVF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#define BSP_PULSE_ENCODER_TMR6_10_UDF_IRQ_NUM   TMR6_10_OVF_UDF_IRQn
+#define BSP_PULSE_ENCODER_TMR6_10_UDF_IRQ_PRIO  DDL_IRQ_PRIO_DEFAULT
+#endif/* BSP_USING_PULSE_ENCODER_TMR6_10 */
+
+#if defined(BSP_USING_USBD) || defined(BSP_USING_USBH)
+#define BSP_USBFS_GLB_IRQ_NUM           USBFS_GLB_IRQn
+#define BSP_USBFS_GLB_IRQ_PRIO          DDL_IRQ_PRIO_DEFAULT
+#endif
+
 #ifdef __cplusplus
 }
 #endif

bsp/hc32/ev_hc32f472_lqfp100/board/config/pulse_encoder_config.h

@@ -25,7 +25,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_1_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_1,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_1,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_1,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -33,12 +33,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_1_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_1_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_1_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_1_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue      = 1000UL,                                           \
        .name                = "pulse_a1"                                        \
@@ -51,7 +51,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_2_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_2,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_2,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_2,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -59,12 +59,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_2_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_2_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_2_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_2_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a2"                                            \
@@ -77,7 +77,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_3_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_3,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_3,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_3,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -85,12 +85,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_3_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_3_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_3_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_3_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a3"                                            \
@@ -103,7 +103,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_4_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_4,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_4,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_4,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -111,12 +111,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_4_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_4_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_4_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_4_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a4"                                            \
@@ -129,7 +129,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_5_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_5,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_5,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_5,                                   \
        .hw_count =                                                              \
         {                                                                       \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -137,12 +137,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_5_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_5_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_5_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_5_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a5"                                            \
@@ -155,7 +155,7 @@ extern "C" {
 #define PULSE_ENCODER_TMRA_6_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMRA_6,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_6,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMRA_6,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
@@ -163,12 +163,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_6_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_6_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMRA_6_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMRA_6_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_a6"                                            \
@@ -176,168 +176,12 @@ extern "C" {
 #endif /* PULSE_ENCODER_TMRA_6_CONFIG */
 #endif /* BSP_USING_PULSE_ENCODER_TMRA_6 */
 
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_7
-#ifndef PULSE_ENCODER_TMRA_7_CONFIG
-#define PULSE_ENCODER_TMRA_7_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_7,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_7,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_7_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_7_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_7_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_7_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_7_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_7_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a7"                                            \
-    }
-#endif /* PULSE_ENCODER_TMRA_7_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_7 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_8
-#ifndef PULSE_ENCODER_TMRA_8_CONFIG
-#define PULSE_ENCODER_TMRA_8_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_8,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_8,                                   \
-       .hw_count =                                                              \
-        {                                                                       \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_8_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_8_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_8_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_8_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_8_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_8_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a8"                                            \
-    }
-#endif /* PULSE_ENCODER_TMRA_8_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_8 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_9
-#ifndef PULSE_ENCODER_TMRA_9_CONFIG
-#define PULSE_ENCODER_TMRA_9_CONFIG                                             \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_9,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_9,                                   \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_9_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_9_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_9_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMRA_9_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_9_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_9_UDF_IRQ_PRIO,            \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a9"                                            \
-    }
-#endif /* PULSE_ENCODER_TMRA_9_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_9 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_10
-#ifndef PULSE_ENCODER_TMRA_10_CONFIG
-#define PULSE_ENCODER_TMRA_10_CONFIG                                            \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_10,                                           \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_10,                                  \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_10_OVF,                              \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_10_OVF_IRQ_NUM,            \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_10_OVF_IRQ_PRIO,           \
-            .enIntSrc_UDF   = INT_SRC_TMRA_10_UDF,                              \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_10_UDF_IRQ_NUM,            \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_10_UDF_IRQ_PRIO,           \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a10"                                           \
-    }
-#endif /* PULSE_ENCODER_TMRA_10_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_10 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_11
-#ifndef PULSE_ENCODER_TMRA_11_CONFIG
-#define PULSE_ENCODER_TMRA_11_CONFIG                                            \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_11,                                           \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_11,                                  \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_11_OVF,                              \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_11_OVF_IRQ_NUM,            \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_11_OVF_IRQ_PRIO,           \
-            .enIntSrc_UDF   = INT_SRC_TMRA_11_UDF,                              \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_11_UDF_IRQ_NUM,            \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_11_UDF_IRQ_PRIO,           \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a11"                                           \
-    }
-#endif /* PULSE_ENCODER_TMRA_11_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_11 */
-
-#ifdef BSP_USING_PULSE_ENCODER_TMRA_12
-#ifndef PULSE_ENCODER_TMRA_12_CONFIG
-#define PULSE_ENCODER_TMRA_12_CONFIG                                            \
-    {                                                                           \
-       .tmr_handler     = CM_TMRA_12,                                           \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMRA_12,                                  \
-       .hw_count =                                                              \
-       {                                                                        \
-            .u16CountUpCond     = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING,       \
-            .u16CountDownCond   = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING,     \
-       },                                                                       \
-       .isr =                                                                   \
-       {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMRA_12_OVF,                              \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMRA_12_OVF_IRQ_NUM,            \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMRA_12_OVF_IRQ_PRIO,           \
-            .enIntSrc_UDF   = INT_SRC_TMRA_12_UDF,                              \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMRA_12_UDF_IRQ_NUM,            \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMRA_12_UDF_IRQ_PRIO,           \
-       },                                                                       \
-       .u32PeriodValue  = 1000UL,                                               \
-       .name            = "pulse_a12"                                           \
-    }
-#endif /* PULSE_ENCODER_TMRA_12_CONFIG */
-#endif /* BSP_USING_PULSE_ENCODER_TMRA_12 */
-
 #ifdef BSP_USING_PULSE_ENCODER_TMR6_1
 #ifndef PULSE_ENCODER_TMR6_1_CONFIG
 #define PULSE_ENCODER_TMR6_1_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_1,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_1,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_1,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -345,12 +189,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_1_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_1_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_1_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_1_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_61"                                            \
@@ -363,7 +207,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_2_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_2,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_2,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_2,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -371,12 +215,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_2_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_2_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_2_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_2_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_62"                                            \
@@ -389,7 +233,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_3_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_3,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_3,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_3,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -397,12 +241,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_3_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_3_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_3_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_3_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_63"                                            \
@@ -415,7 +259,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_4_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_4,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_4,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_4,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -423,12 +267,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_4_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_4_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_4_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_4_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_64"                                            \
@@ -441,7 +285,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_5_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_5,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_5,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_5,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -449,12 +293,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_5_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_5_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_5_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_5_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_65"                                            \
@@ -467,7 +311,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_6_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_6,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_6,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_6,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -475,12 +319,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_6_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_6_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_6_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_6_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_66"                                            \
@@ -493,7 +337,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_7_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_7,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_7,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_7,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -501,12 +345,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_7_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_7_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_7_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_7_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_67"                                            \
@@ -519,7 +363,7 @@ extern "C" {
 #define PULSE_ENCODER_TMR6_8_CONFIG                                             \
     {                                                                           \
        .tmr_handler     = CM_TMR6_8,                                            \
-       .u32Fcg2Periph   = FCG2_PERIPH_TMR6_8,                                   \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_8,                                   \
        .hw_count =                                                              \
        {                                                                        \
             .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
@@ -527,12 +371,12 @@ extern "C" {
        },                                                                       \
        .isr =                                                                   \
        {                                                                        \
-            .enIntSrc_OVF   = INT_SRC_TMR6_8_OVF,                               \
-            .enIRQn_OVF     = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_NUM,             \
-            .u8Int_Prio_OVF = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_PRIO,            \
-            .enIntSrc_UDF   = INT_SRC_TMR6_8_UDF,                               \
-            .enIRQn_UDF     = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_NUM,             \
-            .u8Int_Prio_UDF = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_PRIO,            \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_8_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_8_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_PRIO,            \
        },                                                                       \
        .u32PeriodValue  = 1000UL,                                               \
        .name            = "pulse_68"                                            \
@@ -540,6 +384,58 @@ extern "C" {
 #endif /* PULSE_ENCODER_TMR6_8_CONFIG */
 #endif /* BSP_USING_PULSE_ENCODER_TMR6_8 */
 
+#ifdef BSP_USING_PULSE_ENCODER_TMR6_9
+#ifndef PULSE_ENCODER_TMR6_9_CONFIG
+#define PULSE_ENCODER_TMR6_9_CONFIG                                             \
+    {                                                                           \
+       .tmr_handler     = CM_TMR6_9,                                            \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_9,                                   \
+       .hw_count =                                                              \
+       {                                                                        \
+            .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
+            .u32CountDownCond   = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING,     \
+       },                                                                       \
+       .isr =                                                                   \
+       {                                                                        \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_9_OVF,                               \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_9_OVF_IRQ_NUM,             \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_9_OVF_IRQ_PRIO,            \
+            .enIntSrc_Udf   = INT_SRC_TMR6_9_UDF,                               \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_9_UDF_IRQ_NUM,             \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_9_UDF_IRQ_PRIO,            \
+       },                                                                       \
+       .u32PeriodValue  = 1000UL,                                               \
+       .name            = "pulse_69"                                            \
+    }
+#endif /* PULSE_ENCODER_TMR6_9_CONFIG */
+#endif /* BSP_USING_PULSE_ENCODER_TMR6_9 */
+
+#ifdef BSP_USING_PULSE_ENCODER_TMR6_10
+#ifndef PULSE_ENCODER_TMR6_10_CONFIG
+#define PULSE_ENCODER_TMR6_10_CONFIG                                            \
+    {                                                                           \
+       .tmr_handler     = CM_TMR6_10,                                           \
+       .u32PeriphClock  = FCG2_PERIPH_TMR6_10,                                  \
+       .hw_count =                                                              \
+       {                                                                        \
+            .u32CountUpCond     = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING,       \
+            .u32CountDownCond   = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING,     \
+       },                                                                       \
+       .isr =                                                                   \
+       {                                                                        \
+            .enIntSrc_Ovf   = INT_SRC_TMR6_10_OVF,                              \
+            .enIRQn_Ovf     = BSP_PULSE_ENCODER_TMR6_10_OVF_IRQ_NUM,            \
+            .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_10_OVF_IRQ_PRIO,           \
+            .enIntSrc_Udf   = INT_SRC_TMR6_10_UDF,                              \
+            .enIRQn_Udf     = BSP_PULSE_ENCODER_TMR6_10_UDF_IRQ_NUM,            \
+            .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_10_UDF_IRQ_PRIO,           \
+       },                                                                       \
+       .u32PeriodValue  = 1000UL,                                               \
+       .name            = "pulse_6a"                                            \
+    }
+#endif /* PULSE_ENCODER_TMR6_10_CONFIG */
+#endif /* BSP_USING_PULSE_ENCODER_TMR6_10 */
+
 #endif /* RT_USING_PULSE_ENCODER */
 
 #endif /* __PULSE_ENCODER_CONFIG_H__ */

bsp/hc32/ev_hc32f472_lqfp100/board/config/pwm_tmr_config.h

@@ -206,192 +206,6 @@ extern "C" {
 #endif /* PWM_TMRA_6_CONFIG */
 #endif /* BSP_USING_PWM_TMRA_6 */
 
-#ifdef BSP_USING_PWM_TMRA_7
-#ifndef PWM_TMRA_7_CONFIG
-#define PWM_TMRA_7_CONFIG                                       \
-    {                                                           \
-        .name                           = "pwm_a7",             \
-        .instance                       = CM_TMRA_7,            \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_7_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_7 */
-
-#ifdef BSP_USING_PWM_TMRA_8
-#ifndef PWM_TMRA_8_CONFIG
-#define PWM_TMRA_8_CONFIG                                       \
-    {                                                           \
-        .name                           = "pwm_a8",             \
-        .instance                       = CM_TMRA_8,            \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_8_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_8 */
-
-#ifdef BSP_USING_PWM_TMRA_9
-#ifndef PWM_TMRA_9_CONFIG
-#define PWM_TMRA_9_CONFIG                                       \
-    {                                                           \
-        .name                           = "pwm_a9",             \
-        .instance                       = CM_TMRA_9,            \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_9_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_9 */
-
-#ifdef BSP_USING_PWM_TMRA_10
-#ifndef PWM_TMRA_10_CONFIG
-#define PWM_TMRA_10_CONFIG                                      \
-    {                                                           \
-        .name                           = "pwm_a10",            \
-        .instance                       = CM_TMRA_10,           \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_10_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_10 */
-
-#ifdef BSP_USING_PWM_TMRA_11
-#ifndef PWM_TMRA_11_CONFIG
-#define PWM_TMRA_11_CONFIG                                      \
-    {                                                           \
-        .name                           = "pwm_a11",            \
-        .instance                       = CM_TMRA_11,           \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_11_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_11 */
-
-#ifdef BSP_USING_PWM_TMRA_12
-#ifndef PWM_TMRA_12_CONFIG
-#define PWM_TMRA_12_CONFIG                                      \
-    {                                                           \
-        .name                           = "pwm_a12",            \
-        .instance                       = CM_TMRA_12,           \
-        .channel                        = 0,                    \
-        .stcTmraInit =                                          \
-        {                                                       \
-            .u8CountSrc                 = TMRA_CNT_SRC_SW,      \
-            .u32PeriodValue             = 0xFFFF,               \
-            .sw_count =                                         \
-            {                                                   \
-                .u8ClockDiv             = TMRA_CLK_DIV1,        \
-                .u8CountMode            = TMRA_MD_SAWTOOTH,     \
-                .u8CountDir             = TMRA_DIR_DOWN,        \
-            },                                                  \
-            .u8CountReload              = TMRA_CNT_RELOAD_ENABLE\
-        },                                                      \
-        .stcPwmInit =                                           \
-        {                                                       \
-            .u32CompareValue            = 0x0000,               \
-            .u16StartPolarity           = TMRA_PWM_LOW,         \
-            .u16StopPolarity            = TMRA_PWM_LOW,         \
-            .u16CompareMatchPolarity    = TMRA_PWM_HIGH,        \
-            .u16PeriodMatchPolarity     = TMRA_PWM_LOW,         \
-        },                                                      \
-    }
-#endif /* PWM_TMRA_12_CONFIG */
-#endif /* BSP_USING_PWM_TMRA_12 */
-
 #endif /* BSP_USING_PWM_TMRA */
 
 #ifdef BSP_USING_PWM_TMR4
@@ -401,7 +215,7 @@ extern "C" {
 #define PWM_TMR4_1_CONFIG                                       \
     {                                                           \
         .name                           = "pwm_t41",            \
-        .instance                       = CM_TMR4_1,            \
+        .instance                       = CM_TMR4,              \
         .channel                        = 0,                    \
         .stcTmr4Init =                                          \
         {                                                       \
@@ -428,70 +242,6 @@ extern "C" {
 #endif /* PWM_TMR4_1_CONFIG */
 #endif /* BSP_USING_PWM_TMR4_1 */
 
-#ifdef BSP_USING_PWM_TMR4_2
-#ifndef PWM_TMR4_2_CONFIG
-#define PWM_TMR4_2_CONFIG                                       \
-    {                                                           \
-        .name                           = "pwm_t42",            \
-        .instance                       = CM_TMR4_2,            \
-        .channel                        = 0,                    \
-        .stcTmr4Init =                                          \
-        {                                                       \
-            .u16ClockDiv                = TMR4_CLK_DIV1,        \
-            .u16PeriodValue             = 0xFFFFU,              \
-            .u16CountMode               = TMR4_MD_SAWTOOTH,     \
-            .u16ClockSrc               = TMR4_CLK_SRC_INTERNCLK,\
-        },                                                      \
-        .stcTmr4OcInit =                                        \
-        {                                                       \
-            .u16CompareValue            = 0x0000,               \
-            .u16OcInvalidPolarity       = TMR4_OC_INVD_LOW,     \
-            .u16CompareModeBufCond     = TMR4_OC_BUF_COND_IMMED,\
-            .u16CompareValueBufCond    = TMR4_OC_BUF_COND_PEAK, \
-            .u16BufLinkTransObject      = 0U,                   \
-        },                                                      \
-        .stcTmr4PwmInit =                                       \
-        {                                                       \
-            .u16Mode                    = TMR4_PWM_MD_THROUGH,  \
-            .u16ClockDiv                = TMR4_PWM_CLK_DIV1,    \
-            .u16Polarity           = TMR4_PWM_OXH_HOLD_OXL_HOLD,\
-        },                                                      \
-    }
-#endif /* PWM_TMR4_2_CONFIG */
-#endif /* BSP_USING_PWM_TMR4_2 */
-
-#ifdef BSP_USING_PWM_TMR4_3
-#ifndef PWM_TMR4_3_CONFIG
-#define PWM_TMR4_3_CONFIG                                       \
-    {                                                           \
-        .name                           = "pwm_t43",            \
-        .instance                       = CM_TMR4_3,            \
-        .channel                        = 0,                    \
-        .stcTmr4Init =                                          \
-        {                                                       \
-            .u16ClockDiv                = TMR4_CLK_DIV1,        \
-            .u16PeriodValue             = 0xFFFFU,              \
-            .u16CountMode               = TMR4_MD_SAWTOOTH,     \
-            .u16ClockSrc               = TMR4_CLK_SRC_INTERNCLK,\
-        },                                                      \
-        .stcTmr4OcInit =                                        \
-        {                                                       \
-            .u16CompareValue            = 0x0000,               \
-            .u16OcInvalidPolarity       = TMR4_OC_INVD_LOW,     \
-            .u16CompareModeBufCond     = TMR4_OC_BUF_COND_IMMED,\
-            .u16CompareValueBufCond    = TMR4_OC_BUF_COND_PEAK, \
-            .u16BufLinkTransObject      = 0U,                   \
-        },                                                      \
-        .stcTmr4PwmInit =                                       \
-        {                                                       \
-            .u16Mode                    = TMR4_PWM_MD_THROUGH,  \
-            .u16ClockDiv                = TMR4_PWM_CLK_DIV1,    \
-            .u16Polarity           = TMR4_PWM_OXH_HOLD_OXL_HOLD,\
-        },                                                      \
-    }
-#endif /* PWM_TMR4_3_CONFIG */
-#endif /* BSP_USING_PWM_TMR4_3 */
-
 #endif /* BSP_USING_PWM_TMR4 */
 
 #ifdef BSP_USING_PWM_TMR6
@@ -547,7 +297,7 @@ extern "C" {
 #ifndef PWM_TMR6_2_CONFIG
 #define PWM_TMR6_2_CONFIG                                       \
     {                                                           \
-        .name                           = "pwm_t61",            \
+        .name                           = "pwm_t62",            \
         .instance                       = CM_TMR6_2,            \
         .channel                        = 0,                    \
         .stcTmr6Init =                                          \
@@ -594,7 +344,7 @@ extern "C" {
 #ifndef PWM_TMR6_3_CONFIG
 #define PWM_TMR6_3_CONFIG                                       \
     {                                                           \
-        .name                           = "pwm_t61",            \
+        .name                           = "pwm_t63",            \
         .instance                       = CM_TMR6_3,            \
         .channel                        = 0,                    \
         .stcTmr6Init =                                          \
@@ -641,7 +391,7 @@ extern "C" {
 #ifndef PWM_TMR6_4_CONFIG
 #define PWM_TMR6_4_CONFIG                                       \
     {                                                           \
-        .name                           = "pwm_t61",            \
+        .name                           = "pwm_t64",            \
         .instance                       = CM_TMR6_4,            \
         .channel                        = 0,                    \
         .stcTmr6Init =                                          \
@@ -688,7 +438,7 @@ extern "C" {
 #ifndef PWM_TMR6_5_CONFIG
 #define PWM_TMR6_5_CONFIG                                       \
     {                                                           \
-        .name                           = "pwm_t61",            \
+        .name                           = "pwm_t65",            \
         .instance                       = CM_TMR6_5,            \
         .channel                        = 0,                    \
         .stcTmr6Init =                                          \
@@ -735,7 +485,7 @@ extern "C" {
 #ifndef PWM_TMR6_6_CONFIG
 #define PWM_TMR6_6_CONFIG                                       \
     {                                                           \
-        .name                           = "pwm_t61",            \
+        .name                           = "pwm_t66",            \
         .instance                       = CM_TMR6_6,            \
         .channel                        = 0,                    \
         .stcTmr6Init =                                          \
@@ -782,7 +532,7 @@ extern "C" {
 #ifndef PWM_TMR6_7_CONFIG
 #define PWM_TMR6_7_CONFIG                                       \
     {                                                           \
-        .name                           = "pwm_t61",            \
+        .name                           = "pwm_t67",            \
         .instance                       = CM_TMR6_7,            \
         .channel                        = 0,                    \
         .stcTmr6Init =                                          \
@@ -829,7 +579,7 @@ extern "C" {
 #ifndef PWM_TMR6_8_CONFIG
 #define PWM_TMR6_8_CONFIG                                       \
     {                                                           \
-        .name                           = "pwm_t61",            \
+        .name                           = "pwm_t68",            \
         .instance                       = CM_TMR6_8,            \
         .channel                        = 0,                    \
         .stcTmr6Init =                                          \
@@ -872,6 +622,100 @@ extern "C" {
     }
 #endif /* PWM_TMR6_8_CONFIG */
 #endif /* BSP_USING_PWM_TMR6_8 */
+#ifdef BSP_USING_PWM_TMR6_9
+#ifndef PWM_TMR6_9_CONFIG
+#define PWM_TMR6_9_CONFIG                                       \
+    {                                                           \
+        .name                           = "pwm_t69",            \
+        .instance                       = CM_TMR6_9,            \
+        .channel                        = 0,                    \
+        .stcTmr6Init =                                          \
+        {                                                       \
+            .u8CountSrc                 = TMR6_CNT_SRC_SW,      \
+            .sw_count =                                         \
+            {                                                   \
+                .u32ClockDiv            = TMR6_CLK_DIV1,        \
+                .u32CountMode           = TMR6_MD_SAWTOOTH,     \
+                .u32CountDir            = TMR6_CNT_DOWN,        \
+            },                                                  \
+            .u32PeriodValue             = 0xFFFF,               \
+            .u32CountReload             = TMR6_CNT_RELOAD_ON,   \
+        },                                                      \
+        .stcPwmInit =                                           \
+        {                                                       \
+            {                                                   \
+                .u32CompareValue            = 0x0000,           \
+                .u32StartPolarity           = TMR6_PWM_LOW,     \
+                .u32StopPolarity            = TMR6_PWM_LOW,     \
+                .u32CountUpMatchAPolarity   = TMR6_PWM_HIGH,    \
+                .u32CountDownMatchAPolarity = TMR6_PWM_HIGH,    \
+                .u32CountUpMatchBPolarity   = TMR6_PWM_HOLD,    \
+                .u32CountDownMatchBPolarity = TMR6_PWM_HOLD,    \
+                .u32UdfPolarity             = TMR6_PWM_LOW,     \
+                .u32OvfPolarity             = TMR6_PWM_LOW,     \
+            },                                                  \
+            {                                                   \
+                .u32CompareValue            = 0x0000,           \
+                .u32StartPolarity           = TMR6_PWM_LOW,     \
+                .u32StopPolarity            = TMR6_PWM_LOW,     \
+                .u32CountUpMatchAPolarity   = TMR6_PWM_HOLD,    \
+                .u32CountDownMatchAPolarity = TMR6_PWM_HOLD,    \
+                .u32CountUpMatchBPolarity   = TMR6_PWM_HIGH,    \
+                .u32CountDownMatchBPolarity = TMR6_PWM_HIGH,    \
+                .u32UdfPolarity             = TMR6_PWM_LOW,     \
+                .u32OvfPolarity             = TMR6_PWM_LOW,     \
+            }                                                   \
+        },                                                      \
+    }
+#endif /* PWM_TMR6_9_CONFIG */
+#endif /* BSP_USING_PWM_TMR6_9 */
+#ifdef BSP_USING_PWM_TMR6_10
+#ifndef PWM_TMR6_10_CONFIG
+#define PWM_TMR6_10_CONFIG                                      \
+    {                                                           \
+        .name                           = "pwm_t610",           \
+        .instance                       = CM_TMR6_10,           \
+        .channel                        = 0,                    \
+        .stcTmr6Init =                                          \
+        {                                                       \
+            .u8CountSrc                 = TMR6_CNT_SRC_SW,      \
+            .sw_count =                                         \
+            {                                                   \
+                .u32ClockDiv            = TMR6_CLK_DIV1,        \
+                .u32CountMode           = TMR6_MD_SAWTOOTH,     \
+                .u32CountDir            = TMR6_CNT_DOWN,        \
+            },                                                  \
+            .u32PeriodValue             = 0xFFFF,               \
+            .u32CountReload             = TMR6_CNT_RELOAD_ON,   \
+        },                                                      \
+        .stcPwmInit =                                           \
+        {                                                       \
+            {                                                   \
+                .u32CompareValue            = 0x0000,           \
+                .u32StartPolarity           = TMR6_PWM_LOW,     \
+                .u32StopPolarity            = TMR6_PWM_LOW,     \
+                .u32CountUpMatchAPolarity   = TMR6_PWM_HIGH,    \
+                .u32CountDownMatchAPolarity = TMR6_PWM_HIGH,    \
+                .u32CountUpMatchBPolarity   = TMR6_PWM_HOLD,    \
+                .u32CountDownMatchBPolarity = TMR6_PWM_HOLD,    \
+                .u32UdfPolarity             = TMR6_PWM_LOW,     \
+                .u32OvfPolarity             = TMR6_PWM_LOW,     \
+            },                                                  \
+            {                                                   \
+                .u32CompareValue            = 0x0000,           \
+                .u32StartPolarity           = TMR6_PWM_LOW,     \
+                .u32StopPolarity            = TMR6_PWM_LOW,     \
+                .u32CountUpMatchAPolarity   = TMR6_PWM_HOLD,    \
+                .u32CountDownMatchAPolarity = TMR6_PWM_HOLD,    \
+                .u32CountUpMatchBPolarity   = TMR6_PWM_HIGH,    \
+                .u32CountDownMatchBPolarity = TMR6_PWM_HIGH,    \
+                .u32UdfPolarity             = TMR6_PWM_LOW,     \
+                .u32OvfPolarity             = TMR6_PWM_LOW,     \
+            }                                                   \
+        },                                                      \
+    }
+#endif /* PWM_TMR6_10_CONFIG */
+#endif /* BSP_USING_PWM_TMR6_10 */
 
 #endif /* BSP_USING_PWM_TMR6 */
 

bsp/hc32/ev_hc32f472_lqfp100/board/config/timer_config.h

@@ -112,4 +112,23 @@ extern "C" {
     }
 #endif /* TMRA_5_CONFIG */
 #endif /* BSP_USING_TMRA_5 */
+
+#ifdef BSP_USING_TMRA_6
+#ifndef TMRA_6_CONFIG
+#define TMRA_6_CONFIG                                       \
+    {                                                       \
+       .tmr_handle      = CM_TMRA_6,                        \
+       .clock_source    = CLK_BUS_PCLK1,                    \
+       .clock           = FCG2_PERIPH_TMRA_6,               \
+       .flag            = TMRA_FLAG_OVF,                    \
+       .isr             =                                   \
+       {                                                    \
+            .enIntSrc   = INT_SRC_TMRA_6_OVF,               \
+            .enIRQn     = BSP_USING_TMRA_6_IRQ_NUM,         \
+            .u8Int_Prio = BSP_USING_TMRA_6_IRQ_PRIO,        \
+       },                                                   \
+       .name            = "tmra_6"                          \
+    }
+#endif /* TMRA_6_CONFIG */
+#endif /* BSP_USING_TMRA_6 */
 #endif /* __TMR_CONFIG_H__ */

bsp/hc32/ev_hc32f472_lqfp100/board/config/usb_config/usb_app_conf.h

@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-06-11     CDT          first version
+ */
+
+#ifndef __USB_APP_CONF_H__
+#define __USB_APP_CONF_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*******************************************************************************
+ * Include files
+ ******************************************************************************/
+#include "rtconfig.h"
+
+/* USB MODE CONFIGURATION */
+
+
+#if defined(BSP_USING_USBFS)
+#define USB_FS_MODE
+#else
+#define USB_FS_MODE
+#endif
+
+#if defined(BSP_USING_USBD)
+#define USE_DEVICE_MODE
+#elif defined(BSP_USING_USBH)
+#define USE_HOST_MODE
+#else
+#define USE_DEVICE_MODE
+#endif
+
+#ifndef USB_FS_MODE
+#error  "USB_FS_MODE should be defined"
+#endif
+
+#ifndef USE_DEVICE_MODE
+#ifndef USE_HOST_MODE
+#error  "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
+#endif
+#endif
+
+#if defined(BSP_USING_USBD)
+/* USB DEVICE FIFO CONFIGURATION */
+#ifdef USB_FS_MODE
+#define RX_FIFO_FS_SIZE                         (128U)
+#define TX0_FIFO_FS_SIZE                        (32U)
+#define TX1_FIFO_FS_SIZE                        (32U)
+#define TX2_FIFO_FS_SIZE                        (32U)
+#define TX3_FIFO_FS_SIZE                        (32U)
+#define TX4_FIFO_FS_SIZE                        (32U)
+#define TX5_FIFO_FS_SIZE                        (32U)
+
+#if ((RX_FIFO_FS_SIZE + \
+      TX0_FIFO_FS_SIZE + TX1_FIFO_FS_SIZE + TX2_FIFO_FS_SIZE + TX3_FIFO_FS_SIZE + TX4_FIFO_FS_SIZE + \
+      TX5_FIFO_FS_SIZE) > 320U)
+#error  "The USB max FIFO size is 320 x 4 Bytes!"
+#endif
+#endif
+
+#if defined(BSP_USING_USBD_VBUS_SENSING)
+#define VBUS_SENSING_ENABLED
+#endif
+#endif
+
+#if defined(BSP_USING_USBH)
+/* USB HOST FIFO CONFIGURATION */
+#ifdef USB_FS_MODE
+#define RX_FIFO_FS_SIZE                          (128U)
+#define TXH_NP_FS_FIFOSIZ                        (64U)
+#define TXH_P_FS_FIFOSIZ                         (128U)
+
+#if ((RX_FIFO_FS_SIZE + TXH_NP_FS_FIFOSIZ + TXH_P_FS_FIFOSIZ) > 320U)
+#error  "The USB max FIFO size is 320 x 4 Bytes!"
+#endif
+#endif
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_APP_CONF_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32/ev_hc32f472_lqfp100/board/config/usb_config/usb_bsp.h

@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-06-11     CDT          first version
+ */
+
+#ifndef __USB_BSP_H__
+#define __USB_BSP_H__
+
+/* C binding of definitions if building with C++ compiler */
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "hc32_ll_utility.h"
+
+extern void usb_udelay(const uint32_t usec);
+extern void usb_mdelay(const uint32_t msec);
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_BSP_H__ */
+
+/*******************************************************************************
+ * EOF (not truncated)
+ ******************************************************************************/

bsp/hc32/ev_hc32f472_lqfp100/board/drv_config.h

@@ -1,6 +1,5 @@
 /*
- * Copyright (c) 2006-2022, RT-Thread Development Team
- * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd.
+ * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  *
  * SPDX-License-Identifier: Apache-2.0
  *

bsp/hc32/ev_hc32f472_lqfp100/board/hc32f4xx_conf.h

@@ -55,6 +55,7 @@ extern "C"
 #define LL_ADC_ENABLE                               (DDL_ON)
 #define LL_AES_ENABLE                               (DDL_ON)
 #define LL_AOS_ENABLE                               (DDL_ON)
+#define LL_CAN_ENABLE                               (DDL_ON)
 #define LL_CLK_ENABLE                               (DDL_ON)
 #define LL_CMP_ENABLE                               (DDL_ON)
 #define LL_CRC_ENABLE                               (DDL_ON)
@@ -68,13 +69,18 @@ extern "C"
 #define LL_EVENT_PORT_ENABLE                        (DDL_OFF)
 #define LL_FCG_ENABLE                               (DDL_ON)
 #define LL_FCM_ENABLE                               (DDL_ON)
+#define LL_FMAC_ENABLE                              (DDL_ON)
 #define LL_GPIO_ENABLE                              (DDL_ON)
 #define LL_HASH_ENABLE                              (DDL_ON)
 #define LL_I2C_ENABLE                               (DDL_ON)
 #define LL_INTERRUPTS_ENABLE                        (DDL_ON)
+#define LL_INTERRUPTS_SHARE_ENABLE                  (DDL_ON)
 #define LL_KEYSCAN_ENABLE                           (DDL_ON)
-#define LL_MCAN_ENABLE                              (DDL_ON)
+#define LL_MAU_ENABLE                               (DDL_ON)
+#define LL_MDIO_ENABLE                              (DDL_ON)
 #define LL_MPU_ENABLE                               (DDL_ON)
+#define LL_OTS_ENABLE                               (DDL_ON)
+#define LL_PLA_ENABLE                               (DDL_ON)
 #define LL_PWC_ENABLE                               (DDL_ON)
 #define LL_QSPI_ENABLE                              (DDL_ON)
 #define LL_RMU_ENABLE                               (DDL_ON)
@@ -84,11 +90,14 @@ extern "C"
 #define LL_SRAM_ENABLE                              (DDL_ON)
 #define LL_SWDT_ENABLE                              (DDL_ON)
 #define LL_TMR0_ENABLE                              (DDL_ON)
+#define LL_TMR2_ENABLE                              (DDL_ON)
 #define LL_TMR4_ENABLE                              (DDL_ON)
 #define LL_TMR6_ENABLE                              (DDL_ON)
 #define LL_TMRA_ENABLE                              (DDL_ON)
 #define LL_TRNG_ENABLE                              (DDL_ON)
 #define LL_USART_ENABLE                             (DDL_ON)
+#define LL_USB_ENABLE                               (DDL_ON)
+#define LL_VREF_ENABLE                              (DDL_ON)
 #define LL_WDT_ENABLE                               (DDL_ON)
 
 /**

bsp/hc32/ev_hc32f472_lqfp100/board/linker_scripts/link.ld

@@ -171,6 +171,22 @@ SECTIONS
         __data_end__ = .;
     } >RAM
 
+    .heap_stack (COPY) :
+    {
+        . = ALIGN(8);
+        __end__ = .;
+        PROVIDE(end = .);
+        PROVIDE(_end = .);
+        *(.heap*)
+        . = ALIGN(8);
+        __HeapLimit = .;
+
+        __StackLimit = .;
+        *(.stack*)
+        . = ALIGN(8);
+        __StackTop = .;
+    } >RAM
+
     __etext_ramb = __etext + ALIGN (SIZEOF(.data), 4);
     .ramb_data : AT (__etext_ramb)
     {
@@ -182,7 +198,8 @@ SECTIONS
         __data_end_ramb__ = .;
     } >RAMB
 
-    .bss (NOLOAD):
+    __bss_start = .;
+    .bss __StackTop (NOLOAD):
     {
         . = ALIGN(4);
         _sbss = .;
@@ -197,6 +214,7 @@ SECTIONS
         *(.noinit*)
         . = ALIGN(4);
     } >RAM
+    __bss_end = .;
 
     .ramb_bss :
     {
@@ -208,22 +226,6 @@ SECTIONS
         __bss_end_ramb__ = .;
     } >RAMB
 
-    .heap_stack (COPY) :
-    {
-        . = ALIGN(8);
-        __end__ = .;
-        PROVIDE(end = .);
-        PROVIDE(_end = .);
-        *(.heap*)
-        . = ALIGN(8);
-        __HeapLimit = .;
-
-        __StackLimit = .;
-        *(.stack*)
-        . = ALIGN(8);
-        __StackTop = .;
-    } >RAM
-
     /DISCARD/ :
     {
         libc.a (*)

bsp/hc32/ev_hc32f472_lqfp100/board/ports/fal_cfg.h

@@ -35,7 +35,7 @@ extern struct fal_flash_dev ext_nor_flash0;
 /* partition table */
 #define FAL_PART_TABLE                                                                 \
 {                                                                                      \
-    {FAL_PART_MAGIC_WROD,          "app",   "onchip_flash",   0,  256 * 1024, 0},      \
+    {FAL_PART_MAGIC_WROD,          "app",   "onchip_flash",   0,  512 * 1024, 0},      \
     {FAL_PART_MAGIC_WROD,   "filesystem",         "w25q64",   0,  8 * 1024 * 1024, 0}, \
 }
 #endif /* FAL_PART_HAS_TABLE_CFG */

bsp/hc32/ev_hc32f472_lqfp100/jlink/ev_hc32f472_lqfp100 Debug.launch

@@ -0,0 +1,80 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="ilg.gnumcueclipse.debug.gdbjtag.jlink.launchConfigurationType">
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.PERIPHERALS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;peripherals/&gt;&#13;&#10;"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doConnectToRunning" value="false"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doContinue" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doDebugInRam" value="false"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doFirstReset" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateConsole" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerAllocateSemihostingConsole" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerInitRegs" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerLocalOnly" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerSilent" value="false"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doGdbServerVerifyDownload" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doSecondReset" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.doStartGdbServer" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableFlashBreakpoints" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihosting" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientGdbClient" value="false"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSemihostingIoclientTelnet" value="true"/>
+    <booleanAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.enableSwo" value="true"/>
+    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetSpeed" value="1000"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.firstResetType" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbClientOtherOptions" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnection" value="usb"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerConnectionAddress" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDebugInterface" value="swd"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceEndianness" value="little"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceName" value="HC32F472"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerDeviceSpeed" value="1000"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerExecutable" value="${jlink_path}/${jlink_gdbserver}"/>
+    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerGdbPortNumber" value="2331"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerLog" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerOther" value="-singlerun -strict -timeout 0 -nogui"/>
+    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerSwoPortNumber" value="2332"/>
+    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.gdbServerTelnetPortNumber" value="2333"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.interfaceSpeed" value="auto"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherInitCommands" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.otherRunCommands" value=""/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.secondResetType" value=""/>
+    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetCpuFreq" value="0"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetPortMask" value="0x1"/>
+    <intAttribute key="ilg.gnumcueclipse.debug.gdbjtag.jlink.swoEnableTargetSwoFreq" value="0"/>
+    <stringAttribute key="ilg.gnumcueclipse.debug.gdbjtag.svdPath" value="${project_loc}/../libraries/hc32f472_ddl/cmsis/Device/HDSC/hc32f4xx/Source/GCC/svd/HC32F472.svd"/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU MCU J-Link"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
+    <intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="2331"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
+    <stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
+    <booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
+    <stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
+    <booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
+    <intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
+    <stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
+    <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/rtthread.elf"/>
+    <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="project"/>
+    <booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
+    <stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094"/>
+    <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+        <listEntry value="/project"/>
+    </listAttribute>
+    <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
+        <listEntry value="4"/>
+    </listAttribute>
+    <stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;Context string&quot;/&gt;&#13;&#10;"/>
+    <stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
+</launchConfiguration>

bsp/hc32/ev_hc32f472_lqfp100/project.ewp

@@ -320,26 +320,31 @@
           <name>CCIncludePath2</name>
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\epoll</state>
-          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
-          <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Include</state>
-          <state>$PROJ_DIR$\board\ports</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
-          <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\inc</state>
-          <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\board\config</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
           <state>$PROJ_DIR$\board</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Include</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
-          <state>$PROJ_DIR$\board\config</state>
+          <state>$PROJ_DIR$\..\tests</state>
+          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\include</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\phy</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
+          <state>$PROJ_DIR$\..\platform\tca9539</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\inc</state>
+          <state>$PROJ_DIR$\.</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\smp_call</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\board\ports</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
+          <state>$PROJ_DIR$\board\config\usb_config</state>
+          <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
+          <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\epoll</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Include</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
         </option>
         <option>
           <name>CCStdIncCheck</name>
@@ -1311,26 +1316,31 @@
           <name>CCIncludePath2</name>
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\epoll</state>
-          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
-          <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Include</state>
-          <state>$PROJ_DIR$\board\ports</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
-          <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\inc</state>
-          <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
-          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\board\config</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
           <state>$PROJ_DIR$\board</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Include</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
-          <state>$PROJ_DIR$\board\config</state>
+          <state>$PROJ_DIR$\..\tests</state>
+          <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\include</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\phy</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
+          <state>$PROJ_DIR$\..\platform\tca9539</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\inc</state>
+          <state>$PROJ_DIR$\.</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\smp_call</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\eventfd</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
+          <state>$PROJ_DIR$\board\ports</state>
+          <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
+          <state>$PROJ_DIR$\board\config\usb_config</state>
+          <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
+          <state>$PROJ_DIR$\..\libraries\hc32_drivers</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\epoll</state>
+          <state>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Include</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
         </option>
         <option>
           <name>CCStdIncCheck</name>
@@ -2045,7 +2055,19 @@
       <name>$PROJ_DIR$\..\..\..\components\drivers\core\device.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_core.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_dev.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion_comm.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\completion_up.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\condvar.c</name>
@@ -2069,10 +2091,10 @@
       <name>$PROJ_DIR$\..\..\..\components\drivers\ipc\workqueue.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\pin\pin.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\pin\dev_pin.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\drivers\serial\serial.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\drivers\serial\dev_serial.c</name>
     </file>
   </group>
   <group>
@@ -2092,9 +2114,15 @@
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_gpio.c</name>
     </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_i2c.c</name>
+    </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_irq.c</name>
     </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_soft_i2c.c</name>
+    </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32_drivers\drv_usart.c</name>
     </file>
@@ -2102,16 +2130,16 @@
   <group>
     <name>Finsh</name>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\shell.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\msh_parse.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\msh.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\cmd.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\msh_parse.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\shell.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\..\..\components\finsh\cmd.c</name>
+      <name>$PROJ_DIR$\..\..\..\components\finsh\msh.c</name>
     </file>
   </group>
   <group>
@@ -2125,6 +2153,9 @@
     <file>
       <name>$PROJ_DIR$\..\..\..\src\cpu_up.c</name>
     </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\defunct.c</name>
+    </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\src\idle.c</name>
     </file>
@@ -2134,12 +2165,6 @@
     <file>
       <name>$PROJ_DIR$\..\..\..\src\irq.c</name>
     </file>
-    <file>
-      <name>$PROJ_DIR$\..\..\..\src\klibc\kstdio.c</name>
-    </file>
-    <file>
-      <name>$PROJ_DIR$\..\..\..\src\klibc\kstring.c</name>
-    </file>
     <file>
       <name>$PROJ_DIR$\..\..\..\src\kservice.c</name>
     </file>
@@ -2165,6 +2190,24 @@
       <name>$PROJ_DIR$\..\..\..\src\timer.c</name>
     </file>
   </group>
+  <group>
+    <name>klibc</name>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\kerrno.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\kstdio.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\rt_vsnprintf_tiny.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\kstring.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\..\src\klibc\rt_vsscanf.c</name>
+    </file>
+  </group>
   <group>
     <name>libcpu</name>
     <file>
@@ -2186,55 +2229,85 @@
   <group>
     <name>Libraries</name>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_fcg.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_clk.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_gpio.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_efm.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_gpio.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_fcm.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_utility.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_dma.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_usart.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_clk.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_i2c.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_tmr0.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_interrupts.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_aos.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f472.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_fcm.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_rmu.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_tmr0.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_icg.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_usart.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_rmu.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_aos.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_fcg.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_utility.c</name>
     </file>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f472.c</name>
+      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_icg.c</name>
     </file>
     <file>
       <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_pwc.c</name>
     </file>
+  </group>
+  <group>
+    <name>Platform</name>
     <file>
-      <name>$PROJ_DIR$\..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_dma.c</name>
+      <name>$PROJ_DIR$\..\platform\tca9539\tca9539.c</name>
     </file>
   </group>
   <group>
     <name>POSIX</name>
   </group>
+  <group>
+    <name>smp</name>
+  </group>
+  <group>
+    <name>Tests</name>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_uart_v1.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_gpio.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_i2c.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\tests\test_soft_i2c.c</name>
+    </file>
+  </group>
+  <group>
+    <name>utestcases</name>
+  </group>
 </project>

bsp/hc32/ev_hc32f472_lqfp100/project.uvprojx

@@ -334,9 +334,9 @@
             <v6Rtti>0</v6Rtti>
             <VariousControls>
               <MiscControls />
-              <Define>__STDC_LIMIT_MACROS, RT_USING_ARMLIBC, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, HC32F472, USE_DDL_DRIVER, __RTTHREAD__, __DEBUG</Define>
+              <Define>RT_USING_LIBC, __RTTHREAD__, USE_DDL_DRIVER, __CLK_TCK=RT_TICK_PER_SECOND, __DEBUG, __STDC_LIMIT_MACROS, HC32F472, RT_USING_ARMLIBC</Define>
               <Undefine />
-              <IncludePath>..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\posix\io\eventfd;board\config;applications;..\libraries\hc32_drivers;..\..\..\include;.;..\..\..\libcpu\arm\cortex-m4;board\ports;..\..\..\components\libc\posix\ipc;..\..\..\components\libc\posix\io\epoll;..\..\..\libcpu\arm\common;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\posix\io\poll;..\..\..\components\drivers\include;..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\common\include;..\libraries\hc32f472_ddl\cmsis\Include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;..\libraries\hc32f472_ddl\hc32_ll_driver\inc</IncludePath>
+              <IncludePath>..\..\..\components\drivers\include;..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Include;..\..\..\components\libc\compilers\common\include;..\libraries\hc32_drivers;..\..\..\components\drivers\include;..\libraries\hc32f472_ddl\cmsis\Include;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\drivers\include;..\..\..\components\finsh;.;..\libraries\hc32f472_ddl\hc32_ll_driver\inc;applications;..\tests;board;board\ports;..\platform\tca9539;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\drivers\include;..\..\..\components\drivers\smp_call;..\..\..\components\libc\posix\io\epoll;board\config;..\..\..\include;..\..\..\components\libc\posix\io\eventfd;..\..\..\libcpu\arm\common;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\..\..\libcpu\arm\cortex-m4;board\config\usb_config;..\..\..\components\drivers\phy;..\..\..\components\libc\posix\io\poll</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -381,16 +381,16 @@
           <GroupName>Applications</GroupName>
           <Files>
             <File>
-              <FileName>main.c</FileName>
+              <FileName>xtal32_fcm.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\main.c</FilePath>
+              <FilePath>applications\xtal32_fcm.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>xtal32_fcm.c</FileName>
+              <FileName>main.c</FileName>
               <FileType>1</FileType>
-              <FilePath>applications\xtal32_fcm.c</FilePath>
+              <FilePath>applications\main.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -476,9 +476,85 @@
           </Files>
           <Files>
             <File>
-              <FileName>completion.c</FileName>
+              <FileName>dev_i2c_bit_ops.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>dev_i2c_core.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\dev_i2c_core.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>dev_i2c_dev.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\i2c\dev_i2c_dev.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>completion_comm.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\components\drivers\ipc\completion_comm.c</FilePath>
+              <FileOption>
+                <FileArmAds>
+                  <Cads>
+                    <VariousControls>
+                      <MiscControls> </MiscControls>
+                      <Define>__RT_IPC_SOURCE__</Define>
+                      <Undefine> </Undefine>
+                      <IncludePath> </IncludePath>
+                    </VariousControls>
+                  </Cads>
+                </FileArmAds>
+              </FileOption>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>completion_up.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\ipc\completion.c</FilePath>
+              <FilePath>..\..\..\components\drivers\ipc\completion_up.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -628,9 +704,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>pin.c</FileName>
+              <FileName>dev_pin.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\pin\pin.c</FilePath>
+              <FilePath>..\..\..\components\drivers\pin\dev_pin.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -647,9 +723,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>serial.c</FileName>
+              <FileName>dev_serial.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
+              <FilePath>..\..\..\components\drivers\serial\dev_serial.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -702,6 +778,13 @@
               <FilePath>..\libraries\hc32_drivers\drv_gpio.c</FilePath>
             </File>
           </Files>
+          <Files>
+            <File>
+              <FileName>drv_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_i2c.c</FilePath>
+            </File>
+          </Files>
           <Files>
             <File>
               <FileName>drv_irq.c</FileName>
@@ -709,6 +792,13 @@
               <FilePath>..\libraries\hc32_drivers\drv_irq.c</FilePath>
             </File>
           </Files>
+          <Files>
+            <File>
+              <FileName>drv_soft_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32_drivers\drv_soft_i2c.c</FilePath>
+            </File>
+          </Files>
           <Files>
             <File>
               <FileName>drv_usart.c</FileName>
@@ -735,16 +825,16 @@
           </Files>
           <Files>
             <File>
-              <FileName>msh_parse.c</FileName>
+              <FileName>cmd.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
+              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>cmd.c</FileName>
+              <FileName>msh_parse.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\finsh\cmd.c</FilePath>
+              <FilePath>..\..\..\components\finsh\msh_parse.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -809,9 +899,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>idle.c</FileName>
+              <FileName>defunct.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\idle.c</FilePath>
+              <FilePath>..\..\..\src\defunct.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -828,28 +918,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>ipc.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\src\ipc.c</FilePath>
-              <FileOption>
-                <FileArmAds>
-                  <Cads>
-                    <VariousControls>
-                      <MiscControls> </MiscControls>
-                      <Define>__RT_KERNEL_SOURCE__</Define>
-                      <Undefine> </Undefine>
-                      <IncludePath> </IncludePath>
-                    </VariousControls>
-                  </Cads>
-                </FileArmAds>
-              </FileOption>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>irq.c</FileName>
+              <FileName>idle.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\irq.c</FilePath>
+              <FilePath>..\..\..\src\idle.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -866,9 +937,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>kstdio.c</FileName>
+              <FileName>ipc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\klibc\kstdio.c</FilePath>
+              <FilePath>..\..\..\src\ipc.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -885,9 +956,9 @@
           </Files>
           <Files>
             <File>
-              <FileName>kstring.c</FileName>
+              <FileName>irq.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\src\klibc\kstring.c</FilePath>
+              <FilePath>..\..\..\src\irq.c</FilePath>
               <FileOption>
                 <FileArmAds>
                   <Cads>
@@ -1055,6 +1126,44 @@
             </File>
           </Files>
         </Group>
+        <Group>
+          <GroupName>klibc</GroupName>
+          <Files>
+            <File>
+              <FileName>kerrno.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\kerrno.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>rt_vsnprintf_tiny.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\rt_vsnprintf_tiny.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>rt_vsscanf.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\rt_vsscanf.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kstdio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\kstdio.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>kstring.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\src\klibc\kstring.c</FilePath>
+            </File>
+          </Files>
+        </Group>
         <Group>
           <GroupName>libcpu</GroupName>
           <Files>
@@ -1097,37 +1206,58 @@
           <GroupName>Libraries</GroupName>
           <Files>
             <File>
-              <FileName>hc32_ll.c</FileName>
+              <FileName>hc32_ll_aos.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_aos.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_clk.c</FileName>
+              <FileName>hc32_ll_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_clk.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_gpio.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_efm.c</FileName>
+              <FileName>hc32_ll_icg.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_efm.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_icg.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_gpio.c</FileName>
+              <FileName>hc32_ll_rmu.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_gpio.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_rmu.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_utility.c</FileName>
+              <FileName>hc32_ll_fcm.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_utility.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_fcm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_i2c.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_dma.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>hc32_ll_fcg.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_fcg.c</FilePath>
             </File>
           </Files>
           <Files>
@@ -1137,6 +1267,13 @@
               <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_usart.c</FilePath>
             </File>
           </Files>
+          <Files>
+            <File>
+              <FileName>system_hc32f472.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f472.c</FilePath>
+            </File>
+          </Files>
           <Files>
             <File>
               <FileName>hc32_ll_interrupts.c</FileName>
@@ -1146,65 +1283,85 @@
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_aos.c</FileName>
+              <FileName>hc32_ll_clk.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_aos.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_clk.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_fcm.c</FileName>
+              <FileName>hc32_ll_utility.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_fcm.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_utility.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_tmr0.c</FileName>
+              <FileName>hc32_ll.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_tmr0.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_icg.c</FileName>
+              <FileName>hc32_ll_efm.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_icg.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_efm.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_rmu.c</FileName>
+              <FileName>hc32_ll_pwc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_rmu.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_pwc.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_fcg.c</FileName>
+              <FileName>hc32_ll_tmr0.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_fcg.c</FilePath>
+              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_tmr0.c</FilePath>
             </File>
           </Files>
+        </Group>
+        <Group>
+          <GroupName>Platform</GroupName>
           <Files>
             <File>
-              <FileName>system_hc32f472.c</FileName>
+              <FileName>tca9539.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\cmsis\Device\HDSC\hc32f4xx\Source\system_hc32f472.c</FilePath>
+              <FilePath>..\platform\tca9539\tca9539.c</FilePath>
             </File>
           </Files>
+        </Group>
+        <Group>
+          <GroupName>Tests</GroupName>
           <Files>
             <File>
-              <FileName>hc32_ll_pwc.c</FileName>
+              <FileName>test_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_pwc.c</FilePath>
+              <FilePath>..\tests\test_gpio.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>hc32_ll_dma.c</FileName>
+              <FileName>test_soft_i2c.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\hc32f472_ddl\hc32_ll_driver\src\hc32_ll_dma.c</FilePath>
+              <FilePath>..\tests\test_soft_i2c.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>test_uart_v1.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\tests\test_uart_v1.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>test_i2c.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\tests\test_i2c.c</FilePath>
             </File>
           </Files>
         </Group>

bsp/hc32/ev_hc32f472_lqfp100/rtconfig.h

@@ -1,11 +1,66 @@
 #ifndef RT_CONFIG_H__
 #define RT_CONFIG_H__
 
-/* Automatically generated file; DO NOT EDIT. */
-/* RT-Thread Configuration */
-
 /* RT-Thread Kernel */
 
+/* klibc options */
+
+/* rt_vsnprintf options */
+
+/* end of rt_vsnprintf options */
+
+/* rt_vsscanf options */
+
+/* end of rt_vsscanf options */
+
+/* rt_memset options */
+
+/* end of rt_memset options */
+
+/* rt_memcpy options */
+
+/* end of rt_memcpy options */
+
+/* rt_memmove options */
+
+/* end of rt_memmove options */
+
+/* rt_memcmp options */
+
+/* end of rt_memcmp options */
+
+/* rt_strstr options */
+
+/* end of rt_strstr options */
+
+/* rt_strcasecmp options */
+
+/* end of rt_strcasecmp options */
+
+/* rt_strncpy options */
+
+/* end of rt_strncpy options */
+
+/* rt_strcpy options */
+
+/* end of rt_strcpy options */
+
+/* rt_strncmp options */
+
+/* end of rt_strncmp options */
+
+/* rt_strcmp options */
+
+/* end of rt_strcmp options */
+
+/* rt_strlen options */
+
+/* end of rt_strlen options */
+
+/* rt_strnlen options */
+
+/* end of rt_strnlen options */
+/* end of klibc options */
 #define RT_NAME_MAX 8
 #define RT_CPUS_NR 1
 #define RT_ALIGN_SIZE 8
@@ -19,12 +74,11 @@
 #define RT_IDLE_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 256
 
-/* kservice optimization */
-
-
-/* klibc optimization */
+/* kservice options */
 
+/* end of kservice options */
 #define RT_USING_DEBUG
+#define RT_DEBUGING_ASSERT
 #define RT_DEBUGING_COLOR
 #define RT_DEBUGING_CONTEXT
 
@@ -35,6 +89,7 @@
 #define RT_USING_EVENT
 #define RT_USING_MAILBOX
 #define RT_USING_MESSAGEQUEUE
+/* end of Inter-Thread communication */
 
 /* Memory Management */
 
@@ -42,12 +97,14 @@
 #define RT_USING_SMALL_MEM
 #define RT_USING_SMALL_MEM_AS_HEAP
 #define RT_USING_HEAP
+/* end of Memory Management */
 #define RT_USING_DEVICE
 #define RT_USING_CONSOLE
 #define RT_CONSOLEBUF_SIZE 128
 #define RT_CONSOLE_DEVICE_NAME "uart2"
 #define RT_VER_NUM 0x50200
 #define RT_BACKTRACE_LEVEL_MAX_NR 32
+/* end of RT-Thread Kernel */
 #define RT_USING_HW_ATOMIC
 #define RT_USING_CPU_FFS
 #define ARCH_ARM
@@ -77,6 +134,7 @@
 
 /* DFS: device virtual file system */
 
+/* end of DFS: device virtual file system */
 
 /* Device Drivers */
 
@@ -89,10 +147,10 @@
 #define RT_USING_SERIAL_V1
 #define RT_SERIAL_USING_DMA
 #define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
 #define RT_USING_PIN
-
-/* Using USB */
-
+/* end of Device Drivers */
 
 /* C/C++ and POSIX layer */
 
@@ -104,6 +162,8 @@
 #define RT_LIBC_TZ_DEFAULT_HOUR 8
 #define RT_LIBC_TZ_DEFAULT_MIN 0
 #define RT_LIBC_TZ_DEFAULT_SEC 0
+/* end of Timezone and Daylight Saving Time */
+/* end of ISO-ANSI C layer */
 
 /* POSIX (Portable Operating System Interface) layer */
 
@@ -113,18 +173,30 @@
 
 /* Socket is in the 'Network' category */
 
+/* end of Interprocess Communication (IPC) */
+/* end of POSIX (Portable Operating System Interface) layer */
+/* end of C/C++ and POSIX layer */
 
 /* Network */
 
+/* end of Network */
 
 /* Memory protection */
 
+/* end of Memory protection */
 
 /* Utilities */
 
+/* end of Utilities */
+
+/* Using USB legacy version */
+
+/* end of Using USB legacy version */
+/* end of RT-Thread Components */
 
 /* RT-Thread Utestcases */
 
+/* end of RT-Thread Utestcases */
 
 /* RT-Thread online packages */
 
@@ -135,110 +207,173 @@
 
 /* Marvell WiFi */
 
+/* end of Marvell WiFi */
 
 /* Wiced WiFi */
 
+/* end of Wiced WiFi */
+
+/* CYW43012 WiFi */
+
+/* end of CYW43012 WiFi */
+
+/* BL808 WiFi */
+
+/* end of BL808 WiFi */
+
+/* CYW43439 WiFi */
+
+/* end of CYW43439 WiFi */
+/* end of Wi-Fi */
 
 /* IoT Cloud */
 
+/* end of IoT Cloud */
+/* end of IoT - internet of things */
 
 /* security packages */
 
+/* end of security packages */
 
 /* language packages */
 
 /* JSON: JavaScript Object Notation, a lightweight data-interchange format */
 
+/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */
 
 /* XML: Extensible Markup Language */
 
+/* end of XML: Extensible Markup Language */
+/* end of language packages */
 
 /* multimedia packages */
 
 /* LVGL: powerful and easy-to-use embedded GUI library */
 
+/* end of LVGL: powerful and easy-to-use embedded GUI library */
 
 /* u8g2: a monochrome graphic library */
 
+/* end of u8g2: a monochrome graphic library */
+/* end of multimedia packages */
 
 /* tools packages */
 
+/* end of tools packages */
 
 /* system packages */
 
 /* enhanced kernel services */
 
+/* end of enhanced kernel services */
 
 /* acceleration: Assembly language or algorithmic acceleration packages */
 
+/* end of acceleration: Assembly language or algorithmic acceleration packages */
 
 /* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
 
+/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
 
 /* Micrium: Micrium software products porting for RT-Thread */
 
+/* end of Micrium: Micrium software products porting for RT-Thread */
+/* end of system packages */
 
 /* peripheral libraries and drivers */
 
-/* sensors drivers */
+/* HAL & SDK Drivers */
 
+/* STM32 HAL & SDK Drivers */
 
-/* touch drivers */
+/* end of STM32 HAL & SDK Drivers */
+
+/* Infineon HAL Packages */
 
+/* end of Infineon HAL Packages */
 
 /* Kendryte SDK */
 
+/* end of Kendryte SDK */
+/* end of HAL & SDK Drivers */
+
+/* sensors drivers */
+
+/* end of sensors drivers */
+
+/* touch drivers */
+
+/* end of touch drivers */
+/* end of peripheral libraries and drivers */
 
 /* AI packages */
 
+/* end of AI packages */
 
 /* Signal Processing and Control Algorithm Packages */
 
+/* end of Signal Processing and Control Algorithm Packages */
 
 /* miscellaneous packages */
 
 /* project laboratory */
 
+/* end of project laboratory */
+
 /* samples: kernel and components samples */
 
+/* end of samples: kernel and components samples */
 
 /* entertainment: terminal games and other interesting software packages */
 
+/* end of entertainment: terminal games and other interesting software packages */
+/* end of miscellaneous packages */
 
 /* Arduino libraries */
 
 
 /* Projects and Demos */
 
+/* end of Projects and Demos */
 
 /* Sensors */
 
+/* end of Sensors */
 
 /* Display */
 
+/* end of Display */
 
 /* Timing */
 
+/* end of Timing */
 
 /* Data Processing */
 
+/* end of Data Processing */
 
 /* Data Storage */
 
 /* Communication */
 
+/* end of Communication */
 
 /* Device Control */
 
+/* end of Device Control */
 
 /* Other */
 
+/* end of Other */
 
 /* Signal IO */
 
+/* end of Signal IO */
 
 /* Uncategorized */
 
+/* end of Arduino libraries */
+/* end of RT-Thread online packages */
 #define SOC_FAMILY_HC32
 #define SOC_SERIES_HC32F4
 
@@ -252,20 +387,26 @@
 #define BSP_USING_ON_CHIP_FLASH_ICODE_CACHE
 #define BSP_USING_ON_CHIP_FLASH_DCODE_CACHE
 #define BSP_USING_ON_CHIP_FLASH_ICODE_PREFETCH
+/* end of On-chip Drivers */
 
 /* Onboard Peripheral Drivers */
 
+#define BSP_USING_TCA9539
 #define BSP_USING_EXT_IO
+/* end of Onboard Peripheral Drivers */
 
 /* On-chip Peripheral Drivers */
 
 #define BSP_USING_GPIO
 #define BSP_USING_UART
 #define BSP_USING_UART2
-#define BSP_UART2_RX_USING_DMA
-#define BSP_UART2_TX_USING_DMA
+#define BSP_USING_I2C
+#define BSP_USING_I2C_HW
+#define BSP_USING_I2C1
+/* end of On-chip Peripheral Drivers */
 
 /* Board extended module Drivers */
 
+/* end of Hardware Drivers Config */
 
 #endif

bsp/hc32/ev_hc32f4a0_lqfp176/.config

@@ -1,15 +1,117 @@
+
 #
-# Automatically generated file; DO NOT EDIT.
-# RT-Thread Configuration
+# RT-Thread Kernel
 #
 
 #
-# RT-Thread Kernel
+# klibc options
+#
+
+#
+# rt_vsnprintf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set
+# end of rt_vsnprintf options
+
+#
+# rt_vsscanf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSSCANF is not set
+# end of rt_vsscanf options
+
+#
+# rt_memset options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMSET is not set
+# end of rt_memset options
+
+#
+# rt_memcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMCPY is not set
+# end of rt_memcpy options
+
+#
+# rt_memmove options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMMOVE is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMMOVE is not set
+# end of rt_memmove options
+
+#
+# rt_memcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCMP is not set
+# end of rt_memcmp options
+
+#
+# rt_strstr options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRSTR is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRSTR is not set
+# end of rt_strstr options
+
+#
+# rt_strcasecmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCASECMP is not set
+# end of rt_strcasecmp options
+
+#
+# rt_strncpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCPY is not set
+# end of rt_strncpy options
+
+#
+# rt_strcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCPY is not set
+# end of rt_strcpy options
+
+#
+# rt_strncmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCMP is not set
+# end of rt_strncmp options
+
+#
+# rt_strcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCMP is not set
+# end of rt_strcmp options
+
+#
+# rt_strlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRLEN is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRLEN is not set
+# end of rt_strlen options
+
 #
+# rt_strnlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set
+# end of rt_strnlen options
+
+# CONFIG_RT_UTEST_TC_USING_KLIBC is not set
+# end of klibc options
+
 CONFIG_RT_NAME_MAX=8
 # CONFIG_RT_USING_ARCH_DATA_TYPE is not set
-# CONFIG_RT_USING_SMART is not set
 # CONFIG_RT_USING_NANO is not set
+# CONFIG_RT_USING_SMART is not set
 # CONFIG_RT_USING_AMP is not set
 # CONFIG_RT_USING_SMP is not set
 CONFIG_RT_CPUS_NR=1
@@ -29,19 +131,21 @@ CONFIG_IDLE_THREAD_STACK_SIZE=256
 CONFIG_RT_USING_TIMER_SOFT=y
 CONFIG_RT_TIMER_THREAD_PRIO=4
 CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
+# CONFIG_RT_USING_TIMER_ALL_SOFT is not set
+# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
 
 #
-# kservice optimization
+# kservice options
 #
-CONFIG_RT_KSERVICE_USING_STDLIB=y
-# CONFIG_RT_KSERVICE_USING_STDLIB_MEMORY is not set
-# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
 # CONFIG_RT_USING_TINY_FFS is not set
-# CONFIG_RT_KPRINTF_USING_LONGLONG is not set
+# end of kservice options
+
 CONFIG_RT_USING_DEBUG=y
+CONFIG_RT_DEBUGING_ASSERT=y
 CONFIG_RT_DEBUGING_COLOR=y
 CONFIG_RT_DEBUGING_CONTEXT=y
 # CONFIG_RT_DEBUGING_AUTO_INIT is not set
+# CONFIG_RT_USING_CI_ACTION is not set
 
 #
 # Inter-Thread communication
@@ -53,6 +157,7 @@ CONFIG_RT_USING_MAILBOX=y
 CONFIG_RT_USING_MESSAGEQUEUE=y
 # CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
 # CONFIG_RT_USING_SIGNALS is not set
+# end of Inter-Thread communication
 
 #
 # Memory Management
@@ -69,21 +174,21 @@ CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
 # CONFIG_RT_USING_MEMTRACE is not set
 # CONFIG_RT_USING_HEAP_ISR is not set
 CONFIG_RT_USING_HEAP=y
+# end of Memory Management
+
 CONFIG_RT_USING_DEVICE=y
 # CONFIG_RT_USING_DEVICE_OPS is not set
 # CONFIG_RT_USING_INTERRUPT_INFO is not set
 # CONFIG_RT_USING_THREADSAFE_PRINTF is not set
-# CONFIG_RT_USING_SCHED_THREAD_CTX is not set
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
-CONFIG_RT_VER_NUM=0x50100
+CONFIG_RT_VER_NUM=0x50200
 # CONFIG_RT_USING_STDC_ATOMIC is not set
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
-# CONFIG_RT_USING_CACHE is not set
+# end of RT-Thread Kernel
+
 CONFIG_RT_USING_HW_ATOMIC=y
-# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set
-# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
 CONFIG_RT_USING_CPU_FFS=y
 CONFIG_ARCH_ARM=y
 CONFIG_ARCH_ARM_CORTEX_M=y
@@ -118,12 +223,15 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y
 # DFS: device virtual file system
 #
 # CONFIG_RT_USING_DFS is not set
+# end of DFS: device virtual file system
+
 # CONFIG_RT_USING_FAL is not set
 
 #
 # Device Drivers
 #
 # CONFIG_RT_USING_DM is not set
+# CONFIG_RT_USING_DEV_BUS is not set
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_UNAMED_PIPE_NUMBER=64
 CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
@@ -134,16 +242,24 @@ CONFIG_RT_USING_SERIAL_V1=y
 # CONFIG_RT_USING_SERIAL_V2 is not set
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_SERIAL_BYPASS is not set
 # CONFIG_RT_USING_CAN is not set
 # CONFIG_RT_USING_CPUTIME is not set
-# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+CONFIG_RT_USING_I2C_BITOPS=y
+# CONFIG_RT_I2C_BITOPS_DEBUG is not set
+# CONFIG_RT_USING_SOFT_I2C is not set
 # CONFIG_RT_USING_PHY is not set
+# CONFIG_RT_USING_PHY_V2 is not set
 # CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_DAC is not set
 # CONFIG_RT_USING_NULL is not set
 # CONFIG_RT_USING_ZERO is not set
 # CONFIG_RT_USING_RANDOM is not set
 # CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_PM is not set
@@ -156,21 +272,14 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_TOUCH is not set
 # CONFIG_RT_USING_LCD is not set
 # CONFIG_RT_USING_HWCRYPTO is not set
-# CONFIG_RT_USING_PULSE_ENCODER is not set
-# CONFIG_RT_USING_INPUT_CAPTURE is not set
-# CONFIG_RT_USING_DEV_BUS is not set
 # CONFIG_RT_USING_WIFI is not set
+# CONFIG_RT_USING_BLK is not set
 # CONFIG_RT_USING_VIRTIO is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_KTIME is not set
 # CONFIG_RT_USING_HWTIMER is not set
-
-#
-# Using USB
-#
-# CONFIG_RT_USING_USB is not set
-# CONFIG_RT_USING_USB_HOST is not set
-# CONFIG_RT_USING_USB_DEVICE is not set
+# CONFIG_RT_USING_CHERRYUSB is not set
+# end of Device Drivers
 
 #
 # C/C++ and POSIX layer
@@ -188,6 +297,8 @@ CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y
 CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8
 CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0
 CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
+# end of Timezone and Daylight Saving Time
+# end of ISO-ANSI C layer
 
 #
 # POSIX (Portable Operating System Interface) layer
@@ -209,7 +320,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # Socket is in the 'Network' category
 #
+# end of Interprocess Communication (IPC)
+# end of POSIX (Portable Operating System Interface) layer
+
 # CONFIG_RT_USING_CPLUSPLUS is not set
+# end of C/C++ and POSIX layer
 
 #
 # Network
@@ -218,12 +333,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_RT_USING_NETDEV is not set
 # CONFIG_RT_USING_LWIP is not set
 # CONFIG_RT_USING_AT is not set
+# end of Network
 
 #
 # Memory protection
 #
 # CONFIG_RT_USING_MEM_PROTECTION is not set
 # CONFIG_RT_USING_HW_STACK_GUARD is not set
+# end of Memory protection
 
 #
 # Utilities
@@ -235,12 +352,25 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_RT_USING_RESOURCE_ID is not set
 # CONFIG_RT_USING_ADT is not set
 # CONFIG_RT_USING_RT_LINK is not set
+# end of Utilities
+
 # CONFIG_RT_USING_VBUS is not set
 
+#
+# Using USB legacy version
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+# end of Using USB legacy version
+
+# CONFIG_RT_USING_FDT is not set
+# end of RT-Thread Components
+
 #
 # RT-Thread Utestcases
 #
 # CONFIG_RT_USING_UTESTCASES is not set
+# end of RT-Thread Utestcases
 
 #
 # RT-Thread online packages
@@ -249,7 +379,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
 # CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
 # CONFIG_PKG_USING_UMQTT is not set
@@ -262,6 +391,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
 # CONFIG_PKG_USING_NANOPB is not set
+# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
 
 #
 # Wi-Fi
@@ -271,27 +401,35 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # Marvell WiFi
 #
 # CONFIG_PKG_USING_WLANMARVELL is not set
+# end of Marvell WiFi
 
 #
 # Wiced WiFi
 #
 # CONFIG_PKG_USING_WLAN_WICED is not set
+# end of Wiced WiFi
+
 # CONFIG_PKG_USING_RW007 is not set
 
 #
 # CYW43012 WiFi
 #
 # CONFIG_PKG_USING_WLAN_CYW43012 is not set
+# end of CYW43012 WiFi
 
 #
 # BL808 WiFi
 #
 # CONFIG_PKG_USING_WLAN_BL808 is not set
+# end of BL808 WiFi
 
 #
 # CYW43439 WiFi
 #
 # CONFIG_PKG_USING_WLAN_CYW43439 is not set
+# end of CYW43439 WiFi
+# end of Wi-Fi
+
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
@@ -314,6 +452,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
 # CONFIG_PKG_USING_JOYLINK is not set
 # CONFIG_PKG_USING_IOTSHARP_SDK is not set
+# end of IoT Cloud
+
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
@@ -356,6 +496,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ZEPHYR_POLLING is not set
 # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
 # CONFIG_PKG_USING_LHC_MODBUS is not set
+# CONFIG_PKG_USING_QMODBUS is not set
+# end of IoT - internet of things
 
 #
 # security packages
@@ -366,6 +508,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
 # CONFIG_PKG_USING_YD_CRYPTO is not set
+# end of security packages
 
 #
 # language packages
@@ -381,18 +524,22 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_AGILE_JSMN is not set
 # CONFIG_PKG_USING_PARSON is not set
+# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
 
 #
 # XML: Extensible Markup Language
 #
 # CONFIG_PKG_USING_SIMPLE_XML is not set
 # CONFIG_PKG_USING_EZXML is not set
+# end of XML: Extensible Markup Language
+
 # CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
 # CONFIG_PKG_USING_PIKASCRIPT is not set
 # CONFIG_PKG_USING_RTT_RUST is not set
+# end of language packages
 
 #
 # multimedia packages
@@ -404,12 +551,15 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_LVGL is not set
 # CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
 # CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
+# end of LVGL: powerful and easy-to-use embedded GUI library
 
 #
 # u8g2: a monochrome graphic library
 #
 # CONFIG_PKG_USING_U8G2_OFFICIAL is not set
 # CONFIG_PKG_USING_U8G2 is not set
+# end of u8g2: a monochrome graphic library
+
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
@@ -430,6 +580,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_GUIENGINE is not set
 # CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_3GPP_AMRNB is not set
+# end of multimedia packages
 
 #
 # tools packages
@@ -479,6 +630,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_VOFA_PLUS is not set
 # CONFIG_PKG_USING_RT_TRACE is not set
 # CONFIG_PKG_USING_ZDEBUG is not set
+# end of tools packages
 
 #
 # system packages
@@ -490,6 +642,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_RT_MEMCPY_CM is not set
 # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
 # CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
+# end of enhanced kernel services
+
+# CONFIG_PKG_USING_AUNITY is not set
 
 #
 # acceleration: Assembly language or algorithmic acceleration packages
@@ -497,6 +652,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
 # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
 # CONFIG_PKG_USING_QFPLIB_M3 is not set
+# end of acceleration: Assembly language or algorithmic acceleration packages
 
 #
 # CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
@@ -507,6 +663,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_CMSIS_NN is not set
 # CONFIG_PKG_USING_CMSIS_RTOS1 is not set
 # CONFIG_PKG_USING_CMSIS_RTOS2 is not set
+# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
 
 #
 # Micrium: Micrium software products porting for RT-Thread
@@ -517,6 +674,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_UC_CLK is not set
 # CONFIG_PKG_USING_UC_COMMON is not set
 # CONFIG_PKG_USING_UC_MODBUS is not set
+# end of Micrium: Micrium software products porting for RT-Thread
+
 # CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
 # CONFIG_PKG_USING_LITEOS_SDK is not set
 # CONFIG_PKG_USING_TZ_DATABASE is not set
@@ -564,6 +723,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_RTP is not set
 # CONFIG_PKG_USING_REB is not set
 # CONFIG_PKG_USING_R_RHEALSTONE is not set
+# end of system packages
 
 #
 # peripheral libraries and drivers
@@ -576,9 +736,27 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # STM32 HAL & SDK Drivers
 #
-# CONFIG_PKG_USING_STM32L4XX_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
 # CONFIG_PKG_USING_STM32WB55_SDK is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
+# end of STM32 HAL & SDK Drivers
+
+#
+# Infineon HAL Packages
+#
+# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
+# CONFIG_PKG_USING_INFINEON_CMSIS is not set
+# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
+# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
+# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
+# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
+# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
+# CONFIG_PKG_USING_INFINEON_USBDEV is not set
+# end of Infineon HAL Packages
+
 # CONFIG_PKG_USING_BLUETRUM_SDK is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
 # CONFIG_PKG_USING_ESP_IDF is not set
@@ -588,9 +766,12 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # CONFIG_PKG_USING_K210_SDK is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# end of Kendryte SDK
+
 # CONFIG_PKG_USING_NRF5X_SDK is not set
 # CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
+# end of HAL & SDK Drivers
 
 #
 # sensors drivers
@@ -660,6 +841,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_PAJ7620 is not set
 # CONFIG_PKG_USING_STHS34PF80 is not set
+# end of sensors drivers
 
 #
 # touch drivers
@@ -674,6 +856,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_XPT2046_TOUCH is not set
 # CONFIG_PKG_USING_CST816X is not set
 # CONFIG_PKG_USING_CST812T is not set
+# end of touch drivers
+
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
@@ -746,6 +930,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_BT_MX01 is not set
 # CONFIG_PKG_USING_RGPOWER is not set
 # CONFIG_PKG_USING_SPI_TOOLS is not set
+# end of peripheral libraries and drivers
 
 #
 # AI packages
@@ -760,15 +945,18 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_QUEST is not set
 # CONFIG_PKG_USING_NAXOS is not set
 # CONFIG_PKG_USING_R_TINYMAIX is not set
+# end of AI packages
 
 #
 # Signal Processing and Control Algorithm Packages
 #
+# CONFIG_PKG_USING_APID is not set
 # CONFIG_PKG_USING_FIRE_PID_CURVE is not set
 # CONFIG_PKG_USING_QPID is not set
 # CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_KISSFFT is not set
+# end of Signal Processing and Control Algorithm Packages
 
 #
 # miscellaneous packages
@@ -777,6 +965,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # project laboratory
 #
+# end of project laboratory
 
 #
 # samples: kernel and components samples
@@ -785,6 +974,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
 # CONFIG_PKG_USING_NETWORK_SAMPLES is not set
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# end of samples: kernel and components samples
 
 #
 # entertainment: terminal games and other interesting software packages
@@ -801,6 +991,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_MORSE is not set
 # CONFIG_PKG_USING_TINYSQUARE is not set
+# end of entertainment: terminal games and other interesting software packages
+
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
@@ -834,6 +1026,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_SOEM is not set
 # CONFIG_PKG_USING_QPARAM is not set
 # CONFIG_PKG_USING_CorevMCU_CLI is not set
+# end of miscellaneous packages
 
 #
 # Arduino libraries
@@ -849,6 +1042,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
 # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
 # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
+# end of Projects and Demos
 
 #
 # Sensors
@@ -988,6 +1182,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
 # CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set
+# end of Sensors
 
 #
 # Display
@@ -999,6 +1195,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
 # CONFIG_PKG_USING_SEEED_TM1637 is not set
+# end of Display
 
 #
 # Timing
@@ -1007,6 +1204,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
 # CONFIG_PKG_USING_ARDUINO_TICKER is not set
 # CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
+# end of Timing
 
 #
 # Data Processing
@@ -1014,6 +1212,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set
 # CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set
 # CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set
+# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set
+# end of Data Processing
 
 #
 # Data Storage
@@ -1024,6 +1224,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set
+# end of Communication
 
 #
 # Device Control
@@ -1035,12 +1236,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
 # CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
+# end of Device Control
 
 #
 # Other
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
+# end of Other
 
 #
 # Signal IO
@@ -1053,10 +1256,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set
+# end of Signal IO
 
 #
 # Uncategorized
 #
+# end of Arduino libraries
+# end of RT-Thread online packages
+
 CONFIG_SOC_FAMILY_HC32=y
 CONFIG_SOC_SERIES_HC32F4=y
 
@@ -1072,6 +1279,7 @@ CONFIG_BSP_USING_ON_CHIP_FLASH_CACHE=y
 CONFIG_BSP_USING_ON_CHIP_FLASH_ICODE_CACHE=y
 CONFIG_BSP_USING_ON_CHIP_FLASH_DCODE_CACHE=y
 CONFIG_BSP_USING_ON_CHIP_FLASH_ICODE_PREFETCH=y
+# end of On-chip Drivers
 
 #
 # Onboard Peripheral Drivers
@@ -1079,7 +1287,9 @@ CONFIG_BSP_USING_ON_CHIP_FLASH_ICODE_PREFETCH=y
 # CONFIG_BSP_USING_ETH is not set
 # CONFIG_BSP_USING_EXMC is not set
 # CONFIG_BSP_USING_SPI_FLASH is not set
-# CONFIG_BSP_USING_TCA9539 is not set
+CONFIG_BSP_USING_TCA9539=y
+CONFIG_BSP_USING_EXT_IO=y
+# end of Onboard Peripheral Drivers
 
 #
 # On-chip Peripheral Drivers
@@ -1098,7 +1308,17 @@ CONFIG_BSP_USING_UART1=y
 # CONFIG_BSP_USING_UART8 is not set
 # CONFIG_BSP_USING_UART9 is not set
 # CONFIG_BSP_USING_UART10 is not set
-# CONFIG_BSP_USING_I2C is not set
+CONFIG_BSP_USING_I2C=y
+# CONFIG_BSP_USING_I2C1_SW is not set
+CONFIG_BSP_USING_I2C_HW=y
+CONFIG_BSP_USING_I2C1=y
+# CONFIG_BSP_I2C1_TX_USING_DMA is not set
+# CONFIG_BSP_I2C1_RX_USING_DMA is not set
+# CONFIG_BSP_USING_I2C2 is not set
+# CONFIG_BSP_USING_I2C3 is not set
+# CONFIG_BSP_USING_I2C4 is not set
+# CONFIG_BSP_USING_I2C5 is not set
+# CONFIG_BSP_USING_I2C6 is not set
 # CONFIG_BSP_USING_ON_CHIP_FLASH is not set
 # CONFIG_BSP_USING_SPI is not set
 # CONFIG_BSP_USING_ADC is not set
@@ -1114,7 +1334,10 @@ CONFIG_BSP_USING_UART1=y
 # CONFIG_BSP_USING_QSPI is not set
 # CONFIG_BSP_USING_PULSE_ENCODER is not set
 # CONFIG_BSP_USING_HWTIMER is not set
+# CONFIG_BSP_USING_INPUT_CAPTURE is not set
+# end of On-chip Peripheral Drivers
 
 #
 # Board extended module Drivers
 #
+# end of Hardware Drivers Config