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@@ -3,25 +3,25 @@
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// emac.c - Driver for the Integrated Ethernet Controller on Snowflake-class
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// Tiva devices.
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//
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-// Copyright (c) 2013-2017 Texas Instruments Incorporated. All rights reserved.
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+// Copyright (c) 2013-2020 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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-//
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+//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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-//
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+//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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-//
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+//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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-// documentation and/or other materials provided with the
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+// documentation and/or other materials provided with the
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// distribution.
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-//
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+//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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-//
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+//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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@@ -33,8 +33,8 @@
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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-//
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-// This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
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+//
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+// This is part of revision 2.2.0.295 of the Tiva Peripheral Driver Library.
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//
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//*****************************************************************************
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@@ -297,12 +297,12 @@ g_pi16MIIClockDiv[] =
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//! (where each descriptor includes a field that points to the next descriptor
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//! in the list). In ring mode, the hardware uses the \e ui32DescSkipSize to
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//! skip past any application-defined fields after the end of the hardware-
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-//! defined descriptor fields. The parameter value indicates the number of
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-//! 32-bit words to skip after the last field of the hardware-defined
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-//! descriptor to get to the first field of the next descriptor. When using
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-//! arrays of either the \b tEMACDMADescriptor or \b tEMACAltDMADescriptor
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+//! defined descriptor fields. The parameter value indicates the number of
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+//! 32-bit words to skip after the last field of the hardware-defined
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+//! descriptor to get to the first field of the next descriptor. When using
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+//! arrays of either the \b tEMACDMADescriptor or \b tEMACAltDMADescriptor
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//! types defined for this driver, \e ui32DescSkipSize must be set to 1 to skip
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-//! the \e pvNext pointer added to the end of each of these structures.
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+//! the \e pvNext pointer added to the end of each of these structures.
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//! Applications may modify these structure definitions to include their own
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//! application-specific data and modify \e ui32DescSkipSize appropriately if
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//! desired.
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@@ -419,8 +419,8 @@ EMACInit(uint32_t ui32Base, uint32_t ui32SysClk, uint32_t ui32BusConfig,
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//!
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//! \param ui32Base is the base address of the Ethernet controller.
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//!
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-//! This function performs a reset of the Ethernet MAC by resetting all logic
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-//! and returning all registers to their default values. The function returns
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+//! This function performs a reset of the Ethernet MAC by resetting all logic
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+//! and returning all registers to their default values. The function returns
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//! only after the hardware indicates that the reset has completed.
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//!
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//! \note To ensure that the reset completes, the selected PHY clock must be
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@@ -495,7 +495,7 @@ EMACReset(uint32_t ui32Base)
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//! RMII interface.
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//!
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//! If \b EMAC_PHY_TYPE_INTERNAL is selected, the following flags may be ORed
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-//! into \e ui32Config to control various PHY features and modes. These flags
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+//! into \e ui32Config to control various PHY features and modes. These flags
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//! are ignored if an external PHY is selected.
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//!
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//! - \b EMAC_PHY_INT_NIB_TXERR_DET_DIS disables odd nibble transmit error
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@@ -682,7 +682,7 @@ EMACPHYConfigSet(uint32_t ui32Base, uint32_t ui32Config)
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//! The back-off limit determines the range of the random time that the MAC
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//! delays after a collision and before attempting to retransmit a frame. One
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//! of the following values must be used to select this limit. In each case,
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-//! the retransmission delay in terms of 512 bit time slots, is the lower of
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+//! the retransmission delay in terms of 512 bit time slots, is the lower of
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//! (2 ** N) and a random number between 0 and the selected backoff-limit.
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//!
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//! - \b EMAC_CONFIG_BO_LIMIT_1024
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@@ -727,10 +727,10 @@ EMACPHYConfigSet(uint32_t ui32Base, uint32_t ui32Config)
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//! up to 9018 (or 9022 if using VLAN tagging) to be handled without reporting
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//! giant frame errors.
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//! - \b EMAC_CONFIG_100MBPS forces the MAC to communicate with the PHY using
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-//! 100Mbps signaling. If this option is not specified, the MAC uses 10Mbps
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-//! signaling. This speed setting is important when using an external RMII
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-//! PHY where the selected rate must match the PHY's setting which may have
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-//! been made as a result of auto-negotiation. When using the internal PHY
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+//! 100Mbps signaling. If this option is not specified, the MAC uses 10Mbps
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+//! signaling. This speed setting is important when using an external RMII
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+//! PHY where the selected rate must match the PHY's setting which may have
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+//! been made as a result of auto-negotiation. When using the internal PHY
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//! or an external MII PHY, the signaling rate is controlled by the PHY-
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//! provided transmit and receive clocks.
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//! - \b EMAC_CONFIG_CS_DISABLE disables Carrier Sense during transmission
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@@ -743,15 +743,15 @@ EMACPHYConfigSet(uint32_t ui32Base, uint32_t ui32Config)
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//! of the checksum calculations are reported via status fields in the DMA
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//! receive descriptors.
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//! - \b EMAC_CONFIG_RETRY_DISABLE disables retransmission in cases where
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-//! half-duplex mode is in use and a collision occurs. This condition causes
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-//! the current frame to be ignored and a frame abort to be reported in the
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+//! half-duplex mode is in use and a collision occurs. This condition causes
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+//! the current frame to be ignored and a frame abort to be reported in the
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//! transmit frame status.
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//! - \b EMAC_CONFIG_AUTO_CRC_STRIPPING strips the last 4 bytes (frame check
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//! sequence) from all Ether type frames before forwarding the frames to the
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//! application.
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//! - \b EMAC_CONFIG_DEFERRAL_CHK_ENABLE enables transmit deferral checking
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-//! in half-duplex mode. When enabled, the transmitter reports an error if it
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-//! is unable to transmit a frame for more than 24288 bit times (or 155680
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+//! in half-duplex mode. When enabled, the transmitter reports an error if it
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+//! is unable to transmit a frame for more than 24288 bit times (or 155680
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//! bit times in Jumbo frame mode) due to an active carrier sense signal on
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//! the MII.
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//!
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@@ -971,14 +971,14 @@ EMACConfigSet(uint32_t ui32Base, uint32_t ui32Config, uint32_t ui32ModeFlags,
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//! fields in the DMA receive descriptors.
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//! - \b EMAC_CONFIG_RETRY_DISABLE indicates that retransmission is disabled
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//! in cases where half-duplex mode is in use and a collision occurs. This
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-//! condition causes the current frame to be ignored and a frame abort to be
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+//! condition causes the current frame to be ignored and a frame abort to be
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//! reported in the transmit frame status.
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//! - \b EMAC_CONFIG_AUTO_CRC_STRIPPING indicates that the last 4 bytes
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//! (frame check sequence) from all Ether type frames are being stripped before
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//! frames are forwarded to the application.
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//! - \b EMAC_CONFIG_DEFERRAL_CHK_ENABLE indicates that transmit deferral
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//! checking is disabled in half-duplex mode. When enabled, the transmitter
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-//! reports an error if it is unable to transmit a frame for more than 24288
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+//! reports an error if it is unable to transmit a frame for more than 24288
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//! bit times (or 155680 bit times in Jumbo frame mode) due to an active
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//! carrier sense signal on the MII.
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//! - \b EMAC_CONFIG_TX_ENABLED indicates that the MAC transmitter is
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@@ -1225,7 +1225,7 @@ EMACAddrSet(uint32_t ui32Base, uint32_t ui32Index, const uint8_t *pui8MACAddr)
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//!
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//! AC-DE-48-00-00-80
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//!
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-//! the data is returned with 0xAC in the first byte of the array, 0xDE in
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+//! the data is returned with 0xAC in the first byte of the array, 0xDE in
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//! the second, 0x48 in the third and so on.
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//!
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//! \return None.
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@@ -1287,7 +1287,7 @@ EMACNumAddrGet(uint32_t ui32Base)
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//! addresses.
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//!
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//! \param ui32Base is the base address of the controller.
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-//! \param ui32Index is the index of the MAC address slot for which the filter
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+//! \param ui32Index is the index of the MAC address slot for which the filter
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//! is to be set.
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//! \param ui32Config sets the filter parameters for the given MAC address.
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//!
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@@ -1295,9 +1295,9 @@ EMACNumAddrGet(uint32_t ui32Base)
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//! address slots that the controller supports. This configuration is used
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//! when perfect filtering (rather than hash table filtering) is selected.
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//!
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-//! Valid values for \e ui32Index are from 1 to (number of MAC address
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-//! slots - 1). The number of supported MAC address slots may be found by
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-//! calling EMACNumAddrGet(). MAC index 0 is the local MAC address and does
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+//! Valid values for \e ui32Index are from 1 to (number of MAC address
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+//! slots - 1). The number of supported MAC address slots may be found by
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+//! calling EMACNumAddrGet(). MAC index 0 is the local MAC address and does
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//! not have filtering parameters associated with it.
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//!
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//! The \e ui32Config parameter determines how the given MAC address is used
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@@ -1362,16 +1362,16 @@ EMACAddrFilterSet(uint32_t ui32Base, uint32_t ui32Index, uint32_t ui32Config)
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//! addresses.
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//!
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//! \param ui32Base is the base address of the controller.
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-//! \param ui32Index is the index of the MAC address slot for which the filter
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+//! \param ui32Index is the index of the MAC address slot for which the filter
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//! is to be queried.
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//!
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//! This function returns filtering parameters associated with one of the MAC
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//! address slots that the controller supports. This configuration is used
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//! when perfect filtering (rather than hash table filtering) is selected.
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//!
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-//! Valid values for \e ui32Index are from 1 to (number of MAC address
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-//! slots - 1). The number of supported MAC address slots may be found by
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-//! calling EMACNumAddrGet(). MAC index 0 is the local MAC address and does
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+//! Valid values for \e ui32Index are from 1 to (number of MAC address
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+//! slots - 1). The number of supported MAC address slots may be found by
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+//! calling EMACNumAddrGet(). MAC index 0 is the local MAC address and does
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//! not have filtering parameters associated with it.
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//!
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//! \return Returns the filter configuration as the logical OR of the
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@@ -1450,7 +1450,7 @@ EMACAddrFilterGet(uint32_t ui32Base, uint32_t ui32Index)
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//! when the source address field in the frame does not match the values
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//! programmed into the enabled SA registers.
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//! - \b EMAC_FRMFILTER_INV_SADDR enables inverse source address filtering.
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-//! When this option is specified, frames for which the SA does not match the
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+//! When this option is specified, frames for which the SA does not match the
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//! SA registers are marked as passing the source address filter.
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//! - \b EMAC_FRMFILTER_BROADCAST configures the MAC to discard all incoming
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//! broadcast frames.
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@@ -1530,7 +1530,7 @@ EMACFrameFilterSet(uint32_t ui32Base, uint32_t ui32FilterOpts)
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//! received frames when the source address field in the frame does not match
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//! the values programmed into the enabled SA registers.
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//! - \b EMAC_FRMFILTER_INV_SADDR enables inverse source address filtering.
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-//! When this option is specified, frames for which the SA does not match the
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+//! When this option is specified, frames for which the SA does not match the
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//! SA registers are marked as passing the source address filter.
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//! - \b EMAC_FRMFILTER_BROADCAST indicates that the MAC is configured to
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//! discard all incoming broadcast frames.
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@@ -1621,9 +1621,9 @@ EMACHashFilterSet(uint32_t ui32Base, uint32_t ui32HashHi, uint32_t ui32HashLo)
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//! Returns the current MAC address hash filter table.
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//!
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//! \param ui32Base is the base address of the controller.
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-//! \param pui32HashHi points to storage to be written with the upper 32 bits
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+//! \param pui32HashHi points to storage to be written with the upper 32 bits
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//! of the current 64-bit hash filter table.
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-//! \param pui32HashLo points to storage to be written with the lower 32 bits
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+//! \param pui32HashLo points to storage to be written with the lower 32 bits
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//! of the current 64-bit hash filter table.
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//!
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//! This function may be used to retrieve the current 64-bit hash filter table
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@@ -1766,8 +1766,8 @@ EMACRxWatchdogTimerSet(uint32_t ui32Base, uint8_t ui8Timeout)
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//! - \b EMAC_STATUS_RWC_ACTIVE
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//! - \b EMAC_STATUS_RPE_ACTIVE
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//!
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-//! The transmit frame controller status can be extracted from the returned
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-//! value by ANDing with \b EMAC_STATUS_TFC_STATE_MASK and is one of the
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+//! The transmit frame controller status can be extracted from the returned
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+//! value by ANDing with \b EMAC_STATUS_TFC_STATE_MASK and is one of the
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//! following:
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//!
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//! - \b EMAC_STATUS_TFC_STATE_IDLE
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@@ -1775,8 +1775,8 @@ EMACRxWatchdogTimerSet(uint32_t ui32Base, uint8_t ui8Timeout)
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//! - \b EMAC_STATUS_TFC_STATE_PAUSING
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//! - \b EMAC_STATUS_TFC_STATE_WRITING
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//!
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-//! The transmit FIFO read controller status can be extracted from the returned
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-//! value by ANDing with \b EMAC_STATUS_TRC_STATE_MASK and is one of the
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+//! The transmit FIFO read controller status can be extracted from the returned
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+//! value by ANDing with \b EMAC_STATUS_TRC_STATE_MASK and is one of the
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//! following:
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//!
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//! - \b EMAC_STATUS_TRC_STATE_IDLE
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@@ -1785,7 +1785,7 @@ EMACRxWatchdogTimerSet(uint32_t ui32Base, uint8_t ui8Timeout)
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//! - \b EMAC_STATUS_TRC_STATE_STATUS
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//!
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//! The current receive FIFO levels can be extracted from the returned value
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-//! by ANDing with \b EMAC_STATUS_RX_FIFO_LEVEL_MASK and is one of the
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+//! by ANDing with \b EMAC_STATUS_RX_FIFO_LEVEL_MASK and is one of the
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//! following:
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//!
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//! - \b EMAC_STATUS_RX_FIFO_EMPTY indicating that the FIFO is empty.
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@@ -1796,7 +1796,7 @@ EMACRxWatchdogTimerSet(uint32_t ui32Base, uint8_t ui8Timeout)
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//! - \b EMAC_STATUS_RX_FIFO_FULL indicating that the FIFO is full.
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//!
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//! The current receive FIFO state can be extracted from the returned value
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-//! by ANDing with \b EMAC_STATUS_RX_FIFO_STATE_MASK and is one of the
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+//! by ANDing with \b EMAC_STATUS_RX_FIFO_STATE_MASK and is one of the
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//! following:
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//!
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//! - \b EMAC_STATUS_RX_FIFO_IDLE
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@@ -2049,7 +2049,7 @@ EMACTxDMADescriptorListSet(uint32_t ui32Base, tEMACDMADescriptor *pDescriptor)
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//! \param ui32Base is the base address of the controller.
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//!
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//! This function returns a pointer to the head of the Ethernet MAC's transmit
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-//! DMA descriptor list. This value corresponds to the pointer originally set
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+//! DMA descriptor list. This value corresponds to the pointer originally set
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//! using a call to EMACTxDMADescriptorListSet().
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//!
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//! \return Returns a pointer to the start of the DMA transmit descriptor list.
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@@ -2438,8 +2438,8 @@ EMACIntUnregister(uint32_t ui32Base)
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//! - \b EMAC_INT_RX_OVERFLOW indicates that an overflow was experienced
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//! during reception.
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//! - \b EMAC_INT_TX_JABBER indicates that the transmit jabber timer expired.
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-//! This condition occurs when the frame size exceeds 2048 bytes (or 10240
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-//! bytes in Jumbo Frame mode) and causes the transmit process to abort and
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+//! This condition occurs when the frame size exceeds 2048 bytes (or 10240
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+//! bytes in Jumbo Frame mode) and causes the transmit process to abort and
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//! enter the Stopped state.
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//! - \b EMAC_INT_TX_NO_BUFFER indicates that the host owns the next buffer
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//! in the DMA's transmit descriptor list and that the DMA cannot, therefore,
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@@ -2540,8 +2540,8 @@ EMACIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
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//! - \b EMAC_INT_RX_OVERFLOW indicates that an overflow was experienced
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//! during reception.
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//! - \b EMAC_INT_TX_JABBER indicates that the transmit jabber timer expired.
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-//! This condition occurs when the frame size exceeds 2048 bytes (or 10240
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-//! bytes in Jumbo Frame mode) and causes the transmit process to abort and
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+//! This condition occurs when the frame size exceeds 2048 bytes (or 10240
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+//! bytes in Jumbo Frame mode) and causes the transmit process to abort and
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//! enter the Stopped state.
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//! - \b EMAC_INT_TX_NO_BUFFER indicates that the host owns the next buffer
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//! in the DMA's transmit descriptor list and that the DMA cannot, therefore,
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@@ -2660,8 +2660,8 @@ EMACIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
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//! - \b EMAC_INT_RX_OVERFLOW indicates that an overflow was experienced
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//! during reception.
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//! - \b EMAC_INT_TX_JABBER indicates that the transmit jabber timer expired.
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-//! This condition occurs when the frame size exceeds 2048 bytes (or 10240
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-//! bytes in Jumbo Frame mode) and causes the transmit process to abort and
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+//! This condition occurs when the frame size exceeds 2048 bytes (or 10240
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+//! bytes in Jumbo Frame mode) and causes the transmit process to abort and
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//! enter the Stopped state.
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//! - \b EMAC_INT_TX_NO_BUFFER indicates that the host owns the next buffer
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//! in the DMA's transmit descriptor list and that the DMA cannot, therefore,
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@@ -2767,8 +2767,8 @@ EMACIntStatus(uint32_t ui32Base, bool bMasked)
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//! - \b EMAC_INT_RX_OVERFLOW indicates that an overflow was experienced
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//! during reception.
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//! - \b EMAC_INT_TX_JABBER indicates that the transmit jabber timer expired.
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-//! This condition occurs when the frame size exceeds 2048 bytes (or 10240
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-//! bytes in Jumbo Frame mode) and causes the transmit process to abort and
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+//! This condition occurs when the frame size exceeds 2048 bytes (or 10240
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+//! bytes in Jumbo Frame mode) and causes the transmit process to abort and
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//! enter the Stopped state.
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//! - \b EMAC_INT_TX_NO_BUFFER indicates that the host owns the next buffer
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//! in the DMA's transmit descriptor list and that the DMA cannot, therefore,
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@@ -3160,7 +3160,7 @@ EMACPHYPowerOn(uint32_t ui32Base, uint8_t ui8PhyAddr)
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//! simple 31-bit counter, rolling over to 0 after reaching 0x7FFFFFFF. In
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//! this case, each lsb of the subsecond counter represents 0.465 ns (assuming
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//! the definition of 1 second resolution for the seconds counter). When
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-//! binary rollover mode is selected, the subsecond counter acts as a
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+//! binary rollover mode is selected, the subsecond counter acts as a
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//! nanosecond counter and rolls over to 0 after reaching 999,999,999 making
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//! each lsb represent 1 nanosecond.
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//!
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@@ -3250,7 +3250,7 @@ EMACTimestampConfigSet(uint32_t ui32Base, uint32_t ui32Config,
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//! are filtered using any of the configured MAC addresses. Messages with a
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//! destination address programmed into the MAC address filter are passed,
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//! others are discarded. If this flag is absent, the MAC address is ignored.
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-//! - \b EMAC_TS_UPDATE_FINE implements the fine update method that causes the
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+//! - \b EMAC_TS_UPDATE_FINE implements the fine update method that causes the
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//! IEEE 1588 clock to advance by the the value returned in the
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//! \e *pui32SubSecondInc parameter each time a carry is generated from the
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//! addend accumulator register. If this flag is absent, the coarse update
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@@ -3689,7 +3689,7 @@ EMACTimestampTargetIntDisable(uint32_t ui32Base)
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ASSERT(ui32Base == EMAC0_BASE);
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//
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- // Clear the bit to disable the timestamp target interrupt. This bit
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+ // Clear the bit to disable the timestamp target interrupt. This bit
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// clears automatically when the interrupt fires, so it only must be
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// disabled if you want to cancel a previously-set interrupt.
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//
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@@ -4022,7 +4022,7 @@ EMACTimestampPPSPeriodSet(uint32_t ui32Base, uint32_t ui32Period,
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//! (Type = 0x88A8) frames as valid VLAN-tagged frames. If absent, only
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//! frames with type 0x8100 are considered valid VLAN frames.
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//! - \b EMAC_VLAN_RX_INVERSE_MATCH causes the receiver to pass all VLAN
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-//! frames for which the tags do not match the supplied \e ui16Tag value. If
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+//! frames for which the tags do not match the supplied \e ui16Tag value. If
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//! this flag is absent, only tagged frames matching \e ui16Tag are passed.
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//! - \b EMAC_VLAN_RX_12BIT_TAG causes the receiver to compare only the
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//! bottom 12 bits of \e ui16Tag when performing either perfect or hash
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@@ -4082,7 +4082,7 @@ EMACVLANRxConfigSet(uint32_t ui32Base, uint16_t ui16Tag, uint32_t ui32Config)
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//! S-VLAN (Type = 0x88A8) frames as valid VLAN-tagged frames. If absent, only
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//! frames with type 0x8100 are considered valid VLAN frames.
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//! - \b EMAC_VLAN_RX_INVERSE_MATCH indicates that the receiver passes all
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-//! VLAN frames for which the tags do not match the \e *pui16Tag value. If
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+//! VLAN frames for which the tags do not match the \e *pui16Tag value. If
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//! this flag is absent, only tagged frames matching \e *pui16Tag are passed.
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//! - \b EMAC_VLAN_RX_12BIT_TAG indicates that the receiver is comparing only
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//! the bottom 12 bits of \e *pui16Tag when performing either perfect or hash
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@@ -4254,7 +4254,7 @@ EMACVLANTxConfigGet(uint32_t ui32Base, uint16_t *pui16Tag)
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//! Returns the bit number to set in the VLAN hash filter corresponding to a
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//! given tag.
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//!
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-//! \param ui16Tag is the VLAN tag for which the hash filter bit number is to
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+//! \param ui16Tag is the VLAN tag for which the hash filter bit number is to
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//! be determined.
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//!
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//! This function may be used to determine which bit in the VLAN hash filter
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@@ -4379,8 +4379,8 @@ EMACVLANHashFilterGet(uint32_t ui32Base)
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//! calculated on up to 31 payload bytes in the frame. The actual bytes used
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//! in the CRC calculation are defined by means of a bit mask where a ``1''
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//! indicates that a byte in the frame should contribute to the CRC
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-//! calculation and a ``0'' indicates that the byte should be skipped, as well
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-//! as an offset from the start of the frame to the payload byte that represents
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+//! calculation and a ``0'' indicates that the byte should be skipped, as well
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+//! as an offset from the start of the frame to the payload byte that represents
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//! the first byte in the 31-byte CRC-checked sequence.
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//!
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//! The \e pFilter parameter points to a structure containing the information
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@@ -4400,7 +4400,7 @@ EMACVLANHashFilterGet(uint32_t ui32Base)
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//! - \b pui8Offset defines the zero-based index of the byte within the frame
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//! at which CRC checking defined by \b pui32ByteMask begins.
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//! Alternatively, this value can be thought of as the number of bytes in the
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-//! frame that the MAC skips before accumulating the CRC based on the pattern
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+//! frame that the MAC skips before accumulating the CRC based on the pattern
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//! in \b pui32ByteMask.
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//! - \b pui16CRC provides the value of the calculated CRC for a valid remote
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//! wake-up frame. If the incoming frame is processed according to the filter
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@@ -4466,7 +4466,7 @@ EMACRemoteWakeUpFrameFilterSet(uint32_t ui32Base,
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//! actual bytes used in the CRC calculation are defined by means of a bit mask
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//! where a ``1'' indicates that a byte in the frame should contribute to the
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//! CRC calculation and a ``0'' indicates that the byte should be skipped, and
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-//! an offset from the start of the frame to the payload byte that represents
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+//! an offset from the start of the frame to the payload byte that represents
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//! the first byte in the 31-byte CRC-checked sequence.
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//!
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//! The \e pFilter parameter points to storage that is written with a
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@@ -4756,7 +4756,7 @@ EMACWoLEnter(uint32_t ui32Base)
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//! This function is used to configure the LPI timer and control registers when
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//! the link is established as EEE mode or when the link is lost. When the link
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//! is established as EEE, then \e ui16LPILSTimer is programmed as the link
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-//! status timer value and \e ui16LPITWTimer is programmed as the transmit wait
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+//! status timer value and \e ui16LPITWTimer is programmed as the transmit wait
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//! timer value. The parameter \e bLPIConfig is used to decide if the transmit
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//! path must be automated or should be under user control.
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//!
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@@ -4773,7 +4773,7 @@ EMACLPIConfig(uint32_t ui32Base, bool bLPIConfig, uint16_t ui16LPILSTimer,
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// Parameter sanity check.
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//
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ASSERT(ui32Base == EMAC0_BASE);
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-
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+
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ui32TimerValue = ((ui16LPILSTimer << EMAC_LPITIMERCTL_LST_S) &
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EMAC_LPITIMERCTL_LST_M);
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ui32TimerValue |= ui16LPITWTimer & EMAC_LPITIMERCTL_TWT_M;
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@@ -4932,7 +4932,7 @@ EMACPHYMMDWrite(uint32_t ui32Base, uint8_t ui8PhyAddr, uint16_t ui16RegAddr,
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//
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// Write the extended register value.
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//
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- EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL,
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+ EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL,
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(0x4000 | DEV_ADDR(ui16RegAddr)));
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EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL, ui16Data);
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}
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@@ -4970,7 +4970,7 @@ EMACPHYMMDRead(uint32_t ui32Base, uint8_t ui8PhyAddr, uint16_t ui16RegAddr)
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//
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// Read the extended register value.
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//
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- EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL,
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+ EMACPHYWrite(ui32Base, ui8PhyAddr, EPHY_REGCTL,
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(0x4000 | DEV_ADDR(ui16RegAddr)));
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return(EMACPHYRead(ui32Base, ui8PhyAddr, EPHY_ADDAR));
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}
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