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@@ -190,13 +190,13 @@ static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
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cmd->cmd_code,
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cmd->cmd_code,
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cmd->arg,
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cmd->arg,
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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- data ? data->blks * data->blksize : 0,
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- data ? data->blksize : 0
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- );
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+ data ? data->blks * data->blksize : 0,
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+ data ? data->blksize : 0
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+ );
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}
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}
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}
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}
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else
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else
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-{
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+ {
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cmd->err = RT_EOK;
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cmd->err = RT_EOK;
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LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
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LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
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}
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}
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@@ -278,9 +278,9 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
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resp_type(cmd) == RESP_R6 ? "R6" : "",
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resp_type(cmd) == RESP_R6 ? "R6" : "",
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resp_type(cmd) == RESP_R7 ? "R7" : "",
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resp_type(cmd) == RESP_R7 ? "R7" : "",
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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- data ? data->blks * data->blksize : 0,
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- data ? data->blksize : 0
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- );
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+ data ? data->blks * data->blksize : 0,
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+ data ? data->blksize : 0
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+ );
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/* config cmd reg */
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/* config cmd reg */
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reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE;
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reg_cmd = cmd->cmd_code | HW_SDIO_CPSM_ENABLE;
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@@ -293,7 +293,7 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
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/* config data reg */
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/* config data reg */
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if (data != RT_NULL)
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if (data != RT_NULL)
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-{
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+ {
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rt_uint32_t dir = 0;
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rt_uint32_t dir = 0;
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rt_uint32_t size = data->blks * data->blksize;
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rt_uint32_t size = data->blks * data->blksize;
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int order;
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int order;
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@@ -700,6 +700,25 @@ void SD_LowLevel_DMA_TxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize)
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HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
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HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
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HAL_DMA_Init(&sdio_obj.dma.handle_tx);
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HAL_DMA_Init(&sdio_obj.dma.handle_tx);
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+ HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
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+
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+#elif defined(SOC_SERIES_STM32L4)
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+ static uint32_t size = 0;
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+ size += BufferSize * 4;
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+ sdio_obj.cfg = &sdio_config;
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+ sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance;
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+ sdio_obj.dma.handle_tx.Init.Request = sdio_config.dma_tx.request;
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+ sdio_obj.dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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+ sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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+ sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE;
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+ sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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+ sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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+ sdio_obj.dma.handle_tx.Init.Mode = DMA_NORMAL;
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+ sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
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+
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+ HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
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+ HAL_DMA_Init(&sdio_obj.dma.handle_tx);
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+
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HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
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HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
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#else
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#else
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static uint32_t size = 0;
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static uint32_t size = 0;
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@@ -736,38 +755,54 @@ void SD_LowLevel_DMA_RxConfig(uint32_t *src, uint32_t *dst, uint32_t BufferSize)
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{
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{
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#if defined(SOC_SERIES_STM32F1)
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#if defined(SOC_SERIES_STM32F1)
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sdio_obj.cfg = &sdio_config;
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sdio_obj.cfg = &sdio_config;
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- sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance;
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- sdio_obj.dma.handle_tx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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- sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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- sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE;
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- sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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- sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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- sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
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-
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- HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
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- HAL_DMA_Init(&sdio_obj.dma.handle_tx);
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-
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- HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
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+ sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance;
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+ sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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+ sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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+ sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE;
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+ sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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+ sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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+ sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_MEDIUM;
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+
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+ HAL_DMA_DeInit(&sdio_obj.dma.handle_rx);
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+ HAL_DMA_Init(&sdio_obj.dma.handle_rx);
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+
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+ HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize);
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+#elif defined(SOC_SERIES_STM32L4)
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+ sdio_obj.cfg = &sdio_config;
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+ sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance;
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+ sdio_obj.dma.handle_rx.Init.Request = sdio_config.dma_tx.request;
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+ sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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+ sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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+ sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE;
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+ sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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+ sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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+ sdio_obj.dma.handle_rx.Init.Mode = DMA_NORMAL;
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+ sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_LOW;
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+
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+ HAL_DMA_DeInit(&sdio_obj.dma.handle_rx);
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+ HAL_DMA_Init(&sdio_obj.dma.handle_rx);
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+
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+ HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize);
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#else
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#else
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sdio_obj.cfg = &sdio_config;
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sdio_obj.cfg = &sdio_config;
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- sdio_obj.dma.handle_tx.Instance = sdio_config.dma_tx.Instance;
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- sdio_obj.dma.handle_tx.Init.Channel = sdio_config.dma_tx.channel;
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- sdio_obj.dma.handle_tx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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- sdio_obj.dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE;
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- sdio_obj.dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE;
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- sdio_obj.dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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- sdio_obj.dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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- sdio_obj.dma.handle_tx.Init.Mode = DMA_PFCTRL;
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- sdio_obj.dma.handle_tx.Init.Priority = DMA_PRIORITY_MEDIUM;
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- sdio_obj.dma.handle_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
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- sdio_obj.dma.handle_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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- sdio_obj.dma.handle_tx.Init.MemBurst = DMA_MBURST_INC4;
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- sdio_obj.dma.handle_tx.Init.PeriphBurst = DMA_PBURST_INC4;
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-
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- HAL_DMA_DeInit(&sdio_obj.dma.handle_tx);
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- HAL_DMA_Init(&sdio_obj.dma.handle_tx);
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-
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- HAL_DMA_Start(&sdio_obj.dma.handle_tx, (uint32_t)src, (uint32_t)dst, BufferSize);
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+ sdio_obj.dma.handle_rx.Instance = sdio_config.dma_tx.Instance;
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+ sdio_obj.dma.handle_rx.Init.Channel = sdio_config.dma_tx.channel;
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+ sdio_obj.dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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+ sdio_obj.dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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+ sdio_obj.dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE;
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+ sdio_obj.dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
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+ sdio_obj.dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
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+ sdio_obj.dma.handle_rx.Init.Mode = DMA_PFCTRL;
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+ sdio_obj.dma.handle_rx.Init.Priority = DMA_PRIORITY_MEDIUM;
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+ sdio_obj.dma.handle_rx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
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+ sdio_obj.dma.handle_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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+ sdio_obj.dma.handle_rx.Init.MemBurst = DMA_MBURST_INC4;
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+ sdio_obj.dma.handle_rx.Init.PeriphBurst = DMA_PBURST_INC4;
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+
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+ HAL_DMA_DeInit(&sdio_obj.dma.handle_rx);
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+ HAL_DMA_Init(&sdio_obj.dma.handle_rx);
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+
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+ HAL_DMA_Start(&sdio_obj.dma.handle_rx, (uint32_t)src, (uint32_t)dst, BufferSize);
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#endif
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#endif
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}
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}
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