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@@ -16,14 +16,13 @@
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#include <rtthread.h>
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#include "s3c24x0.h"
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-// #define _MMUTT_STARTADDRESS 0x30080000
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-#define _MMUTT_STARTADDRESS 0x30400000
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+#define _MMUTT_STARTADDRESS 0x33FF0000
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#define DESC_SEC (0x2|(1<<4))
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#define CB (3<<2) //cache_on, write_back
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#define CNB (2<<2) //cache_on, write_through
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#define NCB (1<<2) //cache_off,WR_BUF on
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-#define NCNB (0<<2) //cache_off,WR_BUF off
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+#define NCNB (0<<2) //cache_off,WR_BUF off
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#define AP_RW (3<<10) //supervisor=RW, user=RW
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#define AP_RO (2<<10) //supervisor=RW, user=RO
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@@ -367,9 +366,9 @@ void rt_hw_mmu_init(void)
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mmu_setmtt(0x28000000,0x2ff00000,0x28000000,RW_NCNB); //bank5
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//30f00000->30100000, 31000000->30200000
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mmu_setmtt(0x30000000,0x30100000,0x30000000,RW_CB); //bank6-1
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- mmu_setmtt(0x30200000,0x33e00000,0x30200000,RW_NCNB); //bank6-2
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+ mmu_setmtt(0x30200000,0x33e00000,0x30200000,RW_CB); //bank6-2
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- mmu_setmtt(0x33f00000,0x33f00000,0x33f00000,RW_CB); //bank6-3
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+ mmu_setmtt(0x33f00000,0x34000000,0x33f00000,RW_NCNB); //bank6-3
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mmu_setmtt(0x38000000,0x3ff00000,0x38000000,RW_NCNB); //bank7
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mmu_setmtt(0x40000000,0x47f00000,0x40000000,RW_NCNB); //SFR
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@@ -392,3 +391,4 @@ void rt_hw_mmu_init(void)
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/* DCache should be turned on after mmu is turned on. */
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mmu_enable_dcache();
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}
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+
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