[bsp] format drivers code

bsp/acm32/acm32f0x0-nucleo/drivers/drv_pm.c

@@ -135,7 +135,7 @@ static rt_tick_t _pm_timer_get_tick(struct rt_pm *pm)
 {
     rt_tick_t tick;
     RT_ASSERT(pm != RT_NULL);
-    
+
     tick = 1;
 
     return get_os_tick_from_pm_tick(tick);

bsp/allwinner/libraries/drivers/touch/drv_touch.c

@@ -1,5 +1,5 @@
 /*
- * COPYRIGHT (C) 2012-2022, Shanghai Real-Thread Technology Co., Ltd
+ * COPYRIGHT (C) 2012-2024, Shanghai Real-Thread Technology Co., Ltd
  * All rights reserved.
  * Change Logs:
  * Date           Author       Notes

bsp/allwinner/libraries/drivers/touch/drv_touch.h

@@ -1,5 +1,5 @@
 /*
- * COPYRIGHT (C) 2012-2022, Shanghai Real-Thread Technology Co., Ltd
+ * COPYRIGHT (C) 2012-2024, Shanghai Real-Thread Technology Co., Ltd
  * All rights reserved.
  * Change Logs:
  * Date           Author       Notes

bsp/avr32/drivers/drv_soft_i2c.c

@@ -34,7 +34,7 @@ static void avr32_i2c_gpio_init(struct avr32_i2c *i2c)
 
     rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD);
     gpio_set_gpio_open_drain_pin(cfg->scl);
-    
+
     rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD);
     gpio_set_gpio_open_drain_pin(cfg->sda);
 }
@@ -50,11 +50,11 @@ static void avr32_set_sda(void *data, rt_int32_t state)
     struct avr32_soft_i2c_config* cfg = (struct avr32_soft_i2c_config*)data;
     if (state)
     {
-	gpio_set_gpio_open_drain_pin(cfg->sda);
+    gpio_set_gpio_open_drain_pin(cfg->sda);
     }
     else
     {
-	gpio_clr_gpio_open_drain_pin(cfg->sda);
+    gpio_clr_gpio_open_drain_pin(cfg->sda);
     }
 }
 
@@ -69,11 +69,11 @@ static void avr32_set_scl(void *data, rt_int32_t state)
     struct avr32_soft_i2c_config* cfg = (struct avr32_soft_i2c_config*)data;
     if (state)
     {
-	gpio_set_gpio_open_drain_pin(cfg->scl);
+    gpio_set_gpio_open_drain_pin(cfg->scl);
     }
     else
     {
-	gpio_clr_gpio_open_drain_pin(cfg->scl);
+    gpio_clr_gpio_open_drain_pin(cfg->scl);
     }
 }
 
@@ -126,10 +126,10 @@ static rt_err_t avr32_i2c_bus_unlock(const struct avr32_soft_i2c_config *cfg)
     {
         while (i++ < 9)
         {
-	    gpio_set_gpio_open_drain_pin(cfg->scl);
-	    rt_hw_us_delay(100);
-	    gpio_clr_gpio_open_drain_pin(cfg->scl);
-	    rt_hw_us_delay(100);
+        gpio_set_gpio_open_drain_pin(cfg->scl);
+        rt_hw_us_delay(100);
+        gpio_clr_gpio_open_drain_pin(cfg->scl);
+        rt_hw_us_delay(100);
         }
     }
     if (PIN_LOW == gpio_get_gpio_open_drain_pin_output_value(cfg->sda))

bsp/bouffalo_lab/libraries/rt_drivers/drv_adc.c

@@ -49,7 +49,7 @@ static struct bl_adc bl_adc_obj;
 struct _adc_channel_cfg
 {
     struct bflb_adc_channel_s chan;
-    uint16_t chan_gpio;   
+    uint16_t chan_gpio;
 };
 
 static struct _adc_channel_cfg chan[] = {
@@ -197,7 +197,7 @@ int rt_hw_adc_init(void)
         LOG_E("adc dma device not found");
         return -RT_ERROR;
     }
-    
+
     bl_adc_obj.sem = rt_sem_create("adc_sem", 0, RT_IPC_FLAG_PRIO);
     if(bl_adc_obj.sem == RT_NULL)
     {

bsp/ck802/libraries/include/drv_eth.h

@@ -33,17 +33,17 @@ typedef struct csi_driver_version {
 } csi_drv_version_t;
 
 /* General return codes */
-#define CSI_ETH_OK                 0 ///< Operation succeeded 
+#define CSI_ETH_OK                 0 ///< Operation succeeded
 #define CSI_ETH_ERROR             CSI_DRV_ERRNO_ETH_BASE+1 ///< Unspecified error
 #define CSI_ETH_ERROR_BUSY        CSI_DRV_ERRNO_ETH_BASE+2 ///< Driver is busy
 #define CSI_ETH_ERROR_TIMEOUT     CSI_DRV_ERRNO_ETH_BASE+3 ///< Timeout occurred
 #define CSI_ETH_ERROR_UNSUPPORTED CSI_DRV_ERRNO_ETH_BASE+4 ///< Operation not supported
 #define CSI_ETH_ERROR_PARAMETER   CSI_DRV_ERRNO_ETH_BASE+5 ///< Parameter error
-#define CSI_ETH_ERROR_SPECIFIC    CSI_DRV_ERRNO_ETH_BASE+6 ///< Start of driver specific errors 
+#define CSI_ETH_ERROR_SPECIFIC    CSI_DRV_ERRNO_ETH_BASE+6 ///< Start of driver specific errors
 
 /**
 \brief General power states
-*/ 
+*/
 typedef enum eth_power_state {
   CSI_ETH_POWER_OFF,                        ///< Power off: no operation possible
   CSI_ETH_POWER_LOW,                        ///< Low Power mode: retain state, detect and signal wake-up events

bsp/ck802/libraries/include/drv_eth_phy.h

@@ -65,8 +65,8 @@ csi_drv_version_t csi_eth_phy_get_version(eth_phy_handle_t handle);
 
 /**
   \brief       Initialize Ethernet PHY Device.
-  \param[in]   fn_read   
-  \param[in]   fn_write  
+  \param[in]   fn_read
+  \param[in]   fn_write
   \return      ethernet phy handle
 */
 eth_phy_handle_t csi_eth_phy_initialize(csi_eth_phy_read_t fn_read, csi_eth_phy_write_t fn_write);

bsp/ft2004/drivers/drv_sdctrl.c

@@ -598,7 +598,7 @@ int rthw_sdctrl_init(void)
 
 #endif
     normalIrqFlgs |= NORMAL_IRQ_CC;
-    /* register handler、irq enable bit and wait callback */
+    /* register handler irq enable bit and wait callback */
     FSdCtrl_SetHandler(ft_sdctrl_p, FTSDCTRL_CMDIRQID, rthw_sdctrl_nomarl_callback, ft_sdctrl_p);
     FSdCtrl_NormalIrqSet(ft_sdctrl_p, normalIrqFlgs);
     FSdCtrl_CmdWaitRegister(ft_sdctrl_p, rthw_sdctrl_cmd_wait);

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Include/drv_usb_core.h

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 
@@ -170,7 +170,7 @@ typedef struct _usb_class_core
     uint8_t  (*set_intf)              (usb_dev *udev, usb_req *req);            /*!< device set interface callback */
 
     uint8_t  (*ctlx_in)               (usb_dev *udev);                          /*!< device contrl in callback */
-    uint8_t  (*ctlx_out)              (usb_dev *udev); 
+    uint8_t  (*ctlx_out)              (usb_dev *udev);
 
     uint8_t  (*data_in)               (usb_dev *udev, uint8_t ep_num);          /*!< device data in handler */
     uint8_t  (*data_out)              (usb_dev *udev, uint8_t ep_num);          /*!< device data out handler */
@@ -295,9 +295,9 @@ typedef struct _usb_core_driver
 __STATIC_INLINE uint32_t usb_coreintr_get(usb_core_regs *usb_regs)
 {
     uint32_t reg_data = usb_regs->gr->GINTEN;
-    
+
     reg_data &= usb_regs->gr->GINTF;
-    
+
     return reg_data;
 }
 

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Include/drv_usb_dev.h

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 
@@ -132,7 +132,7 @@ __STATIC_INLINE uint32_t usb_iepintnum_read (usb_core_driver *udev)
     uint32_t value = udev->regs.dr->DAEPINT;
 
     value &= udev->regs.dr->DAEPINTEN;
-    
+
     return value & DAEPINT_IEPITB;
 }
 

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Include/drv_usb_host.h

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Include/drv_usb_hw.h

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Include/drv_usb_regs.h

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Include/drv_usbd_int.h

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Include/drv_usbh_int.h

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Source/drv_usb_core.c

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 
@@ -41,15 +41,15 @@ OF SUCH DAMAGE.
 static void usb_core_reset (usb_core_regs *usb_regs);
 
 /*!
-    \brief      configure USB core basic 
+    \brief      configure USB core basic
     \param[in]  usb_basic: pointer to USB capabilities
     \param[in]  usb_regs: USB core registers
     \param[in]  usb_core: USB core
     \param[out] none
     \retval     operation status
 */
-usb_status usb_basic_init (usb_core_basic *usb_basic, 
-                           usb_core_regs  *usb_regs, 
+usb_status usb_basic_init (usb_core_basic *usb_basic,
+                           usb_core_regs  *usb_regs,
                            usb_core_enum   usb_core)
 {
     /* configure USB default transfer mode as FIFO mode */
@@ -142,7 +142,7 @@ usb_status usb_basic_init (usb_core_basic *usb_basic,
 }
 
 /*!
-    \brief      initializes the USB controller registers and 
+    \brief      initializes the USB controller registers and
                 prepares the core device mode or host mode operation
     \param[in]  usb_basic: pointer to USB capabilities
     \param[in]  usb_regs: pointer to USB core registers
@@ -222,9 +222,9 @@ usb_status usb_core_init (usb_core_basic usb_basic, usb_core_regs *usb_regs)
     \param[out] none
     \retval     operation status
 */
-usb_status usb_txfifo_write (usb_core_regs *usb_regs, 
-                             uint8_t *src_buf, 
-                             uint8_t  fifo_num, 
+usb_status usb_txfifo_write (usb_core_regs *usb_regs,
+                             uint8_t *src_buf,
+                             uint8_t  fifo_num,
                              uint16_t byte_count)
 {
     uint32_t word_count = (byte_count + 3U) / 4U;

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Source/drv_usb_dev.c

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 
@@ -49,7 +49,7 @@ static const uint8_t EP0_MAXLEN[4] = {
 #ifdef USB_FS_CORE
 
 /* USB endpoint Tx FIFO size */
-static uint16_t USBFS_TX_FIFO_SIZE[USBFS_MAX_EP_COUNT] = 
+static uint16_t USBFS_TX_FIFO_SIZE[USBFS_MAX_EP_COUNT] =
 {
     (uint16_t)TX0_FIFO_FS_SIZE,
     (uint16_t)TX1_FIFO_FS_SIZE,
@@ -61,7 +61,7 @@ static uint16_t USBFS_TX_FIFO_SIZE[USBFS_MAX_EP_COUNT] =
 
 #ifdef USB_HS_CORE
 
-uint16_t USBHS_TX_FIFO_SIZE[USBHS_MAX_EP_COUNT] = 
+uint16_t USBHS_TX_FIFO_SIZE[USBHS_MAX_EP_COUNT] =
 {
     (uint16_t)TX0_FIFO_HS_SIZE,
     (uint16_t)TX1_FIFO_HS_SIZE,
@@ -215,7 +215,7 @@ usb_status usb_devint_enable (usb_core_driver *udev)
 usb_status usb_transc0_active (usb_core_driver *udev, usb_transc *transc)
 {
     __IO uint32_t *reg_addr = NULL;
-    
+
     uint8_t enum_speed = udev->regs.dr->DSTAT & DSTAT_ES;
 
     /* get the endpoint number */

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Source/drv_usb_host.c

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 
@@ -61,7 +61,7 @@ usb_status usb_host_init (usb_core_driver *udev)
 
     /* initialize host configuration register */
     if (USB_ULPI_PHY == udev->bp.phy_itf) {
-        usb_phyclock_config (udev, HCTL_30_60MHZ); 
+        usb_phyclock_config (udev, HCTL_30_60MHZ);
     } else {
         usb_phyclock_config (udev, HCTL_48MHZ);
     }

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Source/drv_usbd_int.c

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 

bsp/gd32/arm/libraries/GD32F4xx_Firmware_Library/GD32F4xx_usb_library/driver/Source/drv_usbh_int.c

@@ -10,27 +10,27 @@
 /*
     Copyright (c) 2022, GigaDevice Semiconductor Inc.
 
-    Redistribution and use in source and binary forms, with or without modification, 
+    Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 
-    1. Redistributions of source code must retain the above copyright notice, this 
+    1. Redistributions of source code must retain the above copyright notice, this
        list of conditions and the following disclaimer.
-    2. Redistributions in binary form must reproduce the above copyright notice, 
-       this list of conditions and the following disclaimer in the documentation 
+    2. Redistributions in binary form must reproduce the above copyright notice,
+       this list of conditions and the following disclaimer in the documentation
        and/or other materials provided with the distribution.
-    3. Neither the name of the copyright holder nor the names of its contributors 
-       may be used to endorse or promote products derived from this software without 
+    3. Neither the name of the copyright holder nor the names of its contributors
+       may be used to endorse or promote products derived from this software without
        specific prior written permission.
 
-    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
-IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
-INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
-NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
-PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
 OF SUCH DAMAGE.
 */
 
@@ -40,7 +40,7 @@ OF SUCH DAMAGE.
     #pragma O0
 #elif defined (__GNUC__)        /*!< GNU compiler */
     #pragma GCC optimize ("O0")
-#elif defined  (__TASKING__)    /*!< TASKING compiler */ 
+#elif defined  (__TASKING__)    /*!< TASKING compiler */
     #pragma optimize=0
 #endif /* __CC_ARM */
 
@@ -137,8 +137,8 @@ uint32_t usbh_isr (usb_core_driver *udev)
     \param[out] none
     \retval     none
 */
-static inline void usb_pp_halt (usb_core_driver *udev, 
-                                uint8_t pp_num, 
+static inline void usb_pp_halt (usb_core_driver *udev,
+                                uint8_t pp_num,
                                 uint32_t pp_int,
                                 usb_pipe_staus pp_status)
 {
@@ -460,7 +460,7 @@ static uint32_t usbh_int_pipe_out (usb_core_driver *udev, uint32_t pp_num)
             pp->urb_state = URB_DONE;
 
             if ((uint8_t)USB_EPTYPE_BULK == ((pp_reg->HCHCTL & HCHCTL_EPTYPE) >> 18U)) {
-                pp->data_toggle_out ^= 1U; 
+                pp->data_toggle_out ^= 1U;
             }
             break;
 
@@ -530,7 +530,7 @@ static uint32_t usbh_int_rxfifonoempty (usb_core_driver *udev)
             /* manage multiple transfer packet */
             udev->host.pipe[pp_num].xfer_buf += count;
             udev->host.pipe[pp_num].xfer_count += count;
-            
+
             xfer_count = udev->host.pipe[pp_num].xfer_count;
 
             udev->host.backup_xfercount[pp_num] = xfer_count;

bsp/gd32/arm/libraries/gd32_drivers/drv_pwm.c

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  *
  * Change Logs:
- * Date           Author         	Notes
- * 2023-06-05     zengjianwei         	first version
+ * Date           Author            Notes
+ * 2023-06-05     zengjianwei           first version
  */
 
 #include <board.h>

bsp/gd32/arm/libraries/gd32_drivers/drv_sdio.c

@@ -19,7 +19,7 @@
 #define LOG_TAG  "drv.sdio"
 #include "drv_log.h"
 
-#define SDIO_DMA_USE_IPC     0//1:ʹÓÃipc×öͬ²½
+#define SDIO_DMA_USE_IPC     0//1:使用ipc��步
 
 /* card status of R1 definitions */
 #define SD_R1_OUT_OF_RANGE                  BIT(31)                   /* command's argument was out of the allowed range */

bsp/gd32/arm/libraries/gd32_drivers/drv_spi_flash.c

@@ -34,7 +34,7 @@ static int rt_hw_spi_flash_init(void)
     static struct gd32_spi_cs  spi_cs;
     spi_cs.GPIOx = GD25Q_SPI_CS_GPIOX;
     spi_cs.GPIO_Pin = GD25Q_SPI_CS_GPIOX_PIN_X;
-    
+
     rcu_periph_clock_enable(GD25Q_SPI_CS_GPIOX_CLK);
 #if defined SOC_SERIES_GD32F4xx
     gpio_mode_set(spi_cs.GPIOx, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, spi_cs.GPIO_Pin);

bsp/hc32l136/drivers/drv_usart.c

@@ -270,7 +270,7 @@ static rt_err_t hc32_configure(struct rt_serial_device *serial,
     stcBaud.u32Baud = cfg->baud_rate;
     u16Scnt = Uart_CalScnt(uart->config->idx, &stcBaud);
     Uart_SetBaud(uart->config->idx, u16Scnt);
-    
+
     Uart_ClrStatus(uart->config->idx, UartTC);
     Uart_ClrStatus(uart->config->idx, UartRC);
     Uart_DisableIrq(uart->config->idx, UartTxIrq);
@@ -315,7 +315,7 @@ static int hc32_putc(struct rt_serial_device *serial, char c)
     RT_ASSERT(RT_NULL != serial);
 
     uart = rt_container_of(serial, struct hc32_uart, serial);
-    
+
     if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX)
     {
         if (Uart_GetStatus(uart->config->idx, UartTC) == FALSE)

bsp/hc32l136/drivers/drv_usart.h

@@ -7,7 +7,7 @@
  * Date           Author       Notes
  * 2021-08-19     pjq          first version
  */
- 
+
 
 #ifndef __DRV_USART_H__
 #define __DRV_USART_H__

bsp/hpmicro/libraries/drivers/drv_uart.h

@@ -11,4 +11,4 @@ int rt_hw_uart_init(void);
 
 
 
-#endif /* DRV_UART_H */
+#endif /* DRV_UART_H */

bsp/hpmicro/libraries/drivers/drv_wdt.c

@@ -246,4 +246,4 @@ int rt_hw_wdt_init(void)
 }
 
 INIT_BOARD_EXPORT(rt_hw_wdt_init);
-#endif /* RT_USING_WDT */
+#endif /* RT_USING_WDT */

bsp/hpmicro/libraries/drivers/drv_wdt.h

@@ -11,4 +11,4 @@
 
 int rt_hw_wdt_init(void);
 
-#endif
+#endif

bsp/mipssim/drivers/drv_uart.h

@@ -15,100 +15,100 @@
 #include <rthw.h>
 
 /* UART registers */
-#define UART_DAT(base)		HWREG8(base + 0x00)
-#define UART_IER(base)		HWREG8(base + 0x01)
-#define UART_IIR(base)		HWREG8(base + 0x02)
-#define UART_FCR(base)		HWREG8(base + 0x02)
-#define UART_LCR(base)		HWREG8(base + 0x03)
-#define UART_MCR(base)		HWREG8(base + 0x04)
-#define UART_LSR(base)		HWREG8(base + 0x05)
-#define UART_MSR(base)		HWREG8(base + 0x06)
+#define UART_DAT(base)      HWREG8(base + 0x00)
+#define UART_IER(base)      HWREG8(base + 0x01)
+#define UART_IIR(base)      HWREG8(base + 0x02)
+#define UART_FCR(base)      HWREG8(base + 0x02)
+#define UART_LCR(base)      HWREG8(base + 0x03)
+#define UART_MCR(base)      HWREG8(base + 0x04)
+#define UART_LSR(base)      HWREG8(base + 0x05)
+#define UART_MSR(base)      HWREG8(base + 0x06)
 
-#define UART_LSB(base)		HWREG8(base + 0x00)
-#define UART_MSB(base)		HWREG8(base + 0x01)
+#define UART_LSB(base)      HWREG8(base + 0x00)
+#define UART_MSB(base)      HWREG8(base + 0x01)
 
 /* interrupt enable register */
-#define	IER_IRxE	0x1	/* 接收有效数据中断使能 */
-#define	IER_ITxE	0x2	/* 传输保存寄存器为空中断使能 */
-#define	IER_ILE	    0x4	/* 接收器线路状态中断使能 */
-#define	IER_IME	    0x8	/* Modem状态中断使能 */
+#define IER_IRxE    0x1 /* 接收有效数据中断使能 */
+#define IER_ITxE    0x2 /* 传输保存寄存器为空中断使能 */
+#define IER_ILE     0x4 /* 接收器线路状态中断使能 */
+#define IER_IME     0x8 /* Modem状态中断使能 */
 
 /* interrupt identification register */
-#define	IIR_IMASK	0xf	/* mask */
-#define	IIR_RXTOUT	0xc	/* receive timeout */
-#define	IIR_RLS		0x6	/* receive line status */
-#define	IIR_RXRDY	0x4	/* receive ready */
-#define	IIR_TXRDY	0x2	/* transmit ready */
-#define	IIR_NOPEND	0x1	/* nothing */
-#define	IIR_MLSC	0x0	/* modem status */
-#define	IIR_FIFO_MASK	0xc0	/* set if FIFOs are enabled */
+#define IIR_IMASK   0xf /* mask */
+#define IIR_RXTOUT  0xc /* receive timeout */
+#define IIR_RLS     0x6 /* receive line status */
+#define IIR_RXRDY   0x4 /* receive ready */
+#define IIR_TXRDY   0x2 /* transmit ready */
+#define IIR_NOPEND  0x1 /* nothing */
+#define IIR_MLSC    0x0 /* modem status */
+#define IIR_FIFO_MASK   0xc0    /* set if FIFOs are enabled */
 
 /* fifo control register */
-#define	FIFO_ENABLE	    0x01	/* enable fifo */
-#define	FIFO_RCV_RST	0x02	/* reset receive fifo */
-#define	FIFO_XMT_RST	0x04	/* reset transmit fifo */
-#define	FIFO_DMA_MODE	0x08	/* enable dma mode */
-#define	FIFO_TRIGGER_1	0x00	/* trigger at 1 char */
-#define	FIFO_TRIGGER_4	0x40	/* trigger at 4 chars */
-#define	FIFO_TRIGGER_8	0x80	/* trigger at 8 chars */
-#define	FIFO_TRIGGER_14	0xc0	/* trigger at 14 chars */
+#define FIFO_ENABLE     0x01    /* enable fifo */
+#define FIFO_RCV_RST    0x02    /* reset receive fifo */
+#define FIFO_XMT_RST    0x04    /* reset transmit fifo */
+#define FIFO_DMA_MODE   0x08    /* enable dma mode */
+#define FIFO_TRIGGER_1  0x00    /* trigger at 1 char */
+#define FIFO_TRIGGER_4  0x40    /* trigger at 4 chars */
+#define FIFO_TRIGGER_8  0x80    /* trigger at 8 chars */
+#define FIFO_TRIGGER_14 0xc0    /* trigger at 14 chars */
 
 // 线路控制寄存器
 /* character format control register */
-#define	CFCR_DLAB	0x80	/* divisor latch */
-#define	CFCR_SBREAK	0x40	/* send break */
-#define	CFCR_PZERO	0x30	/* zero parity */
-#define	CFCR_PONE	0x20	/* one parity */
-#define	CFCR_PEVEN	0x10	/* even parity */
-#define	CFCR_PODD	0x00	/* odd parity */
-#define	CFCR_PENAB	0x08	/* parity enable */
-#define	CFCR_STOPB	0x04	/* 2 stop bits */
-#define	CFCR_8BITS	0x03	/* 8 data bits */
-#define	CFCR_7BITS	0x02	/* 7 data bits */
-#define	CFCR_6BITS	0x01	/* 6 data bits */
-#define	CFCR_5BITS	0x00	/* 5 data bits */
+#define CFCR_DLAB   0x80    /* divisor latch */
+#define CFCR_SBREAK 0x40    /* send break */
+#define CFCR_PZERO  0x30    /* zero parity */
+#define CFCR_PONE   0x20    /* one parity */
+#define CFCR_PEVEN  0x10    /* even parity */
+#define CFCR_PODD   0x00    /* odd parity */
+#define CFCR_PENAB  0x08    /* parity enable */
+#define CFCR_STOPB  0x04    /* 2 stop bits */
+#define CFCR_8BITS  0x03    /* 8 data bits */
+#define CFCR_7BITS  0x02    /* 7 data bits */
+#define CFCR_6BITS  0x01    /* 6 data bits */
+#define CFCR_5BITS  0x00    /* 5 data bits */
 
 /* modem control register */
-#define	MCR_LOOPBACK	0x10	/* loopback */
-#define	MCR_IENABLE	0x08	/* output 2 = int enable */
-#define	MCR_DRS		0x04	/* output 1 = xxx */
-#define	MCR_RTS		0x02	/* enable RTS */
-#define	MCR_DTR		0x01	/* enable DTR */
+#define MCR_LOOPBACK    0x10    /* loopback */
+#define MCR_IENABLE 0x08    /* output 2 = int enable */
+#define MCR_DRS     0x04    /* output 1 = xxx */
+#define MCR_RTS     0x02    /* enable RTS */
+#define MCR_DTR     0x01    /* enable DTR */
 
 /* line status register */
-#define	LSR_RCV_FIFO	0x80	/* error in receive fifo */
-#define	LSR_TSRE	0x40	/* transmitter empty */
-#define	LSR_TXRDY	0x20	/* transmitter ready */
-#define	LSR_BI		0x10	/* break detected */
-#define	LSR_FE		0x08	/* framing error */
-#define	LSR_PE		0x04	/* parity error */
-#define	LSR_OE		0x02	/* overrun error */
-#define	LSR_RXRDY	0x01	/* receiver ready */
-#define	LSR_RCV_MASK	0x1f
+#define LSR_RCV_FIFO    0x80    /* error in receive fifo */
+#define LSR_TSRE    0x40    /* transmitter empty */
+#define LSR_TXRDY   0x20    /* transmitter ready */
+#define LSR_BI      0x10    /* break detected */
+#define LSR_FE      0x08    /* framing error */
+#define LSR_PE      0x04    /* parity error */
+#define LSR_OE      0x02    /* overrun error */
+#define LSR_RXRDY   0x01    /* receiver ready */
+#define LSR_RCV_MASK    0x1f
 
 
 /* UART interrupt enable register value */
-#define UARTIER_IME		(1 << 3)
-#define UARTIER_ILE		(1 << 2)
-#define UARTIER_ITXE	(1 << 1)
-#define UARTIER_IRXE	(1 << 0)
+#define UARTIER_IME     (1 << 3)
+#define UARTIER_ILE     (1 << 2)
+#define UARTIER_ITXE    (1 << 1)
+#define UARTIER_IRXE    (1 << 0)
 
 /* UART line control register value */
-#define UARTLCR_DLAB	(1 << 7)
-#define UARTLCR_BCB		(1 << 6)
-#define UARTLCR_SPB		(1 << 5)
-#define UARTLCR_EPS		(1 << 4)
-#define UARTLCR_PE		(1 << 3)
-#define UARTLCR_SB		(1 << 2)
+#define UARTLCR_DLAB    (1 << 7)
+#define UARTLCR_BCB     (1 << 6)
+#define UARTLCR_SPB     (1 << 5)
+#define UARTLCR_EPS     (1 << 4)
+#define UARTLCR_PE      (1 << 3)
+#define UARTLCR_SB      (1 << 2)
 
 /* UART line status register value */
-#define UARTLSR_ERROR	(1 << 7)
-#define UARTLSR_TE		(1 << 6)
-#define UARTLSR_TFE		(1 << 5)
-#define UARTLSR_BI		(1 << 4)
-#define UARTLSR_FE		(1 << 3)
-#define UARTLSR_PE		(1 << 2)
-#define UARTLSR_OE		(1 << 1)
-#define UARTLSR_DR		(1 << 0)
+#define UARTLSR_ERROR   (1 << 7)
+#define UARTLSR_TE      (1 << 6)
+#define UARTLSR_TFE     (1 << 5)
+#define UARTLSR_BI      (1 << 4)
+#define UARTLSR_FE      (1 << 3)
+#define UARTLSR_PE      (1 << 2)
+#define UARTLSR_OE      (1 << 1)
+#define UARTLSR_DR      (1 << 0)
 
-#endif
+#endif

bsp/mm32l07x/drivers/drv_uart.c

@@ -35,8 +35,8 @@ struct mm32_uart
     IRQn_Type irq;
 };
 
-static rt_err_t mm32_uart_configure(struct rt_serial_device *serial, 
-	                                struct serial_configure *cfg)
+static rt_err_t mm32_uart_configure(struct rt_serial_device *serial,
+                                    struct serial_configure *cfg)
 {
     struct mm32_uart *uart;
     UART_InitTypeDef UART_InitStructure;
@@ -59,8 +59,8 @@ static rt_err_t mm32_uart_configure(struct rt_serial_device *serial,
     return RT_EOK;
 }
 
-static rt_err_t mm32_uart_control(struct rt_serial_device *serial, 
-	                              int cmd, void *arg)
+static rt_err_t mm32_uart_control(struct rt_serial_device *serial,
+                                  int cmd, void *arg)
 {
     struct mm32_uart *uart;
     RT_ASSERT(serial != RT_NULL);
@@ -70,12 +70,12 @@ static rt_err_t mm32_uart_control(struct rt_serial_device *serial,
     case RT_DEVICE_CTRL_CLR_INT:
         /* disable rx irq */
         NVIC_DisableIRQ(uart->irq);
-	    UART_ITConfig(uart->uart, UART_IT_RXIEN, DISABLE);
+        UART_ITConfig(uart->uart, UART_IT_RXIEN, DISABLE);
         break;
     case RT_DEVICE_CTRL_SET_INT:
         /* enable rx irq */
         NVIC_EnableIRQ(uart->irq);
-	    /* enable interrupt */
+        /* enable interrupt */
         UART_ITConfig(uart->uart, UART_IT_RXIEN, ENABLE);
         break;
     }
@@ -88,7 +88,7 @@ static int mm32_uart_putc(struct rt_serial_device *serial, char c)
     RT_ASSERT(serial != RT_NULL);
     uart = (struct mm32_uart *)serial->parent.user_data;
     while ((uart->uart->CSR & UART_CSR_TXC) == 0);
-    uart->uart->TDR = c;	
+    uart->uart->TDR = c;
     return 1;
 }
 
@@ -167,8 +167,8 @@ void UART2_IRQHandler(void)
 static void UART1PINconfigStepA(void)
 {
     /* Enable UART clock */
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_UART1, ENABLE);  
-    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); 
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_UART1, ENABLE);
+    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
     GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_1);
     GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_1);
 }
@@ -178,7 +178,7 @@ static void UART1PINconfigStepB(void)
     /* Configure USART Rx/tx PIN */
     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
     GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; 
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
     GPIO_Init(GPIOA, &GPIO_InitStructure);
     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
@@ -189,8 +189,8 @@ static void UART1PINconfigStepB(void)
 static void UART2PINconfigStepA(void)
 {
     /* Enable UART clock */
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART2, ENABLE);  
-    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); 
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART2, ENABLE);
+    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
     GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_1);
     GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_1);
 }
@@ -198,9 +198,9 @@ static void UART2PINconfigStepB(void)
 {
     GPIO_InitTypeDef GPIO_InitStructure;
     /* Configure USART Rx/tx PIN */
-    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; 
+    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
     GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; 
+    GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
     GPIO_Init(GPIOA, &GPIO_InitStructure);
     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
     GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
@@ -215,8 +215,8 @@ int rt_hw_uart_init(void)
 #ifdef BSP_USING_UART1
     UART1PINconfigStepA();
     uart = &uart1;
-	uart->uart = UART1;
-	uart->irq = UART1_IRQn;
+    uart->uart = UART1;
+    uart->irq = UART1_IRQn;
     config.baud_rate = BAUD_RATE_115200;
     serial1.ops    = &mm32_uart_ops;
     serial1.config = config;
@@ -229,8 +229,8 @@ int rt_hw_uart_init(void)
 #ifdef BSP_USING_UART2
     UART2PINconfigStepA();
     uart = &uart2;
-	uart->uart = UART2;
-	uart->irq = UART2_IRQn;
+    uart->uart = UART2;
+    uart->irq = UART2_IRQn;
     config.baud_rate = BAUD_RATE_115200;
     serial2.ops    = &mm32_uart_ops;
     serial2.config = config;

bsp/mm32l3xx/drivers/drv_uart.c

@@ -67,12 +67,12 @@ static rt_err_t mm32_uart_control(struct rt_serial_device *serial, int cmd, void
     case RT_DEVICE_CTRL_CLR_INT:
         /* disable rx irq */
         NVIC_DisableIRQ(uart->irq);
-	    UART_ITConfig(uart->uart, UART_IT_RXIEN, DISABLE);
+        UART_ITConfig(uart->uart, UART_IT_RXIEN, DISABLE);
         break;
     case RT_DEVICE_CTRL_SET_INT:
         /* enable rx irq */
         NVIC_EnableIRQ(uart->irq);
-	    /* enable interrupt */
+        /* enable interrupt */
         UART_ITConfig(uart->uart, UART_IT_RXIEN, ENABLE);
         break;
     }
@@ -165,15 +165,15 @@ void UART2_IRQHandler(void)
 static void UART1PINconfigStepA(void)
 {
     /* Enable UART clock */
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_UART1, ENABLE);  
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);  
-	RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_UART1, ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
     GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
 }
 
 static void UART1PINconfigStepB(void)
 {
-   
+
     GPIO_InitTypeDef GPIO_InitStructure;
     /* Configure USART Rx/tx PIN */
     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
@@ -191,9 +191,9 @@ static void UART1PINconfigStepB(void)
 static void UART2PINconfigStepA(void)
 {
     /* Enable UART clock */
-    RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART2, ENABLE);   
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); 
-	RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
+    RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART2, ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
     GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
 }
 
@@ -219,8 +219,8 @@ int rt_hw_uart_init(void)
 #ifdef BSP_USING_UART1
     UART1PINconfigStepA();
     uart = &uart1;
-	uart->uart = UART1;
-	uart->irq = UART1_IRQn;
+    uart->uart = UART1;
+    uart->irq = UART1_IRQn;
     config.baud_rate = BAUD_RATE_115200;
     serial1.ops    = &mm32_uart_ops;
     serial1.config = config;
@@ -234,8 +234,8 @@ int rt_hw_uart_init(void)
 #ifdef BSP_USING_UART2
     UART2PINconfigStepA();
     uart = &uart2;
-	uart->uart = UART2;
-	uart->irq = UART2_IRQn;
+    uart->uart = UART2;
+    uart->irq = UART2_IRQn;
     config.baud_rate = BAUD_RATE_115200;
     serial2.ops    = &mm32_uart_ops;
     serial2.config = config;

bsp/nuclei/libraries/demosoc/HAL_Drivers/drv_uart.c

@@ -14,7 +14,7 @@
 
 #if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1)
     #error "Please define at least one BSP_USING_UARTx"
-    /* this driver can be enabled at menuconfig -> 
+    /* this driver can be enabled at menuconfig ->
     Hardware Drivers Config -> On-chip Peripheral Drivers -> Enable UART */
 #endif
 

bsp/nuvoton/libraries/m2354/rtt_port/drv_log.h

@@ -24,4 +24,4 @@
 #define DBG_LVL               DBG_INFO
 #endif /* DRV_DEBUG */
 
-#include <rtdbg.h>
+#include <rtdbg.h>

bsp/nxp/imx/imx6ull-smart/drivers/drv_touch.c

@@ -293,9 +293,9 @@ static rt_size_t gt911_read_point(struct rt_touch_device *touch, void *buf, rt_s
             off_set = read_index * 8;
             read_id = read_buf[off_set] & 0x0f;
             pre_id[read_index] = read_id;
-            input_x = read_buf[off_set + 1] | (read_buf[off_set + 2] << 8);	/* x */
-            input_y = read_buf[off_set + 3] | (read_buf[off_set + 4] << 8);	/* y */
-            input_w = read_buf[off_set + 5] | (read_buf[off_set + 6] << 8);	/* size */
+            input_x = read_buf[off_set + 1] | (read_buf[off_set + 2] << 8); /* x */
+            input_y = read_buf[off_set + 3] | (read_buf[off_set + 4] << 8); /* y */
+            input_w = read_buf[off_set + 5] | (read_buf[off_set + 6] << 8); /* size */
 
             gt911_touch_down(buf, read_id, input_x, input_y, input_w);
         }

bsp/nxp/mcx/mcxn/Libraries/drivers/drv_hwtimer.c

@@ -180,4 +180,4 @@ void MRT0_IRQHandler(void)
 
 INIT_DEVICE_EXPORT(rt_hw_hwtimer_init);
 
-#endif /* BSP_USING_HWTIMER */
+#endif /* BSP_USING_HWTIMER */

bsp/nxp/mcx/mcxn/Libraries/drivers/drv_pwm.c

@@ -377,4 +377,4 @@ int mcx_pwm_init(void)
 
 INIT_DEVICE_EXPORT(mcx_pwm_init);
 
-#endif /* RT_USING_PWM */
+#endif /* RT_USING_PWM */

bsp/phytium/libraries/drivers/drv_can.c

@@ -465,4 +465,4 @@ int rt_hw_can_init(void)
 
     return 0;
 }
-INIT_BOARD_EXPORT(rt_hw_can_init);
+INIT_BOARD_EXPORT(rt_hw_can_init);

bsp/phytium/libraries/drivers/drv_dc.h

@@ -42,4 +42,4 @@ struct phytium_dc_bus
 }
 #endif
 
-#endif /* __DRV_DC_H__ */
+#endif /* __DRV_DC_H__ */

bsp/phytium/libraries/drivers/drv_gpio.c

@@ -336,4 +336,4 @@ int ft_pin_init(void)
     rt_kprintf("Register pin with return: %d\n", ret);
     return ret;
 }
-INIT_DEVICE_EXPORT(ft_pin_init);
+INIT_DEVICE_EXPORT(ft_pin_init);

bsp/phytium/libraries/drivers/drv_gpio.h

@@ -17,4 +17,4 @@
 /**************************** Type Definitions *******************************/
 
 /************************** Function Prototypes ******************************/
-#endif
+#endif

bsp/phytium/libraries/drivers/drv_i2c.c

@@ -403,4 +403,4 @@ int rt_hw_i2c_init(void)
 
     return 0;
 }
-INIT_DEVICE_EXPORT(rt_hw_i2c_init);
+INIT_DEVICE_EXPORT(rt_hw_i2c_init);

bsp/phytium/libraries/drivers/drv_pwm.c

@@ -289,4 +289,4 @@ int rt_hw_pwm_init(void)
 
     return 0;
 }
-INIT_DEVICE_EXPORT(rt_hw_pwm_init);
+INIT_DEVICE_EXPORT(rt_hw_pwm_init);

bsp/phytium/libraries/drivers/drv_qspi.c

@@ -502,4 +502,4 @@ int rt_hw_qspi_init(void)
 #endif
     return 0;
 }
-INIT_BOARD_EXPORT(rt_hw_qspi_init);
+INIT_BOARD_EXPORT(rt_hw_qspi_init);

bsp/phytium/libraries/drivers/drv_sdif.c

@@ -529,4 +529,4 @@ err_free:
     return -RT_EOK;
 }
 INIT_DEVICE_EXPORT(rt_hw_fsdif_init);
-#endif // #ifdef RT_USING_SDIO
+#endif // #ifdef RT_USING_SDIO

bsp/phytium/libraries/drivers/drv_sdif.h

@@ -25,4 +25,4 @@
 
 /*******************************Api Functions*********************************/
 
-#endif
+#endif

bsp/phytium/libraries/drivers/drv_spi.c

@@ -264,4 +264,4 @@ int rt_hw_spi_init(void)
 
     return 0;
 }
-INIT_DEVICE_EXPORT(rt_hw_spi_init);
+INIT_DEVICE_EXPORT(rt_hw_spi_init);

bsp/phytium/libraries/drivers/drv_usart.c

@@ -234,4 +234,4 @@ int rt_hw_uart_init(void)
 
     return 0;
 }
-INIT_BOARD_EXPORT(rt_hw_uart_init);
+INIT_BOARD_EXPORT(rt_hw_uart_init);

bsp/phytium/libraries/drivers/drv_usart.h

@@ -44,4 +44,4 @@ struct drv_usart
     struct rt_serial_device serial;
 };
 
-#endif // !
+#endif // !

bsp/phytium/libraries/port/cherryusb_port/drv_pusb2_dc.c

@@ -90,4 +90,4 @@ void usb_assert(const char *filename, int linenum)
     RT_ASSERT(0);
 }
 
-#endif
+#endif

bsp/phytium/libraries/port/cherryusb_port/drv_pusb2_hc.c

@@ -95,4 +95,4 @@ void usb_assert(const char *filename, int linenum)
     RT_ASSERT(0);
 }
 
-#endif
+#endif

bsp/phytium/libraries/port/cherryusb_port/drv_xhci.c

@@ -95,4 +95,4 @@ void usb_assert(const char *filename, int linenum)
     RT_ASSERT(0);
 }
 
-#endif
+#endif

bsp/raspberry-pi/raspi4-64/drivers/drv_uart.c

@@ -230,7 +230,7 @@ void early_printhex(rt_ubase_t number)
 #ifdef RT_USING_UART1
 static void rt_hw_aux_uart_isr(int irqno, void *param)
 {
-    struct rt_serial_device *serial = (struct rt_serial_device*)param; 
+    struct rt_serial_device *serial = (struct rt_serial_device*)param;
     rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
 }
 #endif
@@ -239,7 +239,7 @@ static void rt_hw_uart_isr(int irqno, void *param)
 {
 #ifdef RT_USING_UART0
     if((PACTL_CS & IRQ_UART0) == IRQ_UART0)
-    {   
+    {
         PACTL_CS &=  ~(IRQ_UART0);
         rt_hw_serial_isr(&_serial0, RT_SERIAL_EVENT_RX_IND);
         PL011_REG_ICR(uart0_addr) = PL011_INTERRUPT_RECEIVE;
@@ -333,13 +333,13 @@ int rt_hw_uart_init(void)
     earlycon_base = (void *)uart0_addr;
     uart0->hw_base = uart0_addr;
 
-    
+
     /* register UART0 device */
     rt_hw_serial_register(&_serial0, "uart0",
                           RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
                           uart0);
     rt_hw_interrupt_install(uart0->irqno, rt_hw_uart_isr, &_serial0, "uart0");
-    
+
 #endif
 
 #ifdef RT_USING_UART1
@@ -348,7 +348,7 @@ int rt_hw_uart_init(void)
 
     _serial1.ops    = &_uart_ops;
     _serial1.config = config;
-    
+
     uart1->hw_base = (size_t)rt_ioremap((void*)AUX_BASE, 0x1000);
 
     /* register UART1 device */

bsp/raspberry-pi/raspi4-64/drivers/drv_wdt.c

@@ -128,7 +128,7 @@ void reboot(void)
     PM_RSTS |= (PM_PASSWORD | r);   // boot from partition 0
     PM_WDOG |= (PM_PASSWORD | 0x0A);
     PM_RSTC |= (PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET);
-    
+
     while (1);
 }
 MSH_CMD_EXPORT(reboot,reboot system...);

bsp/renesas/libraries/HAL_Drivers/drv_soft_spi.h

@@ -54,4 +54,4 @@ struct ra_soft_spi
 rt_err_t rt_soft_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin);
 int rt_soft_spi_init(void);
 
-#endif /* __DRV_SOFT_SPI__ */
+#endif /* __DRV_SOFT_SPI__ */

bsp/rm48x50/drivers/drv_uart.c

@@ -194,7 +194,7 @@ void rt_hw_uart_init(void)
     config.parity    = PARITY_NONE;
     config.stop_bits = STOP_BITS_1;
     config.invert    = NRZ_NORMAL;
-	config.bufsz	 = RT_SERIAL_RB_BUFSZ;
+    config.bufsz     = RT_SERIAL_RB_BUFSZ;
 
     _sci2_serial.ops    = &_sci_ops;
     _sci2_serial.config = config;

bsp/rv32m1_vega/ri5cy/driver/drv_uart.c

@@ -6,7 +6,7 @@
  * Change Logs:
  * Date           Author            Notes
  * 2018/10/28     Bernard           Unify UART driver for FSL library.
- * 2019/09/07     niannianyouyu     Add the driver of UART1 
+ * 2019/09/07     niannianyouyu     Add the driver of UART1
  */
 
 #include <rthw.h>
@@ -126,7 +126,7 @@ static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_co
 
     switch (cfg->data_bits)
     {
-#if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT        
+#if defined(FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT) && FSL_FEATURE_LPUART_HAS_7BIT_DATA_SUPPORT
     case DATA_BITS_7:
         config.dataBitsCount = kLPUART_SevenDataBits;
         break;
@@ -168,7 +168,7 @@ static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_co
     uint32_t uartClkSrcFreq0 = CLOCK_GetIpFreq(kCLOCK_Lpuart0);
     LPUART_Init(uart->uart_base, &config, uartClkSrcFreq0);
     LPUART_EnableInterrupts(uart->uart_base, kLPUART_RxDataRegFullInterruptEnable);
-    
+
     CLOCK_SetIpSrc(kCLOCK_Lpuart1, kCLOCK_IpSrcFircAsync);
 
     uint32_t uartClkSrcFreq1 = CLOCK_GetIpFreq(kCLOCK_Lpuart1);

bsp/smartfusion2/drivers/drv_uart.c

@@ -51,19 +51,19 @@ void uart1_rx_handler(mss_uart_instance_t *this_uart)
     rt_interrupt_leave();
 }
 
-static rt_err_t sf2_uart_configure(struct rt_serial_device *serial, 
-	                               struct serial_configure *cfg)
+static rt_err_t sf2_uart_configure(struct rt_serial_device *serial,
+                                   struct serial_configure *cfg)
 {
     uint32_t baudRate;
     uint8_t datBits, parity, stopBits;
-    uint8_t config;    
+    uint8_t config;
     struct sf2_uart *uart;
-    
+
     RT_ASSERT(serial != RT_NULL);
     RT_ASSERT(cfg != RT_NULL);
-    
+
     uart = (struct sf2_uart *)serial->parent.user_data;
-    
+
     switch(cfg->data_bits)
     {
         case DATA_BITS_5: datBits = MSS_UART_DATA_5_BITS; break;
@@ -71,7 +71,7 @@ static rt_err_t sf2_uart_configure(struct rt_serial_device *serial,
         case DATA_BITS_7: datBits = MSS_UART_DATA_7_BITS; break;
         case DATA_BITS_8: datBits = MSS_UART_DATA_8_BITS; break;
         default:          datBits = MSS_UART_DATA_8_BITS; break;
-    }    
+    }
     switch(cfg->parity)
     {
         case PARITY_NONE: parity = MSS_UART_NO_PARITY;   break;
@@ -84,26 +84,26 @@ static rt_err_t sf2_uart_configure(struct rt_serial_device *serial,
         case STOP_BITS_1: stopBits = MSS_UART_ONE_STOP_BIT; break;
         case STOP_BITS_2: stopBits = MSS_UART_TWO_STOP_BITS; break;
         case STOP_BITS_3: stopBits = MSS_UART_ONEHALF_STOP_BIT; break;
-        default         : stopBits = MSS_UART_ONE_STOP_BIT;    
+        default         : stopBits = MSS_UART_ONE_STOP_BIT;
     }
-    
+
     baudRate = cfg->baud_rate;
     config = datBits | parity | stopBits;
-    
+
     MSS_UART_init(uart->uart, baudRate, config);
     if(uart->uart == &g_mss_uart0)
         MSS_UART_set_rx_handler(uart->uart, uart0_rx_handler, MSS_UART_FIFO_SINGLE_BYTE);
-    else 
+    else
         MSS_UART_set_rx_handler(uart->uart, uart1_rx_handler, MSS_UART_FIFO_SINGLE_BYTE);
 
-	return RT_EOK;
+    return RT_EOK;
 }
 
-static rt_err_t sf2_uart_control(struct rt_serial_device *serial, 
-	                              int cmd, void *arg)
+static rt_err_t sf2_uart_control(struct rt_serial_device *serial,
+                                  int cmd, void *arg)
 {
     struct sf2_uart* uart;
-    
+
     RT_ASSERT(serial != RT_NULL);
     uart = (struct sf2_uart*)serial->parent.user_data;
 
@@ -124,11 +124,11 @@ static int sf2_uart_putc(struct rt_serial_device *serial, char c)
 {
     struct sf2_uart* uart;
     uint32_t tx_ready;
-    
+
     RT_ASSERT(serial != RT_NULL);
 
     uart = (struct sf2_uart*)serial->parent.user_data;
-        
+
     do {
         tx_ready = uart->uart->hw_reg->LSR & 0x20u;
     } while(!tx_ready);
@@ -142,14 +142,14 @@ static int sf2_uart_getc(struct rt_serial_device *serial)
     int ch = -1;
     uint8_t err_status;
     struct sf2_uart* uart;
-    
+
     RT_ASSERT(serial != RT_NULL);
     uart = (struct sf2_uart*)serial->parent.user_data;
 
     err_status = MSS_UART_get_rx_status(uart->uart);
     if(MSS_UART_NO_ERROR == err_status)
         MSS_UART_get_rx(uart->uart, (uint8_t *)&ch, 1);
-        
+
     return ch;
 }
 
@@ -172,7 +172,7 @@ int rt_hw_uart_init(void)
     serial0.ops = &sf2_uart_ops;
     /* default config: 115200, 8, no, 1 */
     serial0.config = config;
-    result = rt_hw_serial_register(&serial0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); 
+    result = rt_hw_serial_register(&serial0, "uart0", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
     RT_ASSERT(result == RT_EOK);
 #endif
 
@@ -181,7 +181,7 @@ int rt_hw_uart_init(void)
     serial1.ops = &sf2_uart_ops;
     /* default config: 115200, 8, no, 1 */
     serial1.config = config;
-    result = rt_hw_serial_register(&serial1, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); 
+    result = rt_hw_serial_register(&serial1, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
     RT_ASSERT(result == RT_EOK);
 #endif
     return result;

bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/drv_openamp.c

@@ -27,7 +27,7 @@ static VIRT_UART_HandleTypeDef huart0;
 
 static rt_uint8_t rx_buffer[MAX_BUFFER_SIZE];
 static rt_uint8_t tx_buffer[MAX_BUFFER_SIZE];
-  
+
 struct rthw_openamp
 {
     struct rt_device  parent;
@@ -36,41 +36,41 @@ struct rthw_openamp
 };
 static struct rthw_openamp  dev_openamp;
 
-void IPCC_RX1_IRQHandler(void) 
+void IPCC_RX1_IRQHandler(void)
 {
     rt_interrupt_enter();
-    
+
     HAL_IPCC_RX_IRQHandler(&hipcc);
-    
+
     rt_interrupt_leave();
 }
 
 void IPCC_TX1_IRQHandler(void)
 {
     rt_interrupt_enter();
-        
+
     HAL_IPCC_TX_IRQHandler(&hipcc);
-    
+
     rt_interrupt_leave();
 }
 
-void VIRT_UART0_RxCpltCallback(VIRT_UART_HandleTypeDef *huart) 
-{  
+void VIRT_UART0_RxCpltCallback(VIRT_UART_HandleTypeDef *huart)
+{
     rt_uint16_t rx_size = 0, i = 0;
     rt_size_t count, size, offset;
     rt_uint8_t *buf = RT_NULL;
-    
+
     struct rthw_openamp  *device;
     device = (struct rthw_openamp *)rt_device_find("openamp");
     RT_ASSERT(device != RT_NULL);
-   
-    buf    = device->serial.rbuf; 
+
+    buf    = device->serial.rbuf;
     count  = device->serial.rbuf_count;
     size   = device->serial.rbuf_size;
     offset = device->serial.rbuf_start + count;
-   
+
     rt_sem_take(&device->sema, RT_WAITING_FOREVER);
-        
+
     rx_size = (huart->RxXferSize < MAX_BUFFER_SIZE) ? huart->RxXferSize : MAX_BUFFER_SIZE - 1;
 
     if (count < size)
@@ -79,7 +79,7 @@ void VIRT_UART0_RxCpltCallback(VIRT_UART_HandleTypeDef *huart)
         {
             offset -= size;
         }
-        
+
         for (i = 0; i < rx_size; i++)
         {
            buf[offset++] = huart->pRxBuffPtr[i];
@@ -88,16 +88,16 @@ void VIRT_UART0_RxCpltCallback(VIRT_UART_HandleTypeDef *huart)
     }
 
     device->serial.rbuf_count = count;
-    
+
     rt_sem_release(&device->sema);
 }
- 
+
 static rt_err_t _init(struct rt_device *dev)
 {
     struct rthw_openamp  *device;
     device = (struct rthw_openamp *)dev;
     RT_ASSERT(device != RT_NULL);
-    
+
     device->serial.rbuf_start  = 0;
     device->serial.rbuf_count  = 0;
     device->serial.tbuf_start  = 0;
@@ -106,79 +106,79 @@ static rt_err_t _init(struct rt_device *dev)
     device->serial.tbuf_size   = MAX_BUFFER_SIZE;
     device->serial.rbuf        = rx_buffer;
     device->serial.tbuf        = tx_buffer;
-  
+
     if (rt_sem_init(&device->sema, "openamplock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
     {
         return -RT_ERROR;
     }
-    
+
     return RT_EOK;
 }
 
 static rt_ssize_t _read(struct rt_device *dev, rt_off_t pos, void *buffer, rt_size_t size)
 {
     rt_size_t count, rbsize, offset;
-    rt_uint8_t *buf     = RT_NULL; 
+    rt_uint8_t *buf     = RT_NULL;
     rt_uint8_t *pBuffer = RT_NULL;
     rt_uint16_t i = 0;
-    
+
     struct rthw_openamp  *device;
     device = (struct rthw_openamp *)dev;
     RT_ASSERT(device != RT_NULL);
-    
+
     pBuffer = (unsigned char*)buffer;
     count   = device->serial.rbuf_count;
     buf     = device->serial.rbuf;
-    
+
     if (count == 0)
     {
         return -RT_ERROR;
     }
-    
+
     rt_sem_take(&device->sema, RT_WAITING_FOREVER);
-    
+
     if (count >= size)
     {
         count = size;
-    } 
+    }
 
     offset = device->serial.rbuf_start;
     rbsize = device->serial.rbuf_size;
- 
+
     for (i = 0; i < count; i++)
     {
         *pBuffer++ = buf[offset++];
         if (offset > rbsize)
         {
-           offset = 0;  
+           offset = 0;
         }
     }
 
     device->serial.rbuf_start  = offset;
     device->serial.rbuf_count -= count;
-    
+
     rt_sem_release(&device->sema);
-    
+
     return count;
 }
- 
+
 static rt_ssize_t _write(struct rt_device *dev, rt_off_t pos, const void *buffer, rt_size_t size)
 {
     rt_err_t result = VIRT_UART_OK;
-    
+
     struct rthw_openamp  *device;
     device = (struct rthw_openamp *)dev;
     RT_ASSERT(device != RT_NULL);
-    
+
     rt_sem_take(&device->sema, RT_WAITING_FOREVER);
-    result = VIRT_UART_Transmit(&huart0, (uint8_t *)buffer, size); 
+    result = VIRT_UART_Transmit(&huart0, (uint8_t *)buffer, size);
     rt_sem_release(&device->sema);
-        
+
     if (result != VIRT_UART_OK)
     {
         return -RT_ERROR;
     }
-    
+
     return size;
 }
 
@@ -206,7 +206,7 @@ static rt_err_t rt_hw_openamp_register(struct rthw_openamp  *openamp, const char
 }
 
 static int openamp_init(void)
-{  
+{
     extern int MX_OPENAMP_Init(int RPMsgRole, rpmsg_ns_bind_cb ns_bind_cb);
 
     /* IPCC init */
@@ -217,25 +217,25 @@ static int openamp_init(void)
     }
     /* openamp slave device */
     MX_OPENAMP_Init(RPMSG_REMOTE, NULL);
-    
-    if (VIRT_UART_Init(&huart0) != VIRT_UART_OK) 
+
+    if (VIRT_UART_Init(&huart0) != VIRT_UART_OK)
     {
         return -RT_ERROR;
     }
-    if (VIRT_UART_RegisterCallback(&huart0, VIRT_UART_RXCPLT_CB_ID, VIRT_UART0_RxCpltCallback) != VIRT_UART_OK) 
+    if (VIRT_UART_RegisterCallback(&huart0, VIRT_UART_RXCPLT_CB_ID, VIRT_UART0_RxCpltCallback) != VIRT_UART_OK)
     {
         return -RT_ERROR;
     }
-    
-    return RT_EOK;    
+
+    return RT_EOK;
 }
 
 int rt_hw_openamp_init(void)
 {
     openamp_init();
-    
+
     rt_hw_openamp_register(&dev_openamp, "openamp", 0, NULL);
-    
+
     if (rt_strcmp(RT_CONSOLE_DEVICE_NAME, "openamp") == 0)
     {
         rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
@@ -245,27 +245,27 @@ int rt_hw_openamp_init(void)
 }
 INIT_PREV_EXPORT(rt_hw_openamp_init);
 
-static void openamp_thread_entry(void *parameter) 
+static void openamp_thread_entry(void *parameter)
 {
     rt_size_t size = 0;
     struct rthw_openamp  *device = RT_NULL;
-    
+
     device = (struct rthw_openamp *)rt_device_find("openamp");
     RT_ASSERT(device != RT_NULL);
-    
-    for (;;) 
+
+    for (;;)
     {
         OPENAMP_check_for_message();
 
         size = device->serial.rbuf_count;
         if (size > 0)
         {
-            if (device->parent.rx_indicate != RT_NULL) 
+            if (device->parent.rx_indicate != RT_NULL)
             {
                 device->parent.rx_indicate(&device->parent, size);
             }
         }
-        
+
         rt_thread_mdelay(1);
     }
 }
@@ -273,22 +273,22 @@ static void openamp_thread_entry(void *parameter)
 static int creat_openamp_thread(void)
 {
     rt_thread_t tid = RT_NULL;
-    
-    tid = rt_thread_create("OpenAMP", 
-                        openamp_thread_entry, 
-                        RT_NULL, 
-                        OPENAMP_THREAD_STACK_SIZE, 
-                        OPENAMP_THREAD_PRIORITY, 
+
+    tid = rt_thread_create("OpenAMP",
+                        openamp_thread_entry,
+                        RT_NULL,
+                        OPENAMP_THREAD_STACK_SIZE,
+                        OPENAMP_THREAD_PRIORITY,
                         OPENAMP_THREAD_TIMESLICE);
-    
-    if (tid == RT_NULL) 
+
+    if (tid == RT_NULL)
     {
         LOG_E("openamp thread create failed!");
         return -RT_ERROR;
-    } 
-    
+    }
+
     rt_thread_startup(tid);
-    
+
     return RT_EOK;
 }
 INIT_APP_EXPORT(creat_openamp_thread);
@@ -298,7 +298,7 @@ INIT_APP_EXPORT(creat_openamp_thread);
 static int console(int argc, char **argv)
 {
     rt_err_t result = RT_EOK;
-    
+
     if (argc > 1)
     {
         if (!strcmp(argv[1], "set"))

bsp/stm32/stm32mp157a-st-discovery/board/ports/OpenAMP/drv_openamp.h

@@ -18,22 +18,22 @@ extern "C" {
 
 struct rt_openamp
 {
-    rt_uint8_t   *rbuf; 
-    rt_uint8_t   *tbuf;          
-    volatile rt_uint16_t  rbuf_size;      
+    rt_uint8_t   *rbuf;
+    rt_uint8_t   *tbuf;
+    volatile rt_uint16_t  rbuf_size;
     volatile rt_uint16_t  tbuf_size;
     volatile rt_uint16_t  rbuf_start;
     volatile rt_uint16_t  rbuf_count;
     volatile rt_uint16_t  tbuf_start;
     volatile rt_uint16_t  tbuf_count;
 };
-    
+
 #define OPENAMP_THREAD_STACK_SIZE   512
 #define OPENAMP_THREAD_PRIORITY     5
 #define OPENAMP_THREAD_TIMESLICE    10
 
 #define MAX_BUFFER_SIZE             256
-  
+
 #ifdef __cplusplus
 }
 #endif