|
@@ -68,7 +68,10 @@ static void RCC_Configuration(void)
|
|
OscInit.PLL.PLLDIV = RCC_PLLDIV_2;
|
|
OscInit.PLL.PLLDIV = RCC_PLLDIV_2;
|
|
OscInit.PLL.PLLMUL = RCC_PLLMUL_4;
|
|
OscInit.PLL.PLLMUL = RCC_PLLMUL_4;
|
|
OscInit.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
|
OscInit.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
|
- HAL_RCC_OscConfig(&OscInit);
|
|
|
|
|
|
+ if (HAL_RCC_OscConfig(&OscInit) != HAL_OK)
|
|
|
|
+ {
|
|
|
|
+ RT_ASSERT(RT_NULL);
|
|
|
|
+ }
|
|
|
|
|
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
|
clocks dividers */
|
|
clocks dividers */
|
|
@@ -83,7 +86,7 @@ static void RCC_Configuration(void)
|
|
ClkInit.APB2CLKDivider = RCC_HCLK_DIV1;
|
|
ClkInit.APB2CLKDivider = RCC_HCLK_DIV1;
|
|
if (HAL_RCC_ClockConfig(&ClkInit, FLASH_LATENCY_1) != HAL_OK)
|
|
if (HAL_RCC_ClockConfig(&ClkInit, FLASH_LATENCY_1) != HAL_OK)
|
|
{
|
|
{
|
|
- error_handler();
|
|
|
|
|
|
+ RT_ASSERT(RT_NULL);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|