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@@ -885,7 +885,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
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{
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{
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rt_uint32_t tmpreg = 0x00U;
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rt_uint32_t tmpreg = 0x00U;
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
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#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
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- || defined(SOC_SERIES_STM32L0)|| defined(SOC_SERIES_STM32F3)
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+ || defined(SOC_SERIES_STM32L0)|| defined(SOC_SERIES_STM32F3) || defined(SOC_SERIES_STM32L1)
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
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SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
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tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
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tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
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@@ -919,7 +919,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
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__HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
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__HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
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}
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}
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-#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)|| defined(SOC_SERIES_STM32F3)
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+#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)|| defined(SOC_SERIES_STM32F3) || defined(SOC_SERIES_STM32L1)
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DMA_Handle->Instance = dma_config->Instance;
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DMA_Handle->Instance = dma_config->Instance;
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#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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DMA_Handle->Instance = dma_config->Instance;
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DMA_Handle->Instance = dma_config->Instance;
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