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@@ -27,7 +27,8 @@ static int link_speed = 0;
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static int link_flag = 0;
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#define RECV_CACHE_BUF (2048)
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-#define DMA_DISC_ADDR_SIZE (4 * 1024 *1024)
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+#define SEND_CACHE_BUF (2048)
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+#define DMA_DISC_ADDR_SIZE (2 * 1024 *1024)
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#define RX_DESC_BASE (mac_reg_base_addr + GENET_RX_OFF)
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#define TX_DESC_BASE (mac_reg_base_addr + GENET_TX_OFF)
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@@ -44,11 +45,11 @@ static rt_thread_t link_thread_tid = RT_NULL;
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#define LINK_THREAD_PRIORITY (20)
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#define LINK_THREAD_TIMESLICE (10)
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+
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static rt_uint32_t tx_index = 0;
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static rt_uint32_t rx_index = 0;
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static rt_uint32_t index_flag = 0;
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-static rt_uint8_t send_cache_pbuf[RECV_CACHE_BUF];
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struct rt_eth_dev
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{
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@@ -62,7 +63,9 @@ struct rt_eth_dev
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void *priv;
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};
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static struct rt_eth_dev eth_dev;
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-static struct rt_semaphore sem_lock;
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+
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+static struct rt_semaphore send_finsh_sem_lock;
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+
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static struct rt_semaphore link_ack;
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static inline rt_uint32_t read32(void *addr)
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@@ -75,6 +78,9 @@ static inline void write32(void *addr, rt_uint32_t value)
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(*((volatile unsigned int*)(addr))) = value;
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}
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+
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+
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+
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static void eth_rx_irq(int irq, void *param)
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{
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rt_uint32_t val = 0;
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@@ -86,12 +92,12 @@ static void eth_rx_irq(int irq, void *param)
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if (val & GENET_IRQ_RXDMA_DONE)
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{
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- eth_device_ready(ð_dev.parent);
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+ eth_device_ready(ð_dev.parent);
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}
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if (val & GENET_IRQ_TXDMA_DONE)
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{
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- //todo
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+ rt_sem_release(&send_finsh_sem_lock);
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}
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}
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@@ -184,8 +190,9 @@ static int bcmgenet_mdio_write(rt_uint32_t addr, rt_uint32_t reg, rt_uint32_t va
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write32(mac_reg_base_addr + MDIO_CMD, reg_val);
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while ((read32(mac_reg_base_addr + MDIO_CMD) & MDIO_START_BUSY) && (--count))
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+ {
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DELAY_MICROS(1);
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-
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+ }
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reg_val = read32(mac_reg_base_addr + MDIO_CMD);
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return reg_val & 0xffff;
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@@ -205,8 +212,9 @@ static int bcmgenet_mdio_read(rt_uint32_t addr, rt_uint32_t reg)
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write32(mac_reg_base_addr + MDIO_CMD, reg_val);
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while ((read32(mac_reg_base_addr + MDIO_CMD) & MDIO_START_BUSY) && (--count))
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+ {
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DELAY_MICROS(1);
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-
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+ }
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reg_val = read32(mac_reg_base_addr + MDIO_CMD);
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return reg_val & 0xffff;
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@@ -395,7 +403,7 @@ static int bcmgenet_gmac_eth_start(void)
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index_flag = read32(mac_reg_base_addr + RDMA_PROD_INDEX);
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- rx_index = index_flag % 256;
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+ rx_index = index_flag % RX_DESCS;
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write32(mac_reg_base_addr + RDMA_CONS_INDEX, index_flag);
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write32(mac_reg_base_addr + RDMA_PROD_INDEX, index_flag);
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@@ -419,17 +427,15 @@ static rt_uint32_t bcmgenet_gmac_eth_recv(rt_uint8_t **packetp)
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void* desc_base;
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rt_uint32_t length = 0, addr = 0;
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rt_uint32_t prod_index = read32(mac_reg_base_addr + RDMA_PROD_INDEX);
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- //get next
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- if(prod_index == index_flag)
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+ if(prod_index == index_flag) //no buff
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{
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cur_recv_cnt = index_flag;
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index_flag = 0x7fffffff;
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- //no buff
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return 0;
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}
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else
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{
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- if(prev_recv_cnt == (prod_index & 0xffffUL))
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+ if(prev_recv_cnt == (prod_index & 0xffff)) //no new buff
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{
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return 0;
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}
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@@ -442,13 +448,17 @@ static rt_uint32_t bcmgenet_gmac_eth_recv(rt_uint8_t **packetp)
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* This would actually not be needed if we don't program
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* RBUF_ALIGN_2B
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*/
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- *packetp = (rt_uint8_t *)(addr + RX_BUF_OFFSET);
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+ //Convert to memory address
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+ addr = addr + eth_recv_no_cache - RECV_DATA_NO_CACHE;
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+ rt_hw_cpu_dcache_invalidate(addr,length);
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+ *packetp = (rt_uint8_t *)(addr + RX_BUF_OFFSET);
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rx_index = rx_index + 1;
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- if(rx_index >= 256)
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+ if(rx_index >= RX_DESCS)
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{
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rx_index = 0;
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}
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+
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write32(mac_reg_base_addr + RDMA_CONS_INDEX, cur_recv_cnt);
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cur_recv_cnt = cur_recv_cnt + 1;
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@@ -459,53 +469,43 @@ static rt_uint32_t bcmgenet_gmac_eth_recv(rt_uint8_t **packetp)
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}
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prev_recv_cnt = cur_recv_cnt;
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- return length;
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+ return length - RX_BUF_OFFSET;
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}
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}
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-static int bcmgenet_gmac_eth_send(void *packet, int length)
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+
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+static int bcmgenet_gmac_eth_send(rt_uint32_t packet, int length,struct pbuf *p)
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{
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rt_ubase_t level;
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void *desc_base = (TX_DESC_BASE + tx_index * DMA_DESC_SIZE);
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+ pbuf_copy_partial(p, (void*)(packet + tx_index * SEND_CACHE_BUF), p->tot_len, 0);
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rt_uint32_t len_stat = length << DMA_BUFLENGTH_SHIFT;
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+ len_stat |= 0x3F << DMA_TX_QTAG_SHIFT;
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+ len_stat |= DMA_TX_APPEND_CRC | DMA_SOP | DMA_EOP;
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+ rt_hw_cpu_dcache_clean((void*)(packet + tx_index * SEND_CACHE_BUF),length);
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- rt_uint32_t prod_index, cons;
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- rt_uint32_t tries = 100;
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+ rt_uint32_t prod_index;
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prod_index = read32(mac_reg_base_addr + TDMA_PROD_INDEX);
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- len_stat |= 0x3F << DMA_TX_QTAG_SHIFT;
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- len_stat |= DMA_TX_APPEND_CRC | DMA_SOP | DMA_EOP;
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-
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- write32((desc_base + DMA_DESC_ADDRESS_LO), SEND_DATA_NO_CACHE);
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+ write32((desc_base + DMA_DESC_ADDRESS_LO), SEND_DATA_NO_CACHE + tx_index * SEND_CACHE_BUF);
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write32((desc_base + DMA_DESC_ADDRESS_HI), 0);
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write32((desc_base + DMA_DESC_LENGTH_STATUS), len_stat);
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- tx_index = tx_index == 255? 0 : tx_index + 1;
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+ tx_index ++;
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+ if(tx_index >= TX_DESCS)
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+ {
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+ tx_index = 0;
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+ }
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prod_index = prod_index + 1;
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- if (prod_index == 0xe000)
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+ if (prod_index > 0xffff)
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{
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- write32(mac_reg_base_addr + TDMA_PROD_INDEX, 0);
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prod_index = 0;
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}
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/* Start Transmisson */
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write32(mac_reg_base_addr + TDMA_PROD_INDEX, prod_index);
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-
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- level = rt_hw_interrupt_disable();
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- do
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- {
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- cons = read32(mac_reg_base_addr + TDMA_CONS_INDEX);
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- } while ((cons & 0xffff) < prod_index && --tries);
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- rt_hw_interrupt_enable(level);
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-
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- if (!tries)
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- {
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- rt_kprintf("send err! tries is %d\n", tries);
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- return -1;
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- }
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-
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return 0;
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}
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@@ -552,6 +552,8 @@ static void link_task_entry(void *param)
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rt_kprintf("Support link mode Speed 10M\n");
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}
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+
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+ //Convert to memory address
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bcmgenet_gmac_eth_start();
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rt_hw_interrupt_install(ETH_IRQ, eth_rx_irq, NULL, "eth_irq");
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@@ -572,10 +574,13 @@ static rt_err_t bcmgenet_eth_init(rt_device_t device)
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if (major != 6)
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{
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if (major == 5)
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- major = 4;
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+ {
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+ major = 4;
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+ }
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else if (major == 0)
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+ {
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major = 1;
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-
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+ }
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rt_kprintf("Uns upported GENETv%d.%d\n", major, (hw_reg >> 16) & 0x0f);
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return RT_ERROR;
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}
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@@ -598,8 +603,9 @@ static rt_err_t bcmgenet_eth_init(rt_device_t device)
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LINK_THREAD_STACK_SIZE,
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LINK_THREAD_PRIORITY, LINK_THREAD_TIMESLICE);
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if (link_thread_tid != RT_NULL)
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+ {
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rt_thread_startup(link_thread_tid);
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-
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+ }
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return RT_EOK;
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}
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@@ -609,9 +615,13 @@ static rt_err_t bcmgenet_eth_control(rt_device_t dev, int cmd, void *args)
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{
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case NIOCTL_GADDR:
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if (args)
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- rt_memcpy(args, eth_dev.dev_addr, 6);
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+ {
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+ rt_memcpy(args, eth_dev.dev_addr, 6);
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+ }
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else
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+ {
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return -RT_ERROR;
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+ }
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break;
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default:
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break;
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@@ -621,37 +631,29 @@ static rt_err_t bcmgenet_eth_control(rt_device_t dev, int cmd, void *args)
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rt_err_t rt_eth_tx(rt_device_t device, struct pbuf *p)
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{
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- rt_uint32_t sendbuf = (rt_uint32_t)eth_send_no_cache;
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- /* lock eth device */
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if (link_flag == 1)
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{
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- rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
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- pbuf_copy_partial(p, (void *)&send_cache_pbuf[0], p->tot_len, 0);
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- rt_memcpy((void *)sendbuf, send_cache_pbuf, p->tot_len);
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-
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- bcmgenet_gmac_eth_send((void *)sendbuf, p->tot_len);
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- rt_sem_release(&sem_lock);
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+ bcmgenet_gmac_eth_send((rt_uint32_t)eth_send_no_cache, p->tot_len,p);
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+ rt_sem_take(&send_finsh_sem_lock,RT_WAITING_FOREVER);
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}
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+
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return RT_EOK;
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}
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struct pbuf *rt_eth_rx(rt_device_t device)
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{
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int recv_len = 0;
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- rt_uint32_t addr_point[8];
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+ rt_uint8_t* addr_point = RT_NULL;
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struct pbuf *pbuf = RT_NULL;
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if (link_flag == 1)
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{
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- rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
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- recv_len = bcmgenet_gmac_eth_recv((rt_uint8_t **)&addr_point[0]);
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+ recv_len = bcmgenet_gmac_eth_recv(&addr_point);
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if (recv_len > 0)
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{
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pbuf = pbuf_alloc(PBUF_LINK, recv_len, PBUF_RAM);
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- //calc offset
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- addr_point[0] = (rt_uint32_t)(addr_point[0] + (eth_recv_no_cache - RECV_DATA_NO_CACHE));
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- rt_memcpy(pbuf->payload, (char *)addr_point[0], recv_len);
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+ if(pbuf)
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+ rt_memcpy(pbuf->payload, addr_point, recv_len);
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}
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- rt_sem_release(&sem_lock);
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}
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return pbuf;
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}
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@@ -659,13 +661,11 @@ struct pbuf *rt_eth_rx(rt_device_t device)
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int rt_hw_eth_init(void)
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{
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rt_uint8_t mac_addr[6];
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-
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- rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
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+ rt_sem_init(&send_finsh_sem_lock,"send_finsh_sem_lock",TX_DESCS,RT_IPC_FLAG_FIFO);
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rt_sem_init(&link_ack, "link_ack", 0, RT_IPC_FLAG_FIFO);
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-
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memset(ð_dev, 0, sizeof(eth_dev));
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- memset((void *)eth_send_no_cache, 0, sizeof(DMA_DISC_ADDR_SIZE));
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- memset((void *)eth_recv_no_cache, 0, sizeof(DMA_DISC_ADDR_SIZE));
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+ memset((void *)eth_send_no_cache, 0, DMA_DISC_ADDR_SIZE);
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+ memset((void *)eth_recv_no_cache, 0, DMA_DISC_ADDR_SIZE);
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bcm271x_mbox_hardware_get_mac_address(&mac_addr[0]);
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eth_dev.iobase = mac_reg_base_addr;
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