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@@ -1,833 +0,0 @@
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-/**
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- * @file drv_spi.c
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- * @author 100ask development team
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- * @brief
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- * @version 0.1
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- * @date 2022-06-16
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- *
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- * @copyright Copyright (c) 2022 Chongqing 100ASK Technology Co., LTD
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- *
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- */
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-
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-#include <rtthread.h>
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-#include <rtdevice.h>
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-
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-#define RT_USING_SPI
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-#define BSP_USING_SPI1
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-#define BSP_SPI1_TX_USING_DMA
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-#define BSP_SPI1_RX_USING_DMA
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-
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-#ifdef RT_USING_SPI
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-
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-#if defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3)
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-
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-#include "drv_spi.h"
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-#include "drv_config.h"
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-#include <string.h>
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-
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-//#define DRV_DEBUG
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-#define LOG_TAG "drv.spi"
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-#include <drv_log.h>
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-
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-enum
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-{
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-#ifdef BSP_USING_SPI1
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- SPI1_INDEX,
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-#endif
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-#ifdef BSP_USING_SPI2
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- SPI2_INDEX,
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-#endif
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-#ifdef BSP_USING_SPI3
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- SPI3_INDEX,
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-#endif
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-};
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-
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-static struct mm32_spi_config spi_config[] =
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-{
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-#ifdef BSP_USING_SPI1
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- SPI1_BUS_CONFIG,
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-#endif
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-
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-#ifdef BSP_USING_SPI2
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- SPI2_BUS_CONFIG,
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-#endif
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-
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-#ifdef BSP_USING_SPI3
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- SPI3_BUS_CONFIG,
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-#endif
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-};
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-
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-static struct mm32_spi spi_bus_obj[sizeof(spi_config) / sizeof(spi_config[0])] = {0};
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-
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-static rt_err_t mm32_spi_init(struct mm32_spi *spi_drv, struct rt_spi_configuration *cfg)
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-{
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- RT_ASSERT(spi_drv != RT_NULL);
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- RT_ASSERT(cfg != RT_NULL);
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-
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- SPI_Master_Init_Type *spi_handle = &spi_drv->handle;
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-
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- spi_handle->ClockFreqHz = Drv_Get_APB1_Clock();
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-
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- if (cfg->data_width == 8)
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- {
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- spi_handle->DataWidth = SPI_DataWidth_8b;
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- }
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- else if (cfg->data_width == 16)
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- {
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- spi_handle->DataWidth = SPI_DataWidth_8b;
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- }
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- else
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- {
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- return RT_EIO;
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- }
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-
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- if (cfg->mode & RT_SPI_CPOL)
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- {
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- spi_handle->PolarityPhase = SPI_PolarityPhase_Alt0;
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- }
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- else
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- {
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- spi_handle->PolarityPhase = SPI_PolarityPhase_Alt1;
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- }
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-
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- if (cfg->mode & RT_SPI_NO_CS)
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- {
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- spi_handle->AutoCS = RT_FALSE;
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- }
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- else
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- {
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- spi_handle->AutoCS = RT_TRUE;
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- }
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-
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- uint32_t SPI_APB_CLOCK;
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- SPI_APB_CLOCK = Drv_Get_APB1_Clock();
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-
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- if (cfg->max_hz >= SPI_APB_CLOCK / 2)
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- {
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- spi_handle->BaudRate= (SPI_APB_CLOCK>>1);
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- }
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- else
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- {
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- spi_handle->BaudRate = cfg->max_hz;
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- }
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-
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- LOG_D("sys freq: %d, pclk2 freq: %d, SPI limiting freq: %d, BaudRatePrescaler: %d",
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- HAL_RCC_GetSysClockFreq(),
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- SPI_APB_CLOCK,
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- cfg->max_hz,
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- spi_handle->BaudRate);
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-
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- if (cfg->mode & RT_SPI_MSB)
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- {
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- spi_handle->LSB = RT_FALSE;
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- }
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- else
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- {
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- spi_handle->LSB = RT_TRUE;
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- }
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-
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- spi_handle->XferMode = SPI_XferMode_TxRx;
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- extern void SPI_MspInit(SPI_Type *mspi, , uint8_t autocs);
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- SPI_MspInit(spi_drv->config->Instance, cfg->mode & RT_SPI_NO_CS);
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- SPI_InitMaster(spi_drv->config->Instance, spi_handle);
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-
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- /* DMA configuration */
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- extern int DMA_MspInit(DMA_Channel_Init_Type handle, \
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- DMA_Type *dma, \
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- uint32_t req, \
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- IRQn_Type irqn, \
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- rt_uint32_t rcc, \
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- uint8_t *buf, \
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- uint16_t buf_len);
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- if (spi_drv->spi_dma_flag & SPI_USING_RX_DMA_FLAG)
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- {
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- int ret = DMA_MspInit(spi_drv->dma.handle_rx, \
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- spi_drv->config->dma_rx->Instance, \
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- spi_drv->config->dma_rx->dma_req, \
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- spi_drv->config->dma_rx->dma_irq, \
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- spi_drv->config->dma_rx->dma_rcc, \
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- spi_drv->dma.rx_buf_len, \
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- spi_drv->dma.rx_buf);
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- if(ret == -1)
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- {
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- LOG_D("%s init DMA failed.\r\n", spi_drv->config->bus_name);
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- return RT_ERROR;
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- }
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- SPI_EnableDMA(spi_drv->config->dma_rx->Instance, RT_TRUE);
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- }
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-
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- if (spi_drv->spi_dma_flag & SPI_USING_TX_DMA_FLAG)
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- {
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- int ret = DMA_MspInit(spi_drv->dma.handle_tx, \
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- spi_drv->config->dma_tx->Instance, \
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- spi_drv->config->dma_tx->dma_req, \
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- spi_drv->config->dma_tx->dma_irq, \
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- spi_drv->config->dma_tx->dma_rcc,
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- spi_drv->dma.tx_buf_len, \
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- spi_drv->dma.tx_buf);
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- if(ret == -1)
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- {
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- LOG_D("%s init DMA failed.\r\n", spi_drv->config->bus_name);
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- return RT_ERROR;
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- }
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-
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- SPI_EnableDMA(spi_drv->config->dma_tx->Instance, RT_TRUE);
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- }
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-
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- SPI_Enable(spi_drv->config->Instance, RT_TRUE);
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-
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- LOG_D("%s init done", spi_drv->config->bus_name);
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- return RT_EOK;
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-}
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-
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-static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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-{
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- HAL_StatusTypeDef state;
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- rt_size_t message_length, already_send_length;
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- rt_uint16_t send_length;
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- rt_uint8_t *recv_buf;
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- const rt_uint8_t *send_buf;
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-
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- RT_ASSERT(device != RT_NULL);
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- RT_ASSERT(device->bus != RT_NULL);
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- RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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- RT_ASSERT(message != RT_NULL);
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-
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- struct mm32_spi *spi_drv = rt_container_of(device->bus, struct mm32_spi, spi_bus);
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- SPI_Master_Init_Type *spi_handle = &spi_drv->handle;
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- struct mm32_hw_spi_cs *cs = device->parent.user_data;
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-
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- if (message->cs_take)
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- {
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- GPIO_WriteBit(cs->GPIOx, cs->GPIO_Pin, 0);
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- }
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-
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- LOG_D("%s transfer prepare and start", spi_drv->config->bus_name);
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- LOG_D("%s sendbuf: %X, recvbuf: %X, length: %d",
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- spi_drv->config->bus_name,
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- (uint32_t)message->send_buf,
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- (uint32_t)message->recv_buf, message->length);
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-
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- message_length = message->length;
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- recv_buf = message->recv_buf;
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- send_buf = message->send_buf;
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- while (message_length)
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- {
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- /* the HAL library use uint16 to save the data length */
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- if (message_length > 65535)
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- {
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- send_length = 65535;
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- message_length = message_length - 65535;
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- }
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- else
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- {
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- send_length = message_length;
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- message_length = 0;
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- }
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-
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- /* calculate the start address */
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- already_send_length = message->length - send_length - message_length;
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- send_buf = (rt_uint8_t *)message->send_buf + already_send_length;
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- recv_buf = (rt_uint8_t *)message->recv_buf + already_send_length;
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-
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- /* start once data exchange in DMA mode */
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- if (message->send_buf && message->recv_buf)
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- {
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- if ((spi_drv->spi_dma_flag & SPI_USING_TX_DMA_FLAG) && (spi_drv->spi_dma_flag & SPI_USING_RX_DMA_FLAG))
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- {
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- state = HAL_SPI_TransmitReceive_DMA(spi_handle, (uint8_t *)send_buf, (uint8_t *)recv_buf, send_length);
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- }
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- else
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- {
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- state = HAL_SPI_TransmitReceive(spi_handle, (uint8_t *)send_buf, (uint8_t *)recv_buf, send_length, 1000);
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- }
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- }
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- else if (message->send_buf)
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- {
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- if (spi_drv->spi_dma_flag & SPI_USING_TX_DMA_FLAG)
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- {
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- state = HAL_SPI_Transmit_DMA(spi_handle, (uint8_t *)send_buf, send_length);
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- }
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- else
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- {
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- state = HAL_SPI_Transmit(spi_handle, (uint8_t *)send_buf, send_length, 1000);
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- }
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- }
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- else
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- {
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- memset((uint8_t *)recv_buf, 0xff, send_length);
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- if (spi_drv->spi_dma_flag & SPI_USING_RX_DMA_FLAG)
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- {
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- state = HAL_SPI_Receive_DMA(spi_handle, (uint8_t *)recv_buf, send_length);
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- }
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- else
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- {
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- state = HAL_SPI_Receive(spi_handle, (uint8_t *)recv_buf, send_length, 1000);
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- }
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- }
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-
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- if (state != HAL_OK)
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- {
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- LOG_I("spi transfer error : %d", state);
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- message->length = 0;
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- spi_handle->State = HAL_SPI_STATE_READY;
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- }
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- else
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- {
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- LOG_D("%s transfer done", spi_drv->config->bus_name);
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- }
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-
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- /* For simplicity reasons, this example is just waiting till the end of the
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- transfer, but application may perform other tasks while transfer operation
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- is ongoing. */
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- while (HAL_SPI_GetState(spi_handle) != HAL_SPI_STATE_READY);
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- }
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-
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- if (message->cs_release)
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- {
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- HAL_GPIO_WritePin(cs->GPIOx, cs->GPIO_Pin, GPIO_PIN_SET);
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- }
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-
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- return message->length;
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-}
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-
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-static rt_err_t spi_configure(struct rt_spi_device *device,
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- struct rt_spi_configuration *configuration)
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-{
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- RT_ASSERT(device != RT_NULL);
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- RT_ASSERT(configuration != RT_NULL);
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-
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- struct mm32_spi *spi_drv = rt_container_of(device->bus, struct mm32_spi, spi_bus);
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- spi_drv->cfg = configuration;
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-
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- return mm32_spi_init(spi_drv, configuration);
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-}
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-
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-static const struct rt_spi_ops stm_spi_ops =
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-{
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- .configure = spi_configure,
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- .xfer = spixfer,
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-};
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-
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-static int rt_hw_spi_bus_init(void)
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-{
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- rt_err_t result;
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- for (int i = 0; i < sizeof(spi_config) / sizeof(spi_config[0]); i++)
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- {
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- spi_bus_obj[i].config = &spi_config[i];
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- spi_bus_obj[i].spi_bus.parent.user_data = &spi_config[i];
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- spi_bus_obj[i].handle.Instance = spi_config[i].Instance;
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-
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- if (spi_bus_obj[i].spi_dma_flag & SPI_USING_RX_DMA_FLAG)
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- {
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- /* Configure the DMA handler for Transmission process */
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- spi_bus_obj[i].dma.handle_rx.Instance = spi_config[i].dma_rx->Instance;
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-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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- spi_bus_obj[i].dma.handle_rx.Init.Channel = spi_config[i].dma_rx->channel;
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-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
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- spi_bus_obj[i].dma.handle_rx.Init.Request = spi_config[i].dma_rx->request;
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-#endif
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- spi_bus_obj[i].dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
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- spi_bus_obj[i].dma.handle_rx.Init.PeriphInc = DMA_PINC_DISABLE;
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- spi_bus_obj[i].dma.handle_rx.Init.MemInc = DMA_MINC_ENABLE;
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- spi_bus_obj[i].dma.handle_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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- spi_bus_obj[i].dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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- spi_bus_obj[i].dma.handle_rx.Init.Mode = DMA_NORMAL;
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- spi_bus_obj[i].dma.handle_rx.Init.Priority = DMA_PRIORITY_HIGH;
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-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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- spi_bus_obj[i].dma.handle_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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- spi_bus_obj[i].dma.handle_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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- spi_bus_obj[i].dma.handle_rx.Init.MemBurst = DMA_MBURST_INC4;
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- spi_bus_obj[i].dma.handle_rx.Init.PeriphBurst = DMA_PBURST_INC4;
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-#endif
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-
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- {
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- rt_uint32_t tmpreg = 0x00U;
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-#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32F0)
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- /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
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- SET_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc);
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- tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc);
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-#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
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- SET_BIT(RCC->AHB1ENR, spi_config[i].dma_rx->dma_rcc);
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- /* Delay after an RCC peripheral clock enabling */
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- tmpreg = READ_BIT(RCC->AHB1ENR, spi_config[i].dma_rx->dma_rcc);
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-#endif
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- UNUSED(tmpreg); /* To avoid compiler warnings */
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- }
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- }
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-
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- if (spi_bus_obj[i].spi_dma_flag & SPI_USING_TX_DMA_FLAG)
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- {
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- /* Configure the DMA handler for Transmission process */
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- spi_bus_obj[i].dma.handle_tx.Instance = spi_config[i].dma_tx->Instance;
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-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
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- spi_bus_obj[i].dma.handle_tx.Init.Channel = spi_config[i].dma_tx->channel;
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-#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
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- spi_bus_obj[i].dma.handle_tx.Init.Request = spi_config[i].dma_tx->request;
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-#endif
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- spi_bus_obj[i].dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
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|
- spi_bus_obj[i].dma.handle_tx.Init.PeriphInc = DMA_PINC_DISABLE;
|
|
|
- spi_bus_obj[i].dma.handle_tx.Init.MemInc = DMA_MINC_ENABLE;
|
|
|
- spi_bus_obj[i].dma.handle_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
|
|
|
- spi_bus_obj[i].dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
|
|
|
- spi_bus_obj[i].dma.handle_tx.Init.Mode = DMA_NORMAL;
|
|
|
- spi_bus_obj[i].dma.handle_tx.Init.Priority = DMA_PRIORITY_LOW;
|
|
|
-#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
|
|
|
- spi_bus_obj[i].dma.handle_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
|
|
- spi_bus_obj[i].dma.handle_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
|
|
|
- spi_bus_obj[i].dma.handle_tx.Init.MemBurst = DMA_MBURST_INC4;
|
|
|
- spi_bus_obj[i].dma.handle_tx.Init.PeriphBurst = DMA_PBURST_INC4;
|
|
|
-#endif
|
|
|
-
|
|
|
- {
|
|
|
- rt_uint32_t tmpreg = 0x00U;
|
|
|
-#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32F0)
|
|
|
- /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
|
|
|
- SET_BIT(RCC->AHBENR, spi_config[i].dma_tx->dma_rcc);
|
|
|
- tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_tx->dma_rcc);
|
|
|
-#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
|
|
|
- SET_BIT(RCC->AHB1ENR, spi_config[i].dma_tx->dma_rcc);
|
|
|
- /* Delay after an RCC peripheral clock enabling */
|
|
|
- tmpreg = READ_BIT(RCC->AHB1ENR, spi_config[i].dma_tx->dma_rcc);
|
|
|
-#endif
|
|
|
- UNUSED(tmpreg); /* To avoid compiler warnings */
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- result = rt_spi_bus_register(&spi_bus_obj[i].spi_bus, spi_config[i].bus_name, &stm_spi_ops);
|
|
|
- RT_ASSERT(result == RT_EOK);
|
|
|
-
|
|
|
- LOG_D("%s bus init done", spi_config[i].bus_name);
|
|
|
- }
|
|
|
-
|
|
|
- return result;
|
|
|
-}
|
|
|
-
|
|
|
-/**
|
|
|
- * Attach the spi device to SPI bus, this function must be used after initialization.
|
|
|
- */
|
|
|
-rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, GPIO_TypeDef *cs_gpiox, uint16_t cs_gpio_pin)
|
|
|
-{
|
|
|
- RT_ASSERT(bus_name != RT_NULL);
|
|
|
- RT_ASSERT(device_name != RT_NULL);
|
|
|
-
|
|
|
- rt_err_t result;
|
|
|
- struct rt_spi_device *spi_device;
|
|
|
- struct mm32_hw_spi_cs *cs_pin;
|
|
|
-
|
|
|
- /* initialize the cs pin && select the slave*/
|
|
|
- GPIO_InitTypeDef GPIO_Initure;
|
|
|
- GPIO_Initure.Pin = cs_gpio_pin;
|
|
|
- GPIO_Initure.Mode = GPIO_MODE_OUTPUT_PP;
|
|
|
- GPIO_Initure.Pull = GPIO_PULLUP;
|
|
|
- GPIO_Initure.Speed = GPIO_SPEED_FREQ_HIGH;
|
|
|
- HAL_GPIO_Init(cs_gpiox, &GPIO_Initure);
|
|
|
- HAL_GPIO_WritePin(cs_gpiox, cs_gpio_pin, GPIO_PIN_SET);
|
|
|
-
|
|
|
- /* attach the device to spi bus*/
|
|
|
- spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
|
|
|
- RT_ASSERT(spi_device != RT_NULL);
|
|
|
- cs_pin = (struct mm32_hw_spi_cs *)rt_malloc(sizeof(struct mm32_hw_spi_cs));
|
|
|
- RT_ASSERT(cs_pin != RT_NULL);
|
|
|
- cs_pin->GPIOx = cs_gpiox;
|
|
|
- cs_pin->GPIO_Pin = cs_gpio_pin;
|
|
|
- result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
|
|
|
-
|
|
|
- if (result != RT_EOK)
|
|
|
- {
|
|
|
- LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
|
|
|
- }
|
|
|
-
|
|
|
- RT_ASSERT(result == RT_EOK);
|
|
|
-
|
|
|
- LOG_D("%s attach to %s done", device_name, bus_name);
|
|
|
-
|
|
|
- return result;
|
|
|
-}
|
|
|
-
|
|
|
-#if defined(BSP_SPI1_TX_USING_DMA) || defined(BSP_SPI1_RX_USING_DMA)
|
|
|
-void SPI1_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_SPI_IRQHandler(&spi_bus_obj[SPI1_INDEX].handle);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_RX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Rx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI1_DMA_RX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI1_INDEX].dma.handle_rx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_TX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Tx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI1_DMA_TX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI1_INDEX].dma.handle_tx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif /* defined(BSP_USING_SPI1) && defined(BSP_SPI_USING_DMA) */
|
|
|
-
|
|
|
-#if defined(BSP_SPI2_TX_USING_DMA) || defined(BSP_SPI2_RX_USING_DMA)
|
|
|
-void SPI2_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_SPI_IRQHandler(&spi_bus_obj[SPI2_INDEX].handle);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_RX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Rx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI2_DMA_RX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI2_INDEX].dma.handle_rx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_TX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Tx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI2_DMA_TX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI2_INDEX].dma.handle_tx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif /* defined(BSP_USING_SPI2) && defined(BSP_SPI_USING_DMA) */
|
|
|
-
|
|
|
-#if defined(BSP_SPI3_TX_USING_DMA) || defined(BSP_SPI3_RX_USING_DMA)
|
|
|
-void SPI3_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_SPI_IRQHandler(&spi_bus_obj[SPI3_INDEX].handle);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI3) && defined(BSP_SPI3_RX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Rx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI3_DMA_RX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI3_INDEX].dma.handle_rx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI3) && defined(BSP_SPI3_TX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Tx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI3_DMA_TX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI3_INDEX].dma.handle_tx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif /* defined(BSP_USING_SPI3) && defined(BSP_SPI_USING_DMA) */
|
|
|
-
|
|
|
-#if defined(BSP_SPI4_TX_USING_DMA) || defined(BSP_SPI4_RX_USING_DMA)
|
|
|
-void SPI4_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_SPI_IRQHandler(&spi_bus_obj[SPI4_INDEX].handle);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI4) && defined(BSP_SPI4_RX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Rx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI4_DMA_RX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI4_INDEX].dma.handle_rx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI4) && defined(BSP_SPI4_TX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Tx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI4_DMA_TX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI4_INDEX].dma.handle_tx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif /* defined(BSP_USING_SPI4) && defined(BSP_SPI_USING_DMA) */
|
|
|
-
|
|
|
-#if defined(BSP_SPI5_TX_USING_DMA) || defined(BSP_SPI5_RX_USING_DMA)
|
|
|
-void SPI5_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_SPI_IRQHandler(&spi_bus_obj[SPI5_INDEX].handle);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI5) && defined(BSP_SPI5_RX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Rx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI5_DMA_RX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI5_INDEX].dma.handle_rx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI5) && defined(BSP_SPI5_TX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Tx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI5_DMA_TX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI5_INDEX].dma.handle_tx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif /* defined(BSP_USING_SPI5) && defined(BSP_SPI_USING_DMA) */
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI6) && defined(BSP_SPI6_RX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Rx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI6_DMA_RX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI6_INDEX].dma.handle_rx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPI6) && defined(BSP_SPI6_TX_USING_DMA)
|
|
|
-/**
|
|
|
- * @brief This function handles DMA Tx interrupt request.
|
|
|
- * @param None
|
|
|
- * @retval None
|
|
|
- */
|
|
|
-void SPI6_DMA_TX_IRQHandler(void)
|
|
|
-{
|
|
|
- /* enter interrupt */
|
|
|
- rt_interrupt_enter();
|
|
|
-
|
|
|
- HAL_DMA_IRQHandler(&spi_bus_obj[SPI6_INDEX].dma.handle_tx);
|
|
|
-
|
|
|
- /* leave interrupt */
|
|
|
- rt_interrupt_leave();
|
|
|
-}
|
|
|
-#endif /* defined(BSP_USING_SPI6) && defined(BSP_SPI_USING_DMA) */
|
|
|
-
|
|
|
-static void mm32_get_dma_info(void)
|
|
|
-{
|
|
|
-#ifdef BSP_SPI1_RX_USING_DMA
|
|
|
- spi_bus_obj[SPI1_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
|
|
|
- static struct dma_config spi1_dma_rx = SPI1_RX_DMA_CONFIG;
|
|
|
- spi_config[SPI1_INDEX].dma_rx = &spi1_dma_rx;
|
|
|
-#endif
|
|
|
-#ifdef BSP_SPI1_TX_USING_DMA
|
|
|
- spi_bus_obj[SPI1_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
|
|
|
- static struct dma_config spi1_dma_tx = SPI1_TX_DMA_CONFIG;
|
|
|
- spi_config[SPI1_INDEX].dma_tx = &spi1_dma_tx;
|
|
|
-#endif
|
|
|
-
|
|
|
-#ifdef BSP_SPI2_RX_USING_DMA
|
|
|
- spi_bus_obj[SPI2_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
|
|
|
- static struct dma_config spi2_dma_rx = SPI2_RX_DMA_CONFIG;
|
|
|
- spi_config[SPI2_INDEX].dma_rx = &spi2_dma_rx;
|
|
|
-#endif
|
|
|
-#ifdef BSP_SPI2_TX_USING_DMA
|
|
|
- spi_bus_obj[SPI2_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
|
|
|
- static struct dma_config spi2_dma_tx = SPI2_TX_DMA_CONFIG;
|
|
|
- spi_config[SPI2_INDEX].dma_tx = &spi2_dma_tx;
|
|
|
-#endif
|
|
|
-
|
|
|
-#ifdef BSP_SPI3_RX_USING_DMA
|
|
|
- spi_bus_obj[SPI3_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
|
|
|
- static struct dma_config spi3_dma_rx = SPI3_RX_DMA_CONFIG;
|
|
|
- spi_config[SPI3_INDEX].dma_rx = &spi3_dma_rx;
|
|
|
-#endif
|
|
|
-#ifdef BSP_SPI3_TX_USING_DMA
|
|
|
- spi_bus_obj[SPI3_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
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- static struct dma_config spi3_dma_tx = SPI3_TX_DMA_CONFIG;
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- spi_config[SPI3_INDEX].dma_tx = &spi3_dma_tx;
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-#endif
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-
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-#ifdef BSP_SPI4_RX_USING_DMA
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- spi_bus_obj[SPI4_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
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- static struct dma_config spi4_dma_rx = SPI4_RX_DMA_CONFIG;
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- spi_config[SPI4_INDEX].dma_rx = &spi4_dma_rx;
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-#endif
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-#ifdef BSP_SPI4_TX_USING_DMA
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- spi_bus_obj[SPI4_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
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- static struct dma_config spi4_dma_tx = SPI4_TX_DMA_CONFIG;
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- spi_config[SPI4_INDEX].dma_tx = &spi4_dma_tx;
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-#endif
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-
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-#ifdef BSP_SPI5_RX_USING_DMA
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- spi_bus_obj[SPI5_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
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- static struct dma_config spi5_dma_rx = SPI5_RX_DMA_CONFIG;
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- spi_config[SPI5_INDEX].dma_rx = &spi5_dma_rx;
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-#endif
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-#ifdef BSP_SPI5_TX_USING_DMA
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- spi_bus_obj[SPI5_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
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- static struct dma_config spi5_dma_tx = SPI5_TX_DMA_CONFIG;
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- spi_config[SPI5_INDEX].dma_tx = &spi5_dma_tx;
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-#endif
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-
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-#ifdef BSP_SPI6_RX_USING_DMA
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- spi_bus_obj[SPI6_INDEX].spi_dma_flag |= SPI_USING_RX_DMA_FLAG;
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- static struct dma_config spi6_dma_rx = SPI6_RX_DMA_CONFIG;
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- spi_config[SPI6_INDEX].dma_rx = &spi6_dma_rx;
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-#endif
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-#ifdef BSP_SPI6_TX_USING_DMA
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- spi_bus_obj[SPI6_INDEX].spi_dma_flag |= SPI_USING_TX_DMA_FLAG;
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- static struct dma_config spi6_dma_tx = SPI6_TX_DMA_CONFIG;
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- spi_config[SPI6_INDEX].dma_tx = &spi6_dma_tx;
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-#endif
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-}
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-
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-#if defined(SOC_SERIES_STM32F0)
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-void SPI1_DMA_RX_TX_IRQHandler(void)
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-{
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-#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_TX_USING_DMA)
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- SPI1_DMA_TX_IRQHandler();
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-#endif
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-
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-#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_RX_USING_DMA)
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- SPI1_DMA_RX_IRQHandler();
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-#endif
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-}
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-
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-void SPI2_DMA_RX_TX_IRQHandler(void)
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-{
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-#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_TX_USING_DMA)
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- SPI2_DMA_TX_IRQHandler();
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|
-#endif
|
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|
-
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-#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_RX_USING_DMA)
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- SPI2_DMA_RX_IRQHandler();
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|
-#endif
|
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-}
|
|
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-#endif /* SOC_SERIES_STM32F0 */
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|
-
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|
|
-int rt_hw_spi_init(void)
|
|
|
-{
|
|
|
- mm32_get_dma_info();
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- return rt_hw_spi_bus_init();
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-}
|
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|
-INIT_BOARD_EXPORT(rt_hw_spi_init);
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-
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-
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|
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-#endif /* BSP_USING_SPI1 || BSP_USING_SPI2 || BSP_USING_SPI3 */
|
|
|
-
|
|
|
-#endif /* RT_USING_SPI */
|
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-
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slhuan