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@@ -11,6 +11,7 @@
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* fix bug.port to BSP [stm32]
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* 2019-03-27 YLZ support double can channels, support stm32F4xx (only Legacy mode).
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* 2019-06-17 YLZ port to new STM32F1xx HAL V1.1.3.
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+ * 2021-02-02 YuZhe XU fix bug in filter config
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*/
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#include "drv_can.h"
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@@ -292,6 +293,13 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
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}
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break;
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case RT_CAN_CMD_SET_FILTER:
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+ {
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+ rt_uint32_t id_h = 0;
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+ rt_uint32_t id_l = 0;
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+ rt_uint32_t mask_h = 0;
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+ rt_uint32_t mask_l = 0;
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+ rt_uint32_t mask_l_tail = 0; //CAN_FxR2 bit [2:0]
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+
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if (RT_NULL == arg)
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{
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/* default filter config */
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@@ -311,19 +319,73 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
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{
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drv_can->FilterConfig.FilterBank = filter_cfg->items[i].hdr;
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}
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- drv_can->FilterConfig.FilterBank = filter_cfg->items[i].hdr;
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- drv_can->FilterConfig.FilterIdHigh = (filter_cfg->items[i].id >> 13) & 0xFFFF;
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- drv_can->FilterConfig.FilterIdLow = ((filter_cfg->items[i].id << 3) |
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- (filter_cfg->items[i].ide << 2) |
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- (filter_cfg->items[i].rtr << 1)) & 0xFFFF;
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- drv_can->FilterConfig.FilterMaskIdHigh = (filter_cfg->items[i].mask >> 16) & 0xFFFF;
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- drv_can->FilterConfig.FilterMaskIdLow = filter_cfg->items[i].mask & 0xFFFF;
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+ /**
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+ * struct rt_can_filter_item {
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+ * rt_uint32_t id : 29; // 报文 ID
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+ * rt_uint32_t ide : 1; // 扩展帧标识位
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+ * rt_uint32_t rtr : 1; // 远程帧标识位
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+ * rt_uint32_t mode : 1; // 过滤表模式
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+ * rt_uint32_t mask; // ID 掩码,0 表示对应的位不关心,1 表示对应的位必须匹配
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+ * rt_int32_t hdr; // -1 表示不指定过滤表号,对应的过滤表控制块也不会被初始化,正数为过滤表号,对应的过滤表控制块会被初始化
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+ * #ifdef RT_CAN_USING_HDR // 过滤表回调函数
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+ * rt_err_t (*ind)(rt_device_t dev, void *args , rt_int32_t hdr, rt_size_t size); // 回调函数参数
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+ * void *args;
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+ * #endif
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+ * };
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+ * ID | CAN_FxR1[31:24] | CAN_FxR1[23:16] | CAN_FxR1[15:8] | CAN_FxR1[7:0] |
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+ * MASK | CAN_FxR2[31:24] | CAN_FxR1[23:16] | CAN_FxR1[15:8] | CAN_FxR1[7:0] |
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+ * STD ID | STID[10:3] | STDID[2:0] |<- 21bit ->|
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+ * EXT ID | EXTID[28:21] | EXTID[20:13] | EXTID[12:5] | EXTID[4:0] IDE RTR 0|
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+ * @note the 32bit STD ID must << 21 to fill CAN_FxR1[31:21] and EXT ID must << 3,
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+ * -> but the id bit of struct rt_can_filter_item is 29,
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+ * -> so STD id << 18 and EXT id Don't need << 3, when get the high 16bit.
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+ * -> FilterIdHigh : (((STDid << 18) or (EXT id)) >> 13) & 0xFFFF,
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+ * -> FilterIdLow: ((STDid << 18) or (EXT id << 3)) & 0xFFFF.
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+ * @note the mask bit of struct rt_can_filter_item is 32,
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+ * -> FilterMaskIdHigh: (((STD mask << 21) or (EXT mask <<3)) >> 16) & 0xFFFF
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+ * -> FilterMaskIdLow: ((STD mask << 21) or (EXT mask <<3)) & 0xFFFF
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+ */
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+ if (filter_cfg->items[i].mode == CAN_FILTERMODE_IDMASK)
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+ {
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+ /* make sure the CAN_FxR1[2:0](IDE RTR) work */
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+ mask_l_tail = 0x06;
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+ }
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+ else if (filter_cfg->items[i].mode == CAN_FILTERMODE_IDLIST)
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+ {
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+ /* same as CAN_FxR1 */
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+ mask_l_tail = (filter_cfg->items[i].ide << 2) |
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+ (filter_cfg->items[i].rtr << 1);
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+ }
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+ if (filter_cfg->items[i].ide == RT_CAN_STDID)
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+ {
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+ id_h = ((filter_cfg->items[i].id << 18) >> 13) & 0xFFFF;
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+ id_l = ((filter_cfg->items[i].id << 18) |
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+ (filter_cfg->items[i].ide << 2) |
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+ (filter_cfg->items[i].rtr << 1)) & 0xFFFF;
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+ mask_h = ((filter_cfg->items[i].mask << 21) >> 16) & 0xFFFF;
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+ mask_l = ((filter_cfg->items[i].mask << 21) | mask_l_tail) & 0xFFFF;
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+ }
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+ else if (filter_cfg->items[i].ide == RT_CAN_EXTID)
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+ {
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+ id_h = (filter_cfg->items[i].id >> 13) & 0xFFFF;
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+ id_l = ((filter_cfg->items[i].id << 3) |
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+ (filter_cfg->items[i].ide << 2) |
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+ (filter_cfg->items[i].rtr << 1)) & 0xFFFF;
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+ mask_h = ((filter_cfg->items[i].mask << 3) >> 16) & 0xFFFF;
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+ mask_l = ((filter_cfg->items[i].mask << 3) | mask_l_tail) & 0xFFFF;
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+ }
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+ drv_can->FilterConfig.FilterIdHigh = id_h;
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+ drv_can->FilterConfig.FilterIdLow = id_l;
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+ drv_can->FilterConfig.FilterMaskIdHigh = mask_h;
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+ drv_can->FilterConfig.FilterMaskIdLow = mask_l;
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+
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drv_can->FilterConfig.FilterMode = filter_cfg->items[i].mode;
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/* Filter conf */
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HAL_CAN_ConfigFilter(&drv_can->CanHandle, &drv_can->FilterConfig);
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}
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}
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break;
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+ }
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case RT_CAN_CMD_SET_MODE:
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argval = (rt_uint32_t) arg;
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if (argval != RT_CAN_MODE_NORMAL &&
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