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@@ -1,15 +1,18 @@
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/**
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- *********************************************************************************
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- *
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- * @file ald_i2c.c
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- * @brief I2C module driver.
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- *
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- * @version V1.0
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- * @date 15 Nov 2019
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- * @author AE Team
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- * @note
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- *
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- * Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
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+ *********************************************************************************
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+ *
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+ * @file ald_i2c.c
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+ * @brief I2C module driver.
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+ *
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+ * @version V1.0
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+ * @date 15 Nov 2019
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+ * @author AE Team
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+ * @note
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+ * Change Logs:
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+ * Date Author Notes
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+ * 15 Nov 2019 AE Team The first version
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+ *
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+ * Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@@ -24,11 +27,12 @@
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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- *
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- @verbatim
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- ==============================================================================
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+ **********************************************************************************
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+ *
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+ @verbatim
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+ ===============================================================================
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##### How to use this driver #####
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- ==============================================================================
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+ ===============================================================================
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[..]
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The I2C driver can be used as follows:
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@@ -165,7 +169,7 @@
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*********************************************************************************
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*/
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-#include "ald_i2c.h"
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+#include "ald_conf.h"
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/** @addtogroup ES32FXXX_ALD
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* @{
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@@ -182,9 +186,9 @@
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* @{
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*/
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-#define I2C_TIMEOUT_FLAG (__systick_interval / 20 + 1)
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-#define I2C_TIMEOUT_ADDR_SLAVE (__systick_interval * 10)
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-#define I2C_TIMEOUT_BUSY_FLAG (__systick_interval * 10)
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+#define I2C_TIMEOUT_FLAG (10)
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+#define I2C_TIMEOUT_ADDR_SLAVE (10)
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+#define I2C_TIMEOUT_BUSY_FLAG (10)
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#define I2C_MAX_DELAY 0xFFFFFFFF
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/**
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@@ -262,65 +266,67 @@ static ald_status_t i2c_slave_stopf(i2c_handle_t *hperh);
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* @brief I2C Configuration Speed function.
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* @param hperh: Pointer to a i2c_handle_t structure that contains.
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* the configuration information for the I2C speed.
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- * @param freqrange: I2C Peripheral bus clock
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+ * @param clk: I2C Peripheral bus clock
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* @retval Status, see @ref ald_status_t.
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*/
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-ald_status_t i2c_speed_init(i2c_handle_t *hperh, uint32_t freqrange)
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+ald_status_t i2c_speed_init(i2c_handle_t *hperh, uint32_t clk)
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{
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- float Tsync = 0;
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- float Tscl = 0;
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- float Tfre = 0;
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- uint32_t Tper = 0;
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- uint32_t presc = 0;
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- uint32_t tmp = 0;
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+ int32_t t_scl, t_pre, tmp;
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if (hperh->init.module == I2C_MODULE_SLAVE) {
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- hperh->init.clk_speed = 450000;
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+ hperh->init.clk_speed = 450000UL;
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}
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- if (hperh->init.clk_speed <= 100000) {
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- tmp = freqrange / 4000000;
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- freqrange = 4000000;
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- } else {
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- tmp = freqrange / 8000000;
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- freqrange = 8000000;
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+ if (hperh->init.clk_speed <= 100000UL) {
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+ tmp = clk / 4000000UL;
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+ clk = (tmp >= 16UL) ? (clk >> 4UL) : 4000000UL;
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+ }
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+ else {
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+ tmp = clk / 8000000UL;
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+ clk = (tmp >= 16UL) ? (clk >> 4UL) : 8000000UL;
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}
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- Tscl = 1000.0 / (hperh->init.clk_speed / 1000000.0);
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- Tfre = 1000.0 / I2C_FREQ_RANGE(freqrange);
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-
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- Tsync = (READ_BITS(hperh->perh->CON2, I2C_CON1_DNF_MSK, I2C_CON1_DNF_POSS) + 2) * 2 * Tfre;
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-
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- Tper = (uint32_t)((Tscl - Tsync) / Tfre);
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+ tmp = tmp >= 16UL ? 15UL : tmp;
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+ MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_PRESC_MSK, tmp << I2C_TIMINGR_PRESC_POSS);
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- while (Tper > 512) {
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- Tper = Tper - 512;
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- presc++;
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- }
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+ t_scl = 1000000000 / hperh->init.clk_speed;
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+ t_pre = 1000000000 / clk;
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_PRESC_MSK, (presc + tmp ) << I2C_TIMINGR_PRESC_POSS);
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+ tmp = (t_scl * 10) / (t_pre << 1UL);
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+ tmp = (tmp % 10) >= 5 ? (tmp / 10 + 1) : tmp / 10;
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+ tmp = tmp >= 255UL ? 255UL : tmp;
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+ /* SCLDEL+1+SDADEL+0+SCLH+1 */
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+ if ((long)(t_scl - ((tmp + 3UL) * t_pre)) < 0)
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+ return ERROR;
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- if (hperh->init.clk_speed <= I2C_STANDARD_MODE_MAX_CLK) {
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SDADEL_MSK, 2 << I2C_TIMINGR_SDADEL_POSS);
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLDEL_MSK, 4 << I2C_TIMINGR_SCLDEL_POSS);
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLH_MSK, (((Tper - 2) / 2) - 4) << I2C_TIMINGR_SCLH_POSS);
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLL_MSK, (((Tper - 2) / 2) + 4) << I2C_TIMINGR_SCLL_POSS);
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+ MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLL_MSK, (tmp - 1UL) << I2C_TIMINGR_SCLL_POSS);
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+ if (hperh->init.clk_speed > 100000UL) {
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+ if ((tmp - 1UL) > 3UL) {
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+ MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLDEL_MSK, ((tmp - 1UL) / 3UL) << I2C_TIMINGR_SCLDEL_POSS);
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+ MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SDADEL_MSK, ((((tmp - 1UL) / 3UL) >= 3) ? 3 : (((tmp - 1UL) / 3UL) % 3)) << I2C_TIMINGR_SDADEL_POSS);
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+ }
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+ else {
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+ MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLDEL_MSK, 1UL << I2C_TIMINGR_SCLDEL_POSS);
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+ MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SDADEL_MSK, 1UL << I2C_TIMINGR_SDADEL_POSS);
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+ }
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}
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else {
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- if (hperh->init.clk_speed <= I2C_FAST_MODE_MAX_CLK) {
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SDADEL_MSK, 2 << I2C_TIMINGR_SDADEL_POSS);
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLDEL_MSK, 3 << I2C_TIMINGR_SCLDEL_POSS);
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLH_MSK, (((Tper - 2) / 2) - 6) << I2C_TIMINGR_SCLH_POSS);
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLL_MSK, (((Tper - 2) / 2) + 6) << I2C_TIMINGR_SCLL_POSS);
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- }
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- else {
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SDADEL_MSK, 0 << I2C_TIMINGR_SDADEL_POSS);
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLDEL_MSK, 1 << I2C_TIMINGR_SCLDEL_POSS);
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLH_MSK, (((Tper - 2) / 2) - 3) << I2C_TIMINGR_SCLH_POSS);
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- MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLL_MSK, (((Tper - 2) / 2) + 3) << I2C_TIMINGR_SCLL_POSS);
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- }
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+ MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SDADEL_MSK, 2UL << I2C_TIMINGR_SDADEL_POSS);
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+ MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLDEL_MSK, 4UL << I2C_TIMINGR_SCLDEL_POSS);
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}
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+ tmp = t_scl - (tmp + READ_BITS(hperh->perh->TIMINGR, I2C_TIMINGR_SCLDEL_MSK, I2C_TIMINGR_SCLDEL_POSS) + \
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+ READ_BITS(hperh->perh->TIMINGR, I2C_TIMINGR_SDADEL_MSK, I2C_TIMINGR_SDADEL_POSS) + 1UL) * t_pre;
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+ if (tmp < 0)
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+ return ERROR;
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+
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+ tmp = (tmp * 10) / t_pre;
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+ tmp = (tmp % 10) >= 5 ? (tmp / 10 + 1) : tmp / 10;
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+ tmp = tmp >= 255UL ? 255UL : tmp;
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+ /* tscll >= 3*tsclh */
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+ tmp = (tmp - 1) <= (READ_BITS(hperh->perh->TIMINGR, I2C_TIMINGR_SCLL_MSK, I2C_TIMINGR_SCLL_POSS) / 3) ? (READ_BITS(hperh->perh->TIMINGR, I2C_TIMINGR_SCLL_MSK, I2C_TIMINGR_SCLL_POSS) / 3) + 1: tmp;
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+ MODIFY_REG(hperh->perh->TIMINGR, I2C_TIMINGR_SCLH_MSK, (tmp - 1UL) << I2C_TIMINGR_SCLH_POSS);
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+
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return OK;
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}
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/**
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@@ -351,7 +357,9 @@ ald_status_t ald_i2c_init(i2c_handle_t *hperh)
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I2C_DISABLE(hperh);
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- i2c_speed_init(hperh, freqrange);
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+ if (OK != i2c_speed_init(hperh, freqrange))
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+ return ERROR;
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+
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MODIFY_REG(hperh->perh->CON1, I2C_CON1_NOSTRETCH_MSK, (hperh->init.no_stretch) << I2C_CON1_NOSTRETCH_POS);
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MODIFY_REG(hperh->perh->CON1, I2C_CON1_GCEN_MSK, (hperh->init.general_call) << I2C_CON1_GCEN_POS);
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@@ -527,7 +535,6 @@ ald_status_t ald_i2c_master_send(i2c_handle_t *hperh, uint16_t dev_addr, uint8_t
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SET_BIT(hperh->perh->CON2, I2C_CON2_START_MSK);
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while (size > 0) {
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- while(hperh->perh->STAT & (0x1 << 1));
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hperh->perh->TXDATA = (*buf++);
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size--;
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hperh->xfer_count++;
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@@ -651,7 +658,7 @@ SUCCESS:
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goto SUCCESS;
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SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
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- goto SUCCESS;
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+ goto SUCCESS;
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ERROR:
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SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
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@@ -701,11 +708,13 @@ ald_status_t ald_i2c_slave_send(i2c_handle_t *hperh, uint8_t *buf, uint32_t size
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hperh->xfer_size = size;
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hperh->xfer_count = 0;
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- MODIFY_REG(hperh->perh->FCON, I2C_FCON_TXFTH_MSK, 0x03 << I2C_FCON_TXFTH_POSS);
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SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
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+ MODIFY_REG(hperh->perh->FCON, I2C_FCON_TXFTH_MSK, 0x03 << I2C_FCON_TXFTH_POSS);
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for (i = 0; i < 16; i++) {
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- while(hperh->perh->STAT & (0x1 << 1));
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+ if (i2c_wait_flag_change_to_timeout(hperh, I2C_STAT_TXF, SET, timeout) != OK)
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+ goto ERROR;
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+
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hperh->perh->TXDATA = (*buf++);
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--size;
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hperh->xfer_count++;
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@@ -722,7 +731,9 @@ ald_status_t ald_i2c_slave_send(i2c_handle_t *hperh, uint8_t *buf, uint32_t size
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goto ERROR;
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for (i = 0; i < 8; i++) {
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- while(hperh->perh->STAT & (0x1 << 1));
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+ if (i2c_wait_flag_change_to_timeout(hperh, I2C_STAT_TXF, SET, timeout) != OK)
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+ goto ERROR;
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+
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hperh->perh->TXDATA = (*buf++);
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--size;
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hperh->xfer_count++;
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@@ -843,7 +854,7 @@ ald_status_t ald_i2c_master_send_by_it(i2c_handle_t *hperh, uint16_t dev_addr, u
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i2c_master_req_write(hperh, dev_addr, I2C_TIMEOUT_FLAG);
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- if (size <= 0xff) {
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+ if (size <= 0xFF) {
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MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
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}
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else {
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@@ -1183,15 +1194,15 @@ ald_status_t ald_i2c_slave_send_by_dma(i2c_handle_t *hperh, uint8_t *buf, uint8_
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ald_dma_config_struct(&hperh->hdmatx.config);
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hperh->hdmatx.config.burst = ENABLE;
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- hperh->hdmatx.config.src = (void *)buf;
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- hperh->hdmatx.config.dst = (void *)&hperh->perh->TXDATA;
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- hperh->hdmatx.config.size = size;
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+ hperh->hdmatx.config.src = (void *)buf;
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+ hperh->hdmatx.config.dst = (void *)&hperh->perh->TXDATA;
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+ hperh->hdmatx.config.size = size;
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hperh->hdmatx.config.data_width = DMA_DATA_SIZE_BYTE;
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- hperh->hdmatx.config.src_inc = DMA_DATA_INC_BYTE;
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- hperh->hdmatx.config.dst_inc = DMA_DATA_INC_NONE;
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- hperh->hdmatx.config.msel = hperh->perh == I2C0 ? DMA_MSEL_I2C0 : DMA_MSEL_I2C1;
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- hperh->hdmatx.config.msigsel = DMA_MSIGSEL_I2C_TXEMPTY;
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- hperh->hdmatx.config.channel = channel;
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+ hperh->hdmatx.config.src_inc = DMA_DATA_INC_BYTE;
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+ hperh->hdmatx.config.dst_inc = DMA_DATA_INC_NONE;
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+ hperh->hdmatx.config.msel = hperh->perh == I2C0 ? DMA_MSEL_I2C0 : DMA_MSEL_I2C1;
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+ hperh->hdmatx.config.msigsel = DMA_MSIGSEL_I2C_TXEMPTY;
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+ hperh->hdmatx.config.channel = channel;
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ald_dma_config_basic(&hperh->hdmatx);
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if (i2c_wait_master_addr_to_timeout(hperh, I2C_IT_ADDR, I2C_TIMEOUT_ADDR_SLAVE) == ERROR) {
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@@ -1202,6 +1213,7 @@ ald_status_t ald_i2c_slave_send_by_dma(i2c_handle_t *hperh, uint8_t *buf, uint8_
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return ERROR;
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}
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+ SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
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SET_BIT(hperh->perh->CON1, I2C_CON1_TXDMAEN_MSK);
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return OK;
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@@ -1249,15 +1261,15 @@ ald_status_t ald_i2c_slave_recv_by_dma(i2c_handle_t *hperh, uint8_t *buf, uint8_
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hperh->hdmarx.err_arg = (void *)hperh;
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ald_dma_config_struct(&hperh->hdmarx.config);
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- hperh->hdmarx.config.src = (void *)&hperh->perh->RXDATA;
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- hperh->hdmarx.config.dst = (void *)buf;
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- hperh->hdmarx.config.size = size;
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+ hperh->hdmarx.config.src = (void *)&hperh->perh->RXDATA;
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+ hperh->hdmarx.config.dst = (void *)buf;
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+ hperh->hdmarx.config.size = size;
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hperh->hdmatx.config.data_width = DMA_DATA_SIZE_BYTE;
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- hperh->hdmarx.config.src_inc = DMA_DATA_INC_NONE;
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- hperh->hdmarx.config.dst_inc = DMA_DATA_INC_BYTE;
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- hperh->hdmarx.config.msel = hperh->perh == I2C0 ? DMA_MSEL_I2C0 : DMA_MSEL_I2C1;
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- hperh->hdmarx.config.msigsel = DMA_MSIGSEL_I2C_RNR;
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- hperh->hdmarx.config.channel = channel;
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+ hperh->hdmarx.config.src_inc = DMA_DATA_INC_NONE;
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+ hperh->hdmarx.config.dst_inc = DMA_DATA_INC_BYTE;
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+ hperh->hdmarx.config.msel = hperh->perh == I2C0 ? DMA_MSEL_I2C0 : DMA_MSEL_I2C1;
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+ hperh->hdmarx.config.msigsel = DMA_MSIGSEL_I2C_RNR;
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+ hperh->hdmarx.config.channel = channel;
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ald_dma_config_basic(&hperh->hdmarx);
|
|
|
|
|
|
if (i2c_wait_master_addr_to_timeout(hperh, I2C_IT_ADDR, I2C_TIMEOUT_ADDR_SLAVE) == ERROR) {
|
|
@@ -1268,6 +1280,7 @@ ald_status_t ald_i2c_slave_recv_by_dma(i2c_handle_t *hperh, uint8_t *buf, uint8_
|
|
|
return ERROR;
|
|
|
}
|
|
|
|
|
|
+ SET_BIT(hperh->perh->FCON, I2C_FCON_RXFRST_MSK);
|
|
|
SET_BIT(hperh->perh->CON1, I2C_CON1_RXDMAEN_MSK);
|
|
|
|
|
|
return OK;
|
|
@@ -1311,31 +1324,25 @@ ald_status_t ald_i2c_mem_write(i2c_handle_t *hperh, uint16_t dev_addr, uint16_t
|
|
|
hperh->xfer_size = size;
|
|
|
hperh->xfer_count = 0;
|
|
|
|
|
|
- i2c_master_req_write(hperh, dev_addr, timeout);
|
|
|
+ nbyte = (add_size == I2C_MEMADD_SIZE_8BIT) ? 1 : 2;
|
|
|
+ MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, nbyte << I2C_CON2_NBYTES_POSS);
|
|
|
+ SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
|
|
|
- if (add_size == I2C_MEMADD_SIZE_8BIT) {
|
|
|
- nbyte = size + 1;
|
|
|
- }
|
|
|
- else {
|
|
|
- nbyte = size + 2;
|
|
|
- }
|
|
|
+ SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
|
|
|
+ SET_BIT(hperh->perh->FCON, I2C_FCON_RXFRST_MSK);
|
|
|
+
|
|
|
+ if (i2c_req_mem_write(hperh, dev_addr, mem_addr, add_size, timeout) != OK)
|
|
|
+ goto ERROR;
|
|
|
|
|
|
- if (nbyte <= 0xFF) {
|
|
|
- MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, nbyte << I2C_CON2_NBYTES_POSS);
|
|
|
+ if (size <= 0xFF) {
|
|
|
+ MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
|
|
|
}
|
|
|
else {
|
|
|
MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
|
|
|
SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
}
|
|
|
|
|
|
- SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
|
|
|
-
|
|
|
- if (i2c_req_mem_write(hperh, dev_addr, mem_addr, add_size, I2C_TIMEOUT_FLAG) != OK)
|
|
|
- goto ERROR;
|
|
|
-
|
|
|
- hperh->xfer_count += 2;
|
|
|
while (size > 0) {
|
|
|
- while(hperh->perh->STAT & (0x1 << 1));
|
|
|
hperh->perh->TXDATA = (*buf++);
|
|
|
--size;
|
|
|
hperh->xfer_count++;
|
|
@@ -1362,8 +1369,11 @@ ald_status_t ald_i2c_mem_write(i2c_handle_t *hperh, uint16_t dev_addr, uint16_t
|
|
|
if (READ_BIT(hperh->perh->CON2, I2C_CON2_AUTOEND_MSK))
|
|
|
goto SUCCESS;
|
|
|
|
|
|
+ if (i2c_wait_flag_change_to_timeout(hperh, I2C_STAT_TC, RESET, timeout))
|
|
|
+ goto ERROR;
|
|
|
+
|
|
|
SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
|
|
|
- goto SUCCESS;
|
|
|
+ goto SUCCESS;
|
|
|
|
|
|
ERROR:
|
|
|
SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
|
|
@@ -1418,22 +1428,15 @@ ald_status_t ald_i2c_mem_read(i2c_handle_t *hperh, uint16_t dev_addr, uint16_t m
|
|
|
hperh->xfer_count = 0;
|
|
|
hperh->xfer_size = size;
|
|
|
|
|
|
- i2c_master_req_write(hperh, dev_addr, timeout);
|
|
|
-
|
|
|
nbyte = (add_size == I2C_MEMADD_SIZE_8BIT) ? 1 : 2;
|
|
|
MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, nbyte << I2C_CON2_NBYTES_POSS);
|
|
|
+ SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
|
|
|
SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
|
|
|
SET_BIT(hperh->perh->FCON, I2C_FCON_RXFRST_MSK);
|
|
|
|
|
|
- if (i2c_req_mem_write(hperh, dev_addr, mem_addr, add_size, I2C_TIMEOUT_FLAG) != OK) {
|
|
|
- SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
|
|
|
- hperh->state = I2C_STATE_READY;
|
|
|
- hperh->mode = I2C_MODE_NONE;
|
|
|
- __UNLOCK(hperh);
|
|
|
-
|
|
|
+ if (i2c_req_mem_write(hperh, dev_addr, mem_addr, add_size, timeout) != OK)
|
|
|
return ERROR;
|
|
|
- }
|
|
|
|
|
|
if (size <= 0xFF) {
|
|
|
MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
|
|
@@ -1455,7 +1458,7 @@ ald_status_t ald_i2c_mem_read(i2c_handle_t *hperh, uint16_t dev_addr, uint16_t m
|
|
|
hperh->xfer_count++;
|
|
|
|
|
|
if (((hperh->xfer_count % 0xFF) == 0) && (READ_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK))) {
|
|
|
- if (i2c_wait_flag_change_to_timeout(hperh, I2C_STAT_TCR, RESET, I2C_TIMEOUT_FLAG) == OK) {
|
|
|
+ if (i2c_wait_flag_change_to_timeout(hperh, I2C_STAT_TCR, RESET, timeout) == OK) {
|
|
|
if (size > 0xFF) {
|
|
|
MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
|
|
|
}
|
|
@@ -1474,7 +1477,7 @@ ald_status_t ald_i2c_mem_read(i2c_handle_t *hperh, uint16_t dev_addr, uint16_t m
|
|
|
goto SUCCESS;
|
|
|
|
|
|
SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
|
|
|
- goto SUCCESS;
|
|
|
+ goto SUCCESS;
|
|
|
|
|
|
ERROR:
|
|
|
SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
|
|
@@ -1529,20 +1532,9 @@ ald_status_t ald_i2c_mem_write_by_it(i2c_handle_t *hperh, uint16_t dev_addr, uin
|
|
|
hperh->xfer_size = size;
|
|
|
hperh->xfer_count = 0;
|
|
|
|
|
|
- if (add_size == I2C_MEMADD_SIZE_8BIT) {
|
|
|
- nbyte = size + 1;
|
|
|
- }
|
|
|
- else {
|
|
|
- nbyte = size + 2;
|
|
|
- }
|
|
|
-
|
|
|
- if (nbyte <= 0xFF) {
|
|
|
- MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, nbyte << I2C_CON2_NBYTES_POSS);
|
|
|
- }
|
|
|
- else {
|
|
|
- MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
|
|
|
- SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
- }
|
|
|
+ nbyte = (add_size == I2C_MEMADD_SIZE_8BIT) ? 1 : 2;
|
|
|
+ MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, nbyte << I2C_CON2_NBYTES_POSS);
|
|
|
+ SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
|
|
|
SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
|
|
|
SET_BIT(hperh->perh->FCON, I2C_FCON_RXFRST_MSK);
|
|
@@ -1555,13 +1547,20 @@ ald_status_t ald_i2c_mem_write_by_it(i2c_handle_t *hperh, uint16_t dev_addr, uin
|
|
|
|
|
|
return ERROR;
|
|
|
}
|
|
|
-
|
|
|
+
|
|
|
+ if (size <= 0xFF) {
|
|
|
+ MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
|
|
|
+ SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
+ }
|
|
|
+
|
|
|
I2C_CLEAR_IT(hperh , I2C_IT_TXTH);
|
|
|
I2C_CLEAR_IT(hperh , I2C_IT_NACK);
|
|
|
I2C_CLEAR_IT(hperh , I2C_IT_TC);
|
|
|
I2C_CLEAR_IT(hperh , I2C_IT_TCR);
|
|
|
|
|
|
- while(hperh->perh->STAT & (0x1 << 1));
|
|
|
hperh->perh->TXDATA = (*hperh->p_buff++);
|
|
|
hperh->xfer_count++;
|
|
|
|
|
@@ -1610,6 +1609,7 @@ ald_status_t ald_i2c_mem_read_by_it(i2c_handle_t *hperh, uint16_t dev_addr, uint
|
|
|
|
|
|
nbyte = (add_size == I2C_MEMADD_SIZE_8BIT) ? 1 : 2;
|
|
|
MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, nbyte << I2C_CON2_NBYTES_POSS);
|
|
|
+ SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
|
|
|
SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
|
|
|
SET_BIT(hperh->perh->FCON, I2C_FCON_RXFRST_MSK);
|
|
@@ -1681,6 +1681,22 @@ ald_status_t ald_i2c_mem_write_by_dma(i2c_handle_t *hperh, uint16_t dev_addr, ui
|
|
|
hperh->xfer_size = size;
|
|
|
hperh->xfer_count = 0;
|
|
|
|
|
|
+ SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
|
|
|
+ SET_BIT(hperh->perh->FCON, I2C_FCON_RXFRST_MSK);
|
|
|
+
|
|
|
+ nbyte = (add_size == I2C_MEMADD_SIZE_8BIT) ? 1 : 2;
|
|
|
+ MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, nbyte << I2C_CON2_NBYTES_POSS);
|
|
|
+ SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
+
|
|
|
+ if (i2c_req_mem_write(hperh, dev_addr, mem_addr, add_size, I2C_TIMEOUT_FLAG) != OK) {
|
|
|
+ SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
|
|
|
+ hperh->state = I2C_STATE_READY;
|
|
|
+ hperh->mode = I2C_MODE_NONE;
|
|
|
+ __UNLOCK(hperh);
|
|
|
+
|
|
|
+ return ERROR;
|
|
|
+ }
|
|
|
+
|
|
|
if (hperh->hdmatx.perh == NULL)
|
|
|
hperh->hdmatx.perh = DMA0;
|
|
|
|
|
@@ -1689,37 +1705,21 @@ ald_status_t ald_i2c_mem_write_by_dma(i2c_handle_t *hperh, uint16_t dev_addr, ui
|
|
|
hperh->hdmatx.err_cbk = i2c_dma_error;
|
|
|
hperh->hdmatx.err_arg = hperh;
|
|
|
|
|
|
- nbyte = (add_size == I2C_MEMADD_SIZE_8BIT) ? 1 : 2;
|
|
|
- MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, nbyte << I2C_CON2_NBYTES_POSS);
|
|
|
- SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
-
|
|
|
ald_dma_config_struct(&hperh->hdmatx.config);
|
|
|
hperh->hdmatx.config.burst = ENABLE;
|
|
|
hperh->hdmatx.config.src = (void *)hperh->p_buff;
|
|
|
- hperh->hdmatx.config.dst = (void *)&hperh->perh->TXDATA;
|
|
|
+ hperh->hdmatx.config.dst = (void *)&hperh->perh->TXDATA;
|
|
|
hperh->hdmatx.config.size = size;
|
|
|
hperh->hdmatx.config.data_width = DMA_DATA_SIZE_BYTE;
|
|
|
- hperh->hdmatx.config.src_inc = DMA_DATA_INC_BYTE;
|
|
|
- hperh->hdmatx.config.dst_inc = DMA_DATA_INC_NONE;
|
|
|
- hperh->hdmatx.config.msel = hperh->perh == I2C0 ? DMA_MSEL_I2C0 : DMA_MSEL_I2C1;
|
|
|
- hperh->hdmatx.config.msigsel = DMA_MSIGSEL_I2C_TXEMPTY;
|
|
|
- hperh->hdmatx.config.channel = channel;
|
|
|
+ hperh->hdmatx.config.src_inc = DMA_DATA_INC_BYTE;
|
|
|
+ hperh->hdmatx.config.dst_inc = DMA_DATA_INC_NONE;
|
|
|
+ hperh->hdmatx.config.msel = hperh->perh == I2C0 ? DMA_MSEL_I2C0 : DMA_MSEL_I2C1;
|
|
|
+ hperh->hdmatx.config.msigsel = DMA_MSIGSEL_I2C_TXEMPTY;
|
|
|
+ hperh->hdmatx.config.channel = channel;
|
|
|
ald_dma_config_basic(&hperh->hdmatx);
|
|
|
|
|
|
- SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
|
|
|
-
|
|
|
- if (i2c_req_mem_write(hperh, dev_addr, mem_addr, add_size, I2C_TIMEOUT_FLAG) != OK) {
|
|
|
- SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
|
|
|
- hperh->state = I2C_STATE_READY;
|
|
|
- hperh->mode = I2C_MODE_NONE;
|
|
|
- __UNLOCK(hperh);
|
|
|
-
|
|
|
- return ERROR;
|
|
|
- }
|
|
|
-
|
|
|
- MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
|
|
|
CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
-
|
|
|
+ MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
|
|
|
SET_BIT(hperh->perh->CON1, I2C_CON1_TXDMAEN_MSK);
|
|
|
|
|
|
return OK;
|
|
@@ -1740,6 +1740,8 @@ ald_status_t ald_i2c_mem_write_by_dma(i2c_handle_t *hperh, uint16_t dev_addr, ui
|
|
|
ald_status_t ald_i2c_mem_read_by_dma(i2c_handle_t *hperh, uint16_t dev_addr, uint16_t mem_addr, i2c_addr_size_t add_size,
|
|
|
uint8_t *buf, uint8_t size, uint8_t channel)
|
|
|
{
|
|
|
+ uint32_t nbyte = 0;
|
|
|
+
|
|
|
if (hperh->state != I2C_STATE_READY)
|
|
|
return BUSY;
|
|
|
|
|
@@ -1759,6 +1761,20 @@ ald_status_t ald_i2c_mem_read_by_dma(i2c_handle_t *hperh, uint16_t dev_addr, uin
|
|
|
hperh->xfer_size = size;
|
|
|
hperh->xfer_count = size;
|
|
|
|
|
|
+ SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
|
|
|
+ SET_BIT(hperh->perh->FCON, I2C_FCON_RXFRST_MSK);
|
|
|
+
|
|
|
+ nbyte = (add_size == I2C_MEMADD_SIZE_8BIT) ? 1 : 2;
|
|
|
+ MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, nbyte << I2C_CON2_NBYTES_POSS);
|
|
|
+ SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
|
|
|
+
|
|
|
+ if (i2c_req_mem_read(hperh, dev_addr, mem_addr, add_size, I2C_TIMEOUT_FLAG) != OK) {
|
|
|
+ SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
|
|
|
+ hperh->state = I2C_STATE_READY;
|
|
|
+ hperh->mode = I2C_MODE_NONE;
|
|
|
+ __UNLOCK(hperh);
|
|
|
+ }
|
|
|
+
|
|
|
if (hperh->hdmarx.perh == NULL)
|
|
|
hperh->hdmarx.perh = DMA0;
|
|
|
|
|
@@ -1766,23 +1782,13 @@ ald_status_t ald_i2c_mem_read_by_dma(i2c_handle_t *hperh, uint16_t dev_addr, uin
|
|
|
hperh->hdmarx.cplt_arg = (void *)hperh;
|
|
|
hperh->hdmarx.err_cbk = i2c_dma_error;
|
|
|
hperh->hdmarx.err_arg = (void *)hperh;
|
|
|
-
|
|
|
- if (add_size == I2C_MEMADD_SIZE_16BIT) {
|
|
|
- hperh->hdmatx.config.size = size + 2;
|
|
|
- }
|
|
|
- else {
|
|
|
- hperh->hdmatx.config.size = size + 1;
|
|
|
- }
|
|
|
-
|
|
|
- MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
|
|
|
- hperh->hdmatx.config.size = size;
|
|
|
-
|
|
|
+
|
|
|
ald_dma_config_struct(&hperh->hdmarx.config);
|
|
|
- hperh->hdmatx.config.burst = ENABLE;
|
|
|
+ hperh->hdmatx.config.burst = ENABLE;
|
|
|
hperh->hdmarx.config.src = (void *)&hperh->perh->RXDATA;
|
|
|
hperh->hdmarx.config.dst = (void *)buf;
|
|
|
hperh->hdmarx.config.data_width = DMA_DATA_SIZE_BYTE;
|
|
|
- hperh->hdmarx.config.size = size;
|
|
|
+ hperh->hdmarx.config.size = size;
|
|
|
hperh->hdmarx.config.src_inc = DMA_DATA_INC_NONE;
|
|
|
hperh->hdmarx.config.dst_inc = DMA_DATA_INC_BYTE;
|
|
|
hperh->hdmarx.config.msel = hperh->perh == I2C0 ? DMA_MSEL_I2C0 : DMA_MSEL_I2C1;
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@@ -1790,20 +1796,8 @@ ald_status_t ald_i2c_mem_read_by_dma(i2c_handle_t *hperh, uint16_t dev_addr, uin
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hperh->hdmarx.config.channel = channel;
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ald_dma_config_basic(&hperh->hdmarx);
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- if (!I2C_GET_FLAG(hperh, I2C_STAT_TXE)) {
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- SET_BIT(hperh->perh->FCON, I2C_FCON_TXFRST_MSK);
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- }
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-
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- if (i2c_req_mem_read(hperh, dev_addr, mem_addr, add_size, I2C_TIMEOUT_FLAG) != OK) {
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- if (hperh->error_code == I2C_ERROR_AF) {
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- __UNLOCK(hperh);
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- return ERROR;
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- }
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- else {
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- __UNLOCK(hperh);
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- return TIMEOUT;
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- }
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- }
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+ MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
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+ CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
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SET_BIT(hperh->perh->CON2, I2C_CON2_RD_WRN_MSK);
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SET_BIT(hperh->perh->CON2, I2C_CON2_START_MSK);
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@@ -1922,7 +1916,6 @@ void ald_i2c_ev_irq_handler(i2c_handle_t *hperh)
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ald_i2c_clear_flag_status(hperh, I2C_IT_TCR);
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}
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-
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/**< Transmit FIFO empty interrupt */
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if (ald_i2c_get_mask_flag_status(hperh, I2C_IT_TXE) == SET) {
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ald_i2c_clear_flag_status(hperh, I2C_IT_TXE);
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@@ -1978,8 +1971,14 @@ void ald_i2c_er_irq_handler(i2c_handle_t *hperh)
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/**< NACK interrupt */
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if (ald_i2c_get_mask_flag_status(hperh, I2C_IT_NACK) == SET) {
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- if (hperh->xfer_count != hperh->xfer_size)
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+ if (hperh->xfer_count != hperh->xfer_size) {
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hperh->state |= I2C_ERROR_AF;
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+ }
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+ else {
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+ I2C_DISABLE_IT(hperh, I2C_IT_TXTH | I2C_IT_NACK);
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+ ald_i2c_clear_flag_status(hperh, I2C_IT_NACK);
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+ return;
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+ }
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if ((hperh->mode == I2C_MODE_MASTER) || (hperh->mode == I2C_MODE_MEM))
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SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
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@@ -2366,14 +2365,20 @@ static ald_status_t i2c_req_mem_write(i2c_handle_t *hperh, uint16_t dev_addr, ui
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if (i2c_wait_txe_to_timeout(hperh, timeout) != OK)
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return ERROR;
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-
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+
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while(hperh->perh->STAT & (0x1 << 1));
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hperh->perh->TXDATA = I2C_MEM_ADD_LSB(mem_addr);
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}
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- if (i2c_wait_txe_to_timeout(hperh, timeout) != OK)
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+ if (i2c_wait_flag_change_to_timeout(hperh, I2C_STAT_TCR, RESET, timeout) != OK) {
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+ CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
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+ ald_i2c_clear_flag_status(hperh, I2C_IT_TCR);
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return ERROR;
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+ }
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+ CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
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+ ald_i2c_clear_flag_status(hperh, I2C_IT_TCR);
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+
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return OK;
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}
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#ifdef ALD_DMA
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@@ -2415,7 +2420,6 @@ static ald_status_t i2c_req_mem_read(i2c_handle_t *hperh, uint16_t dev_addr, uin
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return TIMEOUT;
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}
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}
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-
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while(hperh->perh->STAT & (0x1 << 1));
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hperh->perh->TXDATA = I2C_MEM_ADD_LSB(mem_addr);
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}
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@@ -2426,6 +2430,7 @@ static ald_status_t i2c_req_mem_read(i2c_handle_t *hperh, uint16_t dev_addr, uin
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if (tim_count > 0xFFFF)
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return TIMEOUT;
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}
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+
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return OK;
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}
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@@ -2546,12 +2551,19 @@ static void i2c_dma_slave_recv_cplt(void *argv)
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* @brief DMA I2C Memory Write process complete callback
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* @param argv: I2C handle
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* @retval None
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- */
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+ */uint32_t ccct = 0;
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static void i2c_dma_mem_send_cplt(void *argv)
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{
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+ uint32_t cnt = 0xFFFFFF;
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+
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i2c_handle_t* hperh = (i2c_handle_t*)argv;
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+ccct++;ccct = ccct;
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+ while (cnt--) {
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+ if ((hperh->perh->STAT & I2C_STAT_TC) != 0)
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+ break;
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+ }
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- if (i2c_wait_flag_change_to_timeout(hperh, I2C_STAT_TC, RESET, I2C_TIMEOUT_FLAG) == ERROR)
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+ if (cnt == 0)
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hperh->error_code |= I2C_ERROR_TIMEOUT;
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SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
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@@ -2579,9 +2591,16 @@ static void i2c_dma_mem_send_cplt(void *argv)
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*/
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static void i2c_dma_mem_recv_cplt(void *argv)
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{
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+ uint32_t cnt = 0xFFFFF;
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+
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i2c_handle_t* hperh = (i2c_handle_t*)argv;
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- if (i2c_wait_flag_change_to_timeout(hperh, I2C_STAT_TC, RESET, I2C_TIMEOUT_FLAG) == OK)
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+ while (cnt--) {
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+ if ((hperh->perh->STAT & I2C_STAT_TC) != 0)
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+ break;
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+ }
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+
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+ if (cnt == 0)
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|
|
hperh->error_code |= I2C_ERROR_TIMEOUT;
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|
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SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
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