[bsp/at32] 1.407/437 uart2 pins change to pd5/pd6. 2.uart and spi drivers suppor… (#6695)

* 1.407/437 uart2 pins change to pd5/pd6. 2.uart and spi drivers support dma

* [bsp/at32] remove #ifndef

bsp/at32/at32f403a-start/.config

@@ -214,19 +214,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
-# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
-# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_MYMQTT is not set
-# CONFIG_PKG_USING_KAWAII_MQTT is not set
-# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_MQTTCLIENT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
 
 #
@@ -246,12 +246,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
-# CONFIG_PKG_USING_CMUX is not set
 # CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
 # CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set
-# CONFIG_PKG_USING_ZB_COORDINATOR is not set
 
 #
 # IoT Cloud
@@ -260,14 +258,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
-# CONFIG_PKG_USING_JOYLINK is not set
-# CONFIG_PKG_USING_EZ_IOT_OS is not set
-# CONFIG_PKG_USING_IOTSHARP_SDK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
-# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
 # CONFIG_PKG_USING_LSSDP is not set
@@ -275,111 +269,40 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_LIBRWS is not set
 # CONFIG_PKG_USING_TCPSERVER is not set
 # CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
 # CONFIG_PKG_USING_QXWZ is not set
 # CONFIG_PKG_USING_SMTP_CLIENT is not set
 # CONFIG_PKG_USING_ABUP_FOTA is not set
 # CONFIG_PKG_USING_LIBCURL2RTT is not set
 # CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
 # CONFIG_PKG_USING_AGILE_TELNET is not set
-# CONFIG_PKG_USING_NMEALIB is not set
-# CONFIG_PKG_USING_PDULIB is not set
-# CONFIG_PKG_USING_BTSTACK is not set
-# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
-# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
-# CONFIG_PKG_USING_MAVLINK is not set
-# CONFIG_PKG_USING_BSAL is not set
-# CONFIG_PKG_USING_AGILE_MODBUS is not set
-# CONFIG_PKG_USING_AGILE_FTP is not set
-# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
-# CONFIG_PKG_USING_RT_LINK_HW is not set
-# CONFIG_PKG_USING_LORA_PKT_FWD is not set
-# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
-# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
-# CONFIG_PKG_USING_HM is not set
-# CONFIG_PKG_USING_SMALL_MODBUS is not set
-# CONFIG_PKG_USING_NET_SERVER is not set
-# CONFIG_PKG_USING_ZFTP is not set
 
 #
 # security packages
 #
 # CONFIG_PKG_USING_MBEDTLS is not set
-# CONFIG_PKG_USING_LIBSODIUM is not set
-# CONFIG_PKG_USING_LIBHYDROGEN is not set
+# CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
-# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
 #
-
-#
-# JSON: JavaScript Object Notation, a lightweight data-interchange format
-#
-# CONFIG_PKG_USING_CJSON is not set
-# CONFIG_PKG_USING_LJSON is not set
-# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
-# CONFIG_PKG_USING_RAPIDJSON is not set
-# CONFIG_PKG_USING_JSMN is not set
-# CONFIG_PKG_USING_AGILE_JSMN is not set
-# CONFIG_PKG_USING_PARSON is not set
-
-#
-# XML: Extensible Markup Language
-#
-# CONFIG_PKG_USING_SIMPLE_XML is not set
-# CONFIG_PKG_USING_EZXML is not set
-# CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
-# CONFIG_PKG_USING_PIKASCRIPT is not set
-# CONFIG_PKG_USING_RTT_RUST is not set
 
 #
 # multimedia packages
 #
-
-#
-# LVGL: powerful and easy-to-use embedded GUI library
-#
-# CONFIG_PKG_USING_LVGL is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
-# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
-# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
-
-#
-# u8g2: a monochrome graphic library
-#
-# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
-# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
 # CONFIG_PKG_USING_WAVPLAYER is not set
 # CONFIG_PKG_USING_TJPGD is not set
-# CONFIG_PKG_USING_PDFGEN is not set
-# CONFIG_PKG_USING_HELIX is not set
-# CONFIG_PKG_USING_AZUREGUIX is not set
-# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
-# CONFIG_PKG_USING_NUEMWIN is not set
-# CONFIG_PKG_USING_MP3PLAYER is not set
-# CONFIG_PKG_USING_TINYJPEG is not set
-# CONFIG_PKG_USING_UGUI is not set
-
-#
-# PainterEngine: A cross-platform graphics application framework written in C language
-#
-# CONFIG_PKG_USING_PAINTERENGINE is not set
-# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
-# CONFIG_PKG_USING_MCURSES is not set
-# CONFIG_PKG_USING_TERMBOX is not set
-# CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_QRCODE is not set
-# CONFIG_PKG_USING_GUIENGINE is not set
-# CONFIG_PKG_USING_PERSIMMON is not set
 
 #
 # tools packages
@@ -388,115 +311,37 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
-# CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
-# CONFIG_PKG_USING_ULOG_FILE is not set
-# CONFIG_PKG_USING_LOGMGR is not set
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
 # CONFIG_PKG_USING_DHRYSTONE is not set
-# CONFIG_PKG_USING_MEMORYPERF is not set
 # CONFIG_PKG_USING_NR_MICRO_SHELL is not set
 # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
 # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
 # CONFIG_PKG_USING_BS8116A is not set
-# CONFIG_PKG_USING_GPS_RMC is not set
-# CONFIG_PKG_USING_URLENCODE is not set
-# CONFIG_PKG_USING_UMCN is not set
-# CONFIG_PKG_USING_LWRB2RTT is not set
-# CONFIG_PKG_USING_CPU_USAGE is not set
-# CONFIG_PKG_USING_GBK2UTF8 is not set
-# CONFIG_PKG_USING_VCONSOLE is not set
-# CONFIG_PKG_USING_KDB is not set
-# CONFIG_PKG_USING_WAMR is not set
-# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
-# CONFIG_PKG_USING_LWLOG is not set
-# CONFIG_PKG_USING_ANV_TRACE is not set
-# CONFIG_PKG_USING_ANV_MEMLEAK is not set
-# CONFIG_PKG_USING_ANV_TESTSUIT is not set
-# CONFIG_PKG_USING_ANV_BENCH is not set
-# CONFIG_PKG_USING_DEVMEM is not set
-# CONFIG_PKG_USING_REGEX is not set
-# CONFIG_PKG_USING_MEM_SANDBOX is not set
-# CONFIG_PKG_USING_SOLAR_TERMS is not set
-# CONFIG_PKG_USING_GAN_ZHI is not set
-# CONFIG_PKG_USING_FDT is not set
-# CONFIG_PKG_USING_CBOX is not set
-# CONFIG_PKG_USING_SNOWFLAKE is not set
-# CONFIG_PKG_USING_HASH_MATCH is not set
-# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
-# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 
 #
 # system packages
 #
-
-#
-# enhanced kernel services
-#
-# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
-# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
-# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
-
-#
-# acceleration: Assembly language or algorithmic acceleration packages
-#
-# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
-# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
-# CONFIG_PKG_USING_QFPLIB_M3 is not set
-
-#
-# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
-#
-# CONFIG_PKG_USING_CMSIS_5 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
-
-#
-# Micrium: Micrium software products porting for RT-Thread
-#
-# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
-# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
-# CONFIG_PKG_USING_UC_CRC is not set
-# CONFIG_PKG_USING_UC_CLK is not set
-# CONFIG_PKG_USING_UC_COMMON is not set
-# CONFIG_PKG_USING_UC_MODBUS is not set
-# CONFIG_PKG_USING_RTDUINO is not set
-# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_PERF_COUNTER is not set
-# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_FAL is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
-# CONFIG_PKG_USING_DFS_JFFS2 is not set
-# CONFIG_PKG_USING_DFS_UFFS is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_THREAD_POOL is not set
 # CONFIG_PKG_USING_ROBOTS is not set
 # CONFIG_PKG_USING_EV is not set
 # CONFIG_PKG_USING_SYSWATCH is not set
-# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
-# CONFIG_PKG_USING_PLCCORE is not set
-# CONFIG_PKG_USING_RAMDISK is not set
-# CONFIG_PKG_USING_MININI is not set
-# CONFIG_PKG_USING_QBOOT is not set
-# CONFIG_PKG_USING_PPOOL is not set
-# CONFIG_PKG_USING_OPENAMP is not set
-# CONFIG_PKG_USING_LPM is not set
-# CONFIG_PKG_USING_TLSF is not set
-# CONFIG_PKG_USING_EVENT_RECORDER is not set
-# CONFIG_PKG_USING_ARM_2D is not set
-# CONFIG_PKG_USING_MCUBOOT is not set
-# CONFIG_PKG_USING_TINYUSB is not set
-# CONFIG_PKG_USING_CHERRYUSB is not set
-# CONFIG_PKG_USING_KMULTI_RTIMER is not set
-# CONFIG_PKG_USING_TFDB is not set
-# CONFIG_PKG_USING_QPC is not set
 
 #
 # peripheral libraries and drivers
@@ -505,29 +350,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
-# CONFIG_PKG_USING_ADT74XX is not set
-# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
-# CONFIG_PKG_USING_ESP_IDF is not set
 # CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
 # CONFIG_PKG_USING_SIGNAL_LED is not set
 # CONFIG_PKG_USING_LEDBLINK is not set
 # CONFIG_PKG_USING_LITTLED is not set
-# CONFIG_PKG_USING_LKDGUI is not set
-# CONFIG_PKG_USING_NRF5X_SDK is not set
-# CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
-
-#
-# Kendryte SDK
-#
-# CONFIG_PKG_USING_K210_SDK is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
-# CONFIG_PKG_USING_MULTI_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
 # CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
@@ -541,185 +376,43 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_RPLIDAR is not set
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
-# CONFIG_PKG_USING_WS2812B is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
-# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
-# CONFIG_PKG_USING_MULTI_RTIMER is not set
-# CONFIG_PKG_USING_MAX7219 is not set
-# CONFIG_PKG_USING_BEEP is not set
-# CONFIG_PKG_USING_EASYBLINK is not set
-# CONFIG_PKG_USING_PMS_SERIES is not set
-# CONFIG_PKG_USING_CAN_YMODEM is not set
-# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
-# CONFIG_PKG_USING_QLED is not set
-# CONFIG_PKG_USING_PAJ7620 is not set
-# CONFIG_PKG_USING_AGILE_CONSOLE is not set
-# CONFIG_PKG_USING_LD3320 is not set
-# CONFIG_PKG_USING_WK2124 is not set
-# CONFIG_PKG_USING_LY68L6400 is not set
-# CONFIG_PKG_USING_DM9051 is not set
-# CONFIG_PKG_USING_SSD1306 is not set
-# CONFIG_PKG_USING_QKEY is not set
-# CONFIG_PKG_USING_RS485 is not set
-# CONFIG_PKG_USING_RS232 is not set
-# CONFIG_PKG_USING_NES is not set
-# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
-# CONFIG_PKG_USING_VDEVICE is not set
-# CONFIG_PKG_USING_SGM706 is not set
-# CONFIG_PKG_USING_STM32WB55_SDK is not set
-# CONFIG_PKG_USING_RDA58XX is not set
-# CONFIG_PKG_USING_LIBNFC is not set
-# CONFIG_PKG_USING_MFOC is not set
-# CONFIG_PKG_USING_TMC51XX is not set
-# CONFIG_PKG_USING_TCA9534 is not set
-# CONFIG_PKG_USING_KOBUKI is not set
-# CONFIG_PKG_USING_ROSSERIAL is not set
-# CONFIG_PKG_USING_MICRO_ROS is not set
-# CONFIG_PKG_USING_MCP23008 is not set
-# CONFIG_PKG_USING_BLUETRUM_SDK is not set
-# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
-# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
-# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
-# CONFIG_PKG_USING_BL_MCU_SDK is not set
-# CONFIG_PKG_USING_SOFT_SERIAL is not set
-# CONFIG_PKG_USING_MB85RS16 is not set
-# CONFIG_PKG_USING_CW2015 is not set
-# CONFIG_PKG_USING_RFM300 is not set
-# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
-# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
-
-#
-# AI packages
-#
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
-# CONFIG_PKG_USING_ELAPACK is not set
-# CONFIG_PKG_USING_ULAPACK is not set
-# CONFIG_PKG_USING_QUEST is not set
-# CONFIG_PKG_USING_NAXOS is not set
 
 #
 # miscellaneous packages
 #
-
-#
-# project laboratory
-#
-
-#
-# samples: kernel and components samples
-#
-# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
-# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
-# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
-# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
-
-#
-# entertainment: terminal games and other interesting software packages
-#
-# CONFIG_PKG_USING_CMATRIX is not set
-# CONFIG_PKG_USING_SL is not set
-# CONFIG_PKG_USING_CAL is not set
-# CONFIG_PKG_USING_ACLOCK is not set
-# CONFIG_PKG_USING_THREES is not set
-# CONFIG_PKG_USING_2048 is not set
-# CONFIG_PKG_USING_SNAKE is not set
-# CONFIG_PKG_USING_TETRIS is not set
-# CONFIG_PKG_USING_DONUT is not set
-# CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
-# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
-# CONFIG_PKG_USING_MINIZIP is not set
-# CONFIG_PKG_USING_HEATSHRINK is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
 # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_UPACKER is not set
 # CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
-# CONFIG_PKG_USING_CRCLIB is not set
-# CONFIG_PKG_USING_LWGPS is not set
-# CONFIG_PKG_USING_STATE_MACHINE is not set
-# CONFIG_PKG_USING_DESIGN_PATTERN is not set
-# CONFIG_PKG_USING_CONTROLLER is not set
-# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
-# CONFIG_PKG_USING_MFBD is not set
-# CONFIG_PKG_USING_SLCAN2RTT is not set
-# CONFIG_PKG_USING_SOEM is not set
-# CONFIG_PKG_USING_QPARAM is not set
-
-#
-# Privated Packages of RealThread
-#
-# CONFIG_PKG_USING_CODEC is not set
-# CONFIG_PKG_USING_PLAYER is not set
-# CONFIG_PKG_USING_MPLAYER is not set
-# CONFIG_PKG_USING_PERSIMMON_SRC is not set
-# CONFIG_PKG_USING_JS_PERSIMMON is not set
-# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
-
-#
-# Network Utilities
-#
-# CONFIG_PKG_USING_WICED is not set
-# CONFIG_PKG_USING_CLOUDSDK is not set
-# CONFIG_PKG_USING_POWER_MANAGER is not set
-# CONFIG_PKG_USING_RT_OTA is not set
-# CONFIG_PKG_USING_RTINSIGHT is not set
-# CONFIG_PKG_USING_SMARTCONFIG is not set
-# CONFIG_PKG_USING_RTX is not set
-# CONFIG_RT_USING_TESTCASE is not set
-# CONFIG_PKG_USING_NGHTTP2 is not set
-# CONFIG_PKG_USING_AVS is not set
-# CONFIG_PKG_USING_ALI_LINKKIT is not set
-# CONFIG_PKG_USING_STS is not set
-# CONFIG_PKG_USING_DLMS is not set
-# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
-# CONFIG_PKG_USING_ZBAR is not set
-# CONFIG_PKG_USING_MCF is not set
-# CONFIG_PKG_USING_URPC is not set
-# CONFIG_PKG_USING_DCM is not set
-# CONFIG_PKG_USING_EMQ is not set
-# CONFIG_PKG_USING_CFGM is not set
-# CONFIG_PKG_USING_RT_CMSIS_DAP is not set
-# CONFIG_PKG_USING_SMODULE is not set
-# CONFIG_PKG_USING_SNFD is not set
-# CONFIG_PKG_USING_UDBD is not set
-# CONFIG_PKG_USING_BENCHMARK is not set
-# CONFIG_PKG_USING_UBJSON is not set
-# CONFIG_PKG_USING_DATATYPE is not set
-# CONFIG_PKG_USING_FASTFS is not set
-# CONFIG_PKG_USING_RIL is not set
-# CONFIG_PKG_USING_WATCH_DCM_SVC is not set
-# CONFIG_PKG_USING_WATCH_APP_FWK is not set
-# CONFIG_PKG_USING_GUI_TEST is not set
-# CONFIG_PKG_USING_PMEM is not set
-# CONFIG_PKG_USING_LWRDP is not set
-# CONFIG_PKG_USING_MASAN is not set
-# CONFIG_PKG_USING_BSDIFF_LIB is not set
-# CONFIG_PKG_USING_PRC_DIFF is not set
-
-#
-# RT-Thread Smart
-#
-# CONFIG_PKG_USING_UKERNEL is not set
-# CONFIG_PKG_USING_TRACE_AGENT is not set
 CONFIG_SOC_FAMILY_AT32=y
 CONFIG_SOC_SERIES_AT32F403A=y
 

bsp/at32/at32f403a-start/board/Kconfig

@@ -54,13 +54,28 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable UART1"
                 default y
 
+            config BSP_UART1_RX_USING_DMA
+                bool "Enable UART1 RX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART2
                 bool "Enable UART2"
                 default n
 
+            config BSP_UART2_RX_USING_DMA
+                bool "Enable UART2 RX DMA"
+                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART3
                 bool "Enable UART3"
                 default n
+
+            config BSP_UART3_RX_USING_DMA
+                bool "Enable UART3 RX DMA"
+                depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_PWM
@@ -119,9 +134,31 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable SPI1 BUS"
                 default n
 
+            config BSP_SPI1_TX_USING_DMA
+                bool "Enable SPI1 TX DMA"
+                depends on BSP_USING_SPI1
+                default n
+
+            config BSP_SPI1_RX_USING_DMA
+                bool "Enable SPI1 RX DMA"
+                depends on BSP_USING_SPI1
+                select BSP_SPI1_TX_USING_DMA
+                default n
+
             config BSP_USING_SPI2
                 bool "Enable SPI2 BUS"
                 default n
+
+            config BSP_SPI2_TX_USING_DMA
+                bool "Enable SPI2 TX DMA"
+                depends on BSP_USING_SPI2
+                default n
+
+            config BSP_SPI2_RX_USING_DMA
+                bool "Enable SPI2 RX DMA"
+                depends on BSP_USING_SPI2
+                select BSP_SPI2_TX_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_I2C

bsp/at32/at32f403a-start/project.ewp

@@ -353,6 +353,7 @@
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -362,7 +363,7 @@
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
@@ -1397,6 +1398,7 @@
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -1406,7 +1408,7 @@
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>

bsp/at32/at32f403a-start/project.uvproj

@@ -359,7 +359,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, AT32F403AVGT7, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F403A_407_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F403A_407_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f403a-start/project.uvprojx

@@ -335,7 +335,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, AT32F403AVGT7, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F403A_407_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F403A_407_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f403a-start/rtconfig.h

@@ -129,67 +129,24 @@
 
 /* language packages */
 
-/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
-
-
-/* XML: Extensible Markup Language */
-
 
 /* multimedia packages */
 
-/* LVGL: powerful and easy-to-use embedded GUI library */
-
-
-/* u8g2: a monochrome graphic library */
-
-
-/* PainterEngine: A cross-platform graphics application framework written in C language */
-
 
 /* tools packages */
 
 
 /* system packages */
 
-/* enhanced kernel services */
-
-
-/* acceleration: Assembly language or algorithmic acceleration packages */
-
-
-/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
-
-
-/* Micrium: Micrium software products porting for RT-Thread */
-
 
 /* peripheral libraries and drivers */
 
 
-/* Kendryte SDK */
-
-
-/* AI packages */
-
-
 /* miscellaneous packages */
 
-/* project laboratory */
 
 /* samples: kernel and components samples */
 
-
-/* entertainment: terminal games and other interesting software packages */
-
-
-/* Privated Packages of RealThread */
-
-
-/* Network Utilities */
-
-
-/* RT-Thread Smart */
-
 #define SOC_FAMILY_AT32
 #define SOC_SERIES_AT32F403A
 

bsp/at32/at32f407-start/.config

@@ -214,19 +214,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
-# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
-# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_MYMQTT is not set
-# CONFIG_PKG_USING_KAWAII_MQTT is not set
-# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_MQTTCLIENT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
 
 #
@@ -246,12 +246,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
-# CONFIG_PKG_USING_CMUX is not set
 # CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
 # CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set
-# CONFIG_PKG_USING_ZB_COORDINATOR is not set
 
 #
 # IoT Cloud
@@ -260,14 +258,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
-# CONFIG_PKG_USING_JOYLINK is not set
-# CONFIG_PKG_USING_EZ_IOT_OS is not set
-# CONFIG_PKG_USING_IOTSHARP_SDK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
-# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
 # CONFIG_PKG_USING_LSSDP is not set
@@ -275,111 +269,40 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_LIBRWS is not set
 # CONFIG_PKG_USING_TCPSERVER is not set
 # CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
 # CONFIG_PKG_USING_QXWZ is not set
 # CONFIG_PKG_USING_SMTP_CLIENT is not set
 # CONFIG_PKG_USING_ABUP_FOTA is not set
 # CONFIG_PKG_USING_LIBCURL2RTT is not set
 # CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
 # CONFIG_PKG_USING_AGILE_TELNET is not set
-# CONFIG_PKG_USING_NMEALIB is not set
-# CONFIG_PKG_USING_PDULIB is not set
-# CONFIG_PKG_USING_BTSTACK is not set
-# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
-# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
-# CONFIG_PKG_USING_MAVLINK is not set
-# CONFIG_PKG_USING_BSAL is not set
-# CONFIG_PKG_USING_AGILE_MODBUS is not set
-# CONFIG_PKG_USING_AGILE_FTP is not set
-# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
-# CONFIG_PKG_USING_RT_LINK_HW is not set
-# CONFIG_PKG_USING_LORA_PKT_FWD is not set
-# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
-# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
-# CONFIG_PKG_USING_HM is not set
-# CONFIG_PKG_USING_SMALL_MODBUS is not set
-# CONFIG_PKG_USING_NET_SERVER is not set
-# CONFIG_PKG_USING_ZFTP is not set
 
 #
 # security packages
 #
 # CONFIG_PKG_USING_MBEDTLS is not set
-# CONFIG_PKG_USING_LIBSODIUM is not set
-# CONFIG_PKG_USING_LIBHYDROGEN is not set
+# CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
-# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
 #
-
-#
-# JSON: JavaScript Object Notation, a lightweight data-interchange format
-#
-# CONFIG_PKG_USING_CJSON is not set
-# CONFIG_PKG_USING_LJSON is not set
-# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
-# CONFIG_PKG_USING_RAPIDJSON is not set
-# CONFIG_PKG_USING_JSMN is not set
-# CONFIG_PKG_USING_AGILE_JSMN is not set
-# CONFIG_PKG_USING_PARSON is not set
-
-#
-# XML: Extensible Markup Language
-#
-# CONFIG_PKG_USING_SIMPLE_XML is not set
-# CONFIG_PKG_USING_EZXML is not set
-# CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
-# CONFIG_PKG_USING_PIKASCRIPT is not set
-# CONFIG_PKG_USING_RTT_RUST is not set
 
 #
 # multimedia packages
 #
-
-#
-# LVGL: powerful and easy-to-use embedded GUI library
-#
-# CONFIG_PKG_USING_LVGL is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
-# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
-# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
-
-#
-# u8g2: a monochrome graphic library
-#
-# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
-# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
 # CONFIG_PKG_USING_WAVPLAYER is not set
 # CONFIG_PKG_USING_TJPGD is not set
-# CONFIG_PKG_USING_PDFGEN is not set
-# CONFIG_PKG_USING_HELIX is not set
-# CONFIG_PKG_USING_AZUREGUIX is not set
-# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
-# CONFIG_PKG_USING_NUEMWIN is not set
-# CONFIG_PKG_USING_MP3PLAYER is not set
-# CONFIG_PKG_USING_TINYJPEG is not set
-# CONFIG_PKG_USING_UGUI is not set
-
-#
-# PainterEngine: A cross-platform graphics application framework written in C language
-#
-# CONFIG_PKG_USING_PAINTERENGINE is not set
-# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
-# CONFIG_PKG_USING_MCURSES is not set
-# CONFIG_PKG_USING_TERMBOX is not set
-# CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_QRCODE is not set
-# CONFIG_PKG_USING_GUIENGINE is not set
-# CONFIG_PKG_USING_PERSIMMON is not set
 
 #
 # tools packages
@@ -388,115 +311,37 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
-# CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
-# CONFIG_PKG_USING_ULOG_FILE is not set
-# CONFIG_PKG_USING_LOGMGR is not set
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
 # CONFIG_PKG_USING_DHRYSTONE is not set
-# CONFIG_PKG_USING_MEMORYPERF is not set
 # CONFIG_PKG_USING_NR_MICRO_SHELL is not set
 # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
 # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
 # CONFIG_PKG_USING_BS8116A is not set
-# CONFIG_PKG_USING_GPS_RMC is not set
-# CONFIG_PKG_USING_URLENCODE is not set
-# CONFIG_PKG_USING_UMCN is not set
-# CONFIG_PKG_USING_LWRB2RTT is not set
-# CONFIG_PKG_USING_CPU_USAGE is not set
-# CONFIG_PKG_USING_GBK2UTF8 is not set
-# CONFIG_PKG_USING_VCONSOLE is not set
-# CONFIG_PKG_USING_KDB is not set
-# CONFIG_PKG_USING_WAMR is not set
-# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
-# CONFIG_PKG_USING_LWLOG is not set
-# CONFIG_PKG_USING_ANV_TRACE is not set
-# CONFIG_PKG_USING_ANV_MEMLEAK is not set
-# CONFIG_PKG_USING_ANV_TESTSUIT is not set
-# CONFIG_PKG_USING_ANV_BENCH is not set
-# CONFIG_PKG_USING_DEVMEM is not set
-# CONFIG_PKG_USING_REGEX is not set
-# CONFIG_PKG_USING_MEM_SANDBOX is not set
-# CONFIG_PKG_USING_SOLAR_TERMS is not set
-# CONFIG_PKG_USING_GAN_ZHI is not set
-# CONFIG_PKG_USING_FDT is not set
-# CONFIG_PKG_USING_CBOX is not set
-# CONFIG_PKG_USING_SNOWFLAKE is not set
-# CONFIG_PKG_USING_HASH_MATCH is not set
-# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
-# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 
 #
 # system packages
 #
-
-#
-# enhanced kernel services
-#
-# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
-# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
-# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
-
-#
-# acceleration: Assembly language or algorithmic acceleration packages
-#
-# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
-# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
-# CONFIG_PKG_USING_QFPLIB_M3 is not set
-
-#
-# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
-#
-# CONFIG_PKG_USING_CMSIS_5 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
-
-#
-# Micrium: Micrium software products porting for RT-Thread
-#
-# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
-# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
-# CONFIG_PKG_USING_UC_CRC is not set
-# CONFIG_PKG_USING_UC_CLK is not set
-# CONFIG_PKG_USING_UC_COMMON is not set
-# CONFIG_PKG_USING_UC_MODBUS is not set
-# CONFIG_PKG_USING_RTDUINO is not set
-# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_PERF_COUNTER is not set
-# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_FAL is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
-# CONFIG_PKG_USING_DFS_JFFS2 is not set
-# CONFIG_PKG_USING_DFS_UFFS is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_THREAD_POOL is not set
 # CONFIG_PKG_USING_ROBOTS is not set
 # CONFIG_PKG_USING_EV is not set
 # CONFIG_PKG_USING_SYSWATCH is not set
-# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
-# CONFIG_PKG_USING_PLCCORE is not set
-# CONFIG_PKG_USING_RAMDISK is not set
-# CONFIG_PKG_USING_MININI is not set
-# CONFIG_PKG_USING_QBOOT is not set
-# CONFIG_PKG_USING_PPOOL is not set
-# CONFIG_PKG_USING_OPENAMP is not set
-# CONFIG_PKG_USING_LPM is not set
-# CONFIG_PKG_USING_TLSF is not set
-# CONFIG_PKG_USING_EVENT_RECORDER is not set
-# CONFIG_PKG_USING_ARM_2D is not set
-# CONFIG_PKG_USING_MCUBOOT is not set
-# CONFIG_PKG_USING_TINYUSB is not set
-# CONFIG_PKG_USING_CHERRYUSB is not set
-# CONFIG_PKG_USING_KMULTI_RTIMER is not set
-# CONFIG_PKG_USING_TFDB is not set
-# CONFIG_PKG_USING_QPC is not set
 
 #
 # peripheral libraries and drivers
@@ -505,29 +350,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
-# CONFIG_PKG_USING_ADT74XX is not set
-# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
-# CONFIG_PKG_USING_ESP_IDF is not set
 # CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
 # CONFIG_PKG_USING_SIGNAL_LED is not set
 # CONFIG_PKG_USING_LEDBLINK is not set
 # CONFIG_PKG_USING_LITTLED is not set
-# CONFIG_PKG_USING_LKDGUI is not set
-# CONFIG_PKG_USING_NRF5X_SDK is not set
-# CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
-
-#
-# Kendryte SDK
-#
-# CONFIG_PKG_USING_K210_SDK is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
-# CONFIG_PKG_USING_MULTI_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
 # CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
@@ -541,185 +376,43 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_RPLIDAR is not set
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
-# CONFIG_PKG_USING_WS2812B is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
-# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
-# CONFIG_PKG_USING_MULTI_RTIMER is not set
-# CONFIG_PKG_USING_MAX7219 is not set
-# CONFIG_PKG_USING_BEEP is not set
-# CONFIG_PKG_USING_EASYBLINK is not set
-# CONFIG_PKG_USING_PMS_SERIES is not set
-# CONFIG_PKG_USING_CAN_YMODEM is not set
-# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
-# CONFIG_PKG_USING_QLED is not set
-# CONFIG_PKG_USING_PAJ7620 is not set
-# CONFIG_PKG_USING_AGILE_CONSOLE is not set
-# CONFIG_PKG_USING_LD3320 is not set
-# CONFIG_PKG_USING_WK2124 is not set
-# CONFIG_PKG_USING_LY68L6400 is not set
-# CONFIG_PKG_USING_DM9051 is not set
-# CONFIG_PKG_USING_SSD1306 is not set
-# CONFIG_PKG_USING_QKEY is not set
-# CONFIG_PKG_USING_RS485 is not set
-# CONFIG_PKG_USING_RS232 is not set
-# CONFIG_PKG_USING_NES is not set
-# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
-# CONFIG_PKG_USING_VDEVICE is not set
-# CONFIG_PKG_USING_SGM706 is not set
-# CONFIG_PKG_USING_STM32WB55_SDK is not set
-# CONFIG_PKG_USING_RDA58XX is not set
-# CONFIG_PKG_USING_LIBNFC is not set
-# CONFIG_PKG_USING_MFOC is not set
-# CONFIG_PKG_USING_TMC51XX is not set
-# CONFIG_PKG_USING_TCA9534 is not set
-# CONFIG_PKG_USING_KOBUKI is not set
-# CONFIG_PKG_USING_ROSSERIAL is not set
-# CONFIG_PKG_USING_MICRO_ROS is not set
-# CONFIG_PKG_USING_MCP23008 is not set
-# CONFIG_PKG_USING_BLUETRUM_SDK is not set
-# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
-# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
-# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
-# CONFIG_PKG_USING_BL_MCU_SDK is not set
-# CONFIG_PKG_USING_SOFT_SERIAL is not set
-# CONFIG_PKG_USING_MB85RS16 is not set
-# CONFIG_PKG_USING_CW2015 is not set
-# CONFIG_PKG_USING_RFM300 is not set
-# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
-# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
-
-#
-# AI packages
-#
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
-# CONFIG_PKG_USING_ELAPACK is not set
-# CONFIG_PKG_USING_ULAPACK is not set
-# CONFIG_PKG_USING_QUEST is not set
-# CONFIG_PKG_USING_NAXOS is not set
 
 #
 # miscellaneous packages
 #
-
-#
-# project laboratory
-#
-
-#
-# samples: kernel and components samples
-#
-# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
-# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
-# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
-# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
-
-#
-# entertainment: terminal games and other interesting software packages
-#
-# CONFIG_PKG_USING_CMATRIX is not set
-# CONFIG_PKG_USING_SL is not set
-# CONFIG_PKG_USING_CAL is not set
-# CONFIG_PKG_USING_ACLOCK is not set
-# CONFIG_PKG_USING_THREES is not set
-# CONFIG_PKG_USING_2048 is not set
-# CONFIG_PKG_USING_SNAKE is not set
-# CONFIG_PKG_USING_TETRIS is not set
-# CONFIG_PKG_USING_DONUT is not set
-# CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
-# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
-# CONFIG_PKG_USING_MINIZIP is not set
-# CONFIG_PKG_USING_HEATSHRINK is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
 # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_UPACKER is not set
 # CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
-# CONFIG_PKG_USING_CRCLIB is not set
-# CONFIG_PKG_USING_LWGPS is not set
-# CONFIG_PKG_USING_STATE_MACHINE is not set
-# CONFIG_PKG_USING_DESIGN_PATTERN is not set
-# CONFIG_PKG_USING_CONTROLLER is not set
-# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
-# CONFIG_PKG_USING_MFBD is not set
-# CONFIG_PKG_USING_SLCAN2RTT is not set
-# CONFIG_PKG_USING_SOEM is not set
-# CONFIG_PKG_USING_QPARAM is not set
-
-#
-# Privated Packages of RealThread
-#
-# CONFIG_PKG_USING_CODEC is not set
-# CONFIG_PKG_USING_PLAYER is not set
-# CONFIG_PKG_USING_MPLAYER is not set
-# CONFIG_PKG_USING_PERSIMMON_SRC is not set
-# CONFIG_PKG_USING_JS_PERSIMMON is not set
-# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
-
-#
-# Network Utilities
-#
-# CONFIG_PKG_USING_WICED is not set
-# CONFIG_PKG_USING_CLOUDSDK is not set
-# CONFIG_PKG_USING_POWER_MANAGER is not set
-# CONFIG_PKG_USING_RT_OTA is not set
-# CONFIG_PKG_USING_RTINSIGHT is not set
-# CONFIG_PKG_USING_SMARTCONFIG is not set
-# CONFIG_PKG_USING_RTX is not set
-# CONFIG_RT_USING_TESTCASE is not set
-# CONFIG_PKG_USING_NGHTTP2 is not set
-# CONFIG_PKG_USING_AVS is not set
-# CONFIG_PKG_USING_ALI_LINKKIT is not set
-# CONFIG_PKG_USING_STS is not set
-# CONFIG_PKG_USING_DLMS is not set
-# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
-# CONFIG_PKG_USING_ZBAR is not set
-# CONFIG_PKG_USING_MCF is not set
-# CONFIG_PKG_USING_URPC is not set
-# CONFIG_PKG_USING_DCM is not set
-# CONFIG_PKG_USING_EMQ is not set
-# CONFIG_PKG_USING_CFGM is not set
-# CONFIG_PKG_USING_RT_CMSIS_DAP is not set
-# CONFIG_PKG_USING_SMODULE is not set
-# CONFIG_PKG_USING_SNFD is not set
-# CONFIG_PKG_USING_UDBD is not set
-# CONFIG_PKG_USING_BENCHMARK is not set
-# CONFIG_PKG_USING_UBJSON is not set
-# CONFIG_PKG_USING_DATATYPE is not set
-# CONFIG_PKG_USING_FASTFS is not set
-# CONFIG_PKG_USING_RIL is not set
-# CONFIG_PKG_USING_WATCH_DCM_SVC is not set
-# CONFIG_PKG_USING_WATCH_APP_FWK is not set
-# CONFIG_PKG_USING_GUI_TEST is not set
-# CONFIG_PKG_USING_PMEM is not set
-# CONFIG_PKG_USING_LWRDP is not set
-# CONFIG_PKG_USING_MASAN is not set
-# CONFIG_PKG_USING_BSDIFF_LIB is not set
-# CONFIG_PKG_USING_PRC_DIFF is not set
-
-#
-# RT-Thread Smart
-#
-# CONFIG_PKG_USING_UKERNEL is not set
-# CONFIG_PKG_USING_TRACE_AGENT is not set
 CONFIG_SOC_FAMILY_AT32=y
 CONFIG_SOC_SERIES_AT32F407=y
 

bsp/at32/at32f407-start/README.md

@@ -61,8 +61,8 @@ AT32F407-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
 | PD15 | LED4              |
 | PA9  | USART1_TX         |
 | PA10 | USART1_RX         |
-| PA2  | USART2_TX         |
-| PA3  | USART2_RX         |
+| PD5  | USART2_TX         |
+| PD6  | USART2_RX         |
 | PB10 | USART3_TX         |
 | PB11 | USART3_RX         |
 | PA4  | SPI1_NSS          |

bsp/at32/at32f407-start/board/Kconfig

@@ -71,13 +71,28 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable UART1"
                 default y
 
+            config BSP_UART1_RX_USING_DMA
+                bool "Enable UART1 RX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART2
                 bool "Enable UART2"
                 default n
 
+            config BSP_UART2_RX_USING_DMA
+                bool "Enable UART2 RX DMA"
+                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART3
                 bool "Enable UART3"
                 default n
+
+            config BSP_UART3_RX_USING_DMA
+                bool "Enable UART3 RX DMA"
+                depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_PWM
@@ -136,9 +151,31 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable SPI1 BUS"
                 default n
 
+            config BSP_SPI1_TX_USING_DMA
+                bool "Enable SPI1 TX DMA"
+                depends on BSP_USING_SPI1
+                default n
+
+            config BSP_SPI1_RX_USING_DMA
+                bool "Enable SPI1 RX DMA"
+                depends on BSP_USING_SPI1
+                select BSP_SPI1_TX_USING_DMA
+                default n
+
             config BSP_USING_SPI2
                 bool "Enable SPI2 BUS"
                 default n
+
+            config BSP_SPI2_TX_USING_DMA
+                bool "Enable SPI2 TX DMA"
+                depends on BSP_USING_SPI2
+                default n
+
+            config BSP_SPI2_RX_USING_DMA
+                bool "Enable SPI2 RX DMA"
+                depends on BSP_USING_SPI2
+                select BSP_SPI2_TX_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_I2C

bsp/at32/at32f407-start/board/src/at32_msp.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2022-03-08     shelton      first version
+ * 2022-12-05     shelton      uart2 pins change to pd5/pd6
  */
 
 #include <rtthread.h>
@@ -41,17 +42,18 @@ void at32_msp_usart_init(void *instance)
     if(USART2 == usart_x)
     {
         crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
-        crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
+        crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
 
         gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
         gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
         gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
-        gpio_init_struct.gpio_pins = GPIO_PINS_2;
-        gpio_init(GPIOA, &gpio_init_struct);
+        gpio_init_struct.gpio_pins = GPIO_PINS_5;
+        gpio_init(GPIOD, &gpio_init_struct);
 
         gpio_init_struct.gpio_mode = GPIO_MODE_INPUT;
-        gpio_init_struct.gpio_pins = GPIO_PINS_3;
-        gpio_init(GPIOA, &gpio_init_struct);
+        gpio_init_struct.gpio_pins = GPIO_PINS_6;
+        gpio_init(GPIOD, &gpio_init_struct);
+        gpio_pin_remap_config(USART2_MUX, TRUE);
     }
 #endif
 #ifdef BSP_USING_UART3

bsp/at32/at32f407-start/project.ewp

@@ -353,6 +353,7 @@
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -362,7 +363,7 @@
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
@@ -1397,6 +1398,7 @@
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -1406,7 +1408,7 @@
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>

bsp/at32/at32f407-start/project.uvproj

@@ -359,7 +359,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, AT32F407VGT7, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F403A_407_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F403A_407_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f407-start/project.uvprojx

@@ -335,7 +335,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, AT32F407VGT7, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F403A_407_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F403A_407_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F403A_407_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f407-start/rtconfig.h

@@ -129,67 +129,24 @@
 
 /* language packages */
 
-/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
-
-
-/* XML: Extensible Markup Language */
-
 
 /* multimedia packages */
 
-/* LVGL: powerful and easy-to-use embedded GUI library */
-
-
-/* u8g2: a monochrome graphic library */
-
-
-/* PainterEngine: A cross-platform graphics application framework written in C language */
-
 
 /* tools packages */
 
 
 /* system packages */
 
-/* enhanced kernel services */
-
-
-/* acceleration: Assembly language or algorithmic acceleration packages */
-
-
-/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
-
-
-/* Micrium: Micrium software products porting for RT-Thread */
-
 
 /* peripheral libraries and drivers */
 
 
-/* Kendryte SDK */
-
-
-/* AI packages */
-
-
 /* miscellaneous packages */
 
-/* project laboratory */
 
 /* samples: kernel and components samples */
 
-
-/* entertainment: terminal games and other interesting software packages */
-
-
-/* Privated Packages of RealThread */
-
-
-/* Network Utilities */
-
-
-/* RT-Thread Smart */
-
 #define SOC_FAMILY_AT32
 #define SOC_SERIES_AT32F407
 

bsp/at32/at32f413-start/.config

@@ -214,19 +214,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
-# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
-# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_MYMQTT is not set
-# CONFIG_PKG_USING_KAWAII_MQTT is not set
-# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_MQTTCLIENT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
 
 #
@@ -246,12 +246,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
-# CONFIG_PKG_USING_CMUX is not set
 # CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
 # CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set
-# CONFIG_PKG_USING_ZB_COORDINATOR is not set
 
 #
 # IoT Cloud
@@ -260,14 +258,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
-# CONFIG_PKG_USING_JOYLINK is not set
-# CONFIG_PKG_USING_EZ_IOT_OS is not set
-# CONFIG_PKG_USING_IOTSHARP_SDK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
-# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
 # CONFIG_PKG_USING_LSSDP is not set
@@ -275,111 +269,40 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_LIBRWS is not set
 # CONFIG_PKG_USING_TCPSERVER is not set
 # CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
 # CONFIG_PKG_USING_QXWZ is not set
 # CONFIG_PKG_USING_SMTP_CLIENT is not set
 # CONFIG_PKG_USING_ABUP_FOTA is not set
 # CONFIG_PKG_USING_LIBCURL2RTT is not set
 # CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
 # CONFIG_PKG_USING_AGILE_TELNET is not set
-# CONFIG_PKG_USING_NMEALIB is not set
-# CONFIG_PKG_USING_PDULIB is not set
-# CONFIG_PKG_USING_BTSTACK is not set
-# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
-# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
-# CONFIG_PKG_USING_MAVLINK is not set
-# CONFIG_PKG_USING_BSAL is not set
-# CONFIG_PKG_USING_AGILE_MODBUS is not set
-# CONFIG_PKG_USING_AGILE_FTP is not set
-# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
-# CONFIG_PKG_USING_RT_LINK_HW is not set
-# CONFIG_PKG_USING_LORA_PKT_FWD is not set
-# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
-# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
-# CONFIG_PKG_USING_HM is not set
-# CONFIG_PKG_USING_SMALL_MODBUS is not set
-# CONFIG_PKG_USING_NET_SERVER is not set
-# CONFIG_PKG_USING_ZFTP is not set
 
 #
 # security packages
 #
 # CONFIG_PKG_USING_MBEDTLS is not set
-# CONFIG_PKG_USING_LIBSODIUM is not set
-# CONFIG_PKG_USING_LIBHYDROGEN is not set
+# CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
-# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
 #
-
-#
-# JSON: JavaScript Object Notation, a lightweight data-interchange format
-#
-# CONFIG_PKG_USING_CJSON is not set
-# CONFIG_PKG_USING_LJSON is not set
-# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
-# CONFIG_PKG_USING_RAPIDJSON is not set
-# CONFIG_PKG_USING_JSMN is not set
-# CONFIG_PKG_USING_AGILE_JSMN is not set
-# CONFIG_PKG_USING_PARSON is not set
-
-#
-# XML: Extensible Markup Language
-#
-# CONFIG_PKG_USING_SIMPLE_XML is not set
-# CONFIG_PKG_USING_EZXML is not set
-# CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
-# CONFIG_PKG_USING_PIKASCRIPT is not set
-# CONFIG_PKG_USING_RTT_RUST is not set
 
 #
 # multimedia packages
 #
-
-#
-# LVGL: powerful and easy-to-use embedded GUI library
-#
-# CONFIG_PKG_USING_LVGL is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
-# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
-# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
-
-#
-# u8g2: a monochrome graphic library
-#
-# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
-# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
 # CONFIG_PKG_USING_WAVPLAYER is not set
 # CONFIG_PKG_USING_TJPGD is not set
-# CONFIG_PKG_USING_PDFGEN is not set
-# CONFIG_PKG_USING_HELIX is not set
-# CONFIG_PKG_USING_AZUREGUIX is not set
-# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
-# CONFIG_PKG_USING_NUEMWIN is not set
-# CONFIG_PKG_USING_MP3PLAYER is not set
-# CONFIG_PKG_USING_TINYJPEG is not set
-# CONFIG_PKG_USING_UGUI is not set
-
-#
-# PainterEngine: A cross-platform graphics application framework written in C language
-#
-# CONFIG_PKG_USING_PAINTERENGINE is not set
-# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
-# CONFIG_PKG_USING_MCURSES is not set
-# CONFIG_PKG_USING_TERMBOX is not set
-# CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_QRCODE is not set
-# CONFIG_PKG_USING_GUIENGINE is not set
-# CONFIG_PKG_USING_PERSIMMON is not set
 
 #
 # tools packages
@@ -388,115 +311,37 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
-# CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
-# CONFIG_PKG_USING_ULOG_FILE is not set
-# CONFIG_PKG_USING_LOGMGR is not set
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
 # CONFIG_PKG_USING_DHRYSTONE is not set
-# CONFIG_PKG_USING_MEMORYPERF is not set
 # CONFIG_PKG_USING_NR_MICRO_SHELL is not set
 # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
 # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
 # CONFIG_PKG_USING_BS8116A is not set
-# CONFIG_PKG_USING_GPS_RMC is not set
-# CONFIG_PKG_USING_URLENCODE is not set
-# CONFIG_PKG_USING_UMCN is not set
-# CONFIG_PKG_USING_LWRB2RTT is not set
-# CONFIG_PKG_USING_CPU_USAGE is not set
-# CONFIG_PKG_USING_GBK2UTF8 is not set
-# CONFIG_PKG_USING_VCONSOLE is not set
-# CONFIG_PKG_USING_KDB is not set
-# CONFIG_PKG_USING_WAMR is not set
-# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
-# CONFIG_PKG_USING_LWLOG is not set
-# CONFIG_PKG_USING_ANV_TRACE is not set
-# CONFIG_PKG_USING_ANV_MEMLEAK is not set
-# CONFIG_PKG_USING_ANV_TESTSUIT is not set
-# CONFIG_PKG_USING_ANV_BENCH is not set
-# CONFIG_PKG_USING_DEVMEM is not set
-# CONFIG_PKG_USING_REGEX is not set
-# CONFIG_PKG_USING_MEM_SANDBOX is not set
-# CONFIG_PKG_USING_SOLAR_TERMS is not set
-# CONFIG_PKG_USING_GAN_ZHI is not set
-# CONFIG_PKG_USING_FDT is not set
-# CONFIG_PKG_USING_CBOX is not set
-# CONFIG_PKG_USING_SNOWFLAKE is not set
-# CONFIG_PKG_USING_HASH_MATCH is not set
-# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
-# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 
 #
 # system packages
 #
-
-#
-# enhanced kernel services
-#
-# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
-# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
-# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
-
-#
-# acceleration: Assembly language or algorithmic acceleration packages
-#
-# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
-# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
-# CONFIG_PKG_USING_QFPLIB_M3 is not set
-
-#
-# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
-#
-# CONFIG_PKG_USING_CMSIS_5 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
-
-#
-# Micrium: Micrium software products porting for RT-Thread
-#
-# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
-# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
-# CONFIG_PKG_USING_UC_CRC is not set
-# CONFIG_PKG_USING_UC_CLK is not set
-# CONFIG_PKG_USING_UC_COMMON is not set
-# CONFIG_PKG_USING_UC_MODBUS is not set
-# CONFIG_PKG_USING_RTDUINO is not set
-# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_PERF_COUNTER is not set
-# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_FAL is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
-# CONFIG_PKG_USING_DFS_JFFS2 is not set
-# CONFIG_PKG_USING_DFS_UFFS is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_THREAD_POOL is not set
 # CONFIG_PKG_USING_ROBOTS is not set
 # CONFIG_PKG_USING_EV is not set
 # CONFIG_PKG_USING_SYSWATCH is not set
-# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
-# CONFIG_PKG_USING_PLCCORE is not set
-# CONFIG_PKG_USING_RAMDISK is not set
-# CONFIG_PKG_USING_MININI is not set
-# CONFIG_PKG_USING_QBOOT is not set
-# CONFIG_PKG_USING_PPOOL is not set
-# CONFIG_PKG_USING_OPENAMP is not set
-# CONFIG_PKG_USING_LPM is not set
-# CONFIG_PKG_USING_TLSF is not set
-# CONFIG_PKG_USING_EVENT_RECORDER is not set
-# CONFIG_PKG_USING_ARM_2D is not set
-# CONFIG_PKG_USING_MCUBOOT is not set
-# CONFIG_PKG_USING_TINYUSB is not set
-# CONFIG_PKG_USING_CHERRYUSB is not set
-# CONFIG_PKG_USING_KMULTI_RTIMER is not set
-# CONFIG_PKG_USING_TFDB is not set
-# CONFIG_PKG_USING_QPC is not set
 
 #
 # peripheral libraries and drivers
@@ -505,29 +350,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
-# CONFIG_PKG_USING_ADT74XX is not set
-# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
-# CONFIG_PKG_USING_ESP_IDF is not set
 # CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
 # CONFIG_PKG_USING_SIGNAL_LED is not set
 # CONFIG_PKG_USING_LEDBLINK is not set
 # CONFIG_PKG_USING_LITTLED is not set
-# CONFIG_PKG_USING_LKDGUI is not set
-# CONFIG_PKG_USING_NRF5X_SDK is not set
-# CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
-
-#
-# Kendryte SDK
-#
-# CONFIG_PKG_USING_K210_SDK is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
-# CONFIG_PKG_USING_MULTI_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
 # CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
@@ -541,185 +376,43 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_RPLIDAR is not set
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
-# CONFIG_PKG_USING_WS2812B is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
-# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
-# CONFIG_PKG_USING_MULTI_RTIMER is not set
-# CONFIG_PKG_USING_MAX7219 is not set
-# CONFIG_PKG_USING_BEEP is not set
-# CONFIG_PKG_USING_EASYBLINK is not set
-# CONFIG_PKG_USING_PMS_SERIES is not set
-# CONFIG_PKG_USING_CAN_YMODEM is not set
-# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
-# CONFIG_PKG_USING_QLED is not set
-# CONFIG_PKG_USING_PAJ7620 is not set
-# CONFIG_PKG_USING_AGILE_CONSOLE is not set
-# CONFIG_PKG_USING_LD3320 is not set
-# CONFIG_PKG_USING_WK2124 is not set
-# CONFIG_PKG_USING_LY68L6400 is not set
-# CONFIG_PKG_USING_DM9051 is not set
-# CONFIG_PKG_USING_SSD1306 is not set
-# CONFIG_PKG_USING_QKEY is not set
-# CONFIG_PKG_USING_RS485 is not set
-# CONFIG_PKG_USING_RS232 is not set
-# CONFIG_PKG_USING_NES is not set
-# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
-# CONFIG_PKG_USING_VDEVICE is not set
-# CONFIG_PKG_USING_SGM706 is not set
-# CONFIG_PKG_USING_STM32WB55_SDK is not set
-# CONFIG_PKG_USING_RDA58XX is not set
-# CONFIG_PKG_USING_LIBNFC is not set
-# CONFIG_PKG_USING_MFOC is not set
-# CONFIG_PKG_USING_TMC51XX is not set
-# CONFIG_PKG_USING_TCA9534 is not set
-# CONFIG_PKG_USING_KOBUKI is not set
-# CONFIG_PKG_USING_ROSSERIAL is not set
-# CONFIG_PKG_USING_MICRO_ROS is not set
-# CONFIG_PKG_USING_MCP23008 is not set
-# CONFIG_PKG_USING_BLUETRUM_SDK is not set
-# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
-# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
-# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
-# CONFIG_PKG_USING_BL_MCU_SDK is not set
-# CONFIG_PKG_USING_SOFT_SERIAL is not set
-# CONFIG_PKG_USING_MB85RS16 is not set
-# CONFIG_PKG_USING_CW2015 is not set
-# CONFIG_PKG_USING_RFM300 is not set
-# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
-# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
-
-#
-# AI packages
-#
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
-# CONFIG_PKG_USING_ELAPACK is not set
-# CONFIG_PKG_USING_ULAPACK is not set
-# CONFIG_PKG_USING_QUEST is not set
-# CONFIG_PKG_USING_NAXOS is not set
 
 #
 # miscellaneous packages
 #
-
-#
-# project laboratory
-#
-
-#
-# samples: kernel and components samples
-#
-# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
-# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
-# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
-# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
-
-#
-# entertainment: terminal games and other interesting software packages
-#
-# CONFIG_PKG_USING_CMATRIX is not set
-# CONFIG_PKG_USING_SL is not set
-# CONFIG_PKG_USING_CAL is not set
-# CONFIG_PKG_USING_ACLOCK is not set
-# CONFIG_PKG_USING_THREES is not set
-# CONFIG_PKG_USING_2048 is not set
-# CONFIG_PKG_USING_SNAKE is not set
-# CONFIG_PKG_USING_TETRIS is not set
-# CONFIG_PKG_USING_DONUT is not set
-# CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
-# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
-# CONFIG_PKG_USING_MINIZIP is not set
-# CONFIG_PKG_USING_HEATSHRINK is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
 # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_UPACKER is not set
 # CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
-# CONFIG_PKG_USING_CRCLIB is not set
-# CONFIG_PKG_USING_LWGPS is not set
-# CONFIG_PKG_USING_STATE_MACHINE is not set
-# CONFIG_PKG_USING_DESIGN_PATTERN is not set
-# CONFIG_PKG_USING_CONTROLLER is not set
-# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
-# CONFIG_PKG_USING_MFBD is not set
-# CONFIG_PKG_USING_SLCAN2RTT is not set
-# CONFIG_PKG_USING_SOEM is not set
-# CONFIG_PKG_USING_QPARAM is not set
-
-#
-# Privated Packages of RealThread
-#
-# CONFIG_PKG_USING_CODEC is not set
-# CONFIG_PKG_USING_PLAYER is not set
-# CONFIG_PKG_USING_MPLAYER is not set
-# CONFIG_PKG_USING_PERSIMMON_SRC is not set
-# CONFIG_PKG_USING_JS_PERSIMMON is not set
-# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
-
-#
-# Network Utilities
-#
-# CONFIG_PKG_USING_WICED is not set
-# CONFIG_PKG_USING_CLOUDSDK is not set
-# CONFIG_PKG_USING_POWER_MANAGER is not set
-# CONFIG_PKG_USING_RT_OTA is not set
-# CONFIG_PKG_USING_RTINSIGHT is not set
-# CONFIG_PKG_USING_SMARTCONFIG is not set
-# CONFIG_PKG_USING_RTX is not set
-# CONFIG_RT_USING_TESTCASE is not set
-# CONFIG_PKG_USING_NGHTTP2 is not set
-# CONFIG_PKG_USING_AVS is not set
-# CONFIG_PKG_USING_ALI_LINKKIT is not set
-# CONFIG_PKG_USING_STS is not set
-# CONFIG_PKG_USING_DLMS is not set
-# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
-# CONFIG_PKG_USING_ZBAR is not set
-# CONFIG_PKG_USING_MCF is not set
-# CONFIG_PKG_USING_URPC is not set
-# CONFIG_PKG_USING_DCM is not set
-# CONFIG_PKG_USING_EMQ is not set
-# CONFIG_PKG_USING_CFGM is not set
-# CONFIG_PKG_USING_RT_CMSIS_DAP is not set
-# CONFIG_PKG_USING_SMODULE is not set
-# CONFIG_PKG_USING_SNFD is not set
-# CONFIG_PKG_USING_UDBD is not set
-# CONFIG_PKG_USING_BENCHMARK is not set
-# CONFIG_PKG_USING_UBJSON is not set
-# CONFIG_PKG_USING_DATATYPE is not set
-# CONFIG_PKG_USING_FASTFS is not set
-# CONFIG_PKG_USING_RIL is not set
-# CONFIG_PKG_USING_WATCH_DCM_SVC is not set
-# CONFIG_PKG_USING_WATCH_APP_FWK is not set
-# CONFIG_PKG_USING_GUI_TEST is not set
-# CONFIG_PKG_USING_PMEM is not set
-# CONFIG_PKG_USING_LWRDP is not set
-# CONFIG_PKG_USING_MASAN is not set
-# CONFIG_PKG_USING_BSDIFF_LIB is not set
-# CONFIG_PKG_USING_PRC_DIFF is not set
-
-#
-# RT-Thread Smart
-#
-# CONFIG_PKG_USING_UKERNEL is not set
-# CONFIG_PKG_USING_TRACE_AGENT is not set
 CONFIG_SOC_FAMILY_AT32=y
 CONFIG_SOC_SERIES_AT32F413=y
 

bsp/at32/at32f413-start/board/Kconfig

@@ -54,13 +54,28 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable UART1"
                 default y
 
+            config BSP_UART1_RX_USING_DMA
+                bool "Enable UART1 RX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART2
                 bool "Enable UART2"
                 default n
 
+            config BSP_UART2_RX_USING_DMA
+                bool "Enable UART2 RX DMA"
+                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART3
                 bool "Enable UART3"
                 default n
+
+            config BSP_UART3_RX_USING_DMA
+                bool "Enable UART3 RX DMA"
+                depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_PWM
@@ -119,9 +134,31 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable SPI1 BUS"
                 default n
 
+            config BSP_SPI1_TX_USING_DMA
+                bool "Enable SPI1 TX DMA"
+                depends on BSP_USING_SPI1
+                default n
+
+            config BSP_SPI1_RX_USING_DMA
+                bool "Enable SPI1 RX DMA"
+                depends on BSP_USING_SPI1
+                select BSP_SPI1_TX_USING_DMA
+                default n
+
             config BSP_USING_SPI2
                 bool "Enable SPI2 BUS"
                 default n
+
+            config BSP_SPI2_TX_USING_DMA
+                bool "Enable SPI2 TX DMA"
+                depends on BSP_USING_SPI2
+                default n
+
+            config BSP_SPI2_RX_USING_DMA
+                bool "Enable SPI2 RX DMA"
+                depends on BSP_USING_SPI2
+                select BSP_SPI2_TX_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_I2C

bsp/at32/at32f413-start/project.ewp

@@ -352,6 +352,7 @@
           <name>CCIncludePath2</name>
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -363,7 +364,7 @@
           <state>$PROJ_DIR$\..\libraries\AT32F413_Firmware_Library\drivers\inc</state>
           <state>$PROJ_DIR$\applications</state>
           <state>$PROJ_DIR$\..\libraries\AT32F413_Firmware_Library\cmsis\cm4\device_support</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\libraries\AT32F413_Firmware_Library\cmsis\cm4\core_support</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>
@@ -1396,6 +1397,7 @@
           <name>CCIncludePath2</name>
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -1407,7 +1409,7 @@
           <state>$PROJ_DIR$\..\libraries\AT32F413_Firmware_Library\drivers\inc</state>
           <state>$PROJ_DIR$\applications</state>
           <state>$PROJ_DIR$\..\libraries\AT32F413_Firmware_Library\cmsis\cm4\device_support</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\libraries\AT32F413_Firmware_Library\cmsis\cm4\core_support</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\include</state>

bsp/at32/at32f413-start/project.uvproj

@@ -359,7 +359,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, AT32F413RCT7, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F413_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F413_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F413_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F413_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F413_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F413_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f413-start/project.uvprojx

@@ -335,7 +335,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, AT32F413RCT7, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F413_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F413_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F413_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F413_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F413_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F413_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f413-start/rtconfig.h

@@ -129,67 +129,24 @@
 
 /* language packages */
 
-/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
-
-
-/* XML: Extensible Markup Language */
-
 
 /* multimedia packages */
 
-/* LVGL: powerful and easy-to-use embedded GUI library */
-
-
-/* u8g2: a monochrome graphic library */
-
-
-/* PainterEngine: A cross-platform graphics application framework written in C language */
-
 
 /* tools packages */
 
 
 /* system packages */
 
-/* enhanced kernel services */
-
-
-/* acceleration: Assembly language or algorithmic acceleration packages */
-
-
-/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
-
-
-/* Micrium: Micrium software products porting for RT-Thread */
-
 
 /* peripheral libraries and drivers */
 
 
-/* Kendryte SDK */
-
-
-/* AI packages */
-
-
 /* miscellaneous packages */
 
-/* project laboratory */
 
 /* samples: kernel and components samples */
 
-
-/* entertainment: terminal games and other interesting software packages */
-
-
-/* Privated Packages of RealThread */
-
-
-/* Network Utilities */
-
-
-/* RT-Thread Smart */
-
 #define SOC_FAMILY_AT32
 #define SOC_SERIES_AT32F413
 

bsp/at32/at32f415-start/.config

@@ -214,19 +214,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
-# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
-# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_MYMQTT is not set
-# CONFIG_PKG_USING_KAWAII_MQTT is not set
-# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_MQTTCLIENT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
 
 #
@@ -246,12 +246,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
-# CONFIG_PKG_USING_CMUX is not set
 # CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
 # CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set
-# CONFIG_PKG_USING_ZB_COORDINATOR is not set
 
 #
 # IoT Cloud
@@ -260,14 +258,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
-# CONFIG_PKG_USING_JOYLINK is not set
-# CONFIG_PKG_USING_EZ_IOT_OS is not set
-# CONFIG_PKG_USING_IOTSHARP_SDK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
-# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
 # CONFIG_PKG_USING_LSSDP is not set
@@ -275,111 +269,40 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_LIBRWS is not set
 # CONFIG_PKG_USING_TCPSERVER is not set
 # CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
 # CONFIG_PKG_USING_QXWZ is not set
 # CONFIG_PKG_USING_SMTP_CLIENT is not set
 # CONFIG_PKG_USING_ABUP_FOTA is not set
 # CONFIG_PKG_USING_LIBCURL2RTT is not set
 # CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
 # CONFIG_PKG_USING_AGILE_TELNET is not set
-# CONFIG_PKG_USING_NMEALIB is not set
-# CONFIG_PKG_USING_PDULIB is not set
-# CONFIG_PKG_USING_BTSTACK is not set
-# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
-# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
-# CONFIG_PKG_USING_MAVLINK is not set
-# CONFIG_PKG_USING_BSAL is not set
-# CONFIG_PKG_USING_AGILE_MODBUS is not set
-# CONFIG_PKG_USING_AGILE_FTP is not set
-# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
-# CONFIG_PKG_USING_RT_LINK_HW is not set
-# CONFIG_PKG_USING_LORA_PKT_FWD is not set
-# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
-# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
-# CONFIG_PKG_USING_HM is not set
-# CONFIG_PKG_USING_SMALL_MODBUS is not set
-# CONFIG_PKG_USING_NET_SERVER is not set
-# CONFIG_PKG_USING_ZFTP is not set
 
 #
 # security packages
 #
 # CONFIG_PKG_USING_MBEDTLS is not set
-# CONFIG_PKG_USING_LIBSODIUM is not set
-# CONFIG_PKG_USING_LIBHYDROGEN is not set
+# CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
-# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
 #
-
-#
-# JSON: JavaScript Object Notation, a lightweight data-interchange format
-#
-# CONFIG_PKG_USING_CJSON is not set
-# CONFIG_PKG_USING_LJSON is not set
-# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
-# CONFIG_PKG_USING_RAPIDJSON is not set
-# CONFIG_PKG_USING_JSMN is not set
-# CONFIG_PKG_USING_AGILE_JSMN is not set
-# CONFIG_PKG_USING_PARSON is not set
-
-#
-# XML: Extensible Markup Language
-#
-# CONFIG_PKG_USING_SIMPLE_XML is not set
-# CONFIG_PKG_USING_EZXML is not set
-# CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
-# CONFIG_PKG_USING_PIKASCRIPT is not set
-# CONFIG_PKG_USING_RTT_RUST is not set
 
 #
 # multimedia packages
 #
-
-#
-# LVGL: powerful and easy-to-use embedded GUI library
-#
-# CONFIG_PKG_USING_LVGL is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
-# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
-# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
-
-#
-# u8g2: a monochrome graphic library
-#
-# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
-# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
 # CONFIG_PKG_USING_WAVPLAYER is not set
 # CONFIG_PKG_USING_TJPGD is not set
-# CONFIG_PKG_USING_PDFGEN is not set
-# CONFIG_PKG_USING_HELIX is not set
-# CONFIG_PKG_USING_AZUREGUIX is not set
-# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
-# CONFIG_PKG_USING_NUEMWIN is not set
-# CONFIG_PKG_USING_MP3PLAYER is not set
-# CONFIG_PKG_USING_TINYJPEG is not set
-# CONFIG_PKG_USING_UGUI is not set
-
-#
-# PainterEngine: A cross-platform graphics application framework written in C language
-#
-# CONFIG_PKG_USING_PAINTERENGINE is not set
-# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
-# CONFIG_PKG_USING_MCURSES is not set
-# CONFIG_PKG_USING_TERMBOX is not set
-# CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_QRCODE is not set
-# CONFIG_PKG_USING_GUIENGINE is not set
-# CONFIG_PKG_USING_PERSIMMON is not set
 
 #
 # tools packages
@@ -388,115 +311,37 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
-# CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
-# CONFIG_PKG_USING_ULOG_FILE is not set
-# CONFIG_PKG_USING_LOGMGR is not set
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
 # CONFIG_PKG_USING_DHRYSTONE is not set
-# CONFIG_PKG_USING_MEMORYPERF is not set
 # CONFIG_PKG_USING_NR_MICRO_SHELL is not set
 # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
 # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
 # CONFIG_PKG_USING_BS8116A is not set
-# CONFIG_PKG_USING_GPS_RMC is not set
-# CONFIG_PKG_USING_URLENCODE is not set
-# CONFIG_PKG_USING_UMCN is not set
-# CONFIG_PKG_USING_LWRB2RTT is not set
-# CONFIG_PKG_USING_CPU_USAGE is not set
-# CONFIG_PKG_USING_GBK2UTF8 is not set
-# CONFIG_PKG_USING_VCONSOLE is not set
-# CONFIG_PKG_USING_KDB is not set
-# CONFIG_PKG_USING_WAMR is not set
-# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
-# CONFIG_PKG_USING_LWLOG is not set
-# CONFIG_PKG_USING_ANV_TRACE is not set
-# CONFIG_PKG_USING_ANV_MEMLEAK is not set
-# CONFIG_PKG_USING_ANV_TESTSUIT is not set
-# CONFIG_PKG_USING_ANV_BENCH is not set
-# CONFIG_PKG_USING_DEVMEM is not set
-# CONFIG_PKG_USING_REGEX is not set
-# CONFIG_PKG_USING_MEM_SANDBOX is not set
-# CONFIG_PKG_USING_SOLAR_TERMS is not set
-# CONFIG_PKG_USING_GAN_ZHI is not set
-# CONFIG_PKG_USING_FDT is not set
-# CONFIG_PKG_USING_CBOX is not set
-# CONFIG_PKG_USING_SNOWFLAKE is not set
-# CONFIG_PKG_USING_HASH_MATCH is not set
-# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
-# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 
 #
 # system packages
 #
-
-#
-# enhanced kernel services
-#
-# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
-# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
-# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
-
-#
-# acceleration: Assembly language or algorithmic acceleration packages
-#
-# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
-# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
-# CONFIG_PKG_USING_QFPLIB_M3 is not set
-
-#
-# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
-#
-# CONFIG_PKG_USING_CMSIS_5 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
-
-#
-# Micrium: Micrium software products porting for RT-Thread
-#
-# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
-# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
-# CONFIG_PKG_USING_UC_CRC is not set
-# CONFIG_PKG_USING_UC_CLK is not set
-# CONFIG_PKG_USING_UC_COMMON is not set
-# CONFIG_PKG_USING_UC_MODBUS is not set
-# CONFIG_PKG_USING_RTDUINO is not set
-# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_PERF_COUNTER is not set
-# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_FAL is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
-# CONFIG_PKG_USING_DFS_JFFS2 is not set
-# CONFIG_PKG_USING_DFS_UFFS is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_THREAD_POOL is not set
 # CONFIG_PKG_USING_ROBOTS is not set
 # CONFIG_PKG_USING_EV is not set
 # CONFIG_PKG_USING_SYSWATCH is not set
-# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
-# CONFIG_PKG_USING_PLCCORE is not set
-# CONFIG_PKG_USING_RAMDISK is not set
-# CONFIG_PKG_USING_MININI is not set
-# CONFIG_PKG_USING_QBOOT is not set
-# CONFIG_PKG_USING_PPOOL is not set
-# CONFIG_PKG_USING_OPENAMP is not set
-# CONFIG_PKG_USING_LPM is not set
-# CONFIG_PKG_USING_TLSF is not set
-# CONFIG_PKG_USING_EVENT_RECORDER is not set
-# CONFIG_PKG_USING_ARM_2D is not set
-# CONFIG_PKG_USING_MCUBOOT is not set
-# CONFIG_PKG_USING_TINYUSB is not set
-# CONFIG_PKG_USING_CHERRYUSB is not set
-# CONFIG_PKG_USING_KMULTI_RTIMER is not set
-# CONFIG_PKG_USING_TFDB is not set
-# CONFIG_PKG_USING_QPC is not set
 
 #
 # peripheral libraries and drivers
@@ -505,29 +350,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
-# CONFIG_PKG_USING_ADT74XX is not set
-# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
-# CONFIG_PKG_USING_ESP_IDF is not set
 # CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
 # CONFIG_PKG_USING_SIGNAL_LED is not set
 # CONFIG_PKG_USING_LEDBLINK is not set
 # CONFIG_PKG_USING_LITTLED is not set
-# CONFIG_PKG_USING_LKDGUI is not set
-# CONFIG_PKG_USING_NRF5X_SDK is not set
-# CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
-
-#
-# Kendryte SDK
-#
-# CONFIG_PKG_USING_K210_SDK is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
-# CONFIG_PKG_USING_MULTI_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
 # CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
@@ -541,185 +376,43 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_RPLIDAR is not set
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
-# CONFIG_PKG_USING_WS2812B is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
-# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
-# CONFIG_PKG_USING_MULTI_RTIMER is not set
-# CONFIG_PKG_USING_MAX7219 is not set
-# CONFIG_PKG_USING_BEEP is not set
-# CONFIG_PKG_USING_EASYBLINK is not set
-# CONFIG_PKG_USING_PMS_SERIES is not set
-# CONFIG_PKG_USING_CAN_YMODEM is not set
-# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
-# CONFIG_PKG_USING_QLED is not set
-# CONFIG_PKG_USING_PAJ7620 is not set
-# CONFIG_PKG_USING_AGILE_CONSOLE is not set
-# CONFIG_PKG_USING_LD3320 is not set
-# CONFIG_PKG_USING_WK2124 is not set
-# CONFIG_PKG_USING_LY68L6400 is not set
-# CONFIG_PKG_USING_DM9051 is not set
-# CONFIG_PKG_USING_SSD1306 is not set
-# CONFIG_PKG_USING_QKEY is not set
-# CONFIG_PKG_USING_RS485 is not set
-# CONFIG_PKG_USING_RS232 is not set
-# CONFIG_PKG_USING_NES is not set
-# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
-# CONFIG_PKG_USING_VDEVICE is not set
-# CONFIG_PKG_USING_SGM706 is not set
-# CONFIG_PKG_USING_STM32WB55_SDK is not set
-# CONFIG_PKG_USING_RDA58XX is not set
-# CONFIG_PKG_USING_LIBNFC is not set
-# CONFIG_PKG_USING_MFOC is not set
-# CONFIG_PKG_USING_TMC51XX is not set
-# CONFIG_PKG_USING_TCA9534 is not set
-# CONFIG_PKG_USING_KOBUKI is not set
-# CONFIG_PKG_USING_ROSSERIAL is not set
-# CONFIG_PKG_USING_MICRO_ROS is not set
-# CONFIG_PKG_USING_MCP23008 is not set
-# CONFIG_PKG_USING_BLUETRUM_SDK is not set
-# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
-# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
-# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
-# CONFIG_PKG_USING_BL_MCU_SDK is not set
-# CONFIG_PKG_USING_SOFT_SERIAL is not set
-# CONFIG_PKG_USING_MB85RS16 is not set
-# CONFIG_PKG_USING_CW2015 is not set
-# CONFIG_PKG_USING_RFM300 is not set
-# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
-# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
-
-#
-# AI packages
-#
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
-# CONFIG_PKG_USING_ELAPACK is not set
-# CONFIG_PKG_USING_ULAPACK is not set
-# CONFIG_PKG_USING_QUEST is not set
-# CONFIG_PKG_USING_NAXOS is not set
 
 #
 # miscellaneous packages
 #
-
-#
-# project laboratory
-#
-
-#
-# samples: kernel and components samples
-#
-# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
-# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
-# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
-# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
-
-#
-# entertainment: terminal games and other interesting software packages
-#
-# CONFIG_PKG_USING_CMATRIX is not set
-# CONFIG_PKG_USING_SL is not set
-# CONFIG_PKG_USING_CAL is not set
-# CONFIG_PKG_USING_ACLOCK is not set
-# CONFIG_PKG_USING_THREES is not set
-# CONFIG_PKG_USING_2048 is not set
-# CONFIG_PKG_USING_SNAKE is not set
-# CONFIG_PKG_USING_TETRIS is not set
-# CONFIG_PKG_USING_DONUT is not set
-# CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
-# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
-# CONFIG_PKG_USING_MINIZIP is not set
-# CONFIG_PKG_USING_HEATSHRINK is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
 # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_UPACKER is not set
 # CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
-# CONFIG_PKG_USING_CRCLIB is not set
-# CONFIG_PKG_USING_LWGPS is not set
-# CONFIG_PKG_USING_STATE_MACHINE is not set
-# CONFIG_PKG_USING_DESIGN_PATTERN is not set
-# CONFIG_PKG_USING_CONTROLLER is not set
-# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
-# CONFIG_PKG_USING_MFBD is not set
-# CONFIG_PKG_USING_SLCAN2RTT is not set
-# CONFIG_PKG_USING_SOEM is not set
-# CONFIG_PKG_USING_QPARAM is not set
-
-#
-# Privated Packages of RealThread
-#
-# CONFIG_PKG_USING_CODEC is not set
-# CONFIG_PKG_USING_PLAYER is not set
-# CONFIG_PKG_USING_MPLAYER is not set
-# CONFIG_PKG_USING_PERSIMMON_SRC is not set
-# CONFIG_PKG_USING_JS_PERSIMMON is not set
-# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
-
-#
-# Network Utilities
-#
-# CONFIG_PKG_USING_WICED is not set
-# CONFIG_PKG_USING_CLOUDSDK is not set
-# CONFIG_PKG_USING_POWER_MANAGER is not set
-# CONFIG_PKG_USING_RT_OTA is not set
-# CONFIG_PKG_USING_RTINSIGHT is not set
-# CONFIG_PKG_USING_SMARTCONFIG is not set
-# CONFIG_PKG_USING_RTX is not set
-# CONFIG_RT_USING_TESTCASE is not set
-# CONFIG_PKG_USING_NGHTTP2 is not set
-# CONFIG_PKG_USING_AVS is not set
-# CONFIG_PKG_USING_ALI_LINKKIT is not set
-# CONFIG_PKG_USING_STS is not set
-# CONFIG_PKG_USING_DLMS is not set
-# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
-# CONFIG_PKG_USING_ZBAR is not set
-# CONFIG_PKG_USING_MCF is not set
-# CONFIG_PKG_USING_URPC is not set
-# CONFIG_PKG_USING_DCM is not set
-# CONFIG_PKG_USING_EMQ is not set
-# CONFIG_PKG_USING_CFGM is not set
-# CONFIG_PKG_USING_RT_CMSIS_DAP is not set
-# CONFIG_PKG_USING_SMODULE is not set
-# CONFIG_PKG_USING_SNFD is not set
-# CONFIG_PKG_USING_UDBD is not set
-# CONFIG_PKG_USING_BENCHMARK is not set
-# CONFIG_PKG_USING_UBJSON is not set
-# CONFIG_PKG_USING_DATATYPE is not set
-# CONFIG_PKG_USING_FASTFS is not set
-# CONFIG_PKG_USING_RIL is not set
-# CONFIG_PKG_USING_WATCH_DCM_SVC is not set
-# CONFIG_PKG_USING_WATCH_APP_FWK is not set
-# CONFIG_PKG_USING_GUI_TEST is not set
-# CONFIG_PKG_USING_PMEM is not set
-# CONFIG_PKG_USING_LWRDP is not set
-# CONFIG_PKG_USING_MASAN is not set
-# CONFIG_PKG_USING_BSDIFF_LIB is not set
-# CONFIG_PKG_USING_PRC_DIFF is not set
-
-#
-# RT-Thread Smart
-#
-# CONFIG_PKG_USING_UKERNEL is not set
-# CONFIG_PKG_USING_TRACE_AGENT is not set
 CONFIG_SOC_FAMILY_AT32=y
 CONFIG_SOC_SERIES_AT32F415=y
 

bsp/at32/at32f415-start/board/Kconfig

@@ -54,13 +54,28 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable UART1"
                 default y
 
+            config BSP_UART1_RX_USING_DMA
+                bool "Enable UART1 RX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART2
                 bool "Enable UART2"
                 default n
 
+            config BSP_UART2_RX_USING_DMA
+                bool "Enable UART2 RX DMA"
+                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART3
                 bool "Enable UART3"
                 default n
+
+            config BSP_UART3_RX_USING_DMA
+                bool "Enable UART3 RX DMA"
+                depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_PWM
@@ -119,9 +134,31 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable SPI1 BUS"
                 default n
 
+            config BSP_SPI1_TX_USING_DMA
+                bool "Enable SPI1 TX DMA"
+                depends on BSP_USING_SPI1
+                default n
+
+            config BSP_SPI1_RX_USING_DMA
+                bool "Enable SPI1 RX DMA"
+                depends on BSP_USING_SPI1
+                select BSP_SPI1_TX_USING_DMA
+                default n
+
             config BSP_USING_SPI2
                 bool "Enable SPI2 BUS"
                 default n
+
+            config BSP_SPI2_TX_USING_DMA
+                bool "Enable SPI2 TX DMA"
+                depends on BSP_USING_SPI2
+                default n
+
+            config BSP_SPI2_RX_USING_DMA
+                bool "Enable SPI2 RX DMA"
+                depends on BSP_USING_SPI2
+                select BSP_SPI2_TX_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_I2C

bsp/at32/at32f415-start/project.ewp

@@ -351,6 +351,7 @@
         <option>
           <name>CCIncludePath2</name>
           <state />
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\libraries\AT32F415_Firmware_Library\cmsis\cm4\core_support</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
@@ -358,11 +359,11 @@
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
           <state>$PROJ_DIR$\board\inc</state>
           <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
+          <state>$PROJ_DIR$\..\libraries\AT32F415_Firmware_Library\cmsis\cm4\device_support</state>
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\libraries\AT32F415_Firmware_Library\cmsis\cm4\device_support</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
@@ -1395,6 +1396,7 @@
         <option>
           <name>CCIncludePath2</name>
           <state />
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
           <state>$PROJ_DIR$\..\libraries\AT32F415_Firmware_Library\cmsis\cm4\core_support</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
@@ -1402,11 +1404,11 @@
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
           <state>$PROJ_DIR$\board\inc</state>
           <state>$PROJ_DIR$\..\..\..\components\drivers\include</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\stdio</state>
+          <state>$PROJ_DIR$\..\libraries\AT32F415_Firmware_Library\cmsis\cm4\device_support</state>
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\libraries\AT32F415_Firmware_Library\cmsis\cm4\device_support</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>

bsp/at32/at32f415-start/project.uvproj

@@ -359,7 +359,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_ARM_LIBC, __RTTHREAD__, AT32F415RCT7</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F415_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F415_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F415_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F415_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F415_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F415_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f415-start/project.uvprojx

@@ -335,7 +335,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_ARM_LIBC, __RTTHREAD__, AT32F415RCT7</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F415_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F415_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F415_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F415_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F415_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F415_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f415-start/rtconfig.h

@@ -129,67 +129,24 @@
 
 /* language packages */
 
-/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
-
-
-/* XML: Extensible Markup Language */
-
 
 /* multimedia packages */
 
-/* LVGL: powerful and easy-to-use embedded GUI library */
-
-
-/* u8g2: a monochrome graphic library */
-
-
-/* PainterEngine: A cross-platform graphics application framework written in C language */
-
 
 /* tools packages */
 
 
 /* system packages */
 
-/* enhanced kernel services */
-
-
-/* acceleration: Assembly language or algorithmic acceleration packages */
-
-
-/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
-
-
-/* Micrium: Micrium software products porting for RT-Thread */
-
 
 /* peripheral libraries and drivers */
 
 
-/* Kendryte SDK */
-
-
-/* AI packages */
-
-
 /* miscellaneous packages */
 
-/* project laboratory */
 
 /* samples: kernel and components samples */
 
-
-/* entertainment: terminal games and other interesting software packages */
-
-
-/* Privated Packages of RealThread */
-
-
-/* Network Utilities */
-
-
-/* RT-Thread Smart */
-
 #define SOC_FAMILY_AT32
 #define SOC_SERIES_AT32F415
 

bsp/at32/at32f435-start/.config

@@ -214,19 +214,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
-# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
-# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_MYMQTT is not set
-# CONFIG_PKG_USING_KAWAII_MQTT is not set
-# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_MQTTCLIENT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
 
 #
@@ -246,12 +246,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
-# CONFIG_PKG_USING_CMUX is not set
 # CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
 # CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set
-# CONFIG_PKG_USING_ZB_COORDINATOR is not set
 
 #
 # IoT Cloud
@@ -260,14 +258,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
-# CONFIG_PKG_USING_JOYLINK is not set
-# CONFIG_PKG_USING_EZ_IOT_OS is not set
-# CONFIG_PKG_USING_IOTSHARP_SDK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
-# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
 # CONFIG_PKG_USING_LSSDP is not set
@@ -275,111 +269,40 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_LIBRWS is not set
 # CONFIG_PKG_USING_TCPSERVER is not set
 # CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
 # CONFIG_PKG_USING_QXWZ is not set
 # CONFIG_PKG_USING_SMTP_CLIENT is not set
 # CONFIG_PKG_USING_ABUP_FOTA is not set
 # CONFIG_PKG_USING_LIBCURL2RTT is not set
 # CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
 # CONFIG_PKG_USING_AGILE_TELNET is not set
-# CONFIG_PKG_USING_NMEALIB is not set
-# CONFIG_PKG_USING_PDULIB is not set
-# CONFIG_PKG_USING_BTSTACK is not set
-# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
-# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
-# CONFIG_PKG_USING_MAVLINK is not set
-# CONFIG_PKG_USING_BSAL is not set
-# CONFIG_PKG_USING_AGILE_MODBUS is not set
-# CONFIG_PKG_USING_AGILE_FTP is not set
-# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
-# CONFIG_PKG_USING_RT_LINK_HW is not set
-# CONFIG_PKG_USING_LORA_PKT_FWD is not set
-# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
-# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
-# CONFIG_PKG_USING_HM is not set
-# CONFIG_PKG_USING_SMALL_MODBUS is not set
-# CONFIG_PKG_USING_NET_SERVER is not set
-# CONFIG_PKG_USING_ZFTP is not set
 
 #
 # security packages
 #
 # CONFIG_PKG_USING_MBEDTLS is not set
-# CONFIG_PKG_USING_LIBSODIUM is not set
-# CONFIG_PKG_USING_LIBHYDROGEN is not set
+# CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
-# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
 #
-
-#
-# JSON: JavaScript Object Notation, a lightweight data-interchange format
-#
-# CONFIG_PKG_USING_CJSON is not set
-# CONFIG_PKG_USING_LJSON is not set
-# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
-# CONFIG_PKG_USING_RAPIDJSON is not set
-# CONFIG_PKG_USING_JSMN is not set
-# CONFIG_PKG_USING_AGILE_JSMN is not set
-# CONFIG_PKG_USING_PARSON is not set
-
-#
-# XML: Extensible Markup Language
-#
-# CONFIG_PKG_USING_SIMPLE_XML is not set
-# CONFIG_PKG_USING_EZXML is not set
-# CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
-# CONFIG_PKG_USING_PIKASCRIPT is not set
-# CONFIG_PKG_USING_RTT_RUST is not set
 
 #
 # multimedia packages
 #
-
-#
-# LVGL: powerful and easy-to-use embedded GUI library
-#
-# CONFIG_PKG_USING_LVGL is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
-# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
-# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
-
-#
-# u8g2: a monochrome graphic library
-#
-# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
-# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
 # CONFIG_PKG_USING_WAVPLAYER is not set
 # CONFIG_PKG_USING_TJPGD is not set
-# CONFIG_PKG_USING_PDFGEN is not set
-# CONFIG_PKG_USING_HELIX is not set
-# CONFIG_PKG_USING_AZUREGUIX is not set
-# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
-# CONFIG_PKG_USING_NUEMWIN is not set
-# CONFIG_PKG_USING_MP3PLAYER is not set
-# CONFIG_PKG_USING_TINYJPEG is not set
-# CONFIG_PKG_USING_UGUI is not set
-
-#
-# PainterEngine: A cross-platform graphics application framework written in C language
-#
-# CONFIG_PKG_USING_PAINTERENGINE is not set
-# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
-# CONFIG_PKG_USING_MCURSES is not set
-# CONFIG_PKG_USING_TERMBOX is not set
-# CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_QRCODE is not set
-# CONFIG_PKG_USING_GUIENGINE is not set
-# CONFIG_PKG_USING_PERSIMMON is not set
 
 #
 # tools packages
@@ -388,115 +311,37 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
-# CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
-# CONFIG_PKG_USING_ULOG_FILE is not set
-# CONFIG_PKG_USING_LOGMGR is not set
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
 # CONFIG_PKG_USING_DHRYSTONE is not set
-# CONFIG_PKG_USING_MEMORYPERF is not set
 # CONFIG_PKG_USING_NR_MICRO_SHELL is not set
 # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
 # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
 # CONFIG_PKG_USING_BS8116A is not set
-# CONFIG_PKG_USING_GPS_RMC is not set
-# CONFIG_PKG_USING_URLENCODE is not set
-# CONFIG_PKG_USING_UMCN is not set
-# CONFIG_PKG_USING_LWRB2RTT is not set
-# CONFIG_PKG_USING_CPU_USAGE is not set
-# CONFIG_PKG_USING_GBK2UTF8 is not set
-# CONFIG_PKG_USING_VCONSOLE is not set
-# CONFIG_PKG_USING_KDB is not set
-# CONFIG_PKG_USING_WAMR is not set
-# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
-# CONFIG_PKG_USING_LWLOG is not set
-# CONFIG_PKG_USING_ANV_TRACE is not set
-# CONFIG_PKG_USING_ANV_MEMLEAK is not set
-# CONFIG_PKG_USING_ANV_TESTSUIT is not set
-# CONFIG_PKG_USING_ANV_BENCH is not set
-# CONFIG_PKG_USING_DEVMEM is not set
-# CONFIG_PKG_USING_REGEX is not set
-# CONFIG_PKG_USING_MEM_SANDBOX is not set
-# CONFIG_PKG_USING_SOLAR_TERMS is not set
-# CONFIG_PKG_USING_GAN_ZHI is not set
-# CONFIG_PKG_USING_FDT is not set
-# CONFIG_PKG_USING_CBOX is not set
-# CONFIG_PKG_USING_SNOWFLAKE is not set
-# CONFIG_PKG_USING_HASH_MATCH is not set
-# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
-# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 
 #
 # system packages
 #
-
-#
-# enhanced kernel services
-#
-# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
-# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
-# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
-
-#
-# acceleration: Assembly language or algorithmic acceleration packages
-#
-# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
-# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
-# CONFIG_PKG_USING_QFPLIB_M3 is not set
-
-#
-# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
-#
-# CONFIG_PKG_USING_CMSIS_5 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
-
-#
-# Micrium: Micrium software products porting for RT-Thread
-#
-# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
-# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
-# CONFIG_PKG_USING_UC_CRC is not set
-# CONFIG_PKG_USING_UC_CLK is not set
-# CONFIG_PKG_USING_UC_COMMON is not set
-# CONFIG_PKG_USING_UC_MODBUS is not set
-# CONFIG_PKG_USING_RTDUINO is not set
-# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_PERF_COUNTER is not set
-# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_FAL is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
-# CONFIG_PKG_USING_DFS_JFFS2 is not set
-# CONFIG_PKG_USING_DFS_UFFS is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_THREAD_POOL is not set
 # CONFIG_PKG_USING_ROBOTS is not set
 # CONFIG_PKG_USING_EV is not set
 # CONFIG_PKG_USING_SYSWATCH is not set
-# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
-# CONFIG_PKG_USING_PLCCORE is not set
-# CONFIG_PKG_USING_RAMDISK is not set
-# CONFIG_PKG_USING_MININI is not set
-# CONFIG_PKG_USING_QBOOT is not set
-# CONFIG_PKG_USING_PPOOL is not set
-# CONFIG_PKG_USING_OPENAMP is not set
-# CONFIG_PKG_USING_LPM is not set
-# CONFIG_PKG_USING_TLSF is not set
-# CONFIG_PKG_USING_EVENT_RECORDER is not set
-# CONFIG_PKG_USING_ARM_2D is not set
-# CONFIG_PKG_USING_MCUBOOT is not set
-# CONFIG_PKG_USING_TINYUSB is not set
-# CONFIG_PKG_USING_CHERRYUSB is not set
-# CONFIG_PKG_USING_KMULTI_RTIMER is not set
-# CONFIG_PKG_USING_TFDB is not set
-# CONFIG_PKG_USING_QPC is not set
 
 #
 # peripheral libraries and drivers
@@ -505,29 +350,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
-# CONFIG_PKG_USING_ADT74XX is not set
-# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
-# CONFIG_PKG_USING_ESP_IDF is not set
 # CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
 # CONFIG_PKG_USING_SIGNAL_LED is not set
 # CONFIG_PKG_USING_LEDBLINK is not set
 # CONFIG_PKG_USING_LITTLED is not set
-# CONFIG_PKG_USING_LKDGUI is not set
-# CONFIG_PKG_USING_NRF5X_SDK is not set
-# CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
-
-#
-# Kendryte SDK
-#
-# CONFIG_PKG_USING_K210_SDK is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
-# CONFIG_PKG_USING_MULTI_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
 # CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
@@ -541,185 +376,43 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_RPLIDAR is not set
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
-# CONFIG_PKG_USING_WS2812B is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
-# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
-# CONFIG_PKG_USING_MULTI_RTIMER is not set
-# CONFIG_PKG_USING_MAX7219 is not set
-# CONFIG_PKG_USING_BEEP is not set
-# CONFIG_PKG_USING_EASYBLINK is not set
-# CONFIG_PKG_USING_PMS_SERIES is not set
-# CONFIG_PKG_USING_CAN_YMODEM is not set
-# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
-# CONFIG_PKG_USING_QLED is not set
-# CONFIG_PKG_USING_PAJ7620 is not set
-# CONFIG_PKG_USING_AGILE_CONSOLE is not set
-# CONFIG_PKG_USING_LD3320 is not set
-# CONFIG_PKG_USING_WK2124 is not set
-# CONFIG_PKG_USING_LY68L6400 is not set
-# CONFIG_PKG_USING_DM9051 is not set
-# CONFIG_PKG_USING_SSD1306 is not set
-# CONFIG_PKG_USING_QKEY is not set
-# CONFIG_PKG_USING_RS485 is not set
-# CONFIG_PKG_USING_RS232 is not set
-# CONFIG_PKG_USING_NES is not set
-# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
-# CONFIG_PKG_USING_VDEVICE is not set
-# CONFIG_PKG_USING_SGM706 is not set
-# CONFIG_PKG_USING_STM32WB55_SDK is not set
-# CONFIG_PKG_USING_RDA58XX is not set
-# CONFIG_PKG_USING_LIBNFC is not set
-# CONFIG_PKG_USING_MFOC is not set
-# CONFIG_PKG_USING_TMC51XX is not set
-# CONFIG_PKG_USING_TCA9534 is not set
-# CONFIG_PKG_USING_KOBUKI is not set
-# CONFIG_PKG_USING_ROSSERIAL is not set
-# CONFIG_PKG_USING_MICRO_ROS is not set
-# CONFIG_PKG_USING_MCP23008 is not set
-# CONFIG_PKG_USING_BLUETRUM_SDK is not set
-# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
-# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
-# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
-# CONFIG_PKG_USING_BL_MCU_SDK is not set
-# CONFIG_PKG_USING_SOFT_SERIAL is not set
-# CONFIG_PKG_USING_MB85RS16 is not set
-# CONFIG_PKG_USING_CW2015 is not set
-# CONFIG_PKG_USING_RFM300 is not set
-# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
-# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
-
-#
-# AI packages
-#
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
-# CONFIG_PKG_USING_ELAPACK is not set
-# CONFIG_PKG_USING_ULAPACK is not set
-# CONFIG_PKG_USING_QUEST is not set
-# CONFIG_PKG_USING_NAXOS is not set
 
 #
 # miscellaneous packages
 #
-
-#
-# project laboratory
-#
-
-#
-# samples: kernel and components samples
-#
-# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
-# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
-# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
-# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
-
-#
-# entertainment: terminal games and other interesting software packages
-#
-# CONFIG_PKG_USING_CMATRIX is not set
-# CONFIG_PKG_USING_SL is not set
-# CONFIG_PKG_USING_CAL is not set
-# CONFIG_PKG_USING_ACLOCK is not set
-# CONFIG_PKG_USING_THREES is not set
-# CONFIG_PKG_USING_2048 is not set
-# CONFIG_PKG_USING_SNAKE is not set
-# CONFIG_PKG_USING_TETRIS is not set
-# CONFIG_PKG_USING_DONUT is not set
-# CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
-# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
-# CONFIG_PKG_USING_MINIZIP is not set
-# CONFIG_PKG_USING_HEATSHRINK is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
 # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_UPACKER is not set
 # CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
-# CONFIG_PKG_USING_CRCLIB is not set
-# CONFIG_PKG_USING_LWGPS is not set
-# CONFIG_PKG_USING_STATE_MACHINE is not set
-# CONFIG_PKG_USING_DESIGN_PATTERN is not set
-# CONFIG_PKG_USING_CONTROLLER is not set
-# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
-# CONFIG_PKG_USING_MFBD is not set
-# CONFIG_PKG_USING_SLCAN2RTT is not set
-# CONFIG_PKG_USING_SOEM is not set
-# CONFIG_PKG_USING_QPARAM is not set
-
-#
-# Privated Packages of RealThread
-#
-# CONFIG_PKG_USING_CODEC is not set
-# CONFIG_PKG_USING_PLAYER is not set
-# CONFIG_PKG_USING_MPLAYER is not set
-# CONFIG_PKG_USING_PERSIMMON_SRC is not set
-# CONFIG_PKG_USING_JS_PERSIMMON is not set
-# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
-
-#
-# Network Utilities
-#
-# CONFIG_PKG_USING_WICED is not set
-# CONFIG_PKG_USING_CLOUDSDK is not set
-# CONFIG_PKG_USING_POWER_MANAGER is not set
-# CONFIG_PKG_USING_RT_OTA is not set
-# CONFIG_PKG_USING_RTINSIGHT is not set
-# CONFIG_PKG_USING_SMARTCONFIG is not set
-# CONFIG_PKG_USING_RTX is not set
-# CONFIG_RT_USING_TESTCASE is not set
-# CONFIG_PKG_USING_NGHTTP2 is not set
-# CONFIG_PKG_USING_AVS is not set
-# CONFIG_PKG_USING_ALI_LINKKIT is not set
-# CONFIG_PKG_USING_STS is not set
-# CONFIG_PKG_USING_DLMS is not set
-# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
-# CONFIG_PKG_USING_ZBAR is not set
-# CONFIG_PKG_USING_MCF is not set
-# CONFIG_PKG_USING_URPC is not set
-# CONFIG_PKG_USING_DCM is not set
-# CONFIG_PKG_USING_EMQ is not set
-# CONFIG_PKG_USING_CFGM is not set
-# CONFIG_PKG_USING_RT_CMSIS_DAP is not set
-# CONFIG_PKG_USING_SMODULE is not set
-# CONFIG_PKG_USING_SNFD is not set
-# CONFIG_PKG_USING_UDBD is not set
-# CONFIG_PKG_USING_BENCHMARK is not set
-# CONFIG_PKG_USING_UBJSON is not set
-# CONFIG_PKG_USING_DATATYPE is not set
-# CONFIG_PKG_USING_FASTFS is not set
-# CONFIG_PKG_USING_RIL is not set
-# CONFIG_PKG_USING_WATCH_DCM_SVC is not set
-# CONFIG_PKG_USING_WATCH_APP_FWK is not set
-# CONFIG_PKG_USING_GUI_TEST is not set
-# CONFIG_PKG_USING_PMEM is not set
-# CONFIG_PKG_USING_LWRDP is not set
-# CONFIG_PKG_USING_MASAN is not set
-# CONFIG_PKG_USING_BSDIFF_LIB is not set
-# CONFIG_PKG_USING_PRC_DIFF is not set
-
-#
-# RT-Thread Smart
-#
-# CONFIG_PKG_USING_UKERNEL is not set
-# CONFIG_PKG_USING_TRACE_AGENT is not set
 CONFIG_SOC_FAMILY_AT32=y
 CONFIG_SOC_SERIES_AT32F435=y
 

bsp/at32/at32f435-start/board/Kconfig

@@ -73,13 +73,28 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable UART1"
                 default y
 
+            config BSP_UART1_RX_USING_DMA
+                bool "Enable UART1 RX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART2
                 bool "Enable UART2"
                 default n
 
+            config BSP_UART2_RX_USING_DMA
+                bool "Enable UART2 RX DMA"
+                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART3
                 bool "Enable UART3"
                 default n
+
+            config BSP_UART3_RX_USING_DMA
+                bool "Enable UART3 RX DMA"
+                depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_PWM
@@ -138,9 +153,31 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable SPI1 BUS"
                 default n
 
+            config BSP_SPI1_TX_USING_DMA
+                bool "Enable SPI1 TX DMA"
+                depends on BSP_USING_SPI1
+                default n
+
+            config BSP_SPI1_RX_USING_DMA
+                bool "Enable SPI1 RX DMA"
+                depends on BSP_USING_SPI1
+                select BSP_SPI1_TX_USING_DMA
+                default n
+
             config BSP_USING_SPI2
                 bool "Enable SPI2 BUS"
                 default n
+
+            config BSP_SPI2_TX_USING_DMA
+                bool "Enable SPI2 TX DMA"
+                depends on BSP_USING_SPI2
+                default n
+
+            config BSP_SPI2_RX_USING_DMA
+                bool "Enable SPI2 RX DMA"
+                depends on BSP_USING_SPI2
+                select BSP_SPI2_TX_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_I2C

bsp/at32/at32f435-start/project.ewp

@@ -352,6 +352,7 @@
           <name>CCIncludePath2</name>
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -363,7 +364,7 @@
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support</state>
@@ -1396,6 +1397,7 @@
           <name>CCIncludePath2</name>
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -1407,7 +1409,7 @@
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support</state>

bsp/at32/at32f435-start/project.uvproj

@@ -359,7 +359,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, AT32F435ZMT7, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F435_437_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F435_437_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f435-start/project.uvprojx

@@ -335,7 +335,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, AT32F435ZMT7, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F435_437_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F435_437_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f435-start/rtconfig.h

@@ -129,67 +129,24 @@
 
 /* language packages */
 
-/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
-
-
-/* XML: Extensible Markup Language */
-
 
 /* multimedia packages */
 
-/* LVGL: powerful and easy-to-use embedded GUI library */
-
-
-/* u8g2: a monochrome graphic library */
-
-
-/* PainterEngine: A cross-platform graphics application framework written in C language */
-
 
 /* tools packages */
 
 
 /* system packages */
 
-/* enhanced kernel services */
-
-
-/* acceleration: Assembly language or algorithmic acceleration packages */
-
-
-/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
-
-
-/* Micrium: Micrium software products porting for RT-Thread */
-
 
 /* peripheral libraries and drivers */
 
 
-/* Kendryte SDK */
-
-
-/* AI packages */
-
-
 /* miscellaneous packages */
 
-/* project laboratory */
 
 /* samples: kernel and components samples */
 
-
-/* entertainment: terminal games and other interesting software packages */
-
-
-/* Privated Packages of RealThread */
-
-
-/* Network Utilities */
-
-
-/* RT-Thread Smart */
-
 #define SOC_FAMILY_AT32
 #define SOC_SERIES_AT32F435
 

bsp/at32/at32f437-start/.config

@@ -214,19 +214,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 #
 # IoT - internet of things
 #
-# CONFIG_PKG_USING_LWIP is not set
-# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
-# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_MYMQTT is not set
-# CONFIG_PKG_USING_KAWAII_MQTT is not set
-# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_MQTTCLIENT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
 # CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
 
 #
@@ -246,12 +246,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
-# CONFIG_PKG_USING_CMUX is not set
 # CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
 # CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set
-# CONFIG_PKG_USING_ZB_COORDINATOR is not set
 
 #
 # IoT Cloud
@@ -260,14 +258,10 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
 # CONFIG_PKG_USING_JIOT-C-SDK is not set
 # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
-# CONFIG_PKG_USING_JOYLINK is not set
-# CONFIG_PKG_USING_EZ_IOT_OS is not set
-# CONFIG_PKG_USING_IOTSHARP_SDK is not set
 # CONFIG_PKG_USING_NIMBLE is not set
-# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 # CONFIG_PKG_USING_IPMSG is not set
 # CONFIG_PKG_USING_LSSDP is not set
@@ -275,111 +269,40 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_LIBRWS is not set
 # CONFIG_PKG_USING_TCPSERVER is not set
 # CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
 # CONFIG_PKG_USING_DLT645 is not set
 # CONFIG_PKG_USING_QXWZ is not set
 # CONFIG_PKG_USING_SMTP_CLIENT is not set
 # CONFIG_PKG_USING_ABUP_FOTA is not set
 # CONFIG_PKG_USING_LIBCURL2RTT is not set
 # CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
 # CONFIG_PKG_USING_AGILE_TELNET is not set
-# CONFIG_PKG_USING_NMEALIB is not set
-# CONFIG_PKG_USING_PDULIB is not set
-# CONFIG_PKG_USING_BTSTACK is not set
-# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
-# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
-# CONFIG_PKG_USING_MAVLINK is not set
-# CONFIG_PKG_USING_BSAL is not set
-# CONFIG_PKG_USING_AGILE_MODBUS is not set
-# CONFIG_PKG_USING_AGILE_FTP is not set
-# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
-# CONFIG_PKG_USING_RT_LINK_HW is not set
-# CONFIG_PKG_USING_LORA_PKT_FWD is not set
-# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
-# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
-# CONFIG_PKG_USING_HM is not set
-# CONFIG_PKG_USING_SMALL_MODBUS is not set
-# CONFIG_PKG_USING_NET_SERVER is not set
-# CONFIG_PKG_USING_ZFTP is not set
 
 #
 # security packages
 #
 # CONFIG_PKG_USING_MBEDTLS is not set
-# CONFIG_PKG_USING_LIBSODIUM is not set
-# CONFIG_PKG_USING_LIBHYDROGEN is not set
+# CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
 # CONFIG_PKG_USING_TFM is not set
-# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
 #
-
-#
-# JSON: JavaScript Object Notation, a lightweight data-interchange format
-#
-# CONFIG_PKG_USING_CJSON is not set
-# CONFIG_PKG_USING_LJSON is not set
-# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
-# CONFIG_PKG_USING_RAPIDJSON is not set
-# CONFIG_PKG_USING_JSMN is not set
-# CONFIG_PKG_USING_AGILE_JSMN is not set
-# CONFIG_PKG_USING_PARSON is not set
-
-#
-# XML: Extensible Markup Language
-#
-# CONFIG_PKG_USING_SIMPLE_XML is not set
-# CONFIG_PKG_USING_EZXML is not set
-# CONFIG_PKG_USING_LUATOS_SOC is not set
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
-# CONFIG_PKG_USING_PIKASCRIPT is not set
-# CONFIG_PKG_USING_RTT_RUST is not set
 
 #
 # multimedia packages
 #
-
-#
-# LVGL: powerful and easy-to-use embedded GUI library
-#
-# CONFIG_PKG_USING_LVGL is not set
-# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
-# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
-# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
-
-#
-# u8g2: a monochrome graphic library
-#
-# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
-# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
 # CONFIG_PKG_USING_STEMWIN is not set
 # CONFIG_PKG_USING_WAVPLAYER is not set
 # CONFIG_PKG_USING_TJPGD is not set
-# CONFIG_PKG_USING_PDFGEN is not set
-# CONFIG_PKG_USING_HELIX is not set
-# CONFIG_PKG_USING_AZUREGUIX is not set
-# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
-# CONFIG_PKG_USING_NUEMWIN is not set
-# CONFIG_PKG_USING_MP3PLAYER is not set
-# CONFIG_PKG_USING_TINYJPEG is not set
-# CONFIG_PKG_USING_UGUI is not set
-
-#
-# PainterEngine: A cross-platform graphics application framework written in C language
-#
-# CONFIG_PKG_USING_PAINTERENGINE is not set
-# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set
-# CONFIG_PKG_USING_MCURSES is not set
-# CONFIG_PKG_USING_TERMBOX is not set
-# CONFIG_PKG_USING_VT100 is not set
-# CONFIG_PKG_USING_QRCODE is not set
-# CONFIG_PKG_USING_GUIENGINE is not set
-# CONFIG_PKG_USING_PERSIMMON is not set
 
 #
 # tools packages
@@ -388,115 +311,37 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
-# CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
-# CONFIG_PKG_USING_ULOG_FILE is not set
-# CONFIG_PKG_USING_LOGMGR is not set
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
 # CONFIG_PKG_USING_DHRYSTONE is not set
-# CONFIG_PKG_USING_MEMORYPERF is not set
 # CONFIG_PKG_USING_NR_MICRO_SHELL is not set
 # CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
 # CONFIG_PKG_USING_LUNAR_CALENDAR is not set
 # CONFIG_PKG_USING_BS8116A is not set
-# CONFIG_PKG_USING_GPS_RMC is not set
-# CONFIG_PKG_USING_URLENCODE is not set
-# CONFIG_PKG_USING_UMCN is not set
-# CONFIG_PKG_USING_LWRB2RTT is not set
-# CONFIG_PKG_USING_CPU_USAGE is not set
-# CONFIG_PKG_USING_GBK2UTF8 is not set
-# CONFIG_PKG_USING_VCONSOLE is not set
-# CONFIG_PKG_USING_KDB is not set
-# CONFIG_PKG_USING_WAMR is not set
-# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
-# CONFIG_PKG_USING_LWLOG is not set
-# CONFIG_PKG_USING_ANV_TRACE is not set
-# CONFIG_PKG_USING_ANV_MEMLEAK is not set
-# CONFIG_PKG_USING_ANV_TESTSUIT is not set
-# CONFIG_PKG_USING_ANV_BENCH is not set
-# CONFIG_PKG_USING_DEVMEM is not set
-# CONFIG_PKG_USING_REGEX is not set
-# CONFIG_PKG_USING_MEM_SANDBOX is not set
-# CONFIG_PKG_USING_SOLAR_TERMS is not set
-# CONFIG_PKG_USING_GAN_ZHI is not set
-# CONFIG_PKG_USING_FDT is not set
-# CONFIG_PKG_USING_CBOX is not set
-# CONFIG_PKG_USING_SNOWFLAKE is not set
-# CONFIG_PKG_USING_HASH_MATCH is not set
-# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
-# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 
 #
 # system packages
 #
-
-#
-# enhanced kernel services
-#
-# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
-# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
-# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set
-
-#
-# acceleration: Assembly language or algorithmic acceleration packages
-#
-# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
-# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
-# CONFIG_PKG_USING_QFPLIB_M3 is not set
-
-#
-# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
-#
-# CONFIG_PKG_USING_CMSIS_5 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
-# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
-
-#
-# Micrium: Micrium software products porting for RT-Thread
-#
-# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
-# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
-# CONFIG_PKG_USING_UC_CRC is not set
-# CONFIG_PKG_USING_UC_CLK is not set
-# CONFIG_PKG_USING_UC_COMMON is not set
-# CONFIG_PKG_USING_UC_MODBUS is not set
-# CONFIG_PKG_USING_RTDUINO is not set
-# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
-# CONFIG_PKG_USING_PERF_COUNTER is not set
-# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_FAL is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
-# CONFIG_PKG_USING_DFS_JFFS2 is not set
-# CONFIG_PKG_USING_DFS_UFFS is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_THREAD_POOL is not set
 # CONFIG_PKG_USING_ROBOTS is not set
 # CONFIG_PKG_USING_EV is not set
 # CONFIG_PKG_USING_SYSWATCH is not set
-# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
-# CONFIG_PKG_USING_PLCCORE is not set
-# CONFIG_PKG_USING_RAMDISK is not set
-# CONFIG_PKG_USING_MININI is not set
-# CONFIG_PKG_USING_QBOOT is not set
-# CONFIG_PKG_USING_PPOOL is not set
-# CONFIG_PKG_USING_OPENAMP is not set
-# CONFIG_PKG_USING_LPM is not set
-# CONFIG_PKG_USING_TLSF is not set
-# CONFIG_PKG_USING_EVENT_RECORDER is not set
-# CONFIG_PKG_USING_ARM_2D is not set
-# CONFIG_PKG_USING_MCUBOOT is not set
-# CONFIG_PKG_USING_TINYUSB is not set
-# CONFIG_PKG_USING_CHERRYUSB is not set
-# CONFIG_PKG_USING_KMULTI_RTIMER is not set
-# CONFIG_PKG_USING_TFDB is not set
-# CONFIG_PKG_USING_QPC is not set
 
 #
 # peripheral libraries and drivers
@@ -505,29 +350,19 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
-# CONFIG_PKG_USING_ADT74XX is not set
-# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
-# CONFIG_PKG_USING_ESP_IDF is not set
 # CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_BUTTON is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
 # CONFIG_PKG_USING_SIGNAL_LED is not set
 # CONFIG_PKG_USING_LEDBLINK is not set
 # CONFIG_PKG_USING_LITTLED is not set
-# CONFIG_PKG_USING_LKDGUI is not set
-# CONFIG_PKG_USING_NRF5X_SDK is not set
-# CONFIG_PKG_USING_NRFX is not set
 # CONFIG_PKG_USING_WM_LIBRARIES is not set
-
-#
-# Kendryte SDK
-#
-# CONFIG_PKG_USING_K210_SDK is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
 # CONFIG_PKG_USING_INFRARED is not set
-# CONFIG_PKG_USING_MULTI_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
 # CONFIG_PKG_USING_AGILE_BUTTON is not set
 # CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
@@ -541,185 +376,43 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 # CONFIG_PKG_USING_RPLIDAR is not set
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
-# CONFIG_PKG_USING_WS2812B is not set
 # CONFIG_PKG_USING_EMBARC_BSP is not set
-# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
-# CONFIG_PKG_USING_MULTI_RTIMER is not set
-# CONFIG_PKG_USING_MAX7219 is not set
-# CONFIG_PKG_USING_BEEP is not set
-# CONFIG_PKG_USING_EASYBLINK is not set
-# CONFIG_PKG_USING_PMS_SERIES is not set
-# CONFIG_PKG_USING_CAN_YMODEM is not set
-# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
-# CONFIG_PKG_USING_QLED is not set
-# CONFIG_PKG_USING_PAJ7620 is not set
-# CONFIG_PKG_USING_AGILE_CONSOLE is not set
-# CONFIG_PKG_USING_LD3320 is not set
-# CONFIG_PKG_USING_WK2124 is not set
-# CONFIG_PKG_USING_LY68L6400 is not set
-# CONFIG_PKG_USING_DM9051 is not set
-# CONFIG_PKG_USING_SSD1306 is not set
-# CONFIG_PKG_USING_QKEY is not set
-# CONFIG_PKG_USING_RS485 is not set
-# CONFIG_PKG_USING_RS232 is not set
-# CONFIG_PKG_USING_NES is not set
-# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
-# CONFIG_PKG_USING_VDEVICE is not set
-# CONFIG_PKG_USING_SGM706 is not set
-# CONFIG_PKG_USING_STM32WB55_SDK is not set
-# CONFIG_PKG_USING_RDA58XX is not set
-# CONFIG_PKG_USING_LIBNFC is not set
-# CONFIG_PKG_USING_MFOC is not set
-# CONFIG_PKG_USING_TMC51XX is not set
-# CONFIG_PKG_USING_TCA9534 is not set
-# CONFIG_PKG_USING_KOBUKI is not set
-# CONFIG_PKG_USING_ROSSERIAL is not set
-# CONFIG_PKG_USING_MICRO_ROS is not set
-# CONFIG_PKG_USING_MCP23008 is not set
-# CONFIG_PKG_USING_BLUETRUM_SDK is not set
-# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
-# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
-# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
-# CONFIG_PKG_USING_BL_MCU_SDK is not set
-# CONFIG_PKG_USING_SOFT_SERIAL is not set
-# CONFIG_PKG_USING_MB85RS16 is not set
-# CONFIG_PKG_USING_CW2015 is not set
-# CONFIG_PKG_USING_RFM300 is not set
-# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
-# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
-
-#
-# AI packages
-#
-# CONFIG_PKG_USING_LIBANN is not set
-# CONFIG_PKG_USING_NNOM is not set
-# CONFIG_PKG_USING_ONNX_BACKEND is not set
-# CONFIG_PKG_USING_ONNX_PARSER is not set
-# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
-# CONFIG_PKG_USING_ELAPACK is not set
-# CONFIG_PKG_USING_ULAPACK is not set
-# CONFIG_PKG_USING_QUEST is not set
-# CONFIG_PKG_USING_NAXOS is not set
 
 #
 # miscellaneous packages
 #
-
-#
-# project laboratory
-#
-
-#
-# samples: kernel and components samples
-#
-# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
-# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
-# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
-# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
-
-#
-# entertainment: terminal games and other interesting software packages
-#
-# CONFIG_PKG_USING_CMATRIX is not set
-# CONFIG_PKG_USING_SL is not set
-# CONFIG_PKG_USING_CAL is not set
-# CONFIG_PKG_USING_ACLOCK is not set
-# CONFIG_PKG_USING_THREES is not set
-# CONFIG_PKG_USING_2048 is not set
-# CONFIG_PKG_USING_SNAKE is not set
-# CONFIG_PKG_USING_TETRIS is not set
-# CONFIG_PKG_USING_DONUT is not set
-# CONFIG_PKG_USING_COWSAY is not set
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
-# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
 # CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
-# CONFIG_PKG_USING_MINIZIP is not set
-# CONFIG_PKG_USING_HEATSHRINK is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
 # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
 # CONFIG_PKG_USING_DIGITALCTRL is not set
 # CONFIG_PKG_USING_UPACKER is not set
 # CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_ELAPACK is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_ULAPACK is not set
 # CONFIG_PKG_USING_UKAL is not set
-# CONFIG_PKG_USING_CRCLIB is not set
-# CONFIG_PKG_USING_LWGPS is not set
-# CONFIG_PKG_USING_STATE_MACHINE is not set
-# CONFIG_PKG_USING_DESIGN_PATTERN is not set
-# CONFIG_PKG_USING_CONTROLLER is not set
-# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
-# CONFIG_PKG_USING_MFBD is not set
-# CONFIG_PKG_USING_SLCAN2RTT is not set
-# CONFIG_PKG_USING_SOEM is not set
-# CONFIG_PKG_USING_QPARAM is not set
-
-#
-# Privated Packages of RealThread
-#
-# CONFIG_PKG_USING_CODEC is not set
-# CONFIG_PKG_USING_PLAYER is not set
-# CONFIG_PKG_USING_MPLAYER is not set
-# CONFIG_PKG_USING_PERSIMMON_SRC is not set
-# CONFIG_PKG_USING_JS_PERSIMMON is not set
-# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
-
-#
-# Network Utilities
-#
-# CONFIG_PKG_USING_WICED is not set
-# CONFIG_PKG_USING_CLOUDSDK is not set
-# CONFIG_PKG_USING_POWER_MANAGER is not set
-# CONFIG_PKG_USING_RT_OTA is not set
-# CONFIG_PKG_USING_RTINSIGHT is not set
-# CONFIG_PKG_USING_SMARTCONFIG is not set
-# CONFIG_PKG_USING_RTX is not set
-# CONFIG_RT_USING_TESTCASE is not set
-# CONFIG_PKG_USING_NGHTTP2 is not set
-# CONFIG_PKG_USING_AVS is not set
-# CONFIG_PKG_USING_ALI_LINKKIT is not set
-# CONFIG_PKG_USING_STS is not set
-# CONFIG_PKG_USING_DLMS is not set
-# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
-# CONFIG_PKG_USING_ZBAR is not set
-# CONFIG_PKG_USING_MCF is not set
-# CONFIG_PKG_USING_URPC is not set
-# CONFIG_PKG_USING_DCM is not set
-# CONFIG_PKG_USING_EMQ is not set
-# CONFIG_PKG_USING_CFGM is not set
-# CONFIG_PKG_USING_RT_CMSIS_DAP is not set
-# CONFIG_PKG_USING_SMODULE is not set
-# CONFIG_PKG_USING_SNFD is not set
-# CONFIG_PKG_USING_UDBD is not set
-# CONFIG_PKG_USING_BENCHMARK is not set
-# CONFIG_PKG_USING_UBJSON is not set
-# CONFIG_PKG_USING_DATATYPE is not set
-# CONFIG_PKG_USING_FASTFS is not set
-# CONFIG_PKG_USING_RIL is not set
-# CONFIG_PKG_USING_WATCH_DCM_SVC is not set
-# CONFIG_PKG_USING_WATCH_APP_FWK is not set
-# CONFIG_PKG_USING_GUI_TEST is not set
-# CONFIG_PKG_USING_PMEM is not set
-# CONFIG_PKG_USING_LWRDP is not set
-# CONFIG_PKG_USING_MASAN is not set
-# CONFIG_PKG_USING_BSDIFF_LIB is not set
-# CONFIG_PKG_USING_PRC_DIFF is not set
-
-#
-# RT-Thread Smart
-#
-# CONFIG_PKG_USING_UKERNEL is not set
-# CONFIG_PKG_USING_TRACE_AGENT is not set
 CONFIG_SOC_FAMILY_AT32=y
 CONFIG_SOC_SERIES_AT32F437=y
 

bsp/at32/at32f437-start/README.md

@@ -63,8 +63,8 @@ AT32F437-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以
 | PD15 | LED4              |
 | PA9  | USART1_TX         |
 | PA10 | USART1_RX         |
-| PA2  | USART2_TX         |
-| PA3  | USART2_RX         |
+| PD5  | USART2_TX         |
+| PD6  | USART2_RX         |
 | PB10 | USART3_TX         |
 | PB11 | USART3_RX         |
 | PA4  | SPI1_NSS          |

bsp/at32/at32f437-start/board/Kconfig

@@ -90,13 +90,28 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable UART1"
                 default y
 
+            config BSP_UART1_RX_USING_DMA
+                bool "Enable UART1 RX DMA"
+                depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART2
                 bool "Enable UART2"
                 default n
 
+            config BSP_UART2_RX_USING_DMA
+                bool "Enable UART2 RX DMA"
+                depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA
+                default n
+
             config BSP_USING_UART3
                 bool "Enable UART3"
                 default n
+
+            config BSP_UART3_RX_USING_DMA
+                bool "Enable UART3 RX DMA"
+                depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_PWM
@@ -155,9 +170,31 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable SPI1 BUS"
                 default n
 
+            config BSP_SPI1_TX_USING_DMA
+                bool "Enable SPI1 TX DMA"
+                depends on BSP_USING_SPI1
+                default n
+
+            config BSP_SPI1_RX_USING_DMA
+                bool "Enable SPI1 RX DMA"
+                depends on BSP_USING_SPI1
+                select BSP_SPI1_TX_USING_DMA
+                default n
+
             config BSP_USING_SPI2
                 bool "Enable SPI2 BUS"
                 default n
+
+            config BSP_SPI2_TX_USING_DMA
+                bool "Enable SPI2 TX DMA"
+                depends on BSP_USING_SPI2
+                default n
+
+            config BSP_SPI2_RX_USING_DMA
+                bool "Enable SPI2 RX DMA"
+                depends on BSP_USING_SPI2
+                select BSP_SPI2_TX_USING_DMA
+                default n
         endif
 
     menuconfig BSP_USING_I2C

bsp/at32/at32f437-start/board/src/at32_msp.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2022-03-28     shelton      first version
+ * 2022-12-05     shelton      uart2 pins change to pd5/pd6
  */
 
 #include <rtthread.h>
@@ -40,16 +41,16 @@ void at32_msp_usart_init(void *instance)
     if(usart_x == USART2)
     {
         crm_periph_clock_enable(CRM_USART2_PERIPH_CLOCK, TRUE);
-        crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE);
+        crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE);
 
         gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
         gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
         gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
-        gpio_init_struct.gpio_pins = GPIO_PINS_2 | GPIO_PINS_3;
-        gpio_init(GPIOA, &gpio_init_struct);
+        gpio_init_struct.gpio_pins = GPIO_PINS_5 | GPIO_PINS_6;
+        gpio_init(GPIOD, &gpio_init_struct);
 
-        gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE2, GPIO_MUX_7);
-        gpio_pin_mux_config(GPIOA, GPIO_PINS_SOURCE3, GPIO_MUX_7);
+        gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE5, GPIO_MUX_7);
+        gpio_pin_mux_config(GPIOD, GPIO_PINS_SOURCE6, GPIO_MUX_7);
     }
 #endif
 #ifdef BSP_USING_UART3

bsp/at32/at32f437-start/project.ewp

@@ -352,6 +352,7 @@
           <name>CCIncludePath2</name>
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -363,7 +364,7 @@
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support</state>
@@ -1396,6 +1397,7 @@
           <name>CCIncludePath2</name>
           <state />
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension\fcntl\octal</state>
+          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
           <state>$PROJ_DIR$\..\..\..\components\finsh</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\common</state>
           <state>$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4</state>
@@ -1407,7 +1409,7 @@
           <state>$PROJ_DIR$\..\libraries\rt_drivers</state>
           <state>$PROJ_DIR$\.</state>
           <state>$PROJ_DIR$\applications</state>
-          <state>$PROJ_DIR$\..\..\..\components\libc\posix\ipc</state>
+          <state>$PROJ_DIR$\..\libraries\rt_drivers\config</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\posix\io\poll</state>
           <state>$PROJ_DIR$\..\..\..\components\libc\compilers\common\extension</state>
           <state>$PROJ_DIR$\..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support</state>

bsp/at32/at32f437-start/project.uvproj

@@ -359,7 +359,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, AT32F437ZMT7, __RTTHREAD__, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F435_437_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F435_437_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f437-start/project.uvprojx

@@ -335,7 +335,7 @@
               <MiscControls />
               <Define>__STDC_LIMIT_MACROS, USE_STDPERIPH_DRIVER, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, AT32F437ZMT7, __RTTHREAD__, RT_USING_ARM_LIBC</Define>
               <Undefine />
-              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F435_437_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
+              <IncludePath>applications;.;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\inc;..\libraries\rt_drivers;..\libraries\rt_drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\device_support;..\libraries\AT32F435_437_Firmware_Library\cmsis\cm4\core_support;..\libraries\AT32F435_437_Firmware_Library\drivers\inc;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>

bsp/at32/at32f437-start/rtconfig.h

@@ -129,67 +129,24 @@
 
 /* language packages */
 
-/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
-
-
-/* XML: Extensible Markup Language */
-
 
 /* multimedia packages */
 
-/* LVGL: powerful and easy-to-use embedded GUI library */
-
-
-/* u8g2: a monochrome graphic library */
-
-
-/* PainterEngine: A cross-platform graphics application framework written in C language */
-
 
 /* tools packages */
 
 
 /* system packages */
 
-/* enhanced kernel services */
-
-
-/* acceleration: Assembly language or algorithmic acceleration packages */
-
-
-/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
-
-
-/* Micrium: Micrium software products porting for RT-Thread */
-
 
 /* peripheral libraries and drivers */
 
 
-/* Kendryte SDK */
-
-
-/* AI packages */
-
-
 /* miscellaneous packages */
 
-/* project laboratory */
 
 /* samples: kernel and components samples */
 
-
-/* entertainment: terminal games and other interesting software packages */
-
-
-/* Privated Packages of RealThread */
-
-
-/* Network Utilities */
-
-
-/* RT-Thread Smart */
-
 #define SOC_FAMILY_AT32
 #define SOC_SERIES_AT32F437
 

bsp/at32/libraries/rt_drivers/SConscript

@@ -59,8 +59,9 @@ if GetDepend(['BSP_USING_CAN']):
 if GetDepend(['BSP_USING_SDIO']):
     src += ['drv_sdio.c']
 
-CPPPATH = [cwd]
+path =  [cwd]
+path += [cwd + '/config']
 
-group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
 
 Return('group')

bsp/at32/libraries/rt_drivers/config/f403a_407/dma_config.h

@@ -0,0 +1,137 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __DMA_CONFIG_H__
+#define __DMA_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* DMA1 channel1 */
+/* DMA1 channel2 */
+#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_CHANNEL)
+#define SPI1_RX_DMA_IRQHandler          DMA1_Channel2_IRQHandler
+#define SPI1_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI1_RX_DMA_CHANNEL             DMA1_CHANNEL2
+#define SPI1_RX_DMA_IRQ                 DMA1_Channel2_IRQn
+#elif defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_CHANNEL)
+#define UART3_TX_DMA_IRQHandler         DMA1_Channel2_IRQHandler
+#define UART3_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART3_TX_DMA_CHANNEL            DMA1_CHANNEL2
+#define UART3_TX_DMA_IRQ                DMA1_Channel2_IRQn
+#endif
+
+/* DMA1 channel3 */
+#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_CHANNEL)
+#define SPI1_TX_DMA_IRQHandler          DMA1_Channel3_IRQHandler
+#define SPI1_TX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI1_TX_DMA_CHANNEL             DMA1_CHANNEL3
+#define SPI1_TX_DMA_IRQ                 DMA1_Channel3_IRQn
+#elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_CHANNEL)
+#define UART3_RX_DMA_IRQHandler         DMA1_Channel3_IRQHandler
+#define UART3_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART3_RX_DMA_CHANNEL            DMA1_CHANNEL3
+#define UART3_RX_DMA_IRQ                DMA1_Channel3_IRQn
+#endif
+
+/* DMA1 channel4 */
+#if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_CHANNEL)
+#define SPI2_RX_DMA_IRQHandler          DMA1_Channel4_IRQHandler
+#define SPI2_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI2_RX_DMA_CHANNEL             DMA1_CHANNEL4
+#define SPI2_RX_DMA_IRQ                 DMA1_Channel4_IRQn
+#elif defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_CHANNEL)
+#define UART1_TX_DMA_IRQHandler         DMA1_Channel4_IRQHandler
+#define UART1_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART1_TX_DMA_CHANNEL            DMA1_CHANNEL4
+#define UART1_TX_DMA_IRQ                DMA1_Channel4_IRQn
+#endif
+
+/* DMA1 channel5 */
+#if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_CHANNEL)
+#define SPI2_TX_DMA_IRQHandler          DMA1_Channel5_IRQHandler
+#define SPI2_TX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI2_TX_DMA_CHANNEL             DMA1_CHANNEL5
+#define SPI2_TX_DMA_IRQ                 DMA1_Channel5_IRQn
+
+#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_CHANNEL)
+#define UART1_RX_DMA_IRQHandler         DMA1_Channel5_IRQHandler
+#define UART1_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART1_RX_DMA_CHANNEL            DMA1_CHANNEL5
+#define UART1_RX_DMA_IRQ                DMA1_Channel5_IRQn
+#endif
+
+/* DMA1 channel6 */
+#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_CHANNEL)
+#define UART2_RX_DMA_IRQHandler         DMA1_Channel6_IRQHandler
+#define UART2_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART2_RX_DMA_CHANNEL            DMA1_CHANNEL6
+#define UART2_RX_DMA_IRQ                DMA1_Channel6_IRQn
+#endif
+
+/* DMA1 channel7 */
+#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_CHANNEL)
+#define UART2_TX_DMA_IRQHandler         DMA1_Channel7_IRQHandler
+#define UART2_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART2_TX_DMA_CHANNEL            DMA1_CHANNEL7
+#define UART2_TX_DMA_IRQ                DMA1_Channel7_IRQn
+#endif
+
+/* DMA2 channel1 */
+#if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_CHANNEL)
+#define SPI3_RX_DMA_IRQHandler          DMA2_Channel1_IRQHandler
+#define SPI3_RX_DMA_CLOCK               CRM_DMA2_PERIPH_CLOCK
+#define SPI3_RX_DMA_CHANNEL             DMA2_CHANNEL1
+#define SPI3_RX_DMA_IRQ                 DMA2_Channel1_IRQn
+#endif
+
+/* DMA2 channel2 */
+#if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_CHANNEL)
+#define SPI3_TX_DMA_IRQHandler          DMA2_Channel2_IRQHandler
+#define SPI3_TX_DMA_CLOCK               CRM_DMA2_PERIPH_CLOCK
+#define SPI3_TX_DMA_CHANNEL             DMA2_CHANNEL2
+#define SPI3_TX_DMA_IRQ                 DMA2_Channel2_IRQn
+#endif
+
+/* DMA2 channel3 */
+#if defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_CHANNEL)
+#define SPI4_RX_DMA_IRQHandler          DMA2_Channel3_IRQHandler
+#define SPI4_RX_DMA_CLOCK               CRM_DMA2_PERIPH_CLOCK
+#define SPI4_RX_DMA_CHANNEL             DMA2_CHANNEL3
+#define SPI4_RX_DMA_IRQ                 DMA2_Channel3_IRQn
+#elif defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_CHANNEL)
+#define UART4_RX_DMA_IRQHandler         DMA2_Channel3_IRQHandler
+#define UART4_RX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART4_RX_DMA_CHANNEL            DMA2_CHANNEL3
+#define UART4_RX_DMA_IRQ                DMA2_Channel3_IRQn
+#endif
+
+/* DMA2 channel4 */
+/* DMA2 channel5 */
+#if defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_CHANNEL)
+#define SPI4_TX_DMA_IRQHandler          DMA2_Channel4_5_IRQHandler
+#define SPI4_TX_DMA_CLOCK               CRM_DMA2_PERIPH_CLOCK
+#define SPI4_TX_DMA_CHANNEL             DMA2_CHANNEL5
+#define SPI4_TX_DMA_IRQ                 DMA2_Channel4_5_IRQn
+#elif defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_CHANNEL)
+#define UART4_TX_DMA_IRQHandler         DMA2_Channel4_5_IRQHandler
+#define UART4_TX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART4_TX_DMA_CHANNEL            DMA2_CHANNEL5
+#define UART4_TX_DMA_IRQ                DMA2_Channel4_5_IRQn
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DMA_CONFIG_H__ */

bsp/at32/libraries/rt_drivers/config/f403a_407/spi_config.h

@@ -0,0 +1,141 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-18     shelton      first version
+ */
+
+#ifndef __SPI_CONFIG_H__
+#define __SPI_CONFIG_H__
+
+#include <rtthread.h>
+#include "dma_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SPI1_IRQHandler      SPI1_IRQHandler
+#define SPI2_IRQHandler      SPI2_I2S2EXT_IRQHandler
+#define SPI3_IRQHandler      SPI3_I2S3EXT_IRQHandler
+#define SPI4_IRQHandler      SPI4_IRQHandler
+
+#ifdef BSP_USING_SPI1
+#define SPI1_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI1,                              \
+        .spi_name = "spi1",                         \
+        .irqn = SPI1_IRQn,                          \
+    }
+#endif /* BSP_USING_SPI1 */
+
+#ifdef BSP_SPI1_RX_USING_DMA
+#define SPI1_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI1_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI1_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI1_RX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI1_RX_USING_DMA */
+
+#ifdef BSP_SPI1_TX_USING_DMA
+#define SPI1_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI1_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI1_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI1_TX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI1_TX_USING_DMA */
+
+#ifdef BSP_USING_SPI2
+#define SPI2_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI2,                              \
+        .spi_name = "spi2",                         \
+        .irqn = SPI2_I2S2EXT_IRQn,                  \
+    }
+#endif /* BSP_USING_SPI2 */
+
+#ifdef BSP_SPI2_RX_USING_DMA
+#define SPI2_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI2_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI2_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI2_RX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI2_RX_USING_DMA */
+
+#ifdef BSP_SPI2_TX_USING_DMA
+#define SPI2_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI2_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI2_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI2_TX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI2_TX_USING_DMA */
+
+#ifdef BSP_USING_SPI3
+#define SPI3_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI3,                              \
+        .spi_name = "spi3",                         \
+        .irqn = SPI3_I2S3EXT_IRQn,                  \
+    }
+#endif /* BSP_USING_SPI3 */
+
+#ifdef BSP_SPI3_RX_USING_DMA
+#define SPI3_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI3_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI3_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI3_RX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI3_RX_USING_DMA */
+
+#ifdef BSP_SPI3_TX_USING_DMA
+#define SPI3_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI3_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI3_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI3_TX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI3_TX_USING_DMA */
+
+#ifdef BSP_USING_SPI4
+#define SPI4_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI4,                              \
+        .spi_name = "spi4",                         \
+        .irqn = SPI4_IRQn,                          \
+    }
+#endif /* BSP_USING_SPI4 */
+
+#ifdef BSP_SPI4_RX_USING_DMA
+#define SPI4_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI4_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI4_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI4_RX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI4_RX_USING_DMA */
+
+#ifdef BSP_SPI4_TX_USING_DMA
+#define SPI4_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI4_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI4_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI4_TX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI4_TX_USING_DMA */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__SPI_CONFIG_H__ */
+
+
+

bsp/at32/libraries/rt_drivers/config/f403a_407/uart_config.h

@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __UART_CONFIG_H__
+#define __UART_CONFIG_H__
+
+#include <rtthread.h>
+#include "dma_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(BSP_USING_UART1)
+#define UART1_CONFIG                                                \
+    {                                                               \
+        .name = "uart1",                                            \
+        .uart_x = USART1,                                           \
+        .irqn = USART1_IRQn,                                        \
+    }
+
+#if defined(BSP_UART1_RX_USING_DMA)
+#define UART1_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART1_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART1_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART1_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART1_RX_USING_DMA */
+
+#if defined(BSP_UART1_TX_USING_DMA)
+#define UART1_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART1_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART1_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART1_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART1_TX_USING_DMA */
+#endif /* BSP_USING_UART1 */
+
+#if defined(BSP_USING_UART2)
+#define UART2_CONFIG                                                \
+    {                                                               \
+        .name = "uart2",                                            \
+        .uart_x = USART2,                                           \
+        .irqn = USART2_IRQn,                                        \
+    }
+
+#if defined(BSP_UART2_RX_USING_DMA)
+#define UART2_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART2_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART2_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART2_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART2_RX_USING_DMA */
+
+#if defined(BSP_UART2_TX_USING_DMA)
+#define UART2_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART2_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART2_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART2_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART2_TX_USING_DMA */
+#endif /* BSP_USING_UART2 */
+
+#if defined(BSP_USING_UART3)
+#define UART3_CONFIG                                                \
+    {                                                               \
+        .name = "uart3",                                            \
+        .uart_x = USART3,                                           \
+        .irqn = USART3_IRQn,                                        \
+    }
+
+#if defined(BSP_UART3_RX_USING_DMA)
+#define UART3_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART3_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART3_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART3_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART3_RX_USING_DMA */
+
+#if defined(BSP_UART3_TX_USING_DMA)
+#define UART3_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART3_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART3_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART3_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART3_TX_USING_DMA */
+#endif /* BSP_USING_UART3 */
+
+#if defined(BSP_USING_UART4)
+#define UART4_CONFIG                                                \
+    {                                                               \
+        .name = "uart4",                                            \
+        .uart_x = UART4,                                            \
+        .irqn = UART4_IRQn,                                         \
+    }
+
+#if defined(BSP_UART4_RX_USING_DMA)
+#define UART4_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART4_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART4_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART4_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART4_RX_USING_DMA */
+
+#if defined(BSP_UART4_TX_USING_DMA)
+#define UART4_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART4_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART4_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART4_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART4_TX_USING_DMA */
+#endif /* BSP_USING_UART4 */
+
+#if defined(BSP_USING_UART5)
+#define UART5_CONFIG                                                \
+    {                                                               \
+        .name = "uart5",                                            \
+        .uart_x = UART5,                                            \
+        .irqn = UART5_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART5 */
+
+#if defined(BSP_USING_UART6)
+#define UART6_CONFIG                                                \
+    {                                                               \
+        .name = "usart6",                                           \
+        .uart_x = UART6,                                            \
+        .irqn = USART6_IRQn,                                        \
+    }
+#endif /* BSP_USING_UART6 */
+
+#if defined(BSP_USING_UART7)
+#define UART7_CONFIG                                                \
+    {                                                               \
+        .name = "uart7",                                            \
+        .uart_x = UART7,                                            \
+        .irqn = UART7_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART7 */
+
+#if defined(BSP_USING_UART8)
+#define UART8_CONFIG                                                \
+    {                                                               \
+        .name = "uart8",                                            \
+        .uart_x = UART8,                                            \
+        .irqn = UART8_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART8 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

bsp/at32/libraries/rt_drivers/config/f413/dma_config.h

@@ -0,0 +1,110 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __DMA_CONFIG_H__
+#define __DMA_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* DMA1 channel1 */
+/* DMA1 channel2 */
+#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_CHANNEL)
+#define SPI1_RX_DMA_IRQHandler          DMA1_Channel2_IRQHandler
+#define SPI1_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI1_RX_DMA_CHANNEL             DMA1_CHANNEL2
+#define SPI1_RX_DMA_IRQ                 DMA1_Channel2_IRQn
+#elif defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_CHANNEL)
+#define UART3_TX_DMA_IRQHandler         DMA1_Channel2_IRQHandler
+#define UART3_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART3_TX_DMA_CHANNEL            DMA1_CHANNEL2
+#define UART3_TX_DMA_IRQ                DMA1_Channel2_IRQn
+#endif
+
+/* DMA1 channel3 */
+#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_CHANNEL)
+#define SPI1_TX_DMA_IRQHandler          DMA1_Channel3_IRQHandler
+#define SPI1_TX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI1_TX_DMA_CHANNEL             DMA1_CHANNEL3
+#define SPI1_TX_DMA_IRQ                 DMA1_Channel3_IRQn
+#elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_CHANNEL)
+#define UART3_RX_DMA_IRQHandler         DMA1_Channel3_IRQHandler
+#define UART3_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART3_RX_DMA_CHANNEL            DMA1_CHANNEL3
+#define UART3_RX_DMA_IRQ                DMA1_Channel3_IRQn
+#endif
+
+/* DMA1 channel4 */
+#if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_CHANNEL)
+#define SPI2_RX_DMA_IRQHandler          DMA1_Channel4_IRQHandler
+#define SPI2_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI2_RX_DMA_CHANNEL             DMA1_CHANNEL4
+#define SPI2_RX_DMA_IRQ                 DMA1_Channel4_IRQn
+#elif defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_CHANNEL)
+#define UART1_TX_DMA_IRQHandler         DMA1_Channel4_IRQHandler
+#define UART1_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART1_TX_DMA_CHANNEL            DMA1_CHANNEL4
+#define UART1_TX_DMA_IRQ                DMA1_Channel4_IRQn
+#endif
+
+/* DMA1 channel5 */
+#if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_CHANNEL)
+#define SPI2_TX_DMA_IRQHandler          DMA1_Channel5_IRQHandler
+#define SPI2_TX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI2_TX_DMA_CHANNEL             DMA1_CHANNEL5
+#define SPI2_TX_DMA_IRQ                 DMA1_Channel5_IRQn
+
+#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_CHANNEL)
+#define UART1_RX_DMA_IRQHandler         DMA1_Channel5_IRQHandler
+#define UART1_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART1_RX_DMA_CHANNEL            DMA1_CHANNEL5
+#define UART1_RX_DMA_IRQ                DMA1_Channel5_IRQn
+#endif
+
+/* DMA1 channel6 */
+#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_CHANNEL)
+#define UART2_RX_DMA_IRQHandler         DMA1_Channel6_IRQHandler
+#define UART2_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART2_RX_DMA_CHANNEL            DMA1_CHANNEL6
+#define UART2_RX_DMA_IRQ                DMA1_Channel6_IRQn
+#endif
+
+/* DMA1 channel7 */
+#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_CHANNEL)
+#define UART2_TX_DMA_IRQHandler         DMA1_Channel7_IRQHandler
+#define UART2_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART2_TX_DMA_CHANNEL            DMA1_CHANNEL7
+#define UART2_TX_DMA_IRQ                DMA1_Channel7_IRQn
+#endif
+
+/* DMA2 channel3 */
+#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_CHANNEL)
+#define UART4_RX_DMA_IRQHandler         DMA2_Channel3_IRQHandler
+#define UART4_RX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART4_RX_DMA_CHANNEL            DMA2_CHANNEL3
+#define UART4_RX_DMA_IRQ                DMA2_Channel3_IRQn
+#endif
+/* DMA2 channel4 */
+/* DMA2 channel5 */
+#if defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_CHANNEL)
+#define UART4_TX_DMA_IRQHandler         DMA2_Channel4_5_IRQHandler
+#define UART4_TX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART4_TX_DMA_CHANNEL            DMA2_CHANNEL5
+#define UART4_TX_DMA_IRQ                DMA2_Channel4_5_IRQn
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DMA_CONFIG_H__ */

bsp/at32/libraries/rt_drivers/config/f413/spi_config.h

@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-18     shelton      first version
+ */
+
+#ifndef __SPI_CONFIG_H__
+#define __SPI_CONFIG_H__
+
+#include <rtthread.h>
+#include "dma_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SPI1_IRQHandler      SPI1_IRQHandler
+#define SPI2_IRQHandler      SPI2_IRQHandler
+
+#ifdef BSP_USING_SPI1
+#define SPI1_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI1,                              \
+        .spi_name = "spi1",                         \
+        .irqn = SPI1_IRQn,                          \
+    }
+#endif /* BSP_USING_SPI1 */
+
+#ifdef BSP_SPI1_RX_USING_DMA
+#define SPI1_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI1_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI1_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI1_RX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI1_RX_USING_DMA */
+
+#ifdef BSP_SPI1_TX_USING_DMA
+#define SPI1_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI1_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI1_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI1_TX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI1_TX_USING_DMA */
+
+#ifdef BSP_USING_SPI2
+#define SPI2_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI2,                              \
+        .spi_name = "spi2",                         \
+        .irqn = SPI2_IRQn,                          \
+    }
+#endif /* BSP_USING_SPI2 */
+
+#ifdef BSP_SPI2_RX_USING_DMA
+#define SPI2_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI2_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI2_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI2_RX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI2_RX_USING_DMA */
+
+#ifdef BSP_SPI2_TX_USING_DMA
+#define SPI2_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI2_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI2_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI2_TX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI2_TX_USING_DMA */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__SPI_CONFIG_H__ */

bsp/at32/libraries/rt_drivers/config/f413/uart_config.h

@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __UART_CONFIG_H__
+#define __UART_CONFIG_H__
+
+#include <rtthread.h>
+#include "dma_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(BSP_USING_UART1)
+#define UART1_CONFIG                                                \
+    {                                                               \
+        .name = "uart1",                                            \
+        .uart_x = USART1,                                           \
+        .irqn = USART1_IRQn,                                        \
+    }
+
+#if defined(BSP_UART1_RX_USING_DMA)
+#define UART1_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART1_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART1_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART1_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART1_RX_USING_DMA */
+
+#if defined(BSP_UART1_TX_USING_DMA)
+#define UART1_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART1_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART1_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART1_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART1_TX_USING_DMA */
+#endif /* BSP_USING_UART1 */
+
+#if defined(BSP_USING_UART2)
+#define UART2_CONFIG                                                \
+    {                                                               \
+        .name = "uart2",                                            \
+        .uart_x = USART2,                                           \
+        .irqn = USART2_IRQn,                                        \
+    }
+
+#if defined(BSP_UART2_RX_USING_DMA)
+#define UART2_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART2_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART2_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART2_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART2_RX_USING_DMA */
+
+#if defined(BSP_UART2_TX_USING_DMA)
+#define UART2_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART2_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART2_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART2_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART2_TX_USING_DMA */
+#endif /* BSP_USING_UART2 */
+
+#if defined(BSP_USING_UART3)
+#define UART3_CONFIG                                                \
+    {                                                               \
+        .name = "uart3",                                            \
+        .uart_x = USART3,                                           \
+        .irqn = USART3_IRQn,                                        \
+    }
+
+#if defined(BSP_UART3_RX_USING_DMA)
+#define UART3_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART3_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART3_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART3_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART3_RX_USING_DMA */
+
+#if defined(BSP_UART3_TX_USING_DMA)
+#define UART3_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART3_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART3_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART3_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART3_TX_USING_DMA */
+#endif /* BSP_USING_UART3 */
+
+#if defined(BSP_USING_UART4)
+#define UART4_CONFIG                                                \
+    {                                                               \
+        .name = "uart4",                                            \
+        .uart_x = UART4,                                            \
+        .irqn = UART4_IRQn,                                         \
+    }
+
+#if defined(BSP_UART4_RX_USING_DMA)
+#define UART4_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART4_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART4_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART4_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART4_RX_USING_DMA */
+
+#if defined(BSP_UART4_TX_USING_DMA)
+#define UART4_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART4_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART4_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART4_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART4_TX_USING_DMA */
+#endif /* BSP_USING_UART4 */
+
+#if defined(BSP_USING_UART5)
+#define UART5_CONFIG                                                \
+    {                                                               \
+        .name = "uart5",                                            \
+        .uart_x = UART5,                                            \
+        .irqn = UART5_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART5 */
+
+#if defined(BSP_USING_UART6)
+#define UART6_CONFIG                                                \
+    {                                                               \
+        .name = "usart6",                                           \
+        .uart_x = UART6,                                            \
+        .irqn = USART6_IRQn,                                        \
+    }
+#endif /* BSP_USING_UART6 */
+
+#if defined(BSP_USING_UART7)
+#define UART7_CONFIG                                                \
+    {                                                               \
+        .name = "uart7",                                            \
+        .uart_x = UART7,                                            \
+        .irqn = UART7_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART7 */
+
+#if defined(BSP_USING_UART8)
+#define UART8_CONFIG                                                \
+    {                                                               \
+        .name = "uart8",                                            \
+        .uart_x = UART8,                                            \
+        .irqn = UART8_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART8 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

bsp/at32/libraries/rt_drivers/config/f415/dma_config.h

@@ -0,0 +1,109 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __DMA_CONFIG_H__
+#define __DMA_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* DMA1 channel1 */
+/* DMA1 channel2 */
+#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_CHANNEL)
+#define SPI1_RX_DMA_IRQHandler          DMA1_Channel2_IRQHandler
+#define SPI1_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI1_RX_DMA_CHANNEL             DMA1_CHANNEL2
+#define SPI1_RX_DMA_IRQ                 DMA1_Channel2_IRQn
+#elif defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_CHANNEL)
+#define UART3_TX_DMA_IRQHandler         DMA1_Channel2_IRQHandler
+#define UART3_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART3_TX_DMA_CHANNEL            DMA1_CHANNEL2
+#define UART3_TX_DMA_IRQ                DMA1_Channel2_IRQn
+#endif
+
+/* DMA1 channel3 */
+#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_CHANNEL)
+#define SPI1_TX_DMA_IRQHandler          DMA1_Channel3_IRQHandler
+#define SPI1_TX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI1_TX_DMA_CHANNEL             DMA1_CHANNEL3
+#define SPI1_TX_DMA_IRQ                 DMA1_Channel3_IRQn
+#elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_CHANNEL)
+#define UART3_RX_DMA_IRQHandler         DMA1_Channel3_IRQHandler
+#define UART3_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART3_RX_DMA_CHANNEL            DMA1_CHANNEL3
+#define UART3_RX_DMA_IRQ                DMA1_Channel3_IRQn
+#endif
+
+/* DMA1 channel4 */
+#if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_CHANNEL)
+#define SPI2_RX_DMA_IRQHandler          DMA1_Channel4_IRQHandler
+#define SPI2_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI2_RX_DMA_CHANNEL             DMA1_CHANNEL4
+#define SPI2_RX_DMA_IRQ                 DMA1_Channel4_IRQn
+#elif defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_CHANNEL)
+#define UART1_TX_DMA_IRQHandler         DMA1_Channel4_IRQHandler
+#define UART1_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART1_TX_DMA_CHANNEL            DMA1_CHANNEL4
+#define UART1_TX_DMA_IRQ                DMA1_Channel4_IRQn
+#endif
+
+/* DMA1 channel5 */
+#if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_CHANNEL)
+#define SPI2_TX_DMA_IRQHandler          DMA1_Channel5_IRQHandler
+#define SPI2_TX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI2_TX_DMA_CHANNEL             DMA1_CHANNEL5
+#define SPI2_TX_DMA_IRQ                 DMA1_Channel5_IRQn
+#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_CHANNEL)
+#define UART1_RX_DMA_IRQHandler         DMA1_Channel5_IRQHandler
+#define UART1_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART1_RX_DMA_CHANNEL            DMA1_CHANNEL5
+#define UART1_RX_DMA_IRQ                DMA1_Channel5_IRQn
+#endif
+
+/* DMA1 channel6 */
+#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_CHANNEL)
+#define UART2_RX_DMA_IRQHandler         DMA1_Channel6_IRQHandler
+#define UART2_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART2_RX_DMA_CHANNEL            DMA1_CHANNEL6
+#define UART2_RX_DMA_IRQ                DMA1_Channel6_IRQn
+#endif
+
+/* DMA1 channel7 */
+#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_CHANNEL)
+#define UART2_TX_DMA_IRQHandler         DMA1_Channel7_IRQHandler
+#define UART2_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART2_TX_DMA_CHANNEL            DMA1_CHANNEL7
+#define UART2_TX_DMA_IRQ                DMA1_Channel7_IRQn
+#endif
+
+/* DMA2 channel3 */
+#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_CHANNEL)
+#define UART4_RX_DMA_IRQHandler         DMA2_Channel3_IRQHandler
+#define UART4_RX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART4_RX_DMA_CHANNEL            DMA2_CHANNEL3
+#define UART4_RX_DMA_IRQ                DMA2_Channel3_IRQn
+#endif
+/* DMA2 channel4 */
+/* DMA2 channel5 */
+#if defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_CHANNEL)
+#define UART4_TX_DMA_IRQHandler         DMA2_Channel4_5_IRQHandler
+#define UART4_TX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART4_TX_DMA_CHANNEL            DMA2_CHANNEL5
+#define UART4_TX_DMA_IRQ                DMA2_Channel4_5_IRQn
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DMA_CONFIG_H__ */

bsp/at32/libraries/rt_drivers/config/f415/spi_config.h

@@ -0,0 +1,85 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-18     shelton      first version
+ */
+
+#ifndef __SPI_CONFIG_H__
+#define __SPI_CONFIG_H__
+
+#include <rtthread.h>
+#include "dma_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SPI1_IRQHandler      SPI1_IRQHandler
+#define SPI2_IRQHandler      SPI2_IRQHandler
+
+#ifdef BSP_USING_SPI1
+#define SPI1_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI1,                              \
+        .spi_name = "spi1",                         \
+        .irqn = SPI1_IRQn,                          \
+    }
+#endif /* BSP_USING_SPI1 */
+
+#ifdef BSP_SPI1_RX_USING_DMA
+#define SPI1_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI1_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI1_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI1_RX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI1_RX_USING_DMA */
+
+#ifdef BSP_SPI1_TX_USING_DMA
+#define SPI1_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI1_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI1_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI1_TX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI1_TX_USING_DMA */
+
+#ifdef BSP_USING_SPI2
+#define SPI2_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI2,                              \
+        .spi_name = "spi2",                         \
+        .irqn = SPI2_IRQn,                          \
+    }
+#endif /* BSP_USING_SPI2 */
+
+#ifdef BSP_SPI2_RX_USING_DMA
+#define SPI2_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI2_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI2_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI2_RX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI2_RX_USING_DMA */
+
+#ifdef BSP_SPI2_TX_USING_DMA
+#define SPI2_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI2_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI2_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI2_TX_DMA_IRQ,                \
+    }
+#endif /* BSP_SPI2_TX_USING_DMA */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__SPI_CONFIG_H__ */
+
+
+

bsp/at32/libraries/rt_drivers/config/f415/uart_config.h

@@ -0,0 +1,169 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __UART_CONFIG_H__
+#define __UART_CONFIG_H__
+
+#include <rtthread.h>
+#include "dma_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(BSP_USING_UART1)
+#define UART1_CONFIG                                                \
+    {                                                               \
+        .name = "uart1",                                            \
+        .uart_x = USART1,                                           \
+        .irqn = USART1_IRQn,                                        \
+    }
+
+#if defined(BSP_UART1_RX_USING_DMA)
+#define UART1_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART1_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART1_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART1_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART1_RX_USING_DMA */
+
+#if defined(BSP_UART1_TX_USING_DMA)
+#define UART1_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART1_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART1_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART1_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART1_TX_USING_DMA */
+#endif /* BSP_USING_UART1 */
+
+#if defined(BSP_USING_UART2)
+#define UART2_CONFIG                                                \
+    {                                                               \
+        .name = "uart2",                                            \
+        .uart_x = USART2,                                           \
+        .irqn = USART2_IRQn,                                        \
+    }
+
+#if defined(BSP_UART2_RX_USING_DMA)
+#define UART2_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART2_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART2_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART2_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART2_RX_USING_DMA */
+
+#if defined(BSP_UART2_TX_USING_DMA)
+#define UART2_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART2_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART2_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART2_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART2_TX_USING_DMA */
+#endif /* BSP_USING_UART2 */
+
+#if defined(BSP_USING_UART3)
+#define UART3_CONFIG                                                \
+    {                                                               \
+        .name = "uart3",                                            \
+        .uart_x = USART3,                                           \
+        .irqn = USART3_IRQn,                                        \
+    }
+
+#if defined(BSP_UART3_RX_USING_DMA)
+#define UART3_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART3_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART3_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART3_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART3_RX_USING_DMA */
+
+#if defined(BSP_UART3_TX_USING_DMA)
+#define UART3_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART3_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART3_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART3_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART3_TX_USING_DMA */
+#endif /* BSP_USING_UART3 */
+
+#if defined(BSP_USING_UART4)
+#define UART4_CONFIG                                                \
+    {                                                               \
+        .name = "uart4",                                            \
+        .uart_x = UART4,                                            \
+        .irqn = UART4_IRQn,                                         \
+    }
+
+#if defined(BSP_UART4_RX_USING_DMA)
+#define UART4_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART4_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART4_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART4_RX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART4_RX_USING_DMA */
+
+#if defined(BSP_UART4_TX_USING_DMA)
+#define UART4_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART4_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART4_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART4_TX_DMA_IRQ,                               \
+    }
+#endif /* BSP_UART4_TX_USING_DMA */
+#endif /* BSP_USING_UART4 */
+
+#if defined(BSP_USING_UART5)
+#define UART5_CONFIG                                                \
+    {                                                               \
+        .name = "uart5",                                            \
+        .uart_x = UART5,                                            \
+        .irqn = UART5_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART5 */
+
+#if defined(BSP_USING_UART6)
+#define UART6_CONFIG                                                \
+    {                                                               \
+        .name = "usart6",                                           \
+        .uart_x = UART6,                                            \
+        .irqn = USART6_IRQn,                                        \
+    }
+#endif /* BSP_USING_UART6 */
+
+#if defined(BSP_USING_UART7)
+#define UART7_CONFIG                                                \
+    {                                                               \
+        .name = "uart7",                                            \
+        .uart_x = UART7,                                            \
+        .irqn = UART7_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART7 */
+
+#if defined(BSP_USING_UART8)
+#define UART8_CONFIG                                                \
+    {                                                               \
+        .name = "uart8",                                            \
+        .uart_x = UART8,                                            \
+        .irqn = UART8_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART8 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

bsp/at32/libraries/rt_drivers/config/f435_437/dma_config.h

@@ -0,0 +1,220 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __DMA_CONFIG_H__
+#define __DMA_CONFIG_H__
+
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* DMA1 channel1 */
+#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_CHANNEL)
+#define SPI1_RX_DMA_IRQHandler          DMA1_Channel1_IRQHandler
+#define SPI1_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI1_RX_DMA_CHANNEL             DMA1_CHANNEL1
+#define SPI1_RX_DMA_IRQ                 DMA1_Channel1_IRQn
+#define SPI1_RX_DMA_MUX_CHANNEL         DMA1MUX_CHANNEL1
+#define SPI1_RX_DMA_REQ_ID              DMAMUX_DMAREQ_ID_SPI1_RX
+#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_CHANNEL)
+#define UART1_RX_DMA_IRQHandler         DMA1_Channel1_IRQHandler
+#define UART1_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART1_RX_DMA_CHANNEL            DMA1_CHANNEL1
+#define UART1_RX_DMA_IRQ                DMA1_Channel1_IRQn
+#define UART1_RX_DMA_MUX_CHANNEL        DMA1MUX_CHANNEL1
+#define UART1_RX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_USART1_RX
+#endif
+
+/* DMA1 channel2 */
+#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_CHANNEL)
+#define SPI1_TX_DMA_IRQHandler          DMA1_Channel2_IRQHandler
+#define SPI1_TX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI1_TX_DMA_CHANNEL             DMA1_CHANNEL2
+#define SPI1_TX_DMA_IRQ                 DMA1_Channel2_IRQn
+#define SPI1_TX_DMA_MUX_CHANNEL         DMA1MUX_CHANNEL2
+#define SPI1_TX_DMA_REQ_ID              DMAMUX_DMAREQ_ID_SPI1_TX
+#elif defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_CHANNEL)
+#define UART1_TX_DMA_IRQHandler         DMA1_Channel2_IRQHandler
+#define UART1_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART1_TX_DMA_CHANNEL            DMA1_CHANNEL2
+#define UART1_TX_DMA_IRQ                DMA1_Channel2_IRQn
+#define UART1_TX_DMA_MUX_CHANNEL        DMA1MUX_CHANNEL2
+#define UART1_TX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_USART1_TX
+#endif
+
+/* DMA1 channel3 */
+#if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_CHANNEL)
+#define SPI2_RX_DMA_IRQHandler          DMA1_Channel3_IRQHandler
+#define SPI2_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI2_RX_DMA_CHANNEL             DMA1_CHANNEL3
+#define SPI2_RX_DMA_IRQ                 DMA1_Channel3_IRQn
+#define SPI2_RX_DMA_MUX_CHANNEL         DMA1MUX_CHANNEL3
+#define SPI2_RX_DMA_REQ_ID              DMAMUX_DMAREQ_ID_SPI2_RX
+#elif defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_CHANNEL)
+#define UART2_RX_DMA_IRQHandler         DMA1_Channel3_IRQHandler
+#define UART2_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART2_RX_DMA_CHANNEL            DMA1_CHANNEL3
+#define UART2_RX_DMA_IRQ                DMA1_Channel3_IRQn
+#define UART2_RX_DMA_MUX_CHANNEL        DMA1MUX_CHANNEL3
+#define UART2_RX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_USART2_RX
+#endif
+
+/* DMA1 channel4 */
+#if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_CHANNEL)
+#define SPI2_TX_DMA_IRQHandler          DMA1_Channel4_IRQHandler
+#define SPI2_TX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI2_TX_DMA_CHANNEL             DMA1_CHANNEL4
+#define SPI2_TX_DMA_IRQ                 DMA1_Channel4_IRQn
+#define SPI2_TX_DMA_MUX_CHANNEL         DMA1MUX_CHANNEL4
+#define SPI2_TX_DMA_REQ_ID              DMAMUX_DMAREQ_ID_SPI2_TX
+#elif defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_CHANNEL)
+#define UART2_TX_DMA_IRQHandler         DMA1_Channel4_IRQHandler
+#define UART2_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART2_TX_DMA_CHANNEL            DMA1_CHANNEL4
+#define UART2_TX_DMA_IRQ                DMA1_Channel4_IRQn
+#define UART2_TX_DMA_MUX_CHANNEL        DMA1MUX_CHANNEL4
+#define UART2_TX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_USART2_TX
+#endif
+
+/* DMA1 channel5 */
+#if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_CHANNEL)
+#define SPI3_RX_DMA_IRQHandler          DMA1_Channel5_IRQHandler
+#define SPI3_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI3_RX_DMA_CHANNEL             DMA1_CHANNEL5
+#define SPI3_RX_DMA_IRQ                 DMA1_Channel5_IRQn
+#define SPI3_RX_DMA_MUX_CHANNEL         DMA1MUX_CHANNEL5
+#define SPI3_RX_DMA_REQ_ID              DMAMUX_DMAREQ_ID_SPI3_RX
+#elif defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_CHANNEL)
+#define UART3_RX_DMA_IRQHandler         DMA1_Channel5_IRQHandler
+#define UART3_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART3_RX_DMA_CHANNEL            DMA1_CHANNEL5
+#define UART3_RX_DMA_IRQ                DMA1_Channel5_IRQn
+#define UART3_RX_DMA_MUX_CHANNEL        DMA1MUX_CHANNEL5
+#define UART3_RX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_USART3_RX
+#endif
+
+/* DMA1 channel6 */
+#if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_CHANNEL)
+#define SPI3_TX_DMA_IRQHandler          DMA1_Channel6_IRQHandler
+#define SPI3_TX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI3_TX_DMA_CHANNEL             DMA1_CHANNEL6
+#define SPI3_TX_DMA_IRQ                 DMA1_Channel6_IRQn
+#define SPI2_TX_DMA_MUX_CHANNEL         DMA1MUX_CHANNEL6
+#define SPI3_TX_DMA_REQ_ID              DMAMUX_DMAREQ_ID_SPI3_TX
+#elif defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_CHANNEL)
+#define UART3_TX_DMA_IRQHandler         DMA1_Channel6_IRQHandler
+#define UART3_TX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART3_TX_DMA_CHANNEL            DMA1_CHANNEL6
+#define UART3_TX_DMA_IRQ                DMA1_Channel6_IRQn
+#define UART3_TX_DMA_MUX_CHANNEL        DMA1MUX_CHANNEL6
+#define UART3_TX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_USART3_TX
+#endif
+
+/* DMA1 channel7 */
+#if defined(BSP_SPI4_RX_USING_DMA) && !defined(SPI4_RX_DMA_CHANNEL)
+#define SPI4_RX_DMA_IRQHandler          DMA1_Channel7_IRQHandler
+#define SPI4_RX_DMA_CLOCK               CRM_DMA1_PERIPH_CLOCK
+#define SPI4_RX_DMA_CHANNEL             DMA1_CHANNEL7
+#define SPI4_RX_DMA_IRQ                 DMA1_Channel7_IRQn
+#define SPI4_RX_DMA_MUX_CHANNEL         DMA1MUX_CHANNEL7
+#define SPI4_RX_DMA_REQ_ID              DMAMUX_DMAREQ_ID_SPI4_RX
+#elif defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_CHANNEL)
+#define UART4_RX_DMA_IRQHandler         DMA1_Channel7_IRQHandler
+#define UART4_RX_DMA_CLOCK              CRM_DMA1_PERIPH_CLOCK
+#define UART4_RX_DMA_CHANNEL            DMA1_CHANNEL7
+#define UART4_RX_DMA_IRQ                DMA1_Channel7_IRQn
+#define UART4_RX_DMA_MUX_CHANNEL        DMA1MUX_CHANNEL7
+#define UART4_RX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_UART4_RX
+#endif
+
+/* DMA2 channel1 */
+#if defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_CHANNEL)
+#define SPI4_TX_DMA_IRQHandler          DMA2_Channel1_IRQHandler
+#define SPI4_TX_DMA_CLOCK               CRM_DMA2_PERIPH_CLOCK
+#define SPI4_TX_DMA_CHANNEL             DMA2_CHANNEL1
+#define SPI4_TX_DMA_IRQ                 DMA2_Channel1_IRQn
+#define SPI4_TX_DMA_MUX_CHANNEL         DMA2MUX_CHANNEL1
+#define SPI4_TX_DMA_REQ_ID              DMAMUX_DMAREQ_ID_SPI4_TX
+#elif defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_CHANNEL)
+#define UART4_TX_DMA_IRQHandler         DMA2_Channel1_IRQHandler
+#define UART4_TX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART4_TX_DMA_CHANNEL            DMA2_CHANNEL1
+#define UART4_TX_DMA_IRQ                DMA2_Channel1_IRQn
+#define UART4_TX_DMA_MUX_CHANNEL        DMA2MUX_CHANNEL1
+#define UART4_TX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_UART4_TX
+#endif
+
+/* DMA2 channel2 */
+#if defined(BSP_UART5_RX_USING_DMA) && !defined(UART5_RX_DMA_CHANNEL)
+#define UART5_RX_DMA_IRQHandler         DMA2_Channel2_IRQHandler
+#define UART5_RX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART5_RX_DMA_CHANNEL            DMA2_CHANNEL2
+#define UART5_RX_DMA_IRQ                DMA2_Channel2_IRQn
+#define UART5_RX_DMA_MUX_CHANNEL        DMA2MUX_CHANNEL2
+#define UART5_RX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_UART5_RX
+#endif
+
+/* DMA2 channel3 */
+#if defined(BSP_UART5_TX_USING_DMA) && !defined(UART5_TX_DMA_CHANNEL)
+#define UART5_TX_DMA_IRQHandler         DMA2_Channel3_IRQHandler
+#define UART5_TX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART5_TX_DMA_CHANNEL            DMA2_CHANNEL3
+#define UART5_TX_DMA_IRQ                DMA2_Channel3_IRQn
+#define UART5_TX_DMA_MUX_CHANNEL        DMA2MUX_CHANNEL3
+#define UART5_TX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_UART5_TX
+#endif
+
+/* DMA2 channel4 */
+#if defined(BSP_UART6_RX_USING_DMA) && !defined(UART6_RX_DMA_CHANNEL)
+#define UART6_RX_DMA_IRQHandler         DMA2_Channel4_IRQHandler
+#define UART6_RX_DMA_CLOCK              CRM_DMA4_PERIPH_CLOCK
+#define UART6_RX_DMA_CHANNEL            DMA2_CHANNEL4
+#define UART6_RX_DMA_IRQ                DMA2_Channel4_IRQn
+#define UART6_RX_DMA_MUX_CHANNEL        DMA2MUX_CHANNEL4
+#define UART6_RX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_USART6_RX
+#endif
+
+/* DMA2 channel5 */
+#if defined(BSP_UART6_TX_USING_DMA) && !defined(UART6_TX_DMA_CHANNEL)
+#define UART6_TX_DMA_IRQHandler         DMA2_Channel5_IRQHandler
+#define UART6_TX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART6_TX_DMA_CHANNEL            DMA2_CHANNEL5
+#define UART6_TX_DMA_IRQ                DMA2_Channel5_IRQn
+#define UART6_TX_DMA_MUX_CHANNEL        DMA2MUX_CHANNEL5
+#define UART6_TX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_USART6_TX
+#endif
+
+/* DMA2 channel6 */
+#if defined(BSP_UART7_RX_USING_DMA) && !defined(UART7_RX_DMA_CHANNEL)
+#define UART7_RX_DMA_IRQHandler         DMA2_Channel6_IRQHandler
+#define UART7_RX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART7_RX_DMA_CHANNEL            DMA2_CHANNEL6
+#define UART7_RX_DMA_IRQ                DMA2_Channel6_IRQn
+#define UART7_RX_DMA_MUX_CHANNEL        DMA2MUX_CHANNEL6
+#define UART7_RX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_UART7_RX
+#endif
+
+/* DMA2 channel7 */
+#if defined(BSP_UART7_TX_USING_DMA) && !defined(UART7_TX_DMA_CHANNEL)
+#define UART7_TX_DMA_IRQHandler         DMA2_Channel7_IRQHandler
+#define UART7_TX_DMA_CLOCK              CRM_DMA2_PERIPH_CLOCK
+#define UART7_TX_DMA_CHANNEL            DMA2_CHANNEL7
+#define UART7_TX_DMA_IRQ                DMA2_Channel7_IRQn
+#define UART7_TX_DMA_MUX_CHANNEL        DMA2MUX_CHANNEL7
+#define UART7_TX_DMA_REQ_ID             DMAMUX_DMAREQ_ID_UART7_TX
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DMA_CONFIG_H__ */

bsp/at32/libraries/rt_drivers/config/f435_437/spi_config.h

@@ -0,0 +1,157 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-18     shelton      first version
+ */
+
+#ifndef __SPI_CONFIG_H__
+#define __SPI_CONFIG_H__
+
+#include <rtthread.h>
+#include "dma_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SPI1_IRQHandler      SPI1_IRQHandler
+#define SPI2_IRQHandler      SPI2_I2S2EXT_IRQHandler
+#define SPI3_IRQHandler      SPI3_I2S3EXT_IRQHandler
+#define SPI4_IRQHandler      SPI4_IRQHandler
+
+#ifdef BSP_USING_SPI1
+#define SPI1_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI1,                              \
+        .spi_name = "spi1",                         \
+        .irqn = SPI1_IRQn,                          \
+    }
+#endif /* BSP_USING_SPI1 */
+
+#ifdef BSP_SPI1_RX_USING_DMA
+#define SPI1_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI1_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI1_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI1_RX_DMA_IRQ,                \
+        .dmamux_channel = SPI1_RX_DMA_MUX_CHANNEL,  \
+        .request_id = SPI1_RX_DMA_REQ_ID,           \
+    }
+#endif /* BSP_SPI1_RX_USING_DMA */
+
+#ifdef BSP_SPI1_TX_USING_DMA
+#define SPI1_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI1_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI1_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI1_TX_DMA_IRQ,                \
+        .dmamux_channel = SPI1_TX_DMA_MUX_CHANNEL,  \
+        .request_id = SPI1_TX_DMA_REQ_ID,           \
+    }
+#endif /* BSP_SPI1_TX_USING_DMA */
+
+#ifdef BSP_USING_SPI2
+#define SPI2_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI2,                              \
+        .spi_name = "spi2",                         \
+        .irqn = SPI2_I2S2EXT_IRQn,                  \
+    }
+#endif /* BSP_USING_SPI2 */
+
+#ifdef BSP_SPI2_RX_USING_DMA
+#define SPI2_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI2_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI2_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI2_RX_DMA_IRQ,                \
+        .dmamux_channel = SPI2_RX_DMA_MUX_CHANNEL,  \
+        .request_id = SPI2_RX_DMA_REQ_ID,           \
+    }
+#endif /* BSP_SPI2_RX_USING_DMA */
+
+#ifdef BSP_SPI2_TX_USING_DMA
+#define SPI2_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI2_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI2_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI2_TX_DMA_IRQ,                \
+        .dmamux_channel = SPI2_TX_DMA_MUX_CHANNEL,  \
+        .request_id = SPI2_TX_DMA_REQ_ID,           \
+    }
+#endif /* BSP_SPI2_TX_USING_DMA */
+
+#ifdef BSP_USING_SPI3
+#define SPI3_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI3,                              \
+        .spi_name = "spi3",                         \
+        .irqn = SPI3_I2S3EXT_IRQn,                  \
+    }
+#endif /* BSP_USING_SPI3 */
+
+#ifdef BSP_SPI3_RX_USING_DMA
+#define SPI3_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI3_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI3_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI3_RX_DMA_IRQ,                \
+        .dmamux_channel = SPI3_RX_DMA_MUX_CHANNEL,  \
+        .request_id = SPI3_RX_DMA_REQ_ID,           \
+    }
+#endif /* BSP_SPI3_RX_USING_DMA */
+
+#ifdef BSP_SPI3_TX_USING_DMA
+#define SPI3_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI3_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI3_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI3_TX_DMA_IRQ,                \
+        .dmamux_channel = SPI3_TX_DMA_MUX_CHANNEL,  \
+        .request_id = SPI3_TX_DMA_REQ_ID,           \
+    }
+#endif /* BSP_SPI3_TX_USING_DMA */
+
+#ifdef BSP_USING_SPI4
+#define SPI4_CONFIG                                 \
+    {                                               \
+        .spi_x = SPI4,                              \
+        .spi_name = "spi4",                         \
+        .irqn = SPI4_IRQn,                          \
+    }
+#endif /* BSP_USING_SPI4 */
+
+#ifdef BSP_SPI4_RX_USING_DMA
+#define SPI4_RX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI4_RX_DMA_CHANNEL,         \
+        .dma_clock = SPI4_RX_DMA_CLOCK,             \
+        .dma_irqn = SPI4_RX_DMA_IRQ,                \
+        .dmamux_channel = SPI4_RX_DMA_MUX_CHANNEL,  \
+        .request_id = SPI4_RX_DMA_REQ_ID,           \
+    }
+#endif /* BSP_SPI4_RX_USING_DMA */
+
+#ifdef BSP_SPI4_TX_USING_DMA
+#define SPI4_TX_DMA_CONFIG                          \
+    {                                               \
+        .dma_channel = SPI4_TX_DMA_CHANNEL,         \
+        .dma_clock = SPI4_TX_DMA_CLOCK,             \
+        .dma_irqn = SPI4_TX_DMA_IRQ,                \
+        .dmamux_channel = SPI4_TX_DMA_MUX_CHANNEL,  \
+        .request_id = SPI4_TX_DMA_REQ_ID,           \
+    }
+#endif /* BSP_SPI4_TX_USING_DMA */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__SPI_CONFIG_H__ */
+
+
+

bsp/at32/libraries/rt_drivers/config/f435_437/uart_config.h

@@ -0,0 +1,251 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __UART_CONFIG_H__
+#define __UART_CONFIG_H__
+
+#include <rtthread.h>
+#include "dma_config.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(BSP_USING_UART1)
+#define UART1_CONFIG                                                \
+    {                                                               \
+        .name = "uart1",                                            \
+        .uart_x = USART1,                                           \
+        .irqn = USART1_IRQn,                                        \
+    }
+
+#if defined(BSP_UART1_RX_USING_DMA)
+#define UART1_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART1_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART1_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART1_RX_DMA_IRQ,                               \
+        .dmamux_channel = UART1_RX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART1_RX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART1_RX_USING_DMA */
+
+#if defined(BSP_UART1_TX_USING_DMA)
+#define UART1_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART1_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART1_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART1_TX_DMA_IRQ,                               \
+        .dmamux_channel = UART1_TX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART1_TX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART1_TX_USING_DMA */
+#endif /* BSP_USING_UART1 */
+
+#if defined(BSP_USING_UART2)
+#define UART2_CONFIG                                                \
+    {                                                               \
+        .name = "uart2",                                            \
+        .uart_x = USART2,                                           \
+        .irqn = USART2_IRQn,                                        \
+    }
+
+#if defined(BSP_UART2_RX_USING_DMA)
+#define UART2_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART2_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART2_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART2_RX_DMA_IRQ,                               \
+        .dmamux_channel = UART2_RX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART2_RX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART2_RX_USING_DMA */
+
+#if defined(BSP_UART2_TX_USING_DMA)
+#define UART2_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART2_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART2_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART2_TX_DMA_IRQ,                               \
+        .dmamux_channel = UART2_TX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART2_TX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART2_TX_USING_DMA */
+#endif /* BSP_USING_UART2 */
+
+#if defined(BSP_USING_UART3)
+#define UART3_CONFIG                                                \
+    {                                                               \
+        .name = "uart3",                                            \
+        .uart_x = USART3,                                           \
+        .irqn = USART3_IRQn,                                        \
+    }
+
+#if defined(BSP_UART3_RX_USING_DMA)
+#define UART3_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART3_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART3_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART3_RX_DMA_IRQ,                               \
+        .dmamux_channel = UART3_RX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART3_RX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART3_RX_USING_DMA */
+
+#if defined(BSP_UART3_TX_USING_DMA)
+#define UART3_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART3_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART3_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART3_TX_DMA_IRQ,                               \
+        .dmamux_channel = UART3_TX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART3_TX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART3_TX_USING_DMA */
+#endif /* BSP_USING_UART3 */
+
+#if defined(BSP_USING_UART4)
+#define UART4_CONFIG                                                \
+    {                                                               \
+        .name = "uart4",                                            \
+        .uart_x = UART4,                                            \
+        .irqn = UART4_IRQn,                                         \
+    }
+
+#if defined(BSP_UART4_RX_USING_DMA)
+#define UART4_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART4_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART4_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART4_RX_DMA_IRQ,                               \
+        .dmamux_channel = UART4_RX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART4_RX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART4_RX_USING_DMA */
+
+#if defined(BSP_UART4_TX_USING_DMA)
+#define UART4_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART4_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART4_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART4_TX_DMA_IRQ,                               \
+        .dmamux_channel = UART4_TX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART4_TX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART4_TX_USING_DMA */
+#endif /* BSP_USING_UART4 */
+
+#if defined(BSP_USING_UART5)
+#define UART5_CONFIG                                                \
+    {                                                               \
+        .name = "uart5",                                            \
+        .uart_x = UART5,                                            \
+        .irqn = UART5_IRQn,                                         \
+    }
+
+#if defined(BSP_UART5_RX_USING_DMA)
+#define UART5_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART5_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART5_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART5_RX_DMA_IRQ,                               \
+        .dmamux_channel = UART5_RX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART5_RX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART5_RX_USING_DMA */
+
+#if defined(BSP_UART5_TX_USING_DMA)
+#define UART5_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART5_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART5_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART5_TX_DMA_IRQ,                               \
+        .dmamux_channel = UART5_TX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART5_TX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART5_TX_USING_DMA */
+#endif /* BSP_USING_UART5 */
+
+#if defined(BSP_USING_UART6)
+#define UART6_CONFIG                                                \
+    {                                                               \
+        .name = "usart6",                                           \
+        .uart_x = UART6,                                            \
+        .irqn = USART6_IRQn,                                        \
+    }
+
+#if defined(BSP_UART6_RX_USING_DMA)
+#define UART6_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART6_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART6_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART6_RX_DMA_IRQ,                               \
+        .dmamux_channel = UART6_RX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART6_RX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART6_RX_USING_DMA */
+
+#if defined(BSP_UART6_TX_USING_DMA)
+#define UART6_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART6_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART6_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART6_TX_DMA_IRQ,                               \
+        .dmamux_channel = UART6_TX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART6_TX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART6_TX_USING_DMA */
+#endif /* BSP_USING_UART6 */
+
+#if defined(BSP_USING_UART7)
+#define UART7_CONFIG                                                \
+    {                                                               \
+        .name = "uart7",                                            \
+        .uart_x = UART7,                                            \
+        .irqn = UART7_IRQn,                                         \
+    }
+
+#if defined(BSP_UART7_RX_USING_DMA)
+#define UART7_RX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART7_RX_DMA_CHANNEL,                        \
+        .dma_clock = UART7_RX_DMA_CLOCK,                            \
+        .dma_irqn = UART7_RX_DMA_IRQ,                               \
+        .dmamux_channel = UART7_RX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART7_RX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART7_RX_USING_DMA */
+
+#if defined(BSP_UART7_TX_USING_DMA)
+#define UART7_TX_DMA_CONFIG                                         \
+    {                                                               \
+        .dma_channel = UART7_TX_DMA_CHANNEL,                        \
+        .dma_clock = UART7_TX_DMA_CLOCK,                            \
+        .dma_irqn = UART7_TX_DMA_IRQ,                               \
+        .dmamux_channel = UART7_TX_DMA_MUX_CHANNEL,                 \
+        .request_id = UART7_TX_DMA_REQ_ID,                          \
+    }
+#endif /* BSP_UART7_TX_USING_DMA */
+#endif /* BSP_USING_UART7 */
+
+#if defined(BSP_USING_UART8)
+#define UART8_CONFIG                                                \
+    {                                                               \
+        .name = "uart8",                                            \
+        .uart_x = UART8,                                            \
+        .irqn = UART8_IRQn,                                         \
+    }
+#endif /* BSP_USING_UART8 */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

bsp/at32/libraries/rt_drivers/drv_config.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __DRV_CONFIG_H__
+#define __DRV_CONFIG_H__
+
+#include <board.h>
+#include <rtthread.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(SOC_SERIES_AT32F403A) || defined (SOC_SERIES_AT32F407)
+#include "f403a_407/dma_config.h"
+#include "f403a_407/uart_config.h"
+#include "f403a_407/spi_config.h"
+#elif defined(SOC_SERIES_AT32F413)
+#include "f413/dma_config.h"
+#include "f413/uart_config.h"
+#include "f413/spi_config.h"
+#elif defined(SOC_SERIES_AT32F415)
+#include "f415/dma_config.h"
+#include "f415/uart_config.h"
+#include "f415/spi_config.h"
+#elif defined(SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437)
+#include "f435_437/dma_config.h"
+#include "f435_437/uart_config.h"
+#include "f435_437/spi_config.h"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

bsp/at32/libraries/rt_drivers/drv_dma.h

@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2022-11-09     shelton      first version
+ */
+
+#ifndef __DRV_DMA_H__
+#define __DRV_DMA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtdevice.h>
+#include <rtthread.h>
+#include "drv_common.h"
+
+#define DMA_GLO_FLAG                    0x0001U
+#define DMA_FDT_FLAG                    0x0002U
+#define DMA_HDT_FLAG                    0x0004U
+#define DMA_DTE_FLAG                    0x0008U
+
+struct dma_config {
+    dma_type *dma_x;
+    rt_uint8_t channel_index;
+    rt_bool_t dma_done;
+    dma_channel_type *dma_channel;
+    crm_periph_clock_type dma_clock;
+    IRQn_Type dma_irqn;
+#if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437)
+    dmamux_channel_type *dmamux_channel;
+    rt_uint32_t request_id;
+#endif
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__DRV_DMA_H__ */
+
+/************************** end of file ******************/

bsp/at32/libraries/rt_drivers/drv_spi.c

@@ -6,10 +6,13 @@
  * Change Logs:
  * Date           Author       Notes
  * 2022-05-16     shelton      first version
+ * 2022-11-10     shelton      support spi dma
  */
 
 #include "drv_common.h"
 #include "drv_spi.h"
+#include "drv_config.h"
+#include <string.h>
 
 #ifdef RT_USING_SPI
 #if !defined(BSP_USING_SPI1) && !defined(BSP_USING_SPI2) && \
@@ -17,12 +20,44 @@
 #error "Please define at least one BSP_USING_SPIx"
 #endif
 
-#define ARR_LEN(__N)      (sizeof(__N) / sizeof(__N[0]))
-
 //#define DRV_DEBUG
 #define LOG_TAG             "drv.pwm"
 #include <drv_log.h>
 
+enum
+{
+#ifdef BSP_USING_SPI1
+    SPI1_INDEX,
+#endif
+#ifdef BSP_USING_SPI2
+    SPI2_INDEX,
+#endif
+#ifdef BSP_USING_SPI3
+    SPI3_INDEX,
+#endif
+#ifdef BSP_USING_SPI4
+    SPI4_INDEX,
+#endif
+};
+
+static struct at32_spi_config spi_config[] = {
+#ifdef BSP_USING_SPI1
+    SPI1_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI2
+    SPI2_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI3
+    SPI3_CONFIG,
+#endif
+
+#ifdef BSP_USING_SPI4
+    SPI4_CONFIG,
+#endif
+};
+
 /* private rt-thread spi ops function */
 static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration);
 static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message);
@@ -81,14 +116,14 @@ static rt_err_t configure(struct rt_spi_device* device,
                           struct rt_spi_configuration* configuration)
 {
     struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus;
-    struct at32_spi *spi_instance = (struct at32_spi *)spi_bus->parent.user_data;
+    struct at32_spi *instance = (struct at32_spi *)spi_bus->parent.user_data;
 
     spi_init_type spi_init_struct;
 
     RT_ASSERT(device != RT_NULL);
     RT_ASSERT(configuration != RT_NULL);
 
-    at32_msp_spi_init(spi_instance->config->spi_x);
+    at32_msp_spi_init(instance->config->spi_x);
 
     /* data_width */
     if(configuration->data_width <= 8)
@@ -116,7 +151,7 @@ static rt_err_t configure(struct rt_spi_device* device,
         LOG_D("sys freq: %d\n", clocks_struct.sclk_freq);
         LOG_D("max freq: %d\n", max_hz);
 
-        if (spi_instance->config->spi_x == SPI1)
+        if (instance->config->spi_x == SPI1)
         {
             spi_apb_clock = clocks_struct.apb2_freq;
             LOG_D("pclk2 freq: %d\n", clocks_struct.apb2_freq);
@@ -157,7 +192,7 @@ static rt_err_t configure(struct rt_spi_device* device,
         }
         else
         {
-            /*  min prescaler 256 */
+            /* min prescaler 256 */
             spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256;
         }
     } /* baudrate */
@@ -196,38 +231,64 @@ static rt_err_t configure(struct rt_spi_device* device,
     spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
     spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
     /* init spi */
-    spi_init(spi_instance->config->spi_x, &spi_init_struct);
+    spi_init(instance->config->spi_x, &spi_init_struct);
 
     /* enable spi */
-    spi_enable(spi_instance->config->spi_x, TRUE);
+    spi_enable(instance->config->spi_x, TRUE);
     /* disable spi crc */
-    spi_crc_enable(spi_instance->config->spi_x, FALSE);
+    spi_crc_enable(instance->config->spi_x, FALSE);
 
     return RT_EOK;
 };
 
-static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message)
+static void _spi_dma_receive(struct at32_spi *instance, rt_uint8_t *buffer, rt_uint32_t size)
 {
-    struct rt_spi_bus * at32_spi_bus = (struct rt_spi_bus *)device->bus;
-    struct at32_spi *spi_instance = (struct at32_spi *)at32_spi_bus->parent.user_data;
-    struct rt_spi_configuration * config = &device->config;
-    struct at32_spi_cs * at32_spi_cs = device->parent.user_data;
+    dma_channel_type* dma_channel = instance->config->dma_rx->dma_channel;
 
-    RT_ASSERT(device != NULL);
-    RT_ASSERT(message != NULL);
+    dma_channel->dtcnt = size;
+    dma_channel->paddr = (rt_uint32_t)&(instance->config->spi_x->dt);
+    dma_channel->maddr = (rt_uint32_t)buffer;
 
-    /* take cs */
-    if(message->cs_take)
-    {
-        gpio_bits_reset(at32_spi_cs->gpio_x, at32_spi_cs->gpio_pin);
-        LOG_D("spi take cs\n");
-    }
+    /* enable transmit complete interrupt */
+    dma_interrupt_enable(dma_channel, DMA_FDT_INT, TRUE);
+    /* enable dma receive */
+    spi_i2s_dma_receiver_enable(instance->config->spi_x, TRUE);
+
+    /* mark dma flag */
+    instance->config->dma_rx->dma_done = RT_FALSE;
+    /* enable dma channel */
+    dma_channel_enable(dma_channel, TRUE);
+}
+
+static void _spi_dma_transmit(struct at32_spi *instance, rt_uint8_t *buffer, rt_uint32_t size)
+{
+    dma_channel_type *dma_channel = instance->config->dma_tx->dma_channel;
+
+    dma_channel->dtcnt = size;
+    dma_channel->paddr = (rt_uint32_t)&(instance->config->spi_x->dt);
+    dma_channel->maddr = (rt_uint32_t)buffer;
+
+    /* enable spi error interrupt */
+    spi_i2s_interrupt_enable(instance->config->spi_x, SPI_I2S_ERROR_INT, TRUE);
+    /* enable transmit complete interrupt */
+    dma_interrupt_enable(dma_channel, DMA_FDT_INT, TRUE);
+    /* enable dma transmit */
+    spi_i2s_dma_transmitter_enable(instance->config->spi_x, TRUE);
+
+    /* mark dma flag */
+    instance->config->dma_tx->dma_done = RT_FALSE;
+    /* enable dma channel */
+    dma_channel_enable(dma_channel, TRUE);
+}
 
-    if(config->data_width <= 8)
+static void _spi_polling_receive_transmit(struct at32_spi *instance, rt_uint8_t *recv_buf, rt_uint8_t *send_buf, \
+                                          rt_uint32_t size, rt_uint8_t data_mode)
+{
+    /* data frame length 8 bit */
+    if(data_mode <= 8)
     {
-        const rt_uint8_t *send_ptr = message->send_buf;
-        rt_uint8_t * recv_ptr = message->recv_buf;
-        rt_uint32_t size = message->length;
+        const rt_uint8_t *send_ptr = send_buf;
+        rt_uint8_t * recv_ptr = recv_buf;
 
         LOG_D("spi poll transfer start: %d\n", size);
 
@@ -241,14 +302,14 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
             }
 
             /* wait until the transmit buffer is empty */
-            while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_TDBE_FLAG) == RESET);
+            while(spi_i2s_flag_get(instance->config->spi_x, SPI_I2S_TDBE_FLAG) == RESET);
             /* send the byte */
-            spi_i2s_data_transmit(spi_instance->config->spi_x, data);
+            spi_i2s_data_transmit(instance->config->spi_x, data);
 
             /* wait until a data is received */
-            while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_RDBF_FLAG) == RESET);
+            while(spi_i2s_flag_get(instance->config->spi_x, SPI_I2S_RDBF_FLAG) == RESET);
             /* get the received data */
-            data = spi_i2s_data_receive(spi_instance->config->spi_x);
+            data = spi_i2s_data_receive(instance->config->spi_x);
 
             if(recv_ptr != RT_NULL)
             {
@@ -257,11 +318,11 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
         }
         LOG_D("spi poll transfer finsh\n");
     }
-    else if(config->data_width <= 16)
+    /* data frame length 16 bit */
+    else if(data_mode <= 16)
     {
-        const rt_uint16_t * send_ptr = message->send_buf;
-        rt_uint16_t * recv_ptr = message->recv_buf;
-        rt_uint32_t size = message->length;
+        const rt_uint16_t * send_ptr = (rt_uint16_t *)send_buf;
+        rt_uint16_t * recv_ptr = (rt_uint16_t *)recv_buf;
 
         while(size--)
         {
@@ -273,14 +334,14 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
             }
 
             /* wait until the transmit buffer is empty */
-            while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_TDBE_FLAG) == RESET);
+            while(spi_i2s_flag_get(instance->config->spi_x, SPI_I2S_TDBE_FLAG) == RESET);
             /* send the byte */
-            spi_i2s_data_transmit(spi_instance->config->spi_x, data);
+            spi_i2s_data_transmit(instance->config->spi_x, data);
 
             /* wait until a data is received */
-            while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_RDBF_FLAG) == RESET);
+            while(spi_i2s_flag_get(instance->config->spi_x, SPI_I2S_RDBF_FLAG) == RESET);
             /* get the received data */
-            data = spi_i2s_data_receive(spi_instance->config->spi_x);
+            data = spi_i2s_data_receive(instance->config->spi_x);
 
             if(recv_ptr != RT_NULL)
             {
@@ -288,6 +349,119 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
             }
         }
     }
+}
+
+static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message)
+{
+    struct rt_spi_bus * at32_spi_bus = (struct rt_spi_bus *)device->bus;
+    struct at32_spi *instance = (struct at32_spi *)at32_spi_bus->parent.user_data;
+    struct rt_spi_configuration *config = &device->config;
+    struct at32_spi_cs * at32_spi_cs = device->parent.user_data;
+    rt_size_t message_length = 0, already_send_length = 0;
+    rt_uint16_t send_length = 0;
+    rt_uint8_t *recv_buf;
+    const rt_uint8_t *send_buf;
+
+    RT_ASSERT(device != NULL);
+    RT_ASSERT(message != NULL);
+
+    /* take cs */
+    if(message->cs_take)
+    {
+        gpio_bits_reset(at32_spi_cs->gpio_x, at32_spi_cs->gpio_pin);
+        LOG_D("spi take cs\n");
+    }
+
+    message_length = message->length;
+    recv_buf = message->recv_buf;
+    send_buf = message->send_buf;
+    while (message_length)
+    {
+        /* the HAL library use uint16 to save the data length */
+        if (message_length > 65535)
+        {
+            send_length = 65535;
+            message_length = message_length - 65535;
+        }
+        else
+        {
+            send_length = message_length;
+            message_length = 0;
+        }
+
+        /* calculate the start address */
+        already_send_length = message->length - send_length - message_length;
+        send_buf = (rt_uint8_t *)message->send_buf + already_send_length;
+        recv_buf = (rt_uint8_t *)message->recv_buf + already_send_length;
+
+        /* start once data exchange in dma mode */
+        if (message->send_buf && message->recv_buf)
+        {
+            if ((instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_RX) && \
+                (instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_TX))
+            {
+                _spi_dma_receive(instance, (uint8_t *)recv_buf, send_length);
+                _spi_dma_transmit(instance, (uint8_t *)send_buf, send_length);
+                /* wait transfer complete */
+                while(spi_i2s_flag_get(instance->config->spi_x, SPI_I2S_BF_FLAG) != RESET);
+                while((instance->config->dma_tx->dma_done == RT_FALSE) || (instance->config->dma_rx->dma_done == RT_FALSE));
+                /* clear rx overrun flag */
+                spi_i2s_flag_clear(instance->config->spi_x, SPI_I2S_ROERR_FLAG);
+                spi_enable(instance->config->spi_x, FALSE);
+                spi_enable(instance->config->spi_x, TRUE);
+            }
+            else
+            {
+                _spi_polling_receive_transmit(instance, (uint8_t *)recv_buf, (uint8_t *)send_buf, send_length, config->data_width);
+            }
+        }
+        else if (message->send_buf)
+        {
+            if (instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_TX)
+            {
+                _spi_dma_transmit(instance, (uint8_t *)send_buf, send_length);
+                /* wait transfer complete */
+                while(spi_i2s_flag_get(instance->config->spi_x, SPI_I2S_BF_FLAG) != RESET);
+                while(instance->config->dma_tx->dma_done == RT_FALSE);
+                /* clear rx overrun flag */
+                spi_i2s_flag_clear(instance->config->spi_x, SPI_I2S_ROERR_FLAG);
+                spi_enable(instance->config->spi_x, FALSE);
+                spi_enable(instance->config->spi_x, TRUE);
+            }
+            else
+            {
+                _spi_polling_receive_transmit(instance, RT_NULL, (uint8_t *)send_buf, send_length, config->data_width);
+            }
+
+            if (message->cs_release && (device->config.mode & RT_SPI_3WIRE))
+            {
+                /* release the cs by disable spi when using 3 wires spi */
+                spi_enable(instance->config->spi_x, FALSE);
+            }
+        }
+        else
+        {
+            memset((void *)recv_buf, 0xff, send_length);
+            if (instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_RX)
+            {
+                _spi_dma_receive(instance, (uint8_t *)recv_buf, send_length);
+                _spi_dma_transmit(instance, (uint8_t *)recv_buf, send_length);
+                /* wait transfer complete */
+                while(spi_i2s_flag_get(instance->config->spi_x, SPI_I2S_BF_FLAG) != RESET);
+                while((instance->config->dma_tx->dma_done == RT_FALSE) || (instance->config->dma_rx->dma_done == RT_FALSE));
+                /* clear rx overrun flag */
+                spi_i2s_flag_clear(instance->config->spi_x, SPI_I2S_ROERR_FLAG);
+                spi_enable(instance->config->spi_x, FALSE);
+                spi_enable(instance->config->spi_x, TRUE);
+            }
+            else
+            {
+                /* clear the old error flag */
+                spi_i2s_flag_clear(instance->config->spi_x, SPI_I2S_ROERR_FLAG);
+                _spi_polling_receive_transmit(instance, (uint8_t *)recv_buf, (uint8_t *)recv_buf, send_length, config->data_width);
+            }
+        }
+    }
 
     /* release cs */
     if(message->cs_release)
@@ -297,38 +471,340 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
     }
 
     return message->length;
-};
+}
+
+static void _dma_base_channel_check(struct at32_spi *instance)
+{
+    dma_channel_type *rx_channel = instance->config->dma_rx->dma_channel;
+    dma_channel_type *tx_channel = instance->config->dma_tx->dma_channel;
+
+    if(instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_RX)
+    {
+        instance->config->dma_rx->dma_done = RT_TRUE;
+        instance->config->dma_rx->dma_x = (dma_type *)((rt_uint32_t)rx_channel & ~0xFF);
+        instance->config->dma_rx->channel_index = ((((rt_uint32_t)rx_channel & 0xFF) - 8) / 0x14) + 1;
+    }
+
+    if(instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_TX)
+    {
+        instance->config->dma_tx->dma_done = RT_TRUE;
+        instance->config->dma_tx->dma_x = (dma_type *)((rt_uint32_t)tx_channel & ~0xFF);
+        instance->config->dma_tx->channel_index = ((((rt_uint32_t)tx_channel & 0xFF) - 8) / 0x14) + 1;
+    }
+}
+
+static void at32_spi_dma_init(struct at32_spi *instance)
+{
+    dma_init_type dma_init_struct;
+
+    /* search dma base and channel index */
+    _dma_base_channel_check(instance);
+
+    /* config dma channel */
+    dma_default_para_init(&dma_init_struct);
+    dma_init_struct.peripheral_inc_enable = FALSE;
+    dma_init_struct.memory_inc_enable = TRUE;
+    dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
+    dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
+    dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
+    dma_init_struct.loop_mode_enable = FALSE;
+
+    if (instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_RX)
+    {
+        crm_periph_clock_enable(instance->config->dma_rx->dma_clock, TRUE);
+        dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
+
+        dma_reset(instance->config->dma_rx->dma_channel);
+        dma_init(instance->config->dma_rx->dma_channel, &dma_init_struct);
+#if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437)
+        dmamux_enable(instance->config->dma_rx->dma_x, TRUE);
+        dmamux_init(instance->config->dma_rx->dmamux_channel, (dmamux_requst_id_sel_type)instance->config->dma_rx->request_id);
+#endif
+        /* dma irq should set in dma rx mode */
+        nvic_irq_enable(instance->config->dma_rx->dma_irqn, 0, 1);
+    }
+
+    if (instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_TX)
+    {
+        crm_periph_clock_enable(instance->config->dma_tx->dma_clock, TRUE);
+        dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
+
+        dma_reset(instance->config->dma_tx->dma_channel);
+        dma_init(instance->config->dma_tx->dma_channel, &dma_init_struct);
+#if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437)
+        dmamux_enable(instance->config->dma_tx->dma_x, TRUE);
+        dmamux_init(instance->config->dma_tx->dmamux_channel, (dmamux_requst_id_sel_type)instance->config->dma_tx->request_id);
+#endif
+        /* dma irq should set in dma tx mode */
+        nvic_irq_enable(instance->config->dma_tx->dma_irqn, 0, 1);
+    }
+
+    if((instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_TX) || \
+       (instance->config->spi_dma_flag & RT_DEVICE_FLAG_DMA_RX))
+    {
+        nvic_irq_enable(instance->config->irqn, 0, 0);
+    }
+}
+
+void dma_isr(struct dma_config *dma_instance)
+{
+    volatile rt_uint32_t reg_sts = 0, index = 0;
+
+    reg_sts = dma_instance->dma_x->sts;
+    index = dma_instance->channel_index;
+
+    if ((reg_sts & (DMA_FDT_FLAG << (4 * (index - 1)))) != RESET)
+    {
+        /* clear dma flag */
+        dma_instance->dma_x->clr |= (rt_uint32_t)((DMA_FDT_FLAG << (4 * (index - 1))) | \
+                                                  (DMA_HDT_FLAG << (4 * (index - 1))));
+        /* disable interrupt */
+        dma_interrupt_enable(dma_instance->dma_channel, DMA_FDT_INT, FALSE);
+        /* disable dma channel */
+        dma_channel_enable(dma_instance->dma_channel, FALSE);
+        /* mark done flag */
+        dma_instance->dma_done = RT_TRUE;
+    }
+}
+
+void spi_isr(spi_type *spi_x)
+{
+    if(spi_i2s_flag_get(spi_x, SPI_I2S_ROERR_FLAG) != RESET)
+    {
+        /* clear rx overrun error flag */
+        spi_i2s_flag_clear(spi_x, SPI_I2S_ROERR_FLAG);
+    }
+
+    if(spi_i2s_flag_get(spi_x, SPI_MMERR_FLAG) != RESET)
+    {
+        /* clear master mode error flag */
+        spi_i2s_flag_clear(spi_x, SPI_MMERR_FLAG);
+    }
+}
 
-static struct at32_spi_config configs[] = {
 #ifdef BSP_USING_SPI1
-    {SPI1, "spi1"},
+void SPI1_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    spi_isr(spi_config[SPI1_INDEX].spi_x);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#if defined(BSP_SPI1_RX_USING_DMA)
+void SPI1_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_isr(spi_config[SPI1_INDEX].dma_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_SPI1_RX_USING_DMA) */
+#if defined(BSP_SPI1_TX_USING_DMA)
+void SPI1_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_isr(spi_config[SPI1_INDEX].dma_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_SPI1_TX_USING_DMA) */
+#endif
+#ifdef BSP_USING_SPI2
+void SPI2_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    spi_isr(spi_config[SPI2_INDEX].spi_x);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#if defined(BSP_SPI2_RX_USING_DMA)
+void SPI2_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_isr(spi_config[SPI2_INDEX].dma_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_SPI2_RX_USING_DMA) */
+#if defined(BSP_SPI2_TX_USING_DMA)
+void SPI2_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_isr(spi_config[SPI2_INDEX].dma_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_SPI2_TX_USING_DMA) */
+#endif
+#ifdef BSP_USING_SPI3
+void SPI3_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    spi_isr(spi_config[SPI3_INDEX].spi_x);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#if defined(BSP_SPI3_RX_USING_DMA)
+void SPI3_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_isr(spi_config[SPI3_INDEX].dma_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_SPI3_RX_USING_DMA) */
+#if defined(BSP_SPI3_TX_USING_DMA)
+void SPI3_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_isr(spi_config[SPI3_INDEX].dma_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_SPI3_TX_USING_DMA) */
+#endif
+#ifdef BSP_USING_SPI4
+void SPI4_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    spi_isr(spi_config[SPI4_INDEX].spi_x);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#if defined(BSP_SPI4_RX_USING_DMA)
+void SPI4_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_isr(spi_config[SPI4_INDEX].dma_rx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_SPI4_RX_USING_DMA) */
+#if defined(BSP_SPI4_TX_USING_DMA)
+void SPI4_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_isr(spi_config[SPI4_INDEX].dma_tx);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(BSP_SPI14_TX_USING_DMA) */
+#endif
+
+static struct at32_spi spis[sizeof(spi_config) / sizeof(spi_config[0])] = {0};
+
+static void at32_spi_get_dma_config(void)
+{
+#ifdef BSP_USING_SPI1
+    spi_config[SPI1_INDEX].spi_dma_flag = 0;
+#ifdef BSP_SPI1_RX_USING_DMA
+    spi_config[SPI1_INDEX].spi_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config spi1_dma_rx = SPI1_RX_DMA_CONFIG;
+    spi_config[SPI1_INDEX].dma_rx = &spi1_dma_rx;
+#endif
+#ifdef BSP_SPI1_TX_USING_DMA
+    spi_config[SPI1_INDEX].spi_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config spi1_dma_tx = SPI1_TX_DMA_CONFIG;
+    spi_config[SPI1_INDEX].dma_tx = &spi1_dma_tx;
+#endif
 #endif
 
 #ifdef BSP_USING_SPI2
-    {SPI2, "spi2"},
+    spi_config[SPI2_INDEX].spi_dma_flag = 0;
+#ifdef BSP_SPI2_RX_USING_DMA
+    spi_config[SPI2_INDEX].spi_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config spi2_dma_rx = SPI2_RX_DMA_CONFIG;
+    spi_config[SPI2_INDEX].dma_rx = &spi2_dma_rx;
+#endif
+#ifdef BSP_SPI2_TX_USING_DMA
+    spi_config[SPI2_INDEX].spi_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config spi2_dma_tx = SPI2_TX_DMA_CONFIG;
+    spi_config[SPI2_INDEX].dma_tx = &spi2_dma_tx;
+#endif
 #endif
 
 #ifdef BSP_USING_SPI3
-    {SPI3, "spi3"},
+    spi_config[SPI3_INDEX].spi_dma_flag = 0;
+#ifdef BSP_SPI3_RX_USING_DMA
+    spi_config[SPI3_INDEX].spi_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config spi3_dma_rx = SPI3_RX_DMA_CONFIG;
+    spi_config[SPI3_INDEX].dma_rx = &spi3_dma_rx;
+#endif
+#ifdef BSP_SPI3_TX_USING_DMA
+    spi_config[SPI3_INDEX].spi_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config spi3_dma_tx = SPI3_TX_DMA_CONFIG;
+    spi_config[SPI3_INDEX].dma_tx = &spi3_dma_tx;
+#endif
 #endif
 
 #ifdef BSP_USING_SPI4
-    {SPI4, "spi4"},
+    spi_config[SPI4_INDEX].spi_dma_flag = 0;
+#ifdef BSP_SPI4_RX_USING_DMA
+    spi_config[SPI4_INDEX].spi_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config spi4_dma_rx = SPI4_RX_DMA_CONFIG;
+    spi_config[SPI4_INDEX].dma_rx = &spi4_dma_rx;
 #endif
-};
-
-static struct at32_spi spis[sizeof(configs) / sizeof(configs[0])] = {0};
+#ifdef BSP_SPI4_TX_USING_DMA
+    spi_config[SPI4_INDEX].spi_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config spi4_dma_tx = SPI4_TX_DMA_CONFIG;
+    spi_config[SPI4_INDEX].dma_tx = &spi4_dma_tx;
+#endif
+#endif
+}
 
 int rt_hw_spi_init(void)
 {
     int i;
     rt_err_t result;
-    rt_size_t obj_num = sizeof(spis) / sizeof(struct at32_spi);
+    rt_size_t obj_num = sizeof(spi_config) / sizeof(spi_config[0]);
+
+    at32_spi_get_dma_config();
 
     for (i = 0; i < obj_num; i++)
     {
-        spis[i].config = &configs[i];
+        spis[i].config = &spi_config[i];
         spis[i].spi_bus.parent.user_data = (void *)&spis[i];
+
+        if(spis[i].config->spi_dma_flag & (RT_DEVICE_FLAG_DMA_RX | RT_DEVICE_FLAG_DMA_TX))
+        {
+            at32_spi_dma_init(&spis[i]);
+        }
         result = rt_spi_bus_register(&(spis[i].spi_bus), spis[i].config->spi_name, &at32_spi_ops);
     }
 

bsp/at32/libraries/rt_drivers/drv_spi.h

@@ -14,11 +14,16 @@
 #include <rtthread.h>
 #include <drivers/spi.h>
 #include "drv_common.h"
+#include "drv_dma.h"
 
 struct at32_spi_config
 {
     spi_type *spi_x;
     const char *spi_name;
+    IRQn_Type irqn;
+    struct dma_config *dma_rx;
+    struct dma_config *dma_tx;
+    rt_uint16_t spi_dma_flag;
 };
 
 struct at32_spi
@@ -34,7 +39,6 @@ struct at32_spi_cs
 };
 
 /* public function */
-int rt_hw_spi_init(void);
 rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, gpio_type *cs_gpiox, uint16_t cs_gpio_pin);
 
 #endif // __DRV_SPI__

bsp/at32/libraries/rt_drivers/drv_usart.c

@@ -6,11 +6,12 @@
  * Change Logs:
  * Date           Author       Notes
  * 2022-05-16     shelton      first version
- * 2022-10-15     shelton      optimize code
+ * 2022-11-10     shelton      support uart dma
  */
 
 #include "drv_common.h"
 #include "drv_usart.h"
+#include "drv_config.h"
 
 #ifdef RT_USING_SERIAL
 #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && \
@@ -20,13 +21,6 @@
     #error "Please define at least one BSP_USING_UARTx"
 #endif
 
-struct at32_usart {
-    char *name;
-    usart_type* usart_x;
-    IRQn_Type irqn;
-    struct rt_serial_device serial;
-};
-
 enum {
 #ifdef BSP_USING_UART1
     UART1_INDEX,
@@ -54,52 +48,40 @@ enum {
 #endif
 };
 
-static struct at32_usart usart_config[] = {
+static struct at32_uart uart_config[] = {
 #ifdef BSP_USING_UART1
-        { "uart1",
-        USART1,
-        USART1_IRQn, },
+    UART1_CONFIG,
 #endif
 #ifdef BSP_USING_UART2
-        { "uart2",
-        USART2,
-        USART2_IRQn, },
+    UART2_CONFIG,
 #endif
 #ifdef BSP_USING_UART3
-        { "uart3",
-        USART3,
-        USART3_IRQn, },
+    UART3_CONFIG,
 #endif
 #ifdef BSP_USING_UART4
-        { "uart4",
-        UART4,
-        UART4_IRQn, },
+    UART4_CONFIG,
 #endif
 #ifdef BSP_USING_UART5
-        { "uart5",
-        UART5,
-        UART5_IRQn, },
+    UART5_CONFIG,
 #endif
 #ifdef BSP_USING_UART6
-        { "uart6",
-        USART6,
-        USART6_IRQn, },
+    UART6_CONFIG,
 #endif
 #ifdef BSP_USING_UART7
-        { "uart7",
-        UART7,
-        UART7_IRQn, },
+    UART7_CONFIG,
 #endif
 #ifdef BSP_USING_UART8
-        { "uart8",
-        UART8,
-        UART8_IRQn, },
+    UART8_CONFIG,
 #endif
 };
 
+#ifdef RT_SERIAL_USING_DMA
+static void at32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
+#endif
+
 static rt_err_t at32_configure(struct rt_serial_device *serial,
     struct serial_configure *cfg) {
-    struct at32_usart *usart_instance = (struct at32_usart *) serial->parent.user_data;
+    struct at32_uart *instance = (struct at32_uart *) serial->parent.user_data;
     usart_data_bit_num_type data_bit;
     usart_stop_bit_num_type stop_bit;
     usart_parity_selection_type parity_mode;
@@ -107,14 +89,14 @@ static rt_err_t at32_configure(struct rt_serial_device *serial,
     RT_ASSERT(serial != RT_NULL);
     RT_ASSERT(cfg != RT_NULL);
 
-    RT_ASSERT(usart_instance != RT_NULL);
+    RT_ASSERT(instance != RT_NULL);
 
-    at32_msp_usart_init((void *)usart_instance->usart_x);
+    at32_msp_usart_init((void *)instance->uart_x);
 
-    usart_receiver_enable(usart_instance->usart_x, TRUE);
-    usart_transmitter_enable(usart_instance->usart_x, TRUE);
+    usart_receiver_enable(instance->uart_x, TRUE);
+    usart_transmitter_enable(instance->uart_x, TRUE);
 
-    usart_hardware_flow_control_set(usart_instance->usart_x, USART_HARDWARE_FLOW_NONE);
+    usart_hardware_flow_control_set(instance->uart_x, USART_HARDWARE_FLOW_NONE);
 
     switch (cfg->data_bits) {
     case DATA_BITS_8:
@@ -154,94 +136,347 @@ static rt_err_t at32_configure(struct rt_serial_device *serial,
         parity_mode = USART_PARITY_NONE;
         break;
     }
-    usart_parity_selection_config(usart_instance->usart_x, parity_mode);
-    usart_init(usart_instance->usart_x, cfg->baud_rate, data_bit, stop_bit);
-    usart_enable(usart_instance->usart_x, TRUE);
+
+#ifdef RT_SERIAL_USING_DMA
+    if (!(serial->parent.open_flag & RT_DEVICE_OFLAG_OPEN)) {
+        instance->last_index = 0;
+    }
+#endif
+
+    usart_parity_selection_config(instance->uart_x, parity_mode);
+    usart_init(instance->uart_x, cfg->baud_rate, data_bit, stop_bit);
+    usart_enable(instance->uart_x, TRUE);
 
     return RT_EOK;
 }
 
 static rt_err_t at32_control(struct rt_serial_device *serial, int cmd, void *arg) {
-    struct at32_usart *usart;
+    struct at32_uart *instance;
+
+#ifdef RT_SERIAL_USING_DMA
+    rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
+#endif
 
     RT_ASSERT(serial != RT_NULL);
-    usart = (struct at32_usart *) serial->parent.user_data;
-    RT_ASSERT(usart != RT_NULL);
+    instance = (struct at32_uart *) serial->parent.user_data;
+    RT_ASSERT(instance != RT_NULL);
 
     switch (cmd) {
     case RT_DEVICE_CTRL_CLR_INT:
-        nvic_irq_disable(usart->irqn);
-        usart_interrupt_enable(usart->usart_x, USART_RDBF_INT, FALSE);
+        nvic_irq_disable(instance->irqn);
+        usart_interrupt_enable(instance->uart_x, USART_RDBF_INT, FALSE);
+
+#ifdef RT_SERIAL_USING_DMA
+        /* disable DMA */
+        if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
+        {
+            nvic_irq_disable(instance->dma_rx->dma_irqn);
+            dma_reset(instance->dma_rx->dma_channel);
+        }
+        else if(ctrl_arg == RT_DEVICE_FLAG_DMA_TX)
+        {
+            nvic_irq_disable(instance->dma_tx->dma_irqn);
+            dma_reset(instance->dma_tx->dma_channel);
+        }
+#endif
         break;
     case RT_DEVICE_CTRL_SET_INT:
-        nvic_irq_enable(usart->irqn, 2, 1);
-        usart_interrupt_enable(usart->usart_x, USART_RDBF_INT, TRUE);
+        nvic_irq_enable(instance->irqn, 1, 0);
+        usart_interrupt_enable(instance->uart_x, USART_RDBF_INT, TRUE);
         break;
+#ifdef RT_SERIAL_USING_DMA
+    case RT_DEVICE_CTRL_CONFIG:
+        at32_dma_config(serial, ctrl_arg);
+        break;
+#endif
     }
 
     return RT_EOK;
 }
 
 static int at32_putc(struct rt_serial_device *serial, char ch) {
-    struct at32_usart *usart;
+    struct at32_uart *instance;
 
     RT_ASSERT(serial != RT_NULL);
-    usart = (struct at32_usart *) serial->parent.user_data;
-    RT_ASSERT(usart != RT_NULL);
+    instance = (struct at32_uart *) serial->parent.user_data;
+    RT_ASSERT(instance != RT_NULL);
 
-    usart_data_transmit(usart->usart_x, (uint8_t)ch);
-    while (usart_flag_get(usart->usart_x, USART_TDC_FLAG) == RESET);
+    usart_data_transmit(instance->uart_x, (uint8_t)ch);
+    while (usart_flag_get(instance->uart_x, USART_TDC_FLAG) == RESET);
 
     return 1;
 }
 
 static int at32_getc(struct rt_serial_device *serial) {
     int ch;
-    struct at32_usart *usart;
+    struct at32_uart *instance;
 
     RT_ASSERT(serial != RT_NULL);
-    usart = (struct at32_usart *) serial->parent.user_data;
-    RT_ASSERT(usart != RT_NULL);
+    instance = (struct at32_uart *) serial->parent.user_data;
+    RT_ASSERT(instance != RT_NULL);
 
     ch = -1;
-    if (usart_flag_get(usart->usart_x, USART_RDBF_FLAG) != RESET) {
-        ch = usart_data_receive(usart->usart_x) & 0xff;
+    if (usart_flag_get(instance->uart_x, USART_RDBF_FLAG) != RESET) {
+        ch = usart_data_receive(instance->uart_x) & 0xff;
     }
 
     return ch;
 }
 
-static const struct rt_uart_ops at32_usart_ops = {
+#ifdef RT_SERIAL_USING_DMA
+static void _uart_dma_receive(struct at32_uart *instance, rt_uint8_t *buffer, rt_uint32_t size)
+{
+    dma_channel_type* dma_channel = instance->dma_rx->dma_channel;
+
+    dma_channel->dtcnt = size;
+    dma_channel->paddr = (rt_uint32_t)&(instance->uart_x->dt);
+    dma_channel->maddr = (rt_uint32_t)buffer;
+    /* enable usart interrupt */
+    usart_interrupt_enable(instance->uart_x, USART_PERR_INT, TRUE);
+    usart_interrupt_enable(instance->uart_x, USART_IDLE_INT, TRUE);
+    /* enable transmit complete interrupt */
+    dma_interrupt_enable(dma_channel, DMA_FDT_INT, TRUE);
+    /* enable dma receive */
+    usart_dma_receiver_enable(instance->uart_x, TRUE);
+
+    /* enable dma channel */
+    dma_channel_enable(dma_channel, TRUE);
+}
+
+static void _uart_dma_transmit(struct at32_uart *instance, rt_uint8_t *buffer, rt_uint32_t size)
+{
+    /* wait before transfer complete */
+    while(instance->dma_tx->dma_done == RT_FALSE);
+
+    dma_channel_type *dma_channel = instance->dma_tx->dma_channel;
+
+    dma_channel->dtcnt = size;
+    dma_channel->paddr = (rt_uint32_t)&(instance->uart_x->dt);
+    dma_channel->maddr = (rt_uint32_t)buffer;
+
+    /* enable transmit complete interrupt */
+    dma_interrupt_enable(dma_channel, DMA_FDT_INT, TRUE);
+    /* enable dma transmit */
+    usart_dma_transmitter_enable(instance->uart_x, TRUE);
+
+    /* mark dma flag */
+    instance->dma_tx->dma_done = RT_FALSE;
+    /* enable dma channel */
+    dma_channel_enable(dma_channel, TRUE);
+}
+
+static void at32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
+{
+    dma_init_type dma_init_struct;
+    dma_channel_type *dma_channel = NULL;
+    struct rt_serial_rx_fifo *rx_fifo;
+    struct at32_uart *instance;
+    struct dma_config *dma_config;
+
+    RT_ASSERT(serial != RT_NULL);
+    instance = (struct at32_uart *) serial->parent.user_data;
+    RT_ASSERT(instance != RT_NULL);
+
+    RT_ASSERT(flag == RT_DEVICE_FLAG_DMA_TX || flag == RT_DEVICE_FLAG_DMA_RX);
+
+    if (RT_DEVICE_FLAG_DMA_RX == flag)
+    {
+        dma_channel = instance->dma_rx->dma_channel;
+        dma_config = instance->dma_rx;
+    }
+    else /* RT_DEVICE_FLAG_DMA_TX == flag */
+    {
+        dma_channel = instance->dma_tx->dma_channel;
+        dma_config = instance->dma_tx;
+    }
+
+    crm_periph_clock_enable(dma_config->dma_clock, TRUE);
+    dma_default_para_init(&dma_init_struct);
+    dma_init_struct.peripheral_inc_enable = FALSE;
+    dma_init_struct.memory_inc_enable = TRUE;
+    dma_init_struct.peripheral_data_width = DMA_PERIPHERAL_DATA_WIDTH_BYTE;
+    dma_init_struct.memory_data_width = DMA_MEMORY_DATA_WIDTH_BYTE;
+    dma_init_struct.priority = DMA_PRIORITY_MEDIUM;
+
+    if (RT_DEVICE_FLAG_DMA_RX == flag)
+    {
+        dma_init_struct.direction = DMA_DIR_PERIPHERAL_TO_MEMORY;
+        dma_init_struct.loop_mode_enable = TRUE;
+    }
+    else if (RT_DEVICE_FLAG_DMA_TX == flag)
+    {
+        dma_init_struct.direction = DMA_DIR_MEMORY_TO_PERIPHERAL;
+        dma_init_struct.loop_mode_enable = FALSE;
+    }
+
+    dma_reset(dma_channel);
+    dma_init(dma_channel, &dma_init_struct);
+#if defined (SOC_SERIES_AT32F435) || defined (SOC_SERIES_AT32F437)
+    dmamux_enable(dma_config->dma_x, TRUE);
+    dmamux_init(dma_config->dmamux_channel, (dmamux_requst_id_sel_type)dma_config->request_id);
+#endif
+    /* enable interrupt */
+    if (flag == RT_DEVICE_FLAG_DMA_RX)
+    {
+        rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
+        /* start dma transfer */
+        _uart_dma_receive(instance, rx_fifo->buffer, serial->config.bufsz);
+    }
+
+    /* dma irq should set in dma tx mode */
+    nvic_irq_enable(dma_config->dma_irqn, 0, 0);
+    nvic_irq_enable(instance->irqn, 1, 0);
+}
+
+static rt_size_t at32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
+{
+    struct at32_uart *instance;
+    instance = (struct at32_uart *) serial->parent.user_data;
+    RT_ASSERT(instance != RT_NULL);
+    RT_ASSERT(serial != RT_NULL);
+    RT_ASSERT(buf != RT_NULL);
+
+    if (size == 0)
+    {
+        return 0;
+    }
+
+    if (RT_SERIAL_DMA_TX == direction)
+    {
+        _uart_dma_transmit(instance, buf, size);
+    }
+
+    return size;
+}
+#endif
+
+static const struct rt_uart_ops at32_uart_ops = {
     at32_configure,
     at32_control,
     at32_putc,
     at32_getc,
-    RT_NULL
+#ifdef RT_SERIAL_USING_DMA
+    at32_dma_transmit,
+#endif
 };
 
-static void usart_isr(struct rt_serial_device *serial) {
-    struct at32_usart *usart_instance;
+#ifdef RT_SERIAL_USING_DMA
+void dma_rx_isr(struct rt_serial_device *serial)
+{
+    volatile rt_uint32_t reg_sts = 0, index = 0;
+    rt_size_t recv_total_index, recv_len;
+    rt_base_t level;
+    struct at32_uart *instance;
+    instance = (struct at32_uart *) serial->parent.user_data;
+    RT_ASSERT(instance != RT_NULL);
+
+    reg_sts = instance->dma_rx->dma_x->sts;
+    index = instance->dma_rx->channel_index;
+
+    if (((reg_sts & (DMA_FDT_FLAG << (4 * (index - 1)))) != RESET) ||
+        ((reg_sts & (DMA_HDT_FLAG << (4 * (index - 1)))) != RESET))
+    {
+        /* clear dma flag */
+        instance->dma_rx->dma_x->clr |= (rt_uint32_t)(DMA_FDT_FLAG << (4 * (index - 1))) | (DMA_HDT_FLAG << (4 * (index - 1)));
+
+        level = rt_hw_interrupt_disable();
+        recv_total_index = serial->config.bufsz - dma_data_number_get(instance->dma_rx->dma_channel);
+        if (recv_total_index == 0)
+        {
+            recv_len = serial->config.bufsz - instance->last_index;
+        }
+        else
+        {
+            recv_len = recv_total_index - instance->last_index;
+        }
+        instance->last_index = recv_total_index;
+        rt_hw_interrupt_enable(level);
+
+        if (recv_len)
+        {
+            rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
+        }
+    }
+}
+
+void dma_tx_isr(struct rt_serial_device *serial)
+{
+    volatile rt_uint32_t reg_sts = 0, index = 0;
+    rt_size_t trans_total_index;
+    rt_base_t level;
+    RT_ASSERT(serial != RT_NULL);
+    struct at32_uart *instance;
+    instance = (struct at32_uart *) serial->parent.user_data;
+    RT_ASSERT(instance != RT_NULL);
+
+    reg_sts = instance->dma_tx->dma_x->sts;
+    index = instance->dma_tx->channel_index;
 
+    if ((reg_sts & (DMA_FDT_FLAG << (4 * (index - 1)))) != RESET)
+    {
+        /* mark dma flag */
+        instance->dma_tx->dma_done = RT_TRUE;
+        /* clear dma flag */
+        instance->dma_tx->dma_x->clr |= (rt_uint32_t)(DMA_FDT_FLAG << (4 * (index - 1)));
+        /* disable dma tx channel */
+        dma_channel_enable(instance->dma_tx->dma_channel, FALSE);
+
+        level = rt_hw_interrupt_disable();
+        trans_total_index = dma_data_number_get(instance->dma_tx->dma_channel);
+        rt_hw_interrupt_enable(level);
+
+        if (trans_total_index == 0)
+        {
+            rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DMADONE);
+        }
+    }
+}
+#endif
+
+static void usart_isr(struct rt_serial_device *serial) {
+    struct at32_uart *instance;
+#ifdef RT_SERIAL_USING_DMA
+    rt_size_t recv_total_index, recv_len;
+    rt_base_t level;
+#endif
     RT_ASSERT(serial != RT_NULL);
 
-    usart_instance = (struct at32_usart *) serial->parent.user_data;
-    RT_ASSERT(usart_instance != RT_NULL);
+    instance = (struct at32_uart *) serial->parent.user_data;
+    RT_ASSERT(instance != RT_NULL);
 
-    if (usart_flag_get(usart_instance->usart_x, USART_RDBF_FLAG) != RESET) {
+    if (usart_flag_get(instance->uart_x, USART_RDBF_FLAG) != RESET) {
         rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
     }
+#ifdef RT_SERIAL_USING_DMA
+    else if (usart_flag_get(instance->uart_x, USART_IDLEF_FLAG) != RESET)
+    {
+        /* clear idle flag */
+        usart_data_receive(instance->uart_x);
+
+        level = rt_hw_interrupt_disable();
+        recv_total_index = serial->config.bufsz - dma_data_number_get(instance->dma_rx->dma_channel);
+        recv_len = recv_total_index - instance->last_index;
+        instance->last_index = recv_total_index;
+        rt_hw_interrupt_enable(level);
+
+        if (recv_len)
+        {
+            rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
+        }
+    }
+#endif
     else
     {
-        if (usart_flag_get(usart_instance->usart_x, USART_CTSCF_FLAG) != RESET) {
-            usart_flag_clear(usart_instance->usart_x, USART_CTSCF_FLAG);
+        if (usart_flag_get(instance->uart_x, USART_CTSCF_FLAG) != RESET) {
+            usart_flag_clear(instance->uart_x, USART_CTSCF_FLAG);
         }
 
-        if (usart_flag_get(usart_instance->usart_x, USART_BFF_FLAG) != RESET) {
-            usart_flag_clear(usart_instance->usart_x, USART_BFF_FLAG);
+        if (usart_flag_get(instance->uart_x, USART_BFF_FLAG) != RESET) {
+            usart_flag_clear(instance->uart_x, USART_BFF_FLAG);
         }
 
-        if (usart_flag_get(usart_instance->usart_x, USART_TDC_FLAG) != RESET) {
-            usart_flag_clear(usart_instance->usart_x, USART_TDC_FLAG);
+        if (usart_flag_get(instance->uart_x, USART_TDC_FLAG) != RESET) {
+            usart_flag_clear(instance->uart_x, USART_TDC_FLAG);
         }
     }
 }
@@ -250,94 +485,423 @@ static void usart_isr(struct rt_serial_device *serial) {
 void USART1_IRQHandler(void) {
     rt_interrupt_enter();
 
-    usart_isr(&usart_config[UART1_INDEX].serial);
+    usart_isr(&uart_config[UART1_INDEX].serial);
 
     rt_interrupt_leave();
 }
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
+void UART1_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_rx_isr(&uart_config[UART1_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
+void UART1_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_tx_isr(&uart_config[UART1_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
 #endif
 #ifdef BSP_USING_UART2
 void USART2_IRQHandler(void) {
     rt_interrupt_enter();
 
-    usart_isr(&usart_config[UART2_INDEX].serial);
+    usart_isr(&uart_config[UART2_INDEX].serial);
+
+    rt_interrupt_leave();
+}
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
+void UART2_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_rx_isr(&uart_config[UART2_INDEX].serial);
 
+    /* leave interrupt */
     rt_interrupt_leave();
 }
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
+void UART2_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_tx_isr(&uart_config[UART2_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
 #endif
 #ifdef BSP_USING_UART3
 void USART3_IRQHandler(void) {
     rt_interrupt_enter();
 
-    usart_isr(&usart_config[UART3_INDEX].serial);
+    usart_isr(&uart_config[UART3_INDEX].serial);
+
+    rt_interrupt_leave();
+}
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
+void UART3_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_rx_isr(&uart_config[UART3_INDEX].serial);
 
+    /* leave interrupt */
     rt_interrupt_leave();
 }
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA) */
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
+void UART3_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_tx_isr(&uart_config[UART3_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA) */
 #endif
 #ifdef BSP_USING_UART4
 void UART4_IRQHandler(void) {
     rt_interrupt_enter();
 
-    usart_isr(&usart_config[UART4_INDEX].serial);
+    usart_isr(&uart_config[UART4_INDEX].serial);
+
+    rt_interrupt_leave();
+}
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
+void UART4_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_rx_isr(&uart_config[UART4_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA) */
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_TX_USING_DMA)
+void UART4_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_tx_isr(&uart_config[UART4_INDEX].serial);
 
+    /* leave interrupt */
     rt_interrupt_leave();
 }
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART14_TX_USING_DMA) */
 #endif
 #ifdef BSP_USING_UART5
 void UART5_IRQHandler(void) {
     rt_interrupt_enter();
 
-    usart_isr(&usart_config[UART5_INDEX].serial);
+    usart_isr(&uart_config[UART5_INDEX].serial);
+
+    rt_interrupt_leave();
+}
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
+void UART5_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_rx_isr(&uart_config[UART5_INDEX].serial);
 
+    /* leave interrupt */
     rt_interrupt_leave();
 }
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA)
+void UART5_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_tx_isr(&uart_config[UART5_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA) */
 #endif
 #ifdef BSP_USING_UART6
 void USART6_IRQHandler(void) {
     rt_interrupt_enter();
 
-    usart_isr(&usart_config[UART6_INDEX].serial);
+    usart_isr(&uart_config[UART6_INDEX].serial);
+
+    rt_interrupt_leave();
+}
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA)
+void UART6_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_rx_isr(&uart_config[UART6_INDEX].serial);
 
+    /* leave interrupt */
     rt_interrupt_leave();
 }
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA)
+void UART6_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_tx_isr(&uart_config[UART6_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA) */
 #endif
 #ifdef BSP_USING_UART7
 void UART7_IRQHandler(void) {
     rt_interrupt_enter();
 
-    usart_isr(&usart_config[UART7_INDEX].serial);
+    usart_isr(&uart_config[UART7_INDEX].serial);
+
+    rt_interrupt_leave();
+}
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA)
+void UART7_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_rx_isr(&uart_config[UART7_INDEX].serial);
 
+    /* leave interrupt */
     rt_interrupt_leave();
 }
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA) */
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA)
+void UART7_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_tx_isr(&uart_config[UART7_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA) */
 #endif
 #ifdef BSP_USING_UART8
 void UART8_IRQHandler(void) {
     rt_interrupt_enter();
 
-    usart_isr(&usart_config[UART8_INDEX].serial);
+    usart_isr(&uart_config[UART8_INDEX].serial);
 
     rt_interrupt_leave();
 }
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA)
+void UART8_RX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_rx_isr(&uart_config[UART8_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA) */
+#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA)
+void UART8_TX_DMA_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    dma_tx_isr(&uart_config[UART8_INDEX].serial);
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA) */
+#endif
+
+#if defined (RT_SERIAL_USING_DMA)
+static void _dma_base_channel_check(struct at32_uart *instance)
+{
+    dma_channel_type *rx_channel = instance->dma_rx->dma_channel;
+    dma_channel_type *tx_channel = instance->dma_tx->dma_channel;
+
+    instance->dma_rx->dma_done = RT_TRUE;
+    instance->dma_rx->dma_x = (dma_type *)((rt_uint32_t)rx_channel & ~0xFF);
+    instance->dma_rx->channel_index = ((((rt_uint32_t)rx_channel & 0xFF) - 8) / 0x14) + 1;
+
+    instance->dma_tx->dma_done = RT_TRUE;
+    instance->dma_tx->dma_x = (dma_type *)((rt_uint32_t)tx_channel & ~0xFF);
+    instance->dma_tx->channel_index = ((((rt_uint32_t)tx_channel & 0xFF) - 8) / 0x14) + 1;
+}
+#endif
+
+static void at32_uart_get_dma_config(void)
+{
+#ifdef BSP_USING_UART1
+    uart_config[UART1_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART1_RX_USING_DMA
+    uart_config[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart1_dma_rx = UART1_RX_DMA_CONFIG;
+    uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
+#endif
+#ifdef BSP_UART1_TX_USING_DMA
+    uart_config[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart1_dma_tx = UART1_TX_DMA_CONFIG;
+    uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
+#endif
 #endif
 
+#ifdef BSP_USING_UART2
+    uart_config[UART2_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART2_RX_USING_DMA
+    uart_config[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart2_dma_rx = UART2_RX_DMA_CONFIG;
+    uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
+#endif
+#ifdef BSP_UART2_TX_USING_DMA
+    uart_config[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart2_dma_tx = UART2_TX_DMA_CONFIG;
+    uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
+#endif
+#endif
+
+#ifdef BSP_USING_UART3
+    uart_config[UART3_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART3_RX_USING_DMA
+    uart_config[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart3_dma_rx = UART3_RX_DMA_CONFIG;
+    uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
+#endif
+#ifdef BSP_UART3_TX_USING_DMA
+    uart_config[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart3_dma_tx = UART3_TX_DMA_CONFIG;
+    uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
+#endif
+#endif
+
+#ifdef BSP_USING_UART4
+    uart_config[UART4_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART4_RX_USING_DMA
+    uart_config[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart4_dma_rx = UART4_RX_DMA_CONFIG;
+    uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
+#endif
+#ifdef BSP_UART4_TX_USING_DMA
+    uart_config[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart4_dma_tx = UART4_TX_DMA_CONFIG;
+    uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
+#endif
+#endif
+
+#ifdef BSP_USING_UART5
+    uart_config[UART5_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART5_RX_USING_DMA
+    uart_config[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart5_dma_rx = UART5_RX_DMA_CONFIG;
+    uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
+#endif
+#ifdef BSP_UART5_TX_USING_DMA
+    uart_config[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart5_dma_tx = UART5_TX_DMA_CONFIG;
+    uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
+#endif
+#endif
+
+#ifdef BSP_USING_UART6
+    uart_config[UART6_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART6_RX_USING_DMA
+    uart_config[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart6_dma_rx = UART6_RX_DMA_CONFIG;
+    uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
+#endif
+#ifdef BSP_UART6_TX_USING_DMA
+    uart_config[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart6_dma_tx = UART6_TX_DMA_CONFIG;
+    uart_config[UART6_INDEX].dma_tx = &uart6_dma_tx;
+#endif
+#endif
+
+#ifdef BSP_USING_UART7
+    uart_config[UART7_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART7_RX_USING_DMA
+    uart_config[UART7_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart7_dma_rx = UART7_RX_DMA_CONFIG;
+    uart_config[UART7_INDEX].dma_rx = &uart7_dma_rx;
+#endif
+#ifdef BSP_UART7_TX_USING_DMA
+    uart_config[UART7_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart7_dma_tx = UART7_TX_DMA_CONFIG;
+    uart_config[UART7_INDEX].dma_tx = &uart7_dma_tx;
+#endif
+#endif
+
+#ifdef BSP_USING_UART8
+    uart_config[UART8_INDEX].uart_dma_flag = 0;
+#ifdef BSP_UART8_RX_USING_DMA
+    uart_config[UART8_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
+    static struct dma_config uart8_dma_rx = UART8_RX_DMA_CONFIG;
+    uart_config[UART8_INDEX].dma_rx = &uart8_dma_rx;
+#endif
+#ifdef BSP_UART8_TX_USING_DMA
+    uart_config[UART8_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
+    static struct dma_config uart8_dma_tx = UART8_TX_DMA_CONFIG;
+    uart_config[UART8_INDEX].dma_tx = &uart8_dma_tx;
+#endif
+#endif
+}
+
 int rt_hw_usart_init(void) {
     rt_size_t obj_num;
     int index;
 
-    obj_num = sizeof(usart_config) / sizeof(struct at32_usart);
+    obj_num = sizeof(uart_config) / sizeof(struct at32_uart);
     struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
     rt_err_t result = 0;
 
+    at32_uart_get_dma_config();
+
     for (index = 0; index < obj_num; index++) {
-        usart_config[index].serial.ops = &at32_usart_ops;
-        usart_config[index].serial.config = config;
+        uart_config[index].serial.ops = &at32_uart_ops;
+        uart_config[index].serial.config = config;
 
+#if defined (RT_SERIAL_USING_DMA)
+        /* search dma base and channel index */
+        _dma_base_channel_check(&uart_config[index]);
+#endif
         /* register uart device */
-        result = rt_hw_serial_register(&usart_config[index].serial,
-                 usart_config[index].name,
+        result = rt_hw_serial_register(&uart_config[index].serial,
+                 uart_config[index].name,
                  RT_DEVICE_FLAG_RDWR |
                  RT_DEVICE_FLAG_INT_RX |
-                 RT_DEVICE_FLAG_INT_TX,
-                 &usart_config[index]);
+                 uart_config[index].uart_dma_flag ,
+                 &uart_config[index]);
         RT_ASSERT(result == RT_EOK);
     }
 

bsp/at32/libraries/rt_drivers/drv_usart.h

@@ -13,6 +13,18 @@
 
 #include <rtthread.h>
 #include <rtdevice.h>
+#include "drv_dma.h"
+
+struct at32_uart {
+    char *name;
+    usart_type *uart_x;
+    IRQn_Type irqn;
+    struct dma_config *dma_rx;
+    rt_size_t last_index;
+    struct dma_config *dma_tx;
+    rt_uint16_t uart_dma_flag;
+    struct rt_serial_device serial;
+};
 
 int rt_hw_usart_init(void);