Merge pull request #2576 from whj4674672/master

[bsp][stm32][stm32h743-atk-apollo]add lcd and sdram drive

bsp/stm32/libraries/Kconfig

@@ -35,3 +35,8 @@ config SOC_SERIES_STM32G0
     bool
     select ARCH_ARM_CORTEX_M0
     select SOC_FAMILY_STM32
+
+config SOC_SERIES_STM32H7
+    bool
+    select ARCH_ARM_CORTEX_M7
+    select SOC_FAMILY_STM32

bsp/stm32/libraries/STM32H7xx_HAL/SConscript

@@ -18,6 +18,7 @@ STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cryp.c
 STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_cryp_ex.c
 STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma.c
 STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma_ex.c
+STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_mdma.c
 STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr.c
 STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_pwr_ex.c
 STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_rcc.c
@@ -97,6 +98,10 @@ if GetDepend(['BSP_USING_ON_CHIP_FLASH']):
     src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash.c']
     src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_flash_ex.c']
 
+if GetDepend(['BSP_USING_LTDC']):
+    src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_ltdc.c']
+    src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_dma2d.c']
+
 path = [cwd + '/STM32H7xx_HAL_Driver/Inc',
     cwd + '/CMSIS/Device/ST/STM32H7xx/Include',
     cwd + '/CMSIS/Include']

bsp/stm32/stm32h743-atk-apollo/.config

@@ -7,6 +7,7 @@
 # RT-Thread Kernel
 #
 CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
 # CONFIG_RT_USING_SMP is not set
 CONFIG_RT_ALIGN_SIZE=4
 # CONFIG_RT_THREAD_PRIORITY_8 is not set
@@ -18,9 +19,10 @@ CONFIG_RT_USING_OVERFLOW_CHECK=y
 CONFIG_RT_USING_HOOK=y
 CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
-CONFIG_IDLE_THREAD_STACK_SIZE=256
+CONFIG_IDLE_THREAD_STACK_SIZE=1024
 # CONFIG_RT_USING_TIMER_SOFT is not set
 CONFIG_RT_DEBUG=y
+# CONFIG_RT_DEBUG_COLOR is not set
 # CONFIG_RT_DEBUG_INIT_CONFIG is not set
 # CONFIG_RT_DEBUG_THREAD_CONFIG is not set
 # CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
@@ -46,11 +48,11 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
 # Memory Management
 #
 CONFIG_RT_USING_MEMPOOL=y
-# CONFIG_RT_USING_MEMHEAP is not set
+CONFIG_RT_USING_MEMHEAP=y
 # CONFIG_RT_USING_NOHEAP is not set
-CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SMALL_MEM is not set
 # CONFIG_RT_USING_SLAB is not set
-# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
 CONFIG_RT_USING_HEAP=y
 
 #
@@ -110,6 +112,7 @@ CONFIG_FINSH_ARG_MAX=10
 #
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
 CONFIG_RT_USING_SERIAL=y
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
@@ -184,12 +187,6 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_RYM is not set
 # CONFIG_RT_USING_ULOG is not set
 # CONFIG_RT_USING_UTEST is not set
-
-#
-# ARM CMSIS
-#
-# CONFIG_RT_USING_CMSIS_OS is not set
-# CONFIG_RT_USING_RTT_CMSIS is not set
 # CONFIG_RT_USING_LWP is not set
 
 #
@@ -206,6 +203,7 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_LJSON is not set
 # CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
@@ -260,6 +258,7 @@ CONFIG_RT_USING_PIN=y
 #
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
 
 #
 # tools packages
@@ -289,22 +288,12 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
 
 #
 # peripheral libraries and drivers
 #
-
-#
-# sensors drivers
-#
-# CONFIG_PKG_USING_LSM6DSL is not set
-# CONFIG_PKG_USING_LPS22HB is not set
-# CONFIG_PKG_USING_HTS221 is not set
-# CONFIG_PKG_USING_LSM303AGR is not set
-# CONFIG_PKG_USING_BME280 is not set
-# CONFIG_PKG_USING_BMA400 is not set
-# CONFIG_PKG_USING_BMI160_BMX160 is not set
-# CONFIG_PKG_USING_SPL0601 is not set
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_AHT10 is not set
@@ -316,7 +305,11 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_PKG_USING_MPU6XXX is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
 
 #
 # miscellaneous packages
@@ -342,6 +335,7 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_NNOM is not set
 CONFIG_SOC_FAMILY_STM32=y
 CONFIG_SOC_SERIES_STM32H7=y
 
@@ -353,6 +347,8 @@ CONFIG_SOC_STM32H743II=y
 #
 # Onboard Peripheral Drivers
 #
+# CONFIG_BSP_USING_SDRAM is not set
+# CONFIG_BSP_USING_LCD is not set
 
 #
 # On-chip Peripheral Drivers
@@ -360,6 +356,8 @@ CONFIG_SOC_STM32H743II=y
 CONFIG_BSP_USING_GPIO=y
 CONFIG_BSP_USING_UART=y
 CONFIG_BSP_USING_UART1=y
+# CONFIG_BSP_USING_FMC is not set
+# CONFIG_BSP_USING_LTDC is not set
 
 #
 # Board extended module Drivers

bsp/stm32/stm32h743-atk-apollo/README.md

@@ -45,7 +45,8 @@
 | 以太网            |   暂不支持   |                                       |
 | SD卡              |   暂不支持   |                                       |
 | CAN               |   暂不支持   |                                       |
-| SDRAM             |   暂不支持   |                                       |
+| SDRAM             |     支持     |                                       |
+| LCD               |     支持     |                                       |
 | MPU9250六轴传感器 |   暂不支持   |                                       |
 | **片上外设**      | **支持情况** | **备注**                              |
 | GPIO              |     支持     | PA0, PA1... PK15 ---> PIN: 0, 1...176 |

bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/CubeMX_Config.ioc

@@ -1,39 +1,118 @@
 #MicroXplorer Configuration settings - do not modify
+DMA2D.ColorMode=DMA2D_OUTPUT_RGB565
+DMA2D.IPParameters=Mode,ColorMode
+DMA2D.Mode=DMA2D_R2M
+FMC.CASLatency1=FMC_SDRAM_CAS_LATENCY_2
+FMC.ColumnBitsNumber1=FMC_SDRAM_COLUMN_BITS_NUM_9
+FMC.ExitSelfRefreshDelay1=8
+FMC.IPParameters=ColumnBitsNumber1,CASLatency1,SDClockPeriod1,ReadBurst1,ReadPipeDelay1,LoadToActiveDelay1,ExitSelfRefreshDelay1,SelfRefreshTime1,RowCycleDelay1,WriteRecoveryTime1,RPDelay1,RCDDelay1
+FMC.LoadToActiveDelay1=2
+FMC.RCDDelay1=2
+FMC.RPDelay1=2
+FMC.ReadBurst1=FMC_SDRAM_RBURST_ENABLE
+FMC.ReadPipeDelay1=FMC_SDRAM_RPIPE_DELAY_1
+FMC.RowCycleDelay1=6
+FMC.SDClockPeriod1=FMC_SDRAM_CLOCK_PERIOD_2
+FMC.SelfRefreshTime1=6
+FMC.WriteRecoveryTime1=4
 File.Version=6
 KeepUserPlacement=false
 Mcu.Family=STM32H7
 Mcu.IP0=CORTEX_M7
-Mcu.IP1=NVIC
-Mcu.IP2=RCC
-Mcu.IP3=SYS
-Mcu.IP4=USART1
-Mcu.IPNb=5
+Mcu.IP1=DMA2D
+Mcu.IP2=FMC
+Mcu.IP3=LTDC
+Mcu.IP4=NVIC
+Mcu.IP5=RCC
+Mcu.IP6=SYS
+Mcu.IP7=USART1
+Mcu.IPNb=8
 Mcu.Name=STM32H743IITx
 Mcu.Package=LQFP176
-Mcu.Pin0=PH0-OSC_IN (PH0)
-Mcu.Pin1=PH1-OSC_OUT (PH1)
-Mcu.Pin2=PA9
-Mcu.Pin3=PA10
-Mcu.Pin4=PA13 (JTMS/SWDIO)
-Mcu.Pin5=PA14 (JTCK/SWCLK)
-Mcu.Pin6=VP_SYS_VS_Systick
-Mcu.PinsNb=7
+Mcu.Pin0=PI9
+Mcu.Pin1=PI10
+Mcu.Pin10=PH1-OSC_OUT (PH1)
+Mcu.Pin11=PC0
+Mcu.Pin12=PC2_C
+Mcu.Pin13=PC3_C
+Mcu.Pin14=PF11
+Mcu.Pin15=PF12
+Mcu.Pin16=PF13
+Mcu.Pin17=PF14
+Mcu.Pin18=PF15
+Mcu.Pin19=PG0
+Mcu.Pin2=PF0
+Mcu.Pin20=PG1
+Mcu.Pin21=PE7
+Mcu.Pin22=PE8
+Mcu.Pin23=PE9
+Mcu.Pin24=PE10
+Mcu.Pin25=PE11
+Mcu.Pin26=PE12
+Mcu.Pin27=PE13
+Mcu.Pin28=PE14
+Mcu.Pin29=PE15
+Mcu.Pin3=PF1
+Mcu.Pin30=PH9
+Mcu.Pin31=PH10
+Mcu.Pin32=PH11
+Mcu.Pin33=PH12
+Mcu.Pin34=PD8
+Mcu.Pin35=PD9
+Mcu.Pin36=PD10
+Mcu.Pin37=PD14
+Mcu.Pin38=PD15
+Mcu.Pin39=PG2
+Mcu.Pin4=PF2
+Mcu.Pin40=PG4
+Mcu.Pin41=PG5
+Mcu.Pin42=PG6
+Mcu.Pin43=PG7
+Mcu.Pin44=PG8
+Mcu.Pin45=PA9
+Mcu.Pin46=PA10
+Mcu.Pin47=PA13 (JTMS/SWDIO)
+Mcu.Pin48=PH13
+Mcu.Pin49=PH14
+Mcu.Pin5=PF3
+Mcu.Pin50=PH15
+Mcu.Pin51=PI0
+Mcu.Pin52=PI1
+Mcu.Pin53=PI2
+Mcu.Pin54=PA14 (JTCK/SWCLK)
+Mcu.Pin55=PD0
+Mcu.Pin56=PD1
+Mcu.Pin57=PG11
+Mcu.Pin58=PG15
+Mcu.Pin59=PE0
+Mcu.Pin6=PF4
+Mcu.Pin60=PE1
+Mcu.Pin61=PI4
+Mcu.Pin62=PI5
+Mcu.Pin63=PI6
+Mcu.Pin64=PI7
+Mcu.Pin65=VP_DMA2D_VS_DMA2D
+Mcu.Pin66=VP_SYS_VS_Systick
+Mcu.Pin7=PF5
+Mcu.Pin8=PF10
+Mcu.Pin9=PH0-OSC_IN (PH0)
+Mcu.PinsNb=67
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32H743IITx
 MxCube.Version=5.0.1
 MxDb.Version=DB.5.0.1
-NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false
-NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false
-NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false
-NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false
-NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false
-NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false
+NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
-NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false
-NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false
-NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true
-NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
+NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true
+NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
 PA10.Locked=true
 PA10.Mode=Asynchronous
 PA10.Signal=USART1_RX
@@ -44,6 +123,11 @@ PA14\ (JTCK/SWCLK).Signal=SYS_JTCK-SWCLK
 PA9.Locked=true
 PA9.Mode=Asynchronous
 PA9.Signal=USART1_TX
+PC0.Signal=FMC_SDNWE
+PC2_C.Mode=SdramChipSelect1_1
+PC2_C.Signal=FMC_SDNE0
+PC3_C.Mode=SdramChipSelect1_1
+PC3_C.Signal=FMC_SDCKE0
 PCC.Checker=false
 PCC.Line=STM32H743/753
 PCC.MCU=STM32H743IITx
@@ -52,12 +136,103 @@ PCC.Seq0=0
 PCC.Series=STM32H7
 PCC.Temperature=25
 PCC.Vdd=3.0
+PD0.Signal=FMC_D2_DA2
+PD1.Signal=FMC_D3_DA3
+PD10.Signal=FMC_D15_DA15
+PD14.Signal=FMC_D0_DA0
+PD15.Signal=FMC_D1_DA1
+PD8.Signal=FMC_D13_DA13
+PD9.Signal=FMC_D14_DA14
+PE0.Locked=true
+PE0.Signal=FMC_NBL0
+PE1.Locked=true
+PE1.Signal=FMC_NBL1
+PE10.Signal=FMC_D7_DA7
+PE11.Signal=FMC_D8_DA8
+PE12.Signal=FMC_D9_DA9
+PE13.Signal=FMC_D10_DA10
+PE14.Signal=FMC_D11_DA11
+PE15.Signal=FMC_D12_DA12
+PE7.Signal=FMC_D4_DA4
+PE8.Signal=FMC_D5_DA5
+PE9.Signal=FMC_D6_DA6
+PF0.Signal=FMC_A0
+PF1.Signal=FMC_A1
+PF10.Mode=RGB565
+PF10.Signal=LTDC_DE
+PF11.Signal=FMC_SDNRAS
+PF12.Signal=FMC_A6
+PF13.Signal=FMC_A7
+PF14.Signal=FMC_A8
+PF15.Signal=FMC_A9
+PF2.Signal=FMC_A2
+PF3.Signal=FMC_A3
+PF4.Signal=FMC_A4
+PF5.Signal=FMC_A5
+PG0.Signal=FMC_A10
+PG1.Signal=FMC_A11
+PG11.Locked=true
+PG11.Mode=RGB565
+PG11.Signal=LTDC_B3
+PG15.Signal=FMC_SDNCAS
+PG2.Signal=FMC_A12
+PG4.Signal=FMC_A14_BA0
+PG5.Signal=FMC_A15_BA1
+PG6.Mode=RGB565
+PG6.Signal=LTDC_R7
+PG7.Mode=RGB565
+PG7.Signal=LTDC_CLK
+PG8.Signal=FMC_SDCLK
 PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator
 PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN
 PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator
 PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT
+PH10.Locked=true
+PH10.Mode=RGB565
+PH10.Signal=LTDC_R4
+PH11.Mode=RGB565
+PH11.Signal=LTDC_R5
+PH12.Locked=true
+PH12.Mode=RGB565
+PH12.Signal=LTDC_R6
+PH13.Locked=true
+PH13.Mode=RGB565
+PH13.Signal=LTDC_G2
+PH14.Locked=true
+PH14.Mode=RGB565
+PH14.Signal=LTDC_G3
+PH15.Locked=true
+PH15.Mode=RGB565
+PH15.Signal=LTDC_G4
+PH9.Locked=true
+PH9.Mode=RGB565
+PH9.Signal=LTDC_R3
+PI0.Locked=true
+PI0.Mode=RGB565
+PI0.Signal=LTDC_G5
+PI1.Locked=true
+PI1.Mode=RGB565
+PI1.Signal=LTDC_G6
+PI10.Mode=RGB565
+PI10.Signal=LTDC_HSYNC
+PI2.Mode=RGB565
+PI2.Signal=LTDC_G7
+PI4.Locked=true
+PI4.Mode=RGB565
+PI4.Signal=LTDC_B4
+PI5.Locked=true
+PI5.Mode=RGB565
+PI5.Signal=LTDC_B5
+PI6.Locked=true
+PI6.Mode=RGB565
+PI6.Signal=LTDC_B6
+PI7.Locked=true
+PI7.Mode=RGB565
+PI7.Signal=LTDC_B7
+PI9.Mode=RGB565
+PI9.Signal=LTDC_VSYNC
 PinOutPanel.RotationAngle=0
-ProjectManager.AskForMigrate=true
+ProjectManager.AskForMigrate=false
 ProjectManager.BackupPrevious=false
 ProjectManager.CompilerOptimize=6
 ProjectManager.ComputerToolchain=false
@@ -71,7 +246,7 @@ ProjectManager.FreePins=false
 ProjectManager.HalAssertFull=false
 ProjectManager.HeapSize=0x200
 ProjectManager.KeepUserCode=true
-ProjectManager.LastFirmware=false
+ProjectManager.LastFirmware=true
 ProjectManager.LibraryCopy=0
 ProjectManager.MainLocation=Src
 ProjectManager.NoMain=false
@@ -83,7 +258,7 @@ ProjectManager.StackSize=0x400
 ProjectManager.TargetToolchain=MDK-ARM V5
 ProjectManager.ToolChainLocation=
 ProjectManager.UnderRoot=false
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_DMA2D_Init-DMA2D-false-HAL-true,7-MX_LTDC_Init-LTDC-false-HAL-true
 RCC.ADCFreq_Value=50390625
 RCC.AHB12Freq_Value=200000000
 RCC.AHB4Freq_Value=200000000
@@ -106,16 +281,19 @@ RCC.D3PPRE=RCC_APB4_DIV2
 RCC.DFSDMACLkFreq_Value=400000000
 RCC.DFSDMFreq_Value=100000000
 RCC.DIVM1=5
+RCC.DIVM3=5
 RCC.DIVN1=160
+RCC.DIVN3=160
 RCC.DIVP1Freq_Value=400000000
 RCC.DIVP2Freq_Value=50390625
-RCC.DIVP3Freq_Value=50390625
+RCC.DIVP3Freq_Value=400000000
 RCC.DIVQ1Freq_Value=400000000
 RCC.DIVQ2Freq_Value=50390625
-RCC.DIVQ3Freq_Value=50390625
+RCC.DIVQ3Freq_Value=400000000
 RCC.DIVR1Freq_Value=400000000
 RCC.DIVR2Freq_Value=50390625
-RCC.DIVR3Freq_Value=50390625
+RCC.DIVR3=88
+RCC.DIVR3Freq_Value=9090909.090909092
 RCC.FDCANFreq_Value=400000000
 RCC.FMCFreq_Value=200000000
 RCC.FamilyName=M
@@ -123,14 +301,15 @@ RCC.HCLK3ClockFreq_Value=200000000
 RCC.HCLKFreq_Value=200000000
 RCC.HPRE=RCC_HCLK_DIV2
 RCC.HRTIMFreq_Value=200000000
+RCC.HSE_VALUE=25000000
 RCC.I2C123Freq_Value=100000000
 RCC.I2C4Freq_Value=100000000
-RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CPU2Freq_Value,CPU2SystikFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
+RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CPU2Freq_Value,CPU2SystikFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM3,DIVN1,DIVN3,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,HSE_VALUE,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
 RCC.LPTIM1Freq_Value=100000000
 RCC.LPTIM2Freq_Value=100000000
 RCC.LPTIM345Freq_Value=100000000
 RCC.LPUART1Freq_Value=100000000
-RCC.LTDCFreq_Value=50390625
+RCC.LTDCFreq_Value=9090909.090909092
 RCC.MCO1PinFreq_Value=64000000
 RCC.MCO2PinFreq_Value=400000000
 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
@@ -157,12 +336,88 @@ RCC.USART234578Freq_Value=100000000
 RCC.USBFreq_Value=400000000
 RCC.VCO1OutputFreq_Value=800000000
 RCC.VCO2OutputFreq_Value=100781250
-RCC.VCO3OutputFreq_Value=100781250
+RCC.VCO3OutputFreq_Value=800000000
 RCC.VCOInput1Freq_Value=5000000
 RCC.VCOInput2Freq_Value=781250
-RCC.VCOInput3Freq_Value=781250
+RCC.VCOInput3Freq_Value=5000000
+SH.FMC_A0.0=FMC_A0,13b-sda1
+SH.FMC_A0.ConfNb=1
+SH.FMC_A1.0=FMC_A1,13b-sda1
+SH.FMC_A1.ConfNb=1
+SH.FMC_A10.0=FMC_A10,13b-sda1
+SH.FMC_A10.ConfNb=1
+SH.FMC_A11.0=FMC_A11,13b-sda1
+SH.FMC_A11.ConfNb=1
+SH.FMC_A12.0=FMC_A12,13b-sda1
+SH.FMC_A12.ConfNb=1
+SH.FMC_A14_BA0.0=FMC_BA0,FourSdramBanks1
+SH.FMC_A14_BA0.ConfNb=1
+SH.FMC_A15_BA1.0=FMC_BA1,FourSdramBanks1
+SH.FMC_A15_BA1.ConfNb=1
+SH.FMC_A2.0=FMC_A2,13b-sda1
+SH.FMC_A2.ConfNb=1
+SH.FMC_A3.0=FMC_A3,13b-sda1
+SH.FMC_A3.ConfNb=1
+SH.FMC_A4.0=FMC_A4,13b-sda1
+SH.FMC_A4.ConfNb=1
+SH.FMC_A5.0=FMC_A5,13b-sda1
+SH.FMC_A5.ConfNb=1
+SH.FMC_A6.0=FMC_A6,13b-sda1
+SH.FMC_A6.ConfNb=1
+SH.FMC_A7.0=FMC_A7,13b-sda1
+SH.FMC_A7.ConfNb=1
+SH.FMC_A8.0=FMC_A8,13b-sda1
+SH.FMC_A8.ConfNb=1
+SH.FMC_A9.0=FMC_A9,13b-sda1
+SH.FMC_A9.ConfNb=1
+SH.FMC_D0_DA0.0=FMC_D0,sd-16b-d1
+SH.FMC_D0_DA0.ConfNb=1
+SH.FMC_D10_DA10.0=FMC_D10,sd-16b-d1
+SH.FMC_D10_DA10.ConfNb=1
+SH.FMC_D11_DA11.0=FMC_D11,sd-16b-d1
+SH.FMC_D11_DA11.ConfNb=1
+SH.FMC_D12_DA12.0=FMC_D12,sd-16b-d1
+SH.FMC_D12_DA12.ConfNb=1
+SH.FMC_D13_DA13.0=FMC_D13,sd-16b-d1
+SH.FMC_D13_DA13.ConfNb=1
+SH.FMC_D14_DA14.0=FMC_D14,sd-16b-d1
+SH.FMC_D14_DA14.ConfNb=1
+SH.FMC_D15_DA15.0=FMC_D15,sd-16b-d1
+SH.FMC_D15_DA15.ConfNb=1
+SH.FMC_D1_DA1.0=FMC_D1,sd-16b-d1
+SH.FMC_D1_DA1.ConfNb=1
+SH.FMC_D2_DA2.0=FMC_D2,sd-16b-d1
+SH.FMC_D2_DA2.ConfNb=1
+SH.FMC_D3_DA3.0=FMC_D3,sd-16b-d1
+SH.FMC_D3_DA3.ConfNb=1
+SH.FMC_D4_DA4.0=FMC_D4,sd-16b-d1
+SH.FMC_D4_DA4.ConfNb=1
+SH.FMC_D5_DA5.0=FMC_D5,sd-16b-d1
+SH.FMC_D5_DA5.ConfNb=1
+SH.FMC_D6_DA6.0=FMC_D6,sd-16b-d1
+SH.FMC_D6_DA6.ConfNb=1
+SH.FMC_D7_DA7.0=FMC_D7,sd-16b-d1
+SH.FMC_D7_DA7.ConfNb=1
+SH.FMC_D8_DA8.0=FMC_D8,sd-16b-d1
+SH.FMC_D8_DA8.ConfNb=1
+SH.FMC_D9_DA9.0=FMC_D9,sd-16b-d1
+SH.FMC_D9_DA9.ConfNb=1
+SH.FMC_NBL0.0=FMC_NBL0
+SH.FMC_NBL0.ConfNb=1
+SH.FMC_NBL1.0=FMC_NBL1
+SH.FMC_NBL1.ConfNb=1
+SH.FMC_SDCLK.0=FMC_SDCLK,13b-sda1
+SH.FMC_SDCLK.ConfNb=1
+SH.FMC_SDNCAS.0=FMC_SDNCAS,13b-sda1
+SH.FMC_SDNCAS.ConfNb=1
+SH.FMC_SDNRAS.0=FMC_SDNRAS,13b-sda1
+SH.FMC_SDNRAS.ConfNb=1
+SH.FMC_SDNWE.0=FMC_SDNWE,13b-sda1
+SH.FMC_SDNWE.ConfNb=1
 USART1.IPParameters=VirtualMode-Asynchronous
 USART1.VirtualMode-Asynchronous=VM_ASYNC
+VP_DMA2D_VS_DMA2D.Mode=DMA2D_Activate
+VP_DMA2D_VS_DMA2D.Signal=DMA2D_VS_DMA2D
 VP_SYS_VS_Systick.Mode=SysTick
 VP_SYS_VS_Systick.Signal=SYS_VS_Systick
 board=custom

bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Inc/stm32h7xx_hal_conf.h

@@ -59,12 +59,12 @@
 /* #define HAL_CRYP_MODULE_ENABLED   */
 /* #define HAL_DAC_MODULE_ENABLED   */
 /* #define HAL_DCMI_MODULE_ENABLED   */
-/* #define HAL_DMA2D_MODULE_ENABLED   */
+#define HAL_DMA2D_MODULE_ENABLED
 /* #define HAL_ETH_MODULE_ENABLED   */
 /* #define HAL_NAND_MODULE_ENABLED   */
 /* #define HAL_NOR_MODULE_ENABLED   */
 /* #define HAL_SRAM_MODULE_ENABLED   */
-/* #define HAL_SDRAM_MODULE_ENABLED   */
+#define HAL_SDRAM_MODULE_ENABLED
 /* #define HAL_HASH_MODULE_ENABLED   */
 /* #define HAL_HRTIM_MODULE_ENABLED   */
 /* #define HAL_HSEM_MODULE_ENABLED   */
@@ -74,7 +74,7 @@
 /* #define HAL_SMBUS_MODULE_ENABLED   */
 /* #define HAL_IWDG_MODULE_ENABLED   */
 /* #define HAL_LPTIM_MODULE_ENABLED   */
-/* #define HAL_LTDC_MODULE_ENABLED   */
+#define HAL_LTDC_MODULE_ENABLED
 /* #define HAL_QSPI_MODULE_ENABLED   */
 /* #define HAL_RNG_MODULE_ENABLED   */
 /* #define HAL_RTC_MODULE_ENABLED   */

bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/main.c

@@ -63,8 +63,14 @@
 
 /* Private variables ---------------------------------------------------------*/
 
+DMA2D_HandleTypeDef hdma2d;
+
+LTDC_HandleTypeDef hltdc;
+
 UART_HandleTypeDef huart1;
 
+SDRAM_HandleTypeDef hsdram1;
+
 /* USER CODE BEGIN PV */
 
 /* USER CODE END PV */
@@ -73,6 +79,9 @@ UART_HandleTypeDef huart1;
 void SystemClock_Config(void);
 static void MX_GPIO_Init(void);
 static void MX_USART1_UART_Init(void);
+static void MX_FMC_Init(void);
+static void MX_DMA2D_Init(void);
+static void MX_LTDC_Init(void);
 /* USER CODE BEGIN PFP */
 
 /* USER CODE END PFP */
@@ -111,6 +120,9 @@ int main(void)
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
   MX_USART1_UART_Init();
+  MX_FMC_Init();
+  MX_DMA2D_Init();
+  MX_LTDC_Init();
   /* USER CODE BEGIN 2 */
 
   /* USER CODE END 2 */
@@ -147,6 +159,9 @@ void SystemClock_Config(void)
   {
     
   }
+  /**Macro to configure the PLL clock source 
+  */
+  __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE);
   /**Initializes the CPU, AHB and APB busses clocks 
   */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
@@ -182,7 +197,17 @@ void SystemClock_Config(void)
   {
     Error_Handler();
   }
-  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_USART1
+                              |RCC_PERIPHCLK_FMC;
+  PeriphClkInitStruct.PLL3.PLL3M = 5;
+  PeriphClkInitStruct.PLL3.PLL3N = 160;
+  PeriphClkInitStruct.PLL3.PLL3P = 2;
+  PeriphClkInitStruct.PLL3.PLL3Q = 2;
+  PeriphClkInitStruct.PLL3.PLL3R = 88;
+  PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_2;
+  PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE;
+  PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
+  PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_D1HCLK;
   PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
   {
@@ -190,6 +215,117 @@ void SystemClock_Config(void)
   }
 }
 
+/**
+  * @brief DMA2D Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DMA2D_Init(void)
+{
+
+  /* USER CODE BEGIN DMA2D_Init 0 */
+
+  /* USER CODE END DMA2D_Init 0 */
+
+  /* USER CODE BEGIN DMA2D_Init 1 */
+
+  /* USER CODE END DMA2D_Init 1 */
+  hdma2d.Instance = DMA2D;
+  hdma2d.Init.Mode = DMA2D_R2M;
+  hdma2d.Init.ColorMode = DMA2D_OUTPUT_RGB565;
+  hdma2d.Init.OutputOffset = 0;
+  if (HAL_DMA2D_Init(&hdma2d) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DMA2D_Init 2 */
+
+  /* USER CODE END DMA2D_Init 2 */
+
+}
+
+/**
+  * @brief LTDC Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_LTDC_Init(void)
+{
+
+  /* USER CODE BEGIN LTDC_Init 0 */
+
+  /* USER CODE END LTDC_Init 0 */
+
+  LTDC_LayerCfgTypeDef pLayerCfg = {0};
+  LTDC_LayerCfgTypeDef pLayerCfg1 = {0};
+
+  /* USER CODE BEGIN LTDC_Init 1 */
+
+  /* USER CODE END LTDC_Init 1 */
+  hltdc.Instance = LTDC;
+  hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
+  hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
+  hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
+  hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
+  hltdc.Init.HorizontalSync = 7;
+  hltdc.Init.VerticalSync = 3;
+  hltdc.Init.AccumulatedHBP = 14;
+  hltdc.Init.AccumulatedVBP = 5;
+  hltdc.Init.AccumulatedActiveW = 654;
+  hltdc.Init.AccumulatedActiveH = 485;
+  hltdc.Init.TotalWidth = 660;
+  hltdc.Init.TotalHeigh = 487;
+  hltdc.Init.Backcolor.Blue = 0;
+  hltdc.Init.Backcolor.Green = 0;
+  hltdc.Init.Backcolor.Red = 0;
+  if (HAL_LTDC_Init(&hltdc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  pLayerCfg.WindowX0 = 0;
+  pLayerCfg.WindowX1 = 0;
+  pLayerCfg.WindowY0 = 0;
+  pLayerCfg.WindowY1 = 0;
+  pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
+  pLayerCfg.Alpha = 0;
+  pLayerCfg.Alpha0 = 0;
+  pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
+  pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
+  pLayerCfg.FBStartAdress = 0;
+  pLayerCfg.ImageWidth = 0;
+  pLayerCfg.ImageHeight = 0;
+  pLayerCfg.Backcolor.Blue = 0;
+  pLayerCfg.Backcolor.Green = 0;
+  pLayerCfg.Backcolor.Red = 0;
+  if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  pLayerCfg1.WindowX0 = 0;
+  pLayerCfg1.WindowX1 = 0;
+  pLayerCfg1.WindowY0 = 0;
+  pLayerCfg1.WindowY1 = 0;
+  pLayerCfg1.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
+  pLayerCfg1.Alpha = 0;
+  pLayerCfg1.Alpha0 = 0;
+  pLayerCfg1.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
+  pLayerCfg1.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
+  pLayerCfg1.FBStartAdress = 0;
+  pLayerCfg1.ImageWidth = 0;
+  pLayerCfg1.ImageHeight = 0;
+  pLayerCfg1.Backcolor.Blue = 0;
+  pLayerCfg1.Backcolor.Green = 0;
+  pLayerCfg1.Backcolor.Red = 0;
+  if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg1, 1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN LTDC_Init 2 */
+
+  /* USER CODE END LTDC_Init 2 */
+
+}
+
 /**
   * @brief USART1 Initialization Function
   * @param None
@@ -229,6 +365,41 @@ static void MX_USART1_UART_Init(void)
 
 }
 
+/* FMC initialization function */
+static void MX_FMC_Init(void)
+{
+  FMC_SDRAM_TimingTypeDef SdramTiming;
+
+  /** Perform the SDRAM1 memory initialization sequence
+  */
+  hsdram1.Instance = FMC_SDRAM_DEVICE;
+  /* hsdram1.Init */
+  hsdram1.Init.SDBank = FMC_SDRAM_BANK1;
+  hsdram1.Init.ColumnBitsNumber = FMC_SDRAM_COLUMN_BITS_NUM_9;
+  hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_13;
+  hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
+  hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
+  hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_2;
+  hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
+  hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
+  hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
+  hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
+  /* SdramTiming */
+  SdramTiming.LoadToActiveDelay = 2;
+  SdramTiming.ExitSelfRefreshDelay = 8;
+  SdramTiming.SelfRefreshTime = 6;
+  SdramTiming.RowCycleDelay = 6;
+  SdramTiming.WriteRecoveryTime = 4;
+  SdramTiming.RPDelay = 2;
+  SdramTiming.RCDDelay = 2;
+
+  if (HAL_SDRAM_Init(&hsdram1, &SdramTiming) != HAL_OK)
+  {
+    Error_Handler( );
+  }
+
+}
+
 /**
   * @brief GPIO Initialization Function
   * @param None
@@ -238,7 +409,13 @@ static void MX_GPIO_Init(void)
 {
 
   /* GPIO Ports Clock Enable */
+  __HAL_RCC_GPIOI_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
   __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
   __HAL_RCC_GPIOA_CLK_ENABLE();
 
 }

bsp/stm32/stm32h743-atk-apollo/board/CubeMX_Config/Src/stm32h7xx_hal_msp.c

@@ -96,6 +96,193 @@ void HAL_MspInit(void)
   /* USER CODE END MspInit 1 */
 }
 
+/**
+* @brief DMA2D MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hdma2d: DMA2D handle pointer
+* @retval None
+*/
+void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
+{
+
+  if(hdma2d->Instance==DMA2D)
+  {
+  /* USER CODE BEGIN DMA2D_MspInit 0 */
+
+  /* USER CODE END DMA2D_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DMA2D_CLK_ENABLE();
+  /* USER CODE BEGIN DMA2D_MspInit 1 */
+
+  /* USER CODE END DMA2D_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief DMA2D MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hdma2d: DMA2D handle pointer
+* @retval None
+*/
+
+void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
+{
+
+  if(hdma2d->Instance==DMA2D)
+  {
+  /* USER CODE BEGIN DMA2D_MspDeInit 0 */
+
+  /* USER CODE END DMA2D_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DMA2D_CLK_DISABLE();
+  /* USER CODE BEGIN DMA2D_MspDeInit 1 */
+
+  /* USER CODE END DMA2D_MspDeInit 1 */
+  }
+
+}
+
+/**
+* @brief LTDC MSP Initialization
+* This function configures the hardware resources used in this example
+* @param hltdc: LTDC handle pointer
+* @retval None
+*/
+void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hltdc->Instance==LTDC)
+  {
+  /* USER CODE BEGIN LTDC_MspInit 0 */
+
+  /* USER CODE END LTDC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_LTDC_CLK_ENABLE();
+  
+    __HAL_RCC_GPIOI_CLK_ENABLE();
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    __HAL_RCC_GPIOH_CLK_ENABLE();
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    /**LTDC GPIO Configuration    
+    PI9     ------> LTDC_VSYNC
+    PI10     ------> LTDC_HSYNC
+    PF10     ------> LTDC_DE
+    PH9     ------> LTDC_R3
+    PH10     ------> LTDC_R4
+    PH11     ------> LTDC_R5
+    PH12     ------> LTDC_R6
+    PG6     ------> LTDC_R7
+    PG7     ------> LTDC_CLK
+    PH13     ------> LTDC_G2
+    PH14     ------> LTDC_G3
+    PH15     ------> LTDC_G4
+    PI0     ------> LTDC_G5
+    PI1     ------> LTDC_G6
+    PI2     ------> LTDC_G7
+    PG11     ------> LTDC_B3
+    PI4     ------> LTDC_B4
+    PI5     ------> LTDC_B5
+    PI6     ------> LTDC_B6
+    PI7     ------> LTDC_B7 
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1 
+                          |GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6 
+                          |GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+    HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12 
+                          |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+    HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN LTDC_MspInit 1 */
+
+  /* USER CODE END LTDC_MspInit 1 */
+  }
+
+}
+
+/**
+* @brief LTDC MSP De-Initialization
+* This function freeze the hardware resources used in this example
+* @param hltdc: LTDC handle pointer
+* @retval None
+*/
+
+void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
+{
+
+  if(hltdc->Instance==LTDC)
+  {
+  /* USER CODE BEGIN LTDC_MspDeInit 0 */
+
+  /* USER CODE END LTDC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_LTDC_CLK_DISABLE();
+  
+    /**LTDC GPIO Configuration    
+    PI9     ------> LTDC_VSYNC
+    PI10     ------> LTDC_HSYNC
+    PF10     ------> LTDC_DE
+    PH9     ------> LTDC_R3
+    PH10     ------> LTDC_R4
+    PH11     ------> LTDC_R5
+    PH12     ------> LTDC_R6
+    PG6     ------> LTDC_R7
+    PG7     ------> LTDC_CLK
+    PH13     ------> LTDC_G2
+    PH14     ------> LTDC_G3
+    PH15     ------> LTDC_G4
+    PI0     ------> LTDC_G5
+    PI1     ------> LTDC_G6
+    PI2     ------> LTDC_G7
+    PG11     ------> LTDC_B3
+    PI4     ------> LTDC_B4
+    PI5     ------> LTDC_B5
+    PI6     ------> LTDC_B6
+    PI7     ------> LTDC_B7 
+    */
+    HAL_GPIO_DeInit(GPIOI, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1 
+                          |GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6 
+                          |GPIO_PIN_7);
+
+    HAL_GPIO_DeInit(GPIOF, GPIO_PIN_10);
+
+    HAL_GPIO_DeInit(GPIOH, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12 
+                          |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
+
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_11);
+
+  /* USER CODE BEGIN LTDC_MspDeInit 1 */
+
+  /* USER CODE END LTDC_MspDeInit 1 */
+  }
+
+}
+
 /**
 * @brief UART MSP Initialization
 * This function configures the hardware resources used in this example
@@ -169,6 +356,202 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
 
 }
 
+static uint32_t FMC_Initialized = 0;
+
+static void HAL_FMC_MspInit(void){
+  /* USER CODE BEGIN FMC_MspInit 0 */
+
+  /* USER CODE END FMC_MspInit 0 */
+  GPIO_InitTypeDef GPIO_InitStruct;
+  if (FMC_Initialized) {
+    return;
+  }
+  FMC_Initialized = 1;
+  /* Peripheral clock enable */
+  __HAL_RCC_FMC_CLK_ENABLE();
+  
+  /** FMC GPIO Configuration  
+  PF0   ------> FMC_A0
+  PF1   ------> FMC_A1
+  PF2   ------> FMC_A2
+  PF3   ------> FMC_A3
+  PF4   ------> FMC_A4
+  PF5   ------> FMC_A5
+  PC0   ------> FMC_SDNWE
+  PC2_C   ------> FMC_SDNE0
+  PC3_C   ------> FMC_SDCKE0
+  PF11   ------> FMC_SDNRAS
+  PF12   ------> FMC_A6
+  PF13   ------> FMC_A7
+  PF14   ------> FMC_A8
+  PF15   ------> FMC_A9
+  PG0   ------> FMC_A10
+  PG1   ------> FMC_A11
+  PE7   ------> FMC_D4
+  PE8   ------> FMC_D5
+  PE9   ------> FMC_D6
+  PE10   ------> FMC_D7
+  PE11   ------> FMC_D8
+  PE12   ------> FMC_D9
+  PE13   ------> FMC_D10
+  PE14   ------> FMC_D11
+  PE15   ------> FMC_D12
+  PD8   ------> FMC_D13
+  PD9   ------> FMC_D14
+  PD10   ------> FMC_D15
+  PD14   ------> FMC_D0
+  PD15   ------> FMC_D1
+  PG2   ------> FMC_A12
+  PG4   ------> FMC_BA0
+  PG5   ------> FMC_BA1
+  PG8   ------> FMC_SDCLK
+  PD0   ------> FMC_D2
+  PD1   ------> FMC_D3
+  PG15   ------> FMC_SDNCAS
+  PE0   ------> FMC_NBL0
+  PE1   ------> FMC_NBL1
+  */
+  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 
+                          |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12 
+                          |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+  HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_3;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4 
+                          |GPIO_PIN_5|GPIO_PIN_8|GPIO_PIN_15;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+  HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+  GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 
+                          |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 
+                          |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+  HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+  GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14 
+                          |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+  HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN FMC_MspInit 1 */
+
+  /* USER CODE END FMC_MspInit 1 */
+}
+
+void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef* hsdram){
+  /* USER CODE BEGIN SDRAM_MspInit 0 */
+
+  /* USER CODE END SDRAM_MspInit 0 */
+  HAL_FMC_MspInit();
+  /* USER CODE BEGIN SDRAM_MspInit 1 */
+
+  /* USER CODE END SDRAM_MspInit 1 */
+}
+
+static uint32_t FMC_DeInitialized = 0;
+
+static void HAL_FMC_MspDeInit(void){
+  /* USER CODE BEGIN FMC_MspDeInit 0 */
+
+  /* USER CODE END FMC_MspDeInit 0 */
+  if (FMC_DeInitialized) {
+    return;
+  }
+  FMC_DeInitialized = 1;
+  /* Peripheral clock enable */
+  __HAL_RCC_FMC_CLK_DISABLE();
+  
+  /** FMC GPIO Configuration  
+  PF0   ------> FMC_A0
+  PF1   ------> FMC_A1
+  PF2   ------> FMC_A2
+  PF3   ------> FMC_A3
+  PF4   ------> FMC_A4
+  PF5   ------> FMC_A5
+  PC0   ------> FMC_SDNWE
+  PC2_C   ------> FMC_SDNE0
+  PC3_C   ------> FMC_SDCKE0
+  PF11   ------> FMC_SDNRAS
+  PF12   ------> FMC_A6
+  PF13   ------> FMC_A7
+  PF14   ------> FMC_A8
+  PF15   ------> FMC_A9
+  PG0   ------> FMC_A10
+  PG1   ------> FMC_A11
+  PE7   ------> FMC_D4
+  PE8   ------> FMC_D5
+  PE9   ------> FMC_D6
+  PE10   ------> FMC_D7
+  PE11   ------> FMC_D8
+  PE12   ------> FMC_D9
+  PE13   ------> FMC_D10
+  PE14   ------> FMC_D11
+  PE15   ------> FMC_D12
+  PD8   ------> FMC_D13
+  PD9   ------> FMC_D14
+  PD10   ------> FMC_D15
+  PD14   ------> FMC_D0
+  PD15   ------> FMC_D1
+  PG2   ------> FMC_A12
+  PG4   ------> FMC_BA0
+  PG5   ------> FMC_BA1
+  PG8   ------> FMC_SDCLK
+  PD0   ------> FMC_D2
+  PD1   ------> FMC_D3
+  PG15   ------> FMC_SDNCAS
+  PE0   ------> FMC_NBL0
+  PE1   ------> FMC_NBL1
+  */
+  HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 
+                          |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_11|GPIO_PIN_12 
+                          |GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
+
+  HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_3);
+
+  HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_4 
+                          |GPIO_PIN_5|GPIO_PIN_8|GPIO_PIN_15);
+
+  HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10 
+                          |GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14 
+                          |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
+
+  HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_14 
+                          |GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
+
+  /* USER CODE BEGIN FMC_MspDeInit 1 */
+
+  /* USER CODE END FMC_MspDeInit 1 */
+}
+
+void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef* hsdram){
+  /* USER CODE BEGIN SDRAM_MspDeInit 0 */
+
+  /* USER CODE END SDRAM_MspDeInit 0 */
+  HAL_FMC_MspDeInit();
+  /* USER CODE BEGIN SDRAM_MspDeInit 1 */
+
+  /* USER CODE END SDRAM_MspDeInit 1 */
+}
+
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */

bsp/stm32/stm32h743-atk-apollo/board/Kconfig

@@ -6,6 +6,17 @@ config SOC_STM32H743II
     default y
 
 menu "Onboard Peripheral Drivers"
+    
+    config BSP_USING_SDRAM
+        bool "Enable SDRAM"
+        select BSP_USING_FMC
+        default n
+
+    config BSP_USING_LCD
+        bool "Enable LCD"
+        select BSP_USING_LTDC
+        select BSP_USING_SDRAM
+        default n
 
 endmenu
 
@@ -25,6 +36,14 @@ menu "On-chip Peripheral Drivers"
                 bool "Enable UART1"
                 default y
 
+    config BSP_USING_FMC
+        bool
+        default n
+
+    config BSP_USING_LTDC
+        bool
+        default n
+
         endif
 
 endmenu

bsp/stm32/stm32h743-atk-apollo/board/SConscript

@@ -1,21 +1,30 @@
+import os
 import rtconfig
 from building import *
 
+Import('SDK_LIB')
+
 cwd = GetCurrentDir()
 
-# add the general drivers.
-src = Glob('board.c')
-src += Glob('CubeMX_Config/Src/stm32h7xx_hal_msp.c')
+# add general drivers
+src = Split('''
+board.c
+drv_mpu.c
+CubeMX_Config/Src/stm32h7xx_hal_msp.c
+''')
 
 path = [cwd]
 path += [cwd + '/CubeMX_Config/Inc']
+path += [cwd + '/ports']
+
+startup_path_prefix = SDK_LIB
 
 if rtconfig.CROSS_TOOL == 'gcc':
-    src += [startup_path_prefix + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h743xx.s']
+    src += [startup_path_prefix + '/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/startup_stm32h743xx.s']
 elif rtconfig.CROSS_TOOL == 'keil':
-    src += [startup_path_prefix + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h743xx.s']
+    src += [startup_path_prefix + '/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/arm/startup_stm32h743xx.s']
 elif rtconfig.CROSS_TOOL == 'iar':
-    src += [startup_path_prefix + '/../../libraries/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h743xx.s']
+    src += [startup_path_prefix + '/STM32H7xx_HAL/CMSIS/Device/ST/STM32H7xx/Source/Templates/iar/startup_stm32h743xx.s']
 
 # STM32H743xx || STM32H750xx || STM32F753xx
 # You can select chips from the list above

bsp/stm32/stm32h743-atk-apollo/board/board.c

@@ -27,6 +27,9 @@ void SystemClock_Config(void)
   {
     
   }
+  /**Macro to configure the PLL clock source 
+  */
+  __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE);
   /**Initializes the CPU, AHB and APB busses clocks 
   */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
@@ -62,11 +65,22 @@ void SystemClock_Config(void)
   {
     Error_Handler();
   }
-  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_USART1
+                              |RCC_PERIPHCLK_FMC;
+  PeriphClkInitStruct.PLL3.PLL3M = 5;
+  PeriphClkInitStruct.PLL3.PLL3N = 160;
+  PeriphClkInitStruct.PLL3.PLL3P = 2;
+  PeriphClkInitStruct.PLL3.PLL3Q = 2;
+  PeriphClkInitStruct.PLL3.PLL3R = 88;
+  PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_2;
+  PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE;
+  PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
+  PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_D1HCLK;
   PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
   {
     Error_Handler();
   }
+
 }
 

bsp/stm32/stm32h743-atk-apollo/board/drv_mpu.c

@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-04-14     whj4674672   first version
+ */
+#include <rtthread.h>
+#include "stm32h7xx.h"
+
+int mpu_init(void)
+{
+    MPU_Region_InitTypeDef MPU_InitStruct;
+
+    /* Disable the MPU */
+    HAL_MPU_Disable();
+
+    /* Configure the MPU attributes as WB for AXI SRAM */
+    MPU_InitStruct.Enable            = MPU_REGION_ENABLE;
+    MPU_InitStruct.BaseAddress       = 0x24000000;
+    MPU_InitStruct.Size              = MPU_REGION_SIZE_512KB;
+    MPU_InitStruct.AccessPermission  = MPU_REGION_FULL_ACCESS;
+    MPU_InitStruct.IsBufferable      = MPU_ACCESS_BUFFERABLE;
+    MPU_InitStruct.IsCacheable       = MPU_ACCESS_CACHEABLE;
+    MPU_InitStruct.IsShareable       = MPU_ACCESS_SHAREABLE;
+    MPU_InitStruct.Number            = MPU_REGION_NUMBER0;
+    MPU_InitStruct.TypeExtField      = MPU_TEX_LEVEL1;
+    MPU_InitStruct.SubRegionDisable  = 0X00;
+    MPU_InitStruct.DisableExec       = MPU_INSTRUCTION_ACCESS_ENABLE;
+
+    HAL_MPU_ConfigRegion(&MPU_InitStruct);
+
+#ifdef BSP_USING_SDRAM
+    /* Configure the MPU attributes as WT for SDRAM */
+    MPU_InitStruct.Enable            = MPU_REGION_ENABLE;
+    MPU_InitStruct.BaseAddress       = 0xC0000000;
+    MPU_InitStruct.Size              = MPU_REGION_SIZE_32MB;
+    MPU_InitStruct.AccessPermission  = MPU_REGION_FULL_ACCESS;
+    MPU_InitStruct.IsBufferable      = MPU_ACCESS_NOT_BUFFERABLE;
+    MPU_InitStruct.IsCacheable       = MPU_ACCESS_CACHEABLE;
+    MPU_InitStruct.IsShareable       = MPU_ACCESS_NOT_SHAREABLE;
+    MPU_InitStruct.Number            = MPU_REGION_NUMBER1;
+    MPU_InitStruct.TypeExtField      = MPU_TEX_LEVEL0;
+    MPU_InitStruct.SubRegionDisable  = 0x00;
+    MPU_InitStruct.DisableExec       = MPU_INSTRUCTION_ACCESS_ENABLE;
+
+    HAL_MPU_ConfigRegion(&MPU_InitStruct);
+#endif
+
+    /* Enable the MPU */
+    HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
+
+    return 0;
+
+}
+INIT_BOARD_EXPORT(mpu_init);

bsp/stm32/stm32h743-atk-apollo/board/ports/lcd_port.h

@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-01-08     zylx         first version
+ */
+
+#ifndef __LCD_PORT_H__
+#define __LCD_PORT_H__
+
+/* atk 4.3 inch screen, 480 * 272 */
+#define LCD_WIDTH           480
+#define LCD_HEIGHT          272
+#define LCD_BITS_PER_PIXEL  16
+#define LCD_BUF_SIZE        (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
+#define LCD_PIXEL_FORMAT    RTGRAPHIC_PIXEL_FORMAT_RGB565
+
+#define LCD_HSYNC_WIDTH     1
+#define LCD_VSYNC_HEIGHT    1
+#define LCD_HBP             40
+#define LCD_VBP             8
+#define LCD_HFP             5
+#define LCD_VFP             8
+
+#define LCD_BACKLIGHT_USING_GPIO
+#define LCD_BL_GPIO_NUM     GET_PIN(B, 5)
+#define LCD_DISP_GPIO_NUM   GET_PIN(B, 0)
+/* atk 4.3 inch screen, 480 * 272 */
+
+#endif /* __LCD_PORT_H__ */

bsp/stm32/stm32h743-atk-apollo/board/ports/sdram_port.h

@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-12-04     zylx         The first version for STM32F4xx
+ */
+
+#ifndef __SDRAM_PORT_H__
+#define __SDRAM_PORT_H__
+
+/* parameters for sdram peripheral */
+/* Bank1 or Bank2 */
+#define SDRAM_TARGET_BANK               1
+/* stm32h7 Bank1:0XC0000000  Bank2:0XD0000000 */
+#define SDRAM_BANK_ADDR                 ((uint32_t)0XC0000000)
+/* data width: 8, 16, 32 */
+#define SDRAM_DATA_WIDTH                16
+/* column bit numbers: 8, 9, 10, 11 */
+#define SDRAM_COLUMN_BITS               9
+/* row bit numbers: 11, 12, 13 */
+#define SDRAM_ROW_BITS                  13
+/* cas latency clock number: 1, 2, 3 */
+#define SDRAM_CAS_LATENCY               2
+/* read pipe delay: 0, 1, 2 */
+#define SDRAM_RPIPE_DELAY               0
+/* clock divid: 2, 3 */
+#define SDCLOCK_PERIOD                  2
+/* refresh rate counter */
+#define SDRAM_REFRESH_COUNT             ((uint32_t)0x02A5)
+#define SDRAM_SIZE                      ((uint32_t)0x2000000)
+
+/* Timing configuration for W9825G6KH-6 */
+/* 100 MHz of HCKL3 clock frequency (200MHz/2) */
+/* TMRD: 2 Clock cycles */
+#define LOADTOACTIVEDELAY               2
+/* TXSR: 8x10ns */
+#define EXITSELFREFRESHDELAY            8
+/* TRAS: 5x10ns */
+#define SELFREFRESHTIME                 6
+/* TRC:  7x10ns */
+#define ROWCYCLEDELAY                   6
+/* TWR:  2 Clock cycles */
+#define WRITERECOVERYTIME               2
+/* TRP:  2x10ns */
+#define RPDELAY                         2
+/* TRCD: 2x10ns */
+#define RCDDELAY                        2
+
+/* memory mode register */
+#define SDRAM_MODEREG_BURST_LENGTH_1             ((uint16_t)0x0000)
+#define SDRAM_MODEREG_BURST_LENGTH_2             ((uint16_t)0x0001)
+#define SDRAM_MODEREG_BURST_LENGTH_4             ((uint16_t)0x0002)
+#define SDRAM_MODEREG_BURST_LENGTH_8             ((uint16_t)0x0004)
+#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL      ((uint16_t)0x0000)
+#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED     ((uint16_t)0x0008)
+#define SDRAM_MODEREG_CAS_LATENCY_2              ((uint16_t)0x0020)
+#define SDRAM_MODEREG_CAS_LATENCY_3              ((uint16_t)0x0030)
+#define SDRAM_MODEREG_OPERATING_MODE_STANDARD    ((uint16_t)0x0000)
+#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)
+#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE     ((uint16_t)0x0200)
+
+#endif

bsp/stm32/stm32h743-atk-apollo/rtconfig.h

@@ -15,7 +15,7 @@
 #define RT_USING_HOOK
 #define RT_USING_IDLE_HOOK
 #define RT_IDEL_HOOK_LIST_SIZE 4
-#define IDLE_THREAD_STACK_SIZE 256
+#define IDLE_THREAD_STACK_SIZE 1024
 #define RT_DEBUG
 
 /* Inter-Thread communication */
@@ -29,7 +29,8 @@
 /* Memory Management */
 
 #define RT_USING_MEMPOOL
-#define RT_USING_SMALL_MEM
+#define RT_USING_MEMHEAP
+#define RT_USING_MEMHEAP_AS_HEAP
 #define RT_USING_HEAP
 
 /* Kernel Device Object */
@@ -110,9 +111,6 @@
 /* Utilities */
 
 
-/* ARM CMSIS */
-
-
 /* RT-Thread online packages */
 
 /* IoT - internet of things */
@@ -146,8 +144,6 @@
 
 /* peripheral libraries and drivers */
 
-/* sensors drivers */
-
 
 /* miscellaneous packages */
 
@@ -163,6 +159,7 @@
 
 /* Onboard Peripheral Drivers */
 
+
 /* On-chip Peripheral Drivers */
 
 #define BSP_USING_GPIO