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Merge pull request #4605 from sheltonyu/developer

[bsp/at32] remove notes
Bernard Xiong 4 years ago
parent
commit
b7a5319e5c

+ 8 - 23
bsp/at32/Libraries/AT32_Std_Driver/AT32F4xx_StdPeriph_Driver/inc/at32f4xx_comp.h

@@ -1,27 +1,12 @@
 /**
-  ******************************************************************************
-  * @file    at32f4xx_comp.h
-  * @author  Artery
-  * @version V1.0.1
-  * @date    20-April-2012
-  * @brief   This file contains all the functions prototypes for the COMP firmware 
-  *          library.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2012 Artery</center></h2>
-  *
-  * Licensed under Artery Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
+ **************************************************************************
+ * File Name    : at32f4xx_comp.h
+ * Description  : at32f4xx COMP header file
+ * Date         : 2018-10-08
+ * Version      : V1.0.5
+ **************************************************************************
+ */
+
 
 /* Define to prevent recursive inclusion -------------------------------------*/
 #ifndef __AT32F4XX_COMP_H

+ 0 - 11
bsp/at32/Libraries/AT32_Std_Driver/AT32F4xx_StdPeriph_Driver/inc/misc.h

@@ -1,15 +1,4 @@
 /*
- **************************************************************************
- * Copyright (C) 2016 by ARTERY Technology Co., Ltd. All Rights Reserved.
- **************************************************************************
- * THIS SOURCE FILE IS DISTRIBUTED IN THE HOPE THAT CAN REDUCE EFFORTS AND
- * TIME, BUT WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
- * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
  **************************************************************************
  * File Name    : misc.h
  * Description  : at32f4xx MISC header file

+ 7 - 91
bsp/at32/Libraries/AT32_Std_Driver/AT32F4xx_StdPeriph_Driver/src/at32f4xx_comp.c

@@ -1,95 +1,11 @@
 /**
-  ******************************************************************************
-  * @file    at32f4xx_comp.c
-  * @author  Artery
-  * @version V1.0.1
-  * @date    20-April-2012
-  * @brief   This file provides firmware functions to manage the following 
-  *          functionalities of the comparators (COMP1 and COMP2) peripheral: 
-  *           + Comparators configuration
-  *           + Window mode control
-  *
-  *  @verbatim
-  *
- ===============================================================================
-                     ##### How to use this driver #####
- ===============================================================================
-    [..]           
-   
-         The device integrates two analog comparators COMP1 and COMP2:
-         (+) The non inverting input is set to PA1 for COMP1 and to PA3
-             for COMP2.
-  
-         (+) The inverting input can be selected among: DAC_OUT1, 
-             1/4 VREFINT, 1/2 VERFINT, 3/4 VREFINT, VREFINT,
-             I/O (PA0 for COMP1 and PA2 for COMP2)
-  
-         (+) The COMP output is internally is available using COMP_GetOutputState()
-             and can be set on GPIO pins: PA0, PA6, PA11 for COMP1
-             and PA2, PA7, PA12 for COMP2
-  
-         (+) The COMP output can be redirected to embedded timers (TIM1, TIM2
-             and TIM3)
-  
-         (+) The two comparators COMP1 and COMP2 can be combined in window
-             mode and only COMP1 non inverting (PA1) can be used as non-
-             inverting input.
-  
-         (+) The two comparators COMP1 and COMP2 have interrupt capability 
-             with wake-up from Sleep and Stop modes (through the EXTI controller).
-             COMP1 and COMP2 outputs are internally connected to EXTI Line 21
-             and EXTI Line 22 respectively.
-                   
-
-                     ##### How to configure the comparator #####
- ===============================================================================
-    [..] 
-           This driver provides functions to configure and program the Comparators 
-           of all AT32F4xx devices.
-             
-    [..]   To use the comparator, perform the following steps:
-  
-         (#) Enable the SYSCFG APB clock to get write access to comparator
-             register using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
-  
-         (#) Configure the comparator input in analog mode using GPIO_Init()
-  
-         (#) Configure the comparator output in alternate function mode
-             using GPIO_Init() and use GPIO_PinAFConfig() function to map the
-             comparator output to the GPIO pin
-  
-         (#) Configure the comparator using COMP_Init() function:
-                 (++)  Select the inverting input
-                 (++)  Select the output polarity  
-                 (++)  Select the output redirection
-                 (++)  Select the hysteresis level
-                 (++)  Select the power mode
-    
-         (#) Enable the comparator using COMP_Cmd() function
-  
-         (#) If required enable the COMP interrupt by configuring and enabling
-             EXTI line in Interrupt mode and selecting the desired sensitivity
-             level using EXTI_Init() function. After that enable the comparator
-             interrupt vector using NVIC_Init() function.
-  
-     @endverbatim
-  *    
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2012 Artery</center></h2>
-  *
-  * Licensed under Artery Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
+ **************************************************************************
+ * File Name    : at32f4xx_comp.c
+ * Description  : at32f4xx COMP source file
+ * Date         : 2018-02-26
+ * Version      : V1.0.4
+ **************************************************************************
+ */
 
 /* Includes ------------------------------------------------------------------*/
 #include "at32f4xx_comp.h"

+ 0 - 11
bsp/at32/Libraries/AT32_Std_Driver/CMSIS/AT32/AT32F4xx/src/system_at32f4xx.c

@@ -6,17 +6,6 @@
   * @date    2019-05-27
   * @brief   CMSIS Cortex-M4 system source file
   ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
   */ 
 
 /** @addtogroup CMSIS

+ 9 - 20
bsp/at32/at32f403a-start/board/msp/at32_msp.c

@@ -1,23 +1,12 @@
-/**
-  ******************************************************************************
-  * @file    at32_msp.c
-  * @author  Artery Technology
-  * @version V1.0.1
-  * @date    2021-02-09
-  * @brief   Msp source file
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
-  */
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
+ */
 
 #include <at32f4xx.h>
 #include <rtthread.h>

+ 10 - 21
bsp/at32/at32f403a-start/board/msp/at32_msp.h

@@ -1,24 +1,13 @@
-/**
-  ******************************************************************************
-  * @file    at32_msp.h
-  * @author  Artery Technology
-  * @version V1.0.1
-  * @date    2021-02-09
-  * @brief   Msp header file
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
-  */
-
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
+ */
+ 
 #ifndef __AT32_MSP_H__
 #define __AT32_MSP_H__
 

+ 9 - 20
bsp/at32/at32f403a-start/board/msp/system_at32f4xx.c

@@ -1,23 +1,12 @@
-/**
-  ******************************************************************************
-  * @file    system_at32f4xx.c
-  * @author  Artery Technology
-  * @version V1.0.0
-  * @date    2019-05-27
-  * @brief   CMSIS Cortex-M4 system source file
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
-  */
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
+ */
 
 /** @addtogroup CMSIS
   * @{

+ 9 - 20
bsp/at32/at32f407-start/board/msp/at32_msp.c

@@ -1,23 +1,12 @@
-/**
-  ******************************************************************************
-  * @file    at32_msp.c
-  * @author  Artery Technology
-  * @version V1.0.1
-  * @date    2021-02-09
-  * @brief   Msp source file
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
-  */
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
+ */
 
 #include <at32f4xx.h>
 #include <rtthread.h>

+ 9 - 20
bsp/at32/at32f407-start/board/msp/at32_msp.h

@@ -1,23 +1,12 @@
-/**
-  ******************************************************************************
-  * @file    at32_msp.h
-  * @author  Artery Technology
-  * @version V1.0.1
-  * @date    2021-02-09
-  * @brief   Msp header file
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
-  */
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
+ */
 
 #ifndef __AT32_MSP_H__
 #define __AT32_MSP_H__

+ 9 - 20
bsp/at32/at32f407-start/board/msp/system_at32f4xx.c

@@ -1,23 +1,12 @@
-/**
-  ******************************************************************************
-  * @file    system_at32f4xx.c
-  * @author  Artery Technology
-  * @version V1.0.0
-  * @date    2019-05-27
-  * @brief   CMSIS Cortex-M4 system source file
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, ARTERYTEK SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2018 ArteryTek</center></h2>
-  ******************************************************************************
-  */
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-04-13     shelton      first version
+ */
 
 /** @addtogroup CMSIS
   * @{