匹配spi驱动，开放SPI1和SPI2，scons和mdk5编译通过

.gitignore

@@ -10,6 +10,7 @@
 *.idb
 *.ilk
 *.old
+*.crf
 build
 Debug
 documentation/html

bsp/Vango_V85xx/drivers/SConscript

@@ -30,6 +30,9 @@ if GetDepend('RT_USING_RTC'):
 if GetDepend('RT_USING_WDT'):
     src += ['drv_iwdt.c']
 
+if GetDepend('RT_USING_SPI'):
+    src += ['drv_spi.c']
+
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
 
 Return('group')

bsp/Vango_V85xx/drivers/drv_spi.c

@@ -6,8 +6,9 @@
  * Change Logs:
  * Date           Author       Notes
  * 2017-06-05     tanek        first implementation.
- * 2018-04-19     misonyo      Porting for gd32f30x
- * 2019-03-31     xuzhuoyi     Porting for gd32e230
+ * 2018-04-19     misonyo      Porting for v85xxf30x
+ * 2019-03-31     xuzhuoyi     Porting for v85xxe230
+ * 2021-09-21     zhuxw        Porting for v85xx
  */
 
 #include "drv_spi.h"
@@ -17,7 +18,7 @@
 #if defined(RT_USING_SPI) && defined(RT_USING_PIN)
 #include <rtdevice.h>
 
-#if !defined(RT_USING_SPI0) && !defined(RT_USING_SPI1)
+#if !defined(RT_USING_SPI1) && !defined(RT_USING_SPI2)
 #error "Please define at least one SPIx"
 #endif
 
@@ -32,7 +33,7 @@
 static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration);
 static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message);
 
-static struct rt_spi_ops gd32_spi_ops =
+static struct rt_spi_ops v85xx_spi_ops =
 {
     configure,
     xfer
@@ -40,124 +41,95 @@ static struct rt_spi_ops gd32_spi_ops =
 
 static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration)
 {
-    spi_parameter_struct spi_init_struct;
+    SPI_InitType spi_init_struct;
 
     rt_uint32_t spi_periph = (rt_uint32_t)device->bus->parent.user_data;
 
     RT_ASSERT(device != RT_NULL);
     RT_ASSERT(configuration != RT_NULL);
 
-    if(configuration->data_width <= 8)
-    {
-        spi_init_struct.frame_size = SPI_FRAMESIZE_8BIT;
-    }
-    else if(configuration->data_width <= 16)
-    {
-        spi_init_struct.frame_size = SPI_FRAMESIZE_16BIT;
-    }
-    else
+    if(configuration->data_width > 8)
     {
         return RT_EIO;
     }
 
     {
-        rcu_clock_freq_enum spi_src;
         rt_uint32_t spi_apb_clock;
         rt_uint32_t max_hz;
 
         max_hz = configuration->max_hz;
 
-        DEBUG_PRINTF("sys   freq: %d\n", rcu_clock_freq_get(CK_SYS));
-        DEBUG_PRINTF("CK_APB2 freq: %d\n", rcu_clock_freq_get(CK_APB2));
-        DEBUG_PRINTF("max   freq: %d\n", max_hz);
-
-        if (spi_periph == SPI1)
-        {
-            spi_src = CK_APB1;
-        }
-        else
-        {
-            spi_src = CK_APB2;
-        }
-        spi_apb_clock = rcu_clock_freq_get(spi_src);
+        spi_apb_clock = CLK_GetPCLKFreq();
 
         if(max_hz >= spi_apb_clock/2)
         {
-            spi_init_struct.prescale = SPI_PSC_2;
+            spi_init_struct.ClockDivision = SPI_CLKDIV_2;
         }
         else if (max_hz >= spi_apb_clock/4)
         {
-            spi_init_struct.prescale = SPI_PSC_4;
+            spi_init_struct.ClockDivision = SPI_CLKDIV_4;
         }
         else if (max_hz >= spi_apb_clock/8)
         {
-            spi_init_struct.prescale = SPI_PSC_8;
+            spi_init_struct.ClockDivision = SPI_CLKDIV_8;
         }
         else if (max_hz >= spi_apb_clock/16)
         {
-            spi_init_struct.prescale = SPI_PSC_16;
+            spi_init_struct.ClockDivision = SPI_CLKDIV_16;
         }
         else if (max_hz >= spi_apb_clock/32)
         {
-            spi_init_struct.prescale = SPI_PSC_32;
+            spi_init_struct.ClockDivision = SPI_CLKDIV_32;
         }
         else if (max_hz >= spi_apb_clock/64)
         {
-            spi_init_struct.prescale = SPI_PSC_64;
-        }
-        else if (max_hz >= spi_apb_clock/128)
-        {
-            spi_init_struct.prescale = SPI_PSC_128;
+            spi_init_struct.ClockDivision = SPI_CLKDIV_64;
         }
         else
         {
-            /*  min prescaler 256 */
-            spi_init_struct.prescale = SPI_PSC_256;
+            /*  min prescaler 128 */
+            spi_init_struct.ClockDivision = SPI_CLKDIV_128;
         }
     } /* baudrate */
 
     switch(configuration->mode & RT_SPI_MODE_3)
     {
     case RT_SPI_MODE_0:
-        spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_1EDGE;
+        spi_init_struct.SPH = SPI_SPH_0;
+        spi_init_struct.SPO = SPI_SPO_0;
         break;
     case RT_SPI_MODE_1:
-        spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_2EDGE;
+        spi_init_struct.SPH = SPI_SPH_1;
+        spi_init_struct.SPO = SPI_SPO_0;
         break;
     case RT_SPI_MODE_2:
-        spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_1EDGE;
+        spi_init_struct.SPH = SPI_SPH_0;
+        spi_init_struct.SPO = SPI_SPO_1;
         break;
     case RT_SPI_MODE_3:
-        spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE;
+        spi_init_struct.SPH = SPI_SPH_1;
+        spi_init_struct.SPO = SPI_SPO_1;
         break;
     }
 
-    /* MSB or LSB */
-    if(configuration->mode & RT_SPI_MSB)
-    {
-        spi_init_struct.endian = SPI_ENDIAN_MSB;
-    }
-    else
+    if(!(configuration->mode & RT_SPI_MSB))
     {
-        spi_init_struct.endian = SPI_ENDIAN_LSB;
+        return RT_EIO;
     }
 
-    spi_init_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
-    spi_init_struct.device_mode = SPI_MASTER;
-    spi_init_struct.nss = SPI_NSS_SOFT;
-
-    spi_init(spi_periph, &spi_init_struct);
+    spi_init_struct.Mode = SPI_MODE_MASTER;
+    spi_init_struct.CSNSoft = SPI_CSNSOFT_ENABLE;
 
-    spi_crc_off(spi_periph);
+    SPI_Init((SPI_TypeDef*)spi_periph, &spi_init_struct);
 
-    spi_enable(spi_periph);
+    SPI_Cmd((SPI_TypeDef*)spi_periph, ENABLE);
 
     return RT_EOK;
 };
 
 static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message)
 {
-    rt_base_t gd32_cs_pin = (rt_base_t)device->parent.user_data;
+    rt_base_t v85xx_cs_pin = (rt_base_t)device->parent.user_data;
     rt_uint32_t spi_periph = (rt_uint32_t)device->bus->parent.user_data;
     struct rt_spi_configuration * config = &device->config;
 
@@ -167,7 +139,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
     /* take CS */
     if(message->cs_take)
     {
-        rt_pin_write(gd32_cs_pin, PIN_LOW);
+        rt_pin_write(v85xx_cs_pin, PIN_LOW);
         DEBUG_PRINTF("spi take cs\n");
     }
 
@@ -189,16 +161,15 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
                     data = *send_ptr++;
                 }
 
-                // Todo: replace register read/write by gd32f3 lib
                 //Wait until the transmit buffer is empty
-                while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TBE));
+                while(RESET == SPI_GetStatus((SPI_TypeDef*)spi_periph, SPI_STS_TXEMPTY));
                 // Send the byte
-                spi_i2s_data_transmit(spi_periph, data);
+                SPI_SendData((SPI_TypeDef*)spi_periph, data);
 
                 //Wait until a data is received
-                while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RBNE));
+                while(RESET == SPI_GetStatus((SPI_TypeDef*)spi_periph, SPI_STS_RNE));
                 // Get the received data
-                data = spi_i2s_data_receive(spi_periph);
+                data = SPI_ReceiveData((SPI_TypeDef*)spi_periph);
 
                 if(recv_ptr != RT_NULL)
                 {
@@ -207,81 +178,37 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
             }
             DEBUG_PRINTF("spi poll transfer finsh\n");
         }
-        else if(config->data_width <= 16)
-        {
-            const rt_uint16_t * send_ptr = message->send_buf;
-            rt_uint16_t * recv_ptr = message->recv_buf;
-            rt_uint32_t size = message->length;
-
-            while(size--)
-            {
-                rt_uint16_t data = 0xFF;
-
-                if(send_ptr != RT_NULL)
-                {
-                    data = *send_ptr++;
-                }
-
-                //Wait until the transmit buffer is empty
-                while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TBE));
-                // Send the byte
-                spi_i2s_data_transmit(spi_periph, data);
-
-                //Wait until a data is received
-                while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RBNE));
-                // Get the received data
-                data = spi_i2s_data_receive(spi_periph);
-
-                if(recv_ptr != RT_NULL)
-                {
-                    *recv_ptr++ = data;
-                }
-            }
-        }
     }
 
     /* release CS */
     if(message->cs_release)
     {
-        rt_pin_write(gd32_cs_pin, PIN_HIGH);
+        rt_pin_write(v85xx_cs_pin, PIN_HIGH);
         DEBUG_PRINTF("spi release cs\n");
     }
 
     return message->length;
 };
 
-int gd32_hw_spi_init(void)
+int v85xx_hw_spi_init(void)
 {
     int result = 0;
-#ifdef RT_USING_SPI0
+#ifdef RT_USING_SPI1
     static struct rt_spi_bus spi_bus0;
-    spi_bus0.parent.user_data = (void *)SPI0;
+    spi_bus0.parent.user_data = (void *)SPI1;
 
-    result = rt_spi_bus_register(&spi_bus0, "spi0", &gd32_spi_ops);
+    result = rt_spi_bus_register(&spi_bus0, "spi1", &v85xx_spi_ops);
 
-    rcu_periph_clock_enable(RCU_GPIOA);
-    rcu_periph_clock_enable(RCU_SPI0);
+    #endif
 
-    /* SPI0 GPIO config: SCK/PA5, MISO/PA6, MOSI/PA7 */
-    gpio_af_set(GPIOA, GPIO_AF_0, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
-    gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
-    gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7);
-#endif
-#ifdef RT_USING_SPI1
+#ifdef RT_USING_SPI2
     static struct rt_spi_bus spi_bus1;
-    spi_bus1.parent.user_data = (void *)SPI1;
-
-    result = rt_spi_bus_register(&spi_bus1, "spi1", &gd32_spi_ops);
+    spi_bus1.parent.user_data = (void *)SPI2;
 
-    rcu_periph_clock_enable(RCU_SPI1);
-    rcu_periph_clock_enable(RCU_GPIOB);
+    result = rt_spi_bus_register(&spi_bus1, "spi2", &v85xx_spi_ops);
 
-    /* SPI1 GPIO config: SCK/PB13, MISO/PB14, MOSI/PB15 */
-    gpio_af_set(GPIOB, GPIO_AF_0, GPIO_PIN_13 | GPIO_PIN_14 |GPIO_PIN_15);
-    gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_13 | GPIO_PIN_14 |GPIO_PIN_15);
-    gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_13 | GPIO_PIN_14 |GPIO_PIN_15);
 #endif
     return result;
 }
-INIT_BOARD_EXPORT(gd32_hw_spi_init);
+INIT_BOARD_EXPORT(v85xx_hw_spi_init);
 #endif

bsp/Vango_V85xx/drivers/drv_spi.h

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2012-01-01    aozima       first implementation.
+ * 2021-09-21    zhuxw        add vango v85xx spi drivers
  * 
  */
 

bsp/Vango_V85xx/project.uvoptx

@@ -0,0 +1,1324 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>Target 1</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>0</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
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+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\Listings\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
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+        <CreateAListing>1</CreateAListing>
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+        <CListInc>0</CListInc>
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+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
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+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
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+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
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+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>1</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>BIN\UL2CM3.DLL</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0Vango_V85XX -FS00 -FL040000 -FP0($$Device:V85XX$FLASH\Vango_V85XX.FLM))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
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+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
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+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
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+      <pSingCmds></pSingCmds>
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+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+  <Group>
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+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define>V85xx, USE_STDPERIPH_DRIVER, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, USE_TARGET_DRIVER, RT_USING_ARM_LIBC</Define>
+              <Undefine></Undefine>
+              <IncludePath>applications;..\..\libcpu\arm\common;..\..\libcpu\arm\cortex-m0;..\..\components\drivers\include;..\..\components\drivers\include;..\..\components\drivers\spi;..\..\components\drivers\include;..\..\components\drivers\include;drivers;..\..\components\dfs\include;..\..\components\dfs\filesystems\devfs;..\..\components\finsh;.;..\..\include;..\..\components\libc\compilers\armlibc;..\..\components\libc\compilers\common;..\..\components\libc\compilers\common\none-gcc;..\..\examples\utest\testcases\kernel;Libraries\CMSIS\Vango\V85xx\Include;Libraries\CMSIS;Libraries\VangoV85xx_standard_peripheral\Include</IncludePath>
+            </VariousControls>
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+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
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+          <GroupName>Applications</GroupName>
+          <Files>
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+              <FilePath>..\..\libcpu\arm\cortex-m0\context_rvds.S</FilePath>
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+              <ComprImg>0</ComprImg>
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+                  <IncludePath></IncludePath>
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+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>

bsp/Vango_V85xx/rtconfig.h

@@ -179,5 +179,7 @@
 
 #define BSP_USING_UART
 #define BSP_USING_UART2
+#define RT_USING_SPI1
+#define RT_USING_SPI2
 
 #endif