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[libcpu] Add SConscript in libcpu.

Bernard Xiong 6 ani în urmă
părinte
comite
bde47018b8
94 a modificat fișierele cu 1249 adăugiri și 498 ștergeri
  1. 1 0
      bsp/qemu-vexpress-a9/SConstruct
  2. 5 4
      bsp/qemu-vexpress-gemini/SConstruct
  3. 5 4
      bsp/realview-a8/SConstruct
  4. 9 32
      libcpu/SConscript
  5. 23 0
      libcpu/arm/AT91SAM7S/SConscript
  6. 63 67
      libcpu/arm/AT91SAM7S/context_rvds.S
  7. 23 0
      libcpu/arm/AT91SAM7X/SConscript
  8. 9 13
      libcpu/arm/AT91SAM7X/context_rvds.S
  9. 18 0
      libcpu/arm/SConscript
  10. 23 0
      libcpu/arm/am335x/SConscript
  11. 25 0
      libcpu/arm/arm926/SConscript
  12. 2 16
      libcpu/arm/arm926/context_gcc.S
  13. 10 24
      libcpu/arm/arm926/context_iar.S
  14. 4 18
      libcpu/arm/arm926/context_rvds.S
  15. 2 16
      libcpu/arm/arm926/start_iar.S
  16. 2 35
      libcpu/arm/arm926/start_rvds.S
  17. 23 0
      libcpu/arm/armv6/SConscript
  18. 23 0
      libcpu/arm/common/SConscript
  19. 29 29
      libcpu/arm/common/backtrace.c
  20. 23 0
      libcpu/arm/cortex-a/SConscript
  21. 23 0
      libcpu/arm/cortex-m0/SConscript
  22. 2 6
      libcpu/arm/cortex-m0/context_iar.S
  23. 2 6
      libcpu/arm/cortex-m0/context_rvds.S
  24. 23 0
      libcpu/arm/cortex-m3/SConscript
  25. 2 6
      libcpu/arm/cortex-m3/context_iar.S
  26. 2 6
      libcpu/arm/cortex-m3/context_rvds.S
  27. 23 0
      libcpu/arm/cortex-m4/SConscript
  28. 2 6
      libcpu/arm/cortex-m4/context_iar.S
  29. 23 0
      libcpu/arm/cortex-m7/SConscript
  30. 2 6
      libcpu/arm/cortex-m7/context_iar.S
  31. 2 6
      libcpu/arm/cortex-m7/context_rvds.S
  32. 23 0
      libcpu/arm/cortex-r4/SConscript
  33. 3 7
      libcpu/arm/cortex-r4/context_ccs.asm
  34. 23 0
      libcpu/arm/dm36x/SConscript
  35. 2 16
      libcpu/arm/dm36x/context_rvds.S
  36. 23 0
      libcpu/arm/lpc214x/SConscript
  37. 2 6
      libcpu/arm/lpc214x/context_rvds.S
  38. 23 0
      libcpu/arm/lpc24xx/SConscript
  39. 2 6
      libcpu/arm/lpc24xx/context_rvds.S
  40. 14 8
      libcpu/arm/realview-a8-vmm/SConscript
  41. 23 0
      libcpu/arm/s3c24x0/SConscript
  42. 2 6
      libcpu/arm/s3c24x0/context_rvds.S
  43. 23 0
      libcpu/arm/s3c44b0/SConscript
  44. 2 6
      libcpu/arm/s3c44b0/context_rvds.S
  45. 23 0
      libcpu/arm/sep4020/SConscript
  46. 2 6
      libcpu/arm/sep4020/context_rvds.S
  47. 14 8
      libcpu/arm/zynq7000/SConscript
  48. 5 15
      libcpu/arm/zynq7000/context_gcc.S
  49. 8 17
      libcpu/arm/zynq7000/cp15.h
  50. 5 15
      libcpu/arm/zynq7000/gic.c
  51. 5 15
      libcpu/arm/zynq7000/gic.h
  52. 8 17
      libcpu/arm/zynq7000/interrupt.h
  53. 5 15
      libcpu/arm/zynq7000/mmu.c
  54. 5 15
      libcpu/arm/zynq7000/trap.c
  55. 15 0
      libcpu/avr32/SConscript
  56. 14 0
      libcpu/avr32/uc3/SConscript
  57. 15 0
      libcpu/blackfin/SConscript
  58. 14 0
      libcpu/blackfin/bf53x/SConscript
  59. 18 0
      libcpu/c-sky/SConscript
  60. 14 0
      libcpu/c-sky/ck802/SConscript
  61. 14 0
      libcpu/c-sky/common/SConscript
  62. 14 0
      libcpu/ia32/SConscript
  63. 15 0
      libcpu/m16c/SConscript
  64. 14 0
      libcpu/m16c/m16c62p/SConscript
  65. 18 0
      libcpu/mips/SConscript
  66. 14 0
      libcpu/mips/common/SConscript
  67. 14 0
      libcpu/mips/loongson_1b/SConscript
  68. 14 0
      libcpu/mips/loongson_1c/SConscript
  69. 14 0
      libcpu/mips/pic32/SConscript
  70. 14 0
      libcpu/mips/x1000/SConscript
  71. 14 0
      libcpu/mips/xburst/SConscript.1
  72. 15 0
      libcpu/nios/SConscript
  73. 14 0
      libcpu/nios/nios_ii/SConscript
  74. 18 0
      libcpu/ppc/SConscript
  75. 14 0
      libcpu/ppc/common/SConscript
  76. 14 14
      libcpu/ppc/common/ptrace.h
  77. 14 0
      libcpu/ppc/ppc405/SConscript
  78. 18 0
      libcpu/risc-v/SConscript
  79. 12 0
      libcpu/risc-v/common/SConscript
  80. 7 6
      libcpu/risc-v/e310/SConscript
  81. 14 0
      libcpu/risc-v/k210/SConscript
  82. 14 0
      libcpu/risc-v/rv32m1/SConscript
  83. 14 0
      libcpu/rx/SConscript
  84. 15 0
      libcpu/sim/SConscript
  85. 14 0
      libcpu/sim/posix/SConscript
  86. 14 0
      libcpu/sim/win32/SConscript
  87. 15 0
      libcpu/ti-dsp/SConscript
  88. 14 0
      libcpu/ti-dsp/c28x/SConscript
  89. 15 0
      libcpu/unicore32/SConscript
  90. 14 0
      libcpu/unicore32/sep6200/SConscript
  91. 14 0
      libcpu/v850/70f34/SConscript
  92. 15 0
      libcpu/v850/SConscript
  93. 15 0
      libcpu/xilinx/SConscript
  94. 14 0
      libcpu/xilinx/microblaze/SConscript

+ 1 - 0
bsp/qemu-vexpress-a9/SConstruct

@@ -19,6 +19,7 @@ env = Environment(tools = ['mingw'],
     AR   = rtconfig.AR, ARFLAGS = '-rc',
     LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
 env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+env['ASCOM'] = env['ASPPCOM']
 
 Export('RTT_ROOT')
 Export('rtconfig')

+ 5 - 4
bsp/qemu-vexpress-gemini/SConstruct

@@ -13,11 +13,12 @@ from building import *
 TARGET = 'rtthread-vexpress.' + rtconfig.TARGET_EXT
 
 env = Environment(tools = ['mingw'],
-	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
-	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-	AR = rtconfig.AR, ARFLAGS = '-rc',
-	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
 env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+env['ASCOM'] = env['ASPPCOM']
 
 Export('RTT_ROOT')
 Export('rtconfig')

+ 5 - 4
bsp/realview-a8/SConstruct

@@ -13,11 +13,12 @@ from building import *
 TARGET = 'rtthread-realview.' + rtconfig.TARGET_EXT
 
 env = Environment(tools = ['mingw'],
-	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
-	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-	AR = rtconfig.AR, ARFLAGS = '-rc',
-	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
 env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+env['ASCOM'] = env['ASPPCOM']
 
 Export('RTT_ROOT')
 Export('rtconfig')

+ 9 - 32
libcpu/SConscript

@@ -1,38 +1,15 @@
-Import('RTT_ROOT')
-Import('rtconfig')
-from building import *
-
-arch = rtconfig.ARCH
-comm = rtconfig.ARCH + '/common'
-path = rtconfig.ARCH + '/' + rtconfig.CPU
-src  = []
-ASFLAGS = ''
-
-# The set of source files associated with this SConscript file.
-if rtconfig.PLATFORM == 'armcc':
-    src += Glob(path + '/*.c') + Glob(path + '/*_rvds.S') 
-    src += Glob(comm + '/*.c') + Glob(comm + '/*_rvds.S')
-
-if rtconfig.PLATFORM == 'gcc':
-    src += Glob(path + '/*_init.S')
-    src += Glob(path + '/*.c') + Glob(path + '/*_gcc.S') 
-    src += Glob(comm + '/*.c') + Glob(comm + '/*_gcc.S')
+# RT-Thread building script for bridge
 
-if rtconfig.PLATFORM == 'iar':
-    src += Glob(path + '/*.c') + Glob(path + '/*_iar.S')
-    src += Glob(comm + '/*.c') + Glob(comm + '/*_iar.S')
-
-if rtconfig.PLATFORM == 'cl':
-    src = Glob(path + '/*.c')
-
-if rtconfig.PLATFORM == 'mingw':
-    src = Glob(path + '/*.c')
+import os
+from building import *
 
-if rtconfig.PLATFORM == 'armcc' and rtconfig.ARCH == 'arm' and rtconfig.CPU == 'arm926':
-    ASFLAGS = ' --cpreproc'
+Import('rtconfig')
 
-CPPPATH = [RTT_ROOT + '/libcpu/' + arch + '/' + rtconfig.CPU, RTT_ROOT + '/libcpu/' + arch + '/common']
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
 
-group = DefineGroup(rtconfig.CPU.upper(), src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+if rtconfig.ARCH in list:
+    group = group + SConscript(os.path.join(cwd, rtconfig.ARCH, 'SConscript'))
 
 Return('group')

+ 23 - 0
libcpu/arm/AT91SAM7S/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 63 - 67
libcpu/arm/AT91SAM7S/context_rvds.S

@@ -1,43 +1,39 @@
-;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date           Author       Notes
-; * 2009-01-20     Bernard      first version
-; */
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-20     Bernard      first version
+ */
 
 NOINT	EQU		0xc0	; disable interrupt in psr
 
-	AREA |.text|, CODE, READONLY, ALIGN=2
-	ARM
-	REQUIRE8
-	PRESERVE8
+    AREA |.text|, CODE, READONLY, ALIGN=2
+    ARM
+    REQUIRE8
+    PRESERVE8
 
 ;/*
 ; * rt_base_t rt_hw_interrupt_disable();
 ; */
 rt_hw_interrupt_disable	PROC
-	EXPORT rt_hw_interrupt_disable
-	MRS r0, cpsr
-	ORR r1, r0, #NOINT
-	MSR cpsr_c, r1
-	BX	lr
-	ENDP
+    EXPORT rt_hw_interrupt_disable
+    MRS r0, cpsr
+    ORR r1, r0, #NOINT
+    MSR cpsr_c, r1
+    BX	lr
+    ENDP
 
 ;/*
 ; * void rt_hw_interrupt_enable(rt_base_t level);
 ; */
 rt_hw_interrupt_enable	PROC
-	EXPORT rt_hw_interrupt_enable
-	MSR cpsr_c, r0
-	BX	lr
-	ENDP
+    EXPORT rt_hw_interrupt_enable
+    MSR cpsr_c, r0
+    BX	lr
+    ENDP
 
 ;/*
 ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
@@ -45,63 +41,63 @@ rt_hw_interrupt_enable	PROC
 ; * r1 --> to
 ; */
 rt_hw_context_switch	PROC
-	EXPORT rt_hw_context_switch
-	STMFD	sp!, {lr}			; push pc (lr should be pushed in place of PC)
-	STMFD	sp!, {r0-r12, lr}	; push lr & register file
+    EXPORT rt_hw_context_switch
+    STMFD	sp!, {lr}			; push pc (lr should be pushed in place of PC)
+    STMFD	sp!, {r0-r12, lr}	; push lr & register file
 
-	MRS		r4, cpsr
-	STMFD	sp!, {r4}			; push cpsr
-	MRS		r4, spsr
-	STMFD	sp!, {r4}			; push spsr
+    MRS		r4, cpsr
+    STMFD	sp!, {r4}			; push cpsr
+    MRS		r4, spsr
+    STMFD	sp!, {r4}			; push spsr
 
-	STR	sp, [r0]				; store sp in preempted tasks TCB
-	LDR	sp, [r1]				; get new task stack pointer
+    STR	sp, [r0]				; store sp in preempted tasks TCB
+    LDR	sp, [r1]				; get new task stack pointer
 
-	LDMFD	sp!, {r4}			; pop new task spsr
-	MSR	spsr_cxsf, r4
-	LDMFD	sp!, {r4}			; pop new task cpsr
-	MSR	cpsr_cxsf, r4
+    LDMFD	sp!, {r4}			; pop new task spsr
+    MSR	spsr_cxsf, r4
+    LDMFD	sp!, {r4}			; pop new task cpsr
+    MSR	cpsr_cxsf, r4
 
-	LDMFD	sp!, {r0-r12, lr, pc}	; pop new task r0-r12, lr & pc
-	ENDP
+    LDMFD	sp!, {r0-r12, lr, pc}	; pop new task r0-r12, lr & pc
+    ENDP
 
 ;/*
 ; * void rt_hw_context_switch_to(rt_uint32 to);
 ; * r0 --> to
 ; */
 rt_hw_context_switch_to	PROC
-	EXPORT rt_hw_context_switch_to
-	LDR	sp, [r0]				; get new task stack pointer
+    EXPORT rt_hw_context_switch_to
+    LDR	sp, [r0]				; get new task stack pointer
 
-	LDMFD	sp!, {r4}			; pop new task spsr
-	MSR	spsr_cxsf, r4
-	LDMFD	sp!, {r4}			; pop new task cpsr
-	MSR	cpsr_cxsf, r4
+    LDMFD	sp!, {r4}			; pop new task spsr
+    MSR	spsr_cxsf, r4
+    LDMFD	sp!, {r4}			; pop new task cpsr
+    MSR	cpsr_cxsf, r4
 
-	LDMFD	sp!, {r0-r12, lr, pc}	; pop new task r0-r12, lr & pc
-	ENDP
+    LDMFD	sp!, {r0-r12, lr, pc}	; pop new task r0-r12, lr & pc
+    ENDP
 
 ;/*
 ; * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
 ; */
-	IMPORT rt_thread_switch_interrupt_flag
-	IMPORT rt_interrupt_from_thread
-	IMPORT rt_interrupt_to_thread
+    IMPORT rt_thread_switch_interrupt_flag
+    IMPORT rt_interrupt_from_thread
+    IMPORT rt_interrupt_to_thread
 
 rt_hw_context_switch_interrupt	PROC
-	EXPORT rt_hw_context_switch_interrupt
-	LDR r2, =rt_thread_switch_interrupt_flag
-	LDR r3, [r2]
-	CMP r3, #1
-	BEQ _reswitch
-	MOV r3, #1							; set rt_thread_switch_interrupt_flag to 1
-	STR r3, [r2]
-	LDR r2, =rt_interrupt_from_thread	; set rt_interrupt_from_thread
-	STR r0, [r2]
+    EXPORT rt_hw_context_switch_interrupt
+    LDR r2, =rt_thread_switch_interrupt_flag
+    LDR r3, [r2]
+    CMP r3, #1
+    BEQ _reswitch
+    MOV r3, #1							; set rt_thread_switch_interrupt_flag to 1
+    STR r3, [r2]
+    LDR r2, =rt_interrupt_from_thread	; set rt_interrupt_from_thread
+    STR r0, [r2]
 _reswitch
-	LDR r2, =rt_interrupt_to_thread		; set rt_interrupt_to_thread
-	STR r1, [r2]
-	BX	lr
-	ENDP
+    LDR r2, =rt_interrupt_to_thread		; set rt_interrupt_to_thread
+    STR r1, [r2]
+    BX	lr
+    ENDP
 
-	END
+    END

+ 23 - 0
libcpu/arm/AT91SAM7X/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 9 - 13
libcpu/arm/AT91SAM7X/context_rvds.S

@@ -1,16 +1,12 @@
-;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
-; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
-; *
-; * Change Logs:
-; * Date           Author       Notes
-; * 2009-01-20     Bernard      first version
-; */
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-20     Bernard      first version
+ */
 
 NOINT	EQU		0xc0	; disable interrupt in psr
 

+ 18 - 0
libcpu/arm/SConscript

@@ -0,0 +1,18 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# add common code files
+group = group + SConscript(os.path.join(cwd, 'common', 'SConscript'))
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 23 - 0
libcpu/arm/am335x/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 25 - 0
libcpu/arm/arm926/SConscript

@@ -0,0 +1,25 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+    ASFLAGS = ' --cpreproc'
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 2 - 16
libcpu/arm/arm926/context_gcc.S

@@ -1,21 +1,7 @@
 ;/*
-; * File      : context_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; *  This program is free software; you can redistribute it and/or modify
-; *  it under the terms of the GNU General Public License as published by
-; *  the Free Software Foundation; either version 2 of the License, or
-; *  (at your option) any later version.
-; *
-; *  This program is distributed in the hope that it will be useful,
-; *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-; *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-; *  GNU General Public License for more details.
-; *
-; *  You should have received a copy of the GNU General Public License along
-; *  with this program; if not, write to the Free Software Foundation, Inc.,
-; *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 10 - 24
libcpu/arm/arm926/context_iar.S

@@ -1,27 +1,13 @@
-;/*
-; * File      : context_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
-; *
-; *  This program is free software; you can redistribute it and/or modify
-; *  it under the terms of the GNU General Public License as published by
-; *  the Free Software Foundation; either version 2 of the License, or
-; *  (at your option) any later version.
-; *
-; *  This program is distributed in the hope that it will be useful,
-; *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-; *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-; *  GNU General Public License for more details.
-; *
-; *  You should have received a copy of the GNU General Public License along
-; *  with this program; if not, write to the Free Software Foundation, Inc.,
-; *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-; *
-; * Change Logs:
-; * Date           Author       Notes
-; * 2011-08-14     weety      copy from mini2440
-; * 2015-04-15     ArdaFu     convert from context_gcc.s
-; */
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-08-14     weety    copy from mini2440
+ * 2015-04-15     ArdaFu     convert from context_gcc.s
+ */
 
 #define NOINT            0xc0
 

+ 4 - 18
libcpu/arm/arm926/context_rvds.S

@@ -1,24 +1,10 @@
 ;/*
-; * file      : context_rvds.s
-; * this file is part of rt-thread rtos
-; * copyright (c) 2006, rt-thread development team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; *  this program is free software; you can redistribute it and/or modify
-; *  it under the terms of the gnu general public license as published by
-; *  the free software foundation; either version 2 of the license, or
-; *  (at your option) any later version.
+; * SPDX-License-Identifier: Apache-2.0
 ; *
-; *  this program is distributed in the hope that it will be useful,
-; *  but without any warranty; without even the implied warranty of
-; *  merchantability or fitness for a particular purpose.  see the
-; *  gnu general public license for more details.
-; *
-; *  you should have received a copy of the gnu general public license along
-; *  with this program; if not, write to the free software foundation, inc.,
-; *  51 franklin street, fifth floor, boston, ma 02110-1301 usa.
-; *
-; * change logs:
-; * date           author       notes
+; * Change Logs:
+; * Date           Author       Notes
 ; * 2011-08-14     weety    copy from mini2440
 ; */
 

+ 2 - 16
libcpu/arm/arm926/start_iar.S

@@ -1,21 +1,7 @@
 ;/*
-; * File      : start.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; *  This program is free software; you can redistribute it and/or modify
-; *  it under the terms of the GNU General Public License as published by
-; *  the Free Software Foundation; either version 2 of the License, or
-; *  (at your option) any later version.
-; *
-; *  This program is distributed in the hope that it will be useful,
-; *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-; *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-; *  GNU General Public License for more details.
-; *
-; *  You should have received a copy of the GNU General Public License along
-; *  with this program; if not, write to the Free Software Foundation, Inc.,
-; *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 2 - 35
libcpu/arm/arm926/start_rvds.S

@@ -1,21 +1,7 @@
 ;/*
-; * File      : start_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; *  This program is free software; you can redistribute it and/or modify
-; *  it under the terms of the GNU General Public License as published by
-; *  the Free Software Foundation; either version 2 of the License, or
-; *  (at your option) any later version.
-; *
-; *  This program is distributed in the hope that it will be useful,
-; *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-; *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-; *  GNU General Public License for more details.
-; *
-; *  You should have received a copy of the GNU General Public License along
-; *  with this program; if not, write to the Free Software Foundation, Inc.,
-; *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes
@@ -25,7 +11,6 @@
 ; * 2015-06-04     aozima     Align stack address to 8 byte.
 ; */
 
-;#include "rt_low_level_init.h"
 UND_STK_SIZE EQU 512
 SVC_STK_SIZE EQU 4096
 ABT_STK_SIZE EQU 512
@@ -35,25 +20,7 @@ SYS_STK_SIZE EQU 512
 Heap_Size    EQU 512
 
 S_FRAME_SIZE    EQU     (18*4)   ;72
-;S_SPSR          EQU     (17*4)   ;SPSR
-;S_CPSR          EQU     (16*4)   ;CPSR
 S_PC            EQU     (15*4)   ;R15
-;S_LR            EQU     (14*4)   ;R14
-;S_SP            EQU     (13*4)   ;R13
-
-;S_IP            EQU     (12*4)   ;R12
-;S_FP            EQU     (11*4)   ;R11
-;S_R10           EQU     (10*4)
-;S_R9            EQU     (9*4)
-;S_R8            EQU     (8*4)
-;S_R7            EQU     (7*4)
-;S_R6            EQU     (6*4)
-;S_R5            EQU     (5*4)
-;S_R4            EQU     (4*4)
-;S_R3            EQU     (3*4)
-;S_R2            EQU     (2*4)
-;S_R1            EQU     (1*4)
-;S_R0            EQU     (0*4)
 
 MODE_USR        EQU     0X10
 MODE_FIQ        EQU     0X11

+ 23 - 0
libcpu/arm/armv6/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 23 - 0
libcpu/arm/common/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 29 - 29
libcpu/arm/common/backtrace.c

@@ -13,51 +13,51 @@
 #ifdef __GNUC__
 /*
 -->High Address,Stack Top
-PC<-----|
-LR	 	 |
-IP	 	 |
-FP	 	 |
-......		 |
-PC<-|	 |
-LR	 |	 |
-IP	 |	 |
+PC<------|
+LR       |
+IP       |
+FP       |
+......   |
+PC <-|   |
+LR   |   |
+IP   |   |
 FP---|-- |
-......	 |
-PC	 |
-LR	 |
-IP 	 |
+......   |
+PC       |
+LR       |
+IP       |
 FP---
 -->Low Address,Stack Bottom
 */
 void rt_hw_backtrace(rt_uint32_t *fp, rt_uint32_t thread_entry)
 {
-	rt_uint32_t i, pc, func_entry;
+    rt_uint32_t i, pc, func_entry;
 
-	pc = *fp;
-	rt_kprintf("[0x%x]\n", pc-0xC);
+    pc = *fp;
+    rt_kprintf("[0x%x]\n", pc-0xC);
 
-	for(i=0; i<10; i++)
-	{
-		fp = (rt_uint32_t *)*(fp - 3);
-		pc = *fp ;
+    for(i=0; i<10; i++)
+    {
+        fp = (rt_uint32_t *)*(fp - 3);
+        pc = *fp ;
 
-		func_entry = pc - 0xC;
+        func_entry = pc - 0xC;
 
-		if(func_entry <= 0x30000000) break;
+        if(func_entry <= 0x30000000) break;
 
-		if(func_entry == thread_entry)
-		{
-			rt_kprintf("EntryPoint:0x%x\n", func_entry);
+        if(func_entry == thread_entry)
+        {
+            rt_kprintf("EntryPoint:0x%x\n", func_entry);
 
-			break;
-		}
+            break;
+        }
 
-		rt_kprintf("[0x%x]\n", func_entry);
-	}
+        rt_kprintf("[0x%x]\n", func_entry);
+    }
 }
 #else
 void rt_hw_backtrace(rt_uint32_t *fp, rt_uint32_t thread_entry)
 {
-	/* old compiler implementation */
+    /* old compiler implementation */
 }
 #endif

+ 23 - 0
libcpu/arm/cortex-a/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 23 - 0
libcpu/arm/cortex-m0/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 6
libcpu/arm/cortex-m0/context_iar.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 2 - 6
libcpu/arm/cortex-m0/context_rvds.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2009, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 23 - 0
libcpu/arm/cortex-m3/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 6
libcpu/arm/cortex-m3/context_iar.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 2 - 6
libcpu/arm/cortex-m3/context_rvds.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 23 - 0
libcpu/arm/cortex-m4/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 6
libcpu/arm/cortex-m4/context_iar.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 23 - 0
libcpu/arm/cortex-m7/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 6
libcpu/arm/cortex-m7/context_iar.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_iar.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 2 - 6
libcpu/arm/cortex-m7/context_rvds.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 23 - 0
libcpu/arm/cortex-r4/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 3 - 7
libcpu/arm/cortex-r4/context_ccs.asm

@@ -1,14 +1,10 @@
 ;/*
-; * File      : context_ccs.asm
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
-; * Date       Author       Notes
+; * Date           Author       Notes
 ; * 2009-01-20     Bernard      first version
 ; * 2011-07-22     Bernard      added thumb mode porting
 ; * 2013-05-24     Grissiom     port to CCS

+ 23 - 0
libcpu/arm/dm36x/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 16
libcpu/arm/dm36x/context_rvds.S

@@ -1,21 +1,7 @@
 ;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; *  This program is free software; you can redistribute it and/or modify
-; *  it under the terms of the GNU General Public License as published by
-; *  the Free Software Foundation; either version 2 of the License, or
-; *  (at your option) any later version.
-; *
-; *  This program is distributed in the hope that it will be useful,
-; *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-; *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-; *  GNU General Public License for more details.
-; *
-; *  You should have received a copy of the GNU General Public License along
-; *  with this program; if not, write to the Free Software Foundation, Inc.,
-; *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 23 - 0
libcpu/arm/lpc214x/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 6
libcpu/arm/lpc214x/context_rvds.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 23 - 0
libcpu/arm/lpc24xx/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 6
libcpu/arm/lpc24xx/context_rvds.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 14 - 8
libcpu/arm/realview-a8-vmm/SConscript

@@ -1,17 +1,23 @@
-Import('rtconfig')
+# RT-Thread building script for component
+
 from building import *
 
+Import('rtconfig')
+
 cwd     = GetCurrentDir()
-src	= Glob('*.c')
+src     = Glob('*.c') + Glob('*.cpp')
 CPPPATH = [cwd]
 
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
 if rtconfig.PLATFORM == 'iar':
-        src += Glob('*_iar.S')
-elif rtconfig.PLATFORM == 'gcc':
-        src += Glob('*_gcc.S')
-elif rtconfig.PLATFORM == 'armcc':
-        src += Glob('*_rvds.S')
+    src += Glob('*_iar.S')
 
-group = DefineGroup('AM335x', src, depend = [''], CPPPATH = CPPPATH)
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
 
 Return('group')

+ 23 - 0
libcpu/arm/s3c24x0/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 6
libcpu/arm/s3c24x0/context_rvds.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 23 - 0
libcpu/arm/s3c44b0/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 6
libcpu/arm/s3c44b0/context_rvds.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 23 - 0
libcpu/arm/sep4020/SConscript

@@ -0,0 +1,23 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
+if rtconfig.PLATFORM == 'iar':
+    src += Glob('*_iar.S')
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

+ 2 - 6
libcpu/arm/sep4020/context_rvds.S

@@ -1,11 +1,7 @@
 ;/*
-; * File      : context_rvds.S
-; * This file is part of RT-Thread RTOS
-; * COPYRIGHT (C) 2006, RT-Thread Development Team
+; * Copyright (c) 2006-2018, RT-Thread Development Team
 ; *
-; * The license and distribution terms for this file may be
-; * found in the file LICENSE in this distribution or at
-; * http://www.rt-thread.org/license/LICENSE
+; * SPDX-License-Identifier: Apache-2.0
 ; *
 ; * Change Logs:
 ; * Date           Author       Notes

+ 14 - 8
libcpu/arm/zynq7000/SConscript

@@ -1,17 +1,23 @@
-Import('rtconfig')
+# RT-Thread building script for component
+
 from building import *
 
+Import('rtconfig')
+
 cwd     = GetCurrentDir()
-src	= Glob('*.c')
+src     = Glob('*.c') + Glob('*.cpp')
 CPPPATH = [cwd]
 
+if rtconfig.PLATFORM == 'armcc':
+    src += Glob('*_rvds.S')
+
+if rtconfig.PLATFORM == 'gcc':
+    src += Glob('*_init.S')
+    src += Glob('*_gcc.S')
+
 if rtconfig.PLATFORM == 'iar':
-        src += Glob('*_iar.S')
-elif rtconfig.PLATFORM == 'gcc':
-        src += Glob('*_gcc.S')
-elif rtconfig.PLATFORM == 'armcc':
-        src += Glob('*_rvds.S')
+    src += Glob('*_iar.S')
 
-group = DefineGroup('AM1808', src, depend = [''], CPPPATH = CPPPATH)
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH)
 
 Return('group')

+ 5 - 15
libcpu/arm/zynq7000/context_gcc.S

@@ -1,21 +1,11 @@
 /*
- * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd
+ * Copyright (c) 2006-2018, Shanghai Real-Thread Technology Co., Ltd
  *
- *  All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-20     Bernard      first version
  */
 
 #define NOINT           0xc0

+ 8 - 17
libcpu/arm/zynq7000/cp15.h

@@ -1,25 +1,16 @@
-#ifndef __CP15_H__
-#define __CP15_H__
 /*
- * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd
- *
- *  All rights reserved.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
+ * Copyright (c) 2006-2018, RT-Thread Development Team
  *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
+ * SPDX-License-Identifier: Apache-2.0
  *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * Change Logs:
+ * Date           Author       Notes
+ * 2013-07-20     Bernard      first version
  */
 
+#ifndef __CP15_H__
+#define __CP15_H__
+
 unsigned long rt_cpu_get_smp_id(void);
 
 void rt_cpu_mmu_disable(void);

+ 5 - 15
libcpu/arm/zynq7000/gic.c

@@ -1,21 +1,11 @@
 /*
- * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd
+ * Copyright (c) 2006-2018, RT-Thread Development Team
  *
- *  All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * Change Logs:
+ * Date           Author       Notes
+ * 2013-07-20     Bernard      first version
  */
 
 #include <rtthread.h>

+ 5 - 15
libcpu/arm/zynq7000/gic.h

@@ -1,21 +1,11 @@
 /*
- * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd
+ * Copyright (c) 2006-2018, RT-Thread Development Team
  *
- *  All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * Change Logs:
+ * Date           Author       Notes
+ * 2013-07-20     Bernard      first version
  */
 
 #ifndef __GIC_H__

+ 8 - 17
libcpu/arm/zynq7000/interrupt.h

@@ -1,25 +1,16 @@
-#ifndef __INTERRUPT_H__
-#define __INTERRUPT_H__
 /*
- * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd
- *
- *  All rights reserved.
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
+ * Copyright (c) 2006-2018, RT-Thread Development Team
  *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
+ * SPDX-License-Identifier: Apache-2.0
  *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * Change Logs:
+ * Date           Author       Notes
+ * 2013-07-20     Bernard      first version
  */
 
+#ifndef __INTERRUPT_H__
+#define __INTERRUPT_H__
+
 void rt_hw_interrupt_clear(int vector);
 
 #endif /* end of include guard: __INTERRUPT_H__ */

+ 5 - 15
libcpu/arm/zynq7000/mmu.c

@@ -1,21 +1,11 @@
 /*
- * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd
+ * Copyright (c) 2006-2018, RT-Thread Development Team
  *
- *  All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * Change Logs:
+ * Date           Author       Notes
+ * 2013-07-20     Bernard      first version
  */
 
 #include <rtthread.h>

+ 5 - 15
libcpu/arm/zynq7000/trap.c

@@ -1,21 +1,11 @@
 /*
- * COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd
+ * Copyright (c) 2006-2018, RT-Thread Development Team
  *
- *  All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
  *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
- *
- *  This program is distributed in the hope that it will be useful,
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ * Change Logs:
+ * Date           Author       Notes
+ * 2013-07-20     Bernard      first version
  */
 
 #include <rtthread.h>

+ 15 - 0
libcpu/avr32/SConscript

@@ -0,0 +1,15 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/avr32/uc3/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 15 - 0
libcpu/blackfin/SConscript

@@ -0,0 +1,15 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/blackfin/bf53x/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_vdsp.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 18 - 0
libcpu/c-sky/SConscript

@@ -0,0 +1,18 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# add common code files
+group = group + SConscript(os.path.join(cwd, 'common', 'SConscript'))
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/c-sky/ck802/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/c-sky/common/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/ia32/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 15 - 0
libcpu/m16c/SConscript

@@ -0,0 +1,15 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/m16c/m16c62p/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 18 - 0
libcpu/mips/SConscript

@@ -0,0 +1,18 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# add common code files
+group = group + SConscript(os.path.join(cwd, 'common', 'SConscript'))
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/mips/common/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/mips/loongson_1b/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/mips/loongson_1c/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/mips/pic32/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/mips/x1000/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/mips/xburst/SConscript.1

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 15 - 0
libcpu/nios/SConscript

@@ -0,0 +1,15 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/nios/nios_ii/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 18 - 0
libcpu/ppc/SConscript

@@ -0,0 +1,18 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# add common code files
+group = group + SConscript(os.path.join(cwd, 'common', 'SConscript'))
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/ppc/common/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 14
libcpu/ppc/common/ptrace.h

@@ -21,20 +21,20 @@
 #define PPC_REG unsigned long
 
 struct pt_regs {
-	PPC_REG gpr[32];
-	PPC_REG nip;
-	PPC_REG msr;
-	PPC_REG orig_gpr3;	/* Used for restarting system calls */
-	PPC_REG ctr;
-	PPC_REG link;
-	PPC_REG xer;
-	PPC_REG ccr;
-	PPC_REG mq;		/* 601 only (not used at present) */
-				    /* Used on APUS to hold IPL value. */
-	PPC_REG trap;		/* Reason for being here */
-	PPC_REG dar;		/* Fault registers */
-	PPC_REG dsisr;
-	PPC_REG result;		/* Result of a system call */
+    PPC_REG gpr[32];
+    PPC_REG nip;
+    PPC_REG msr;
+    PPC_REG orig_gpr3;	/* Used for restarting system calls */
+    PPC_REG ctr;
+    PPC_REG link;
+    PPC_REG xer;
+    PPC_REG ccr;
+    PPC_REG mq;		/* 601 only (not used at present) */
+                    /* Used on APUS to hold IPL value. */
+    PPC_REG trap;		/* Reason for being here */
+    PPC_REG dar;		/* Fault registers */
+    PPC_REG dsisr;
+    PPC_REG result;		/* Result of a system call */
 }__attribute__((packed)) CELL_STACK_FRAME_t;
 #endif
 

+ 14 - 0
libcpu/ppc/ppc405/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 18 - 0
libcpu/risc-v/SConscript

@@ -0,0 +1,18 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# add common code files
+group = group + SConscript(os.path.join(cwd, 'common', 'SConscript'))
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 12 - 0
libcpu/risc-v/common/SConscript

@@ -0,0 +1,12 @@
+# RT-Thread building script for component
+
+from building import *
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 7 - 6
libcpu/risc-v/e310/SConscript

@@ -1,13 +1,14 @@
-Import('rtconfig')
+# RT-Thread building script for component
+
 from building import *
 
+Import('rtconfig')
+
 cwd     = GetCurrentDir()
-src     = Glob('*.c')
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
 CPPPATH = [cwd]
+ASFLAGS = ''
 
-if rtconfig.PLATFORM == 'gcc':
-    src += Glob('*_gcc.S')
-
-group = DefineGroup('libcpu', src, depend = [''], CPPPATH = CPPPATH)
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
 
 Return('group')

+ 14 - 0
libcpu/risc-v/k210/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/risc-v/rv32m1/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/rx/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_iar.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 15 - 0
libcpu/sim/SConscript

@@ -0,0 +1,15 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/sim/posix/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/sim/win32/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 15 - 0
libcpu/ti-dsp/SConscript

@@ -0,0 +1,15 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/ti-dsp/c28x/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*.s')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 15 - 0
libcpu/unicore32/SConscript

@@ -0,0 +1,15 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/unicore32/sep6200/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 14 - 0
libcpu/v850/70f34/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')

+ 15 - 0
libcpu/v850/SConscript

@@ -0,0 +1,15 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 15 - 0
libcpu/xilinx/SConscript

@@ -0,0 +1,15 @@
+# RT-Thread building script for bridge
+
+import os
+from building import *
+
+Import('rtconfig')
+
+cwd   = GetCurrentDir()
+group = []
+list  = os.listdir(cwd)
+
+# cpu porting code files
+group = group + SConscript(os.path.join(cwd, rtconfig.CPU, 'SConscript'))
+
+Return('group')

+ 14 - 0
libcpu/xilinx/microblaze/SConscript

@@ -0,0 +1,14 @@
+# RT-Thread building script for component
+
+from building import *
+
+Import('rtconfig')
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
+CPPPATH = [cwd]
+ASFLAGS = ''
+
+group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
+
+Return('group')