[rv64] code formatting

components/lwp/arch/risc-v/rv64/lwp_arch.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -147,7 +147,7 @@ void lwp_set_thread_context(void *exit_addr, void *new_thread_stack, void *user_
 {
     struct rt_hw_stack_frame *syscall_frame;
     struct rt_hw_stack_frame *thread_frame;
-    
+
     rt_uint8_t *stk;
     rt_uint8_t *syscall_stk;
 
@@ -181,10 +181,10 @@ void lwp_set_thread_context(void *exit_addr, void *new_thread_stack, void *user_
 
     /* set pc for thread */
     thread_frame->epc     = (rt_ubase_t)exit_addr;
-    
+
     /* set old exception mode as supervisor, because in kernel */
     thread_frame->sstatus = read_csr(sstatus) | SSTATUS_SPP;
-         
+
     /* set stack as syscall stack */
     thread_frame->user_sp_exc_stack = (rt_ubase_t)syscall_stk;
 
@@ -193,18 +193,18 @@ void lwp_set_thread_context(void *exit_addr, void *new_thread_stack, void *user_
 
     /**
      * The stack for child thread:
-     * 
+     *
      * +------------------------+ --> kernel stack top
-     * | syscall stack          | 
+     * | syscall stack          |
      * |                        |
      * | @sp                    | --> `user_stack`
      * | @epc                   | --> user ecall addr + 4 (skip ecall)
      * | @a0&a1                 | --> 0 (for child return 0)
      * |                        |
-     * +------------------------+ --> temp thread stack top 
+     * +------------------------+ --> temp thread stack top
      * | temp thread stack      |           ^
      * |                        |           |
-     * | @sp                    | ---------/ 
+     * | @sp                    | ---------/
      * | @epc                   | --> `exit_addr` (sys_clone_exit/sys_fork_exit)
      * |                        |
      * +------------------------+ --> thread sp

components/lwp/arch/risc-v/rv64/lwp_arch.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2020, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

components/lwp/arch/risc-v/rv64/reloc.c

@@ -105,4 +105,4 @@ void lwp_elf_reloc(void *text_start, void *rel_dyn_start, size_t rel_dyn_size, v
         }
     }
 }
-#endif
+#endif

libcpu/risc-v/virt64/cache.c

@@ -81,4 +81,4 @@ rt_base_t rt_hw_cpu_dcache_status()
 int sys_cacheflush(void *addr, int size, int cache)
 {
     return 0;
-}
+}

libcpu/risc-v/virt64/cpuport.c

@@ -20,17 +20,17 @@
 
 /**
  * @brief from thread used interrupt context switch
- * 
+ *
  */
 volatile rt_ubase_t  rt_interrupt_from_thread = 0;
 /**
  * @brief to thread used interrupt context switch
- * 
+ *
  */
 volatile rt_ubase_t  rt_interrupt_to_thread   = 0;
 /**
  * @brief flag to indicate context switch in interrupt or not
- * 
+ *
  */
 volatile rt_ubase_t rt_thread_switch_interrupt_flag = 0;
 

libcpu/risc-v/virt64/cpuport.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -46,4 +46,4 @@ rt_inline void rt_hw_isb()
 #endif
 #ifdef RISCV_U_MODE
 #define RISCV_USER_ENTRY 0xFFFFFFE000000000ULL
-#endif
+#endif

libcpu/risc-v/virt64/mmu.c

@@ -78,7 +78,7 @@ int rt_hw_mmu_map_init(rt_mmu_info *mmu_info,void *v_address,rt_size_t size,rt_s
     for(l1_off = va_s;l1_off <= va_e;l1_off++)
     {
         size_t v = vtable[l1_off];
-        
+
         if(v)
         {
             rt_hw_interrupt_enable(level);
@@ -209,7 +209,7 @@ static rt_size_t find_vaddr(rt_mmu_info *mmu_info,rt_size_t pages)
     return 0;
 }
 
-//check whether the range of virtual address are free 
+//check whether the range of virtual address are free
 static int check_vaddr(rt_mmu_info *mmu_info,void *va,rt_size_t pages)
 {
     rt_size_t loop_va = __UMASKVALUE((rt_size_t)va,PAGE_OFFSET_MASK);
@@ -379,13 +379,13 @@ static int __rt_hw_mmu_map(rt_mmu_info *mmu_info,void *v_addr,void *p_addr,rt_si
                 return -1;
             }
         }
-        
+
         RT_ASSERT(!PTE_USED(*(mmu_l3 + l3_off)));
         ref_cnt = mmu_l3 + __SIZE(VPN0_BIT);
         (*ref_cnt)++;
         *(mmu_l3 + l3_off) = COMBINEPTE((rt_size_t)loop_pa,PAGE_DEFAULT_ATTR_LEAF);
         rt_hw_cpu_dcache_clean(mmu_l3 + l3_off,sizeof(*(mmu_l3 + l3_off)));
-        
+
         loop_va += PAGE_SIZE;
         loop_pa += PAGE_SIZE;
     }
@@ -519,7 +519,7 @@ void *_rt_hw_mmu_map_auto(rt_mmu_info *mmu_info,void *v_addr,rt_size_t size,rt_s
     if(v_addr)
     {
         vaddr = __UMASKVALUE((rt_size_t)v_addr,PAGE_OFFSET_MASK);
-        
+
         if(check_vaddr(mmu_info,(void *)vaddr,pages) != 0)
         {
             return 0;
@@ -581,7 +581,7 @@ void *rt_hw_mmu_map_auto(rt_mmu_info *mmu_info,void *v_addr,rt_size_t size,rt_si
 void rt_hw_mmu_unmap(rt_mmu_info *mmu_info,void *v_addr,rt_size_t size)
 {
     rt_base_t level;
-    
+
     level = rt_hw_interrupt_disable();
     _rt_hw_mmu_unmap(mmu_info,v_addr,size);
     rt_hw_interrupt_enable(level);
@@ -603,12 +603,12 @@ void *_rt_hw_mmu_v2p(rt_mmu_info *mmu_info,void *v_addr)
     }
 
     mmu_l1 = ((rt_size_t *)mmu_info -> vtable) + l1_off;
-    
+
     if(PTE_USED(*mmu_l1))
     {
         RT_ASSERT(!PAGE_IS_LEAF(*mmu_l1));
         mmu_l2 = (rt_size_t *)PPN_TO_VPN(GET_PADDR(*mmu_l1),mmu_info -> pv_off);
-        
+
         if(PTE_USED(*(mmu_l2 + l2_off)))
         {
             RT_ASSERT(!PAGE_IS_LEAF(*(mmu_l2 + l2_off)));
@@ -634,4 +634,4 @@ void *rt_hw_mmu_v2p(rt_mmu_info *mmu_info,void *v_addr)
     ret = _rt_hw_mmu_v2p(mmu_info,v_addr);
     rt_hw_interrupt_enable(level);
     return ret;
-}
+}

libcpu/risc-v/virt64/mmu.h

@@ -54,4 +54,4 @@ void rt_hw_mmu_unmap(rt_mmu_info *mmu_info,void *v_addr,rt_size_t size);
 void *_rt_hw_mmu_v2p(rt_mmu_info *mmu_info,void *v_addr);
 void *rt_hw_mmu_v2p(rt_mmu_info *mmu_info,void *v_addr);
 
-#endif
+#endif

libcpu/risc-v/virt64/page.c

@@ -44,7 +44,7 @@ static rt_size_t page_nr;
 
 static struct page *page_list[ADDRESS_WIDTH_BITS];
 
-//get the correct page_list index according the actual size 
+//get the correct page_list index according the actual size
 rt_size_t rt_page_bits(rt_size_t size)
 {
     rt_base_t bit;
@@ -169,7 +169,7 @@ void rt_page_ref_inc(void *addr, uint32_t size_bits)
 static void page_insert(struct page *p,rt_size_t size_bits)
 {
     PAGE_VALID(p);
-    
+
     p -> next = page_list[size_bits];
 
     if(p -> next)
@@ -350,7 +350,7 @@ void rt_page_init(rt_region_t reg)
 
     rt_size_t nr = PAGE_SIZE / sizeof(struct page);
     rt_size_t total = (reg.end - reg.start) >> PAGE_OFFSET_BIT;
-    
+
     /*
         equation:cell((total - mnr) / nr) = mnr
         let total - mnr = knr + p(k is integer,0 <= p < nr)
@@ -400,8 +400,8 @@ void rt_page_init(rt_region_t reg)
         {
             size_bits = align_bits;
         }
-        
+
         _pages_free(addr_to_page((void *)reg.start),size_bits - PAGE_OFFSET_BIT);
         reg.start += (1U << size_bits);
     }
-}
+}

libcpu/risc-v/virt64/page.h

@@ -25,4 +25,4 @@ void rt_pageinfo_dump();
 void rt_page_get_info(size_t *total_nr, size_t *free_nr);
 void rt_page_init(rt_region_t reg);
 
-#endif
+#endif

libcpu/risc-v/virt64/riscv.h

@@ -26,4 +26,4 @@
 #define __ALIGNUP(value,bit) (((value) + __MASK(bit)) & __UMASK(bit))
 #define __ALIGNDOWN(value,bit) ((value) & __UMASK(bit))
 
-#endif
+#endif

libcpu/risc-v/virt64/riscv_io.h

@@ -70,40 +70,40 @@
 
     /* clang-format off */
 
-    #define __io_rbr()		do {} while (0)
-    #define __io_rar()		do {} while (0)
-    #define __io_rbw()		do {} while (0)
-    #define __io_raw()		do {} while (0)
+    #define __io_rbr()      do {} while (0)
+    #define __io_rar()      do {} while (0)
+    #define __io_rbw()      do {} while (0)
+    #define __io_raw()      do {} while (0)
 
-    #define readb_relaxed(c)	({ rt_uint8_t  __v; __io_rbr(); __v = __raw_readb(c); __io_rar(); __v; })
-    #define readw_relaxed(c)	({ rt_uint16_t __v; __io_rbr(); __v = __raw_readw(c); __io_rar(); __v; })
-    #define readl_relaxed(c)	({ rt_uint32_t __v; __io_rbr(); __v = __raw_readl(c); __io_rar(); __v; })
+    #define readb_relaxed(c)    ({ rt_uint8_t  __v; __io_rbr(); __v = __raw_readb(c); __io_rar(); __v; })
+    #define readw_relaxed(c)    ({ rt_uint16_t __v; __io_rbr(); __v = __raw_readw(c); __io_rar(); __v; })
+    #define readl_relaxed(c)    ({ rt_uint32_t __v; __io_rbr(); __v = __raw_readl(c); __io_rar(); __v; })
 
-    #define writeb_relaxed(v,c)	({ __io_rbw(); __raw_writeb((v),(c)); __io_raw(); })
-    #define writew_relaxed(v,c)	({ __io_rbw(); __raw_writew((v),(c)); __io_raw(); })
-    #define writel_relaxed(v,c)	({ __io_rbw(); __raw_writel((v),(c)); __io_raw(); })
+    #define writeb_relaxed(v,c) ({ __io_rbw(); __raw_writeb((v),(c)); __io_raw(); })
+    #define writew_relaxed(v,c) ({ __io_rbw(); __raw_writew((v),(c)); __io_raw(); })
+    #define writel_relaxed(v,c) ({ __io_rbw(); __raw_writel((v),(c)); __io_raw(); })
 
     #if __riscv_xlen != 32
-    #define readq_relaxed(c)	({ rt_uint64_t __v; __io_rbr(); __v = __raw_readq(c); __io_rar(); __v; })
-    #define writeq_relaxed(v,c)	({ __io_rbw(); __raw_writeq((v),(c)); __io_raw(); })
+    #define readq_relaxed(c)    ({ rt_uint64_t __v; __io_rbr(); __v = __raw_readq(c); __io_rar(); __v; })
+    #define writeq_relaxed(v,c) ({ __io_rbw(); __raw_writeq((v),(c)); __io_raw(); })
     #endif
 
-    #define __io_br()	do {} while (0)
-    #define __io_ar()	__asm__ __volatile__ ("fence i,r" : : : "memory");
-    #define __io_bw()	__asm__ __volatile__ ("fence w,o" : : : "memory");
-    #define __io_aw()	do {} while (0)
+    #define __io_br()   do {} while (0)
+    #define __io_ar()   __asm__ __volatile__ ("fence i,r" : : : "memory");
+    #define __io_bw()   __asm__ __volatile__ ("fence w,o" : : : "memory");
+    #define __io_aw()   do {} while (0)
 
-    #define readb(c)	({ rt_uint8_t  __v; __io_br(); __v = __raw_readb(c); __io_ar(); __v; })
-    #define readw(c)	({ rt_uint16_t __v; __io_br(); __v = __raw_readw(c); __io_ar(); __v; })
-    #define readl(c)	({ rt_uint32_t __v; __io_br(); __v = __raw_readl(c); __io_ar(); __v; })
+    #define readb(c)    ({ rt_uint8_t  __v; __io_br(); __v = __raw_readb(c); __io_ar(); __v; })
+    #define readw(c)    ({ rt_uint16_t __v; __io_br(); __v = __raw_readw(c); __io_ar(); __v; })
+    #define readl(c)    ({ rt_uint32_t __v; __io_br(); __v = __raw_readl(c); __io_ar(); __v; })
 
-    #define writeb(v,c)	({ __io_bw(); __raw_writeb((v),(c)); __io_aw(); })
-    #define writew(v,c)	({ __io_bw(); __raw_writew((v),(c)); __io_aw(); })
-    #define writel(v,c)	({ __io_bw(); __raw_writel((v),(c)); __io_aw(); })
+    #define writeb(v,c) ({ __io_bw(); __raw_writeb((v),(c)); __io_aw(); })
+    #define writew(v,c) ({ __io_bw(); __raw_writew((v),(c)); __io_aw(); })
+    #define writel(v,c) ({ __io_bw(); __raw_writel((v),(c)); __io_aw(); })
 
     #if __riscv_xlen != 32
-    #define readq(c)	({ rt_uint64_t __v; __io_br(); __v = __raw_readq(c); __io_ar(); __v; })
-    #define writeq(v,c)	({ __io_bw(); __raw_writeq((v),(c)); __io_aw(); })
+    #define readq(c)    ({ rt_uint64_t __v; __io_br(); __v = __raw_readq(c); __io_ar(); __v; })
+    #define writeq(v,c) ({ __io_bw(); __raw_writeq((v),(c)); __io_aw(); })
     #endif
 
-#endif
+#endif

libcpu/risc-v/virt64/riscv_mmu.c

@@ -34,4 +34,4 @@ void mmu_enable_user_page_access()
 void mmu_disable_user_page_access()
 {
     clear_csr(sstatus,SSTATUS_PUM);
-}
+}

libcpu/risc-v/virt64/riscv_mmu.h

@@ -69,4 +69,4 @@ void mmu_set_pagetable(rt_ubase_t addr);
 void mmu_enable_user_page_access();
 void mmu_disable_user_page_access();
 
-#endif
+#endif

libcpu/risc-v/virt64/stackframe.h

@@ -160,4 +160,4 @@
     csrci sstatus, 2
 .endm
 
-#endif
+#endif

libcpu/risc-v/virt64/syscall_c.c

@@ -43,17 +43,17 @@ void syscall_handler(struct rt_hw_stack_frame *regs)
         while(1);
     }
 
-	syscallfunc_t syscallfunc = (syscallfunc_t)lwp_get_sys_api(regs -> a7);
-	
-	if(syscallfunc == RT_NULL)
-	{
-		rt_kprintf("unsupported syscall!\n");
+    syscallfunc_t syscallfunc = (syscallfunc_t)lwp_get_sys_api(regs -> a7);
+
+    if(syscallfunc == RT_NULL)
+    {
+        rt_kprintf("unsupported syscall!\n");
         while(1);
-	}
+    }
 
     LOG_I("\033[36msyscall id = %d,arg0 = 0x%p,arg1 = 0x%p,arg2 = 0x%p,arg3 = 0x%p,arg4 = 0x%p,arg5 = 0x%p,arg6 = 0x%p\n\033[37m",regs -> a7,regs -> a0,regs -> a1,regs -> a2,regs -> a3,regs -> a4,regs -> a5,regs -> a6);
     regs -> a0 = syscallfunc(regs -> a0,regs -> a1,regs -> a2,regs -> a3,regs -> a4,regs -> a5,regs -> a6);
-	regs -> a7 = 0;
-	regs -> epc += 4;//skip ecall instruction
+    regs -> a7 = 0;
+    regs -> epc += 4;//skip ecall instruction
     LOG_I("\033[36msyscall deal ok,ret = 0x%p\n\033[37m",regs -> a0);
-}
+}

libcpu/risc-v/virt64/tick.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *

libcpu/risc-v/virt64/tick.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
  *
  * SPDX-License-Identifier: Apache-2.0
  *