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@@ -332,6 +332,10 @@ void enc28j60_isr()
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/* TX Error handler */
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if ((eir & EIR_TXERIF) != 0)
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{
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+ enc28j60_set_bank(ECON1);
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+ spi_write_op(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRST);
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+ spi_write_op(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRST);
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+ enc28j60_set_bank(EIR);
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spi_write_op(ENC28J60_BIT_FIELD_CLR, EIR, EIR_TXERIF);
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}
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@@ -673,9 +677,6 @@ static void NVIC_Configuration(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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- /* Configure one bit for preemption priority */
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- NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
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-
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/* Enable the EXTI0 Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = EXTI2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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@@ -753,10 +754,12 @@ void rt_hw_enc28j60_init()
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enc28j60_dev_entry.parent.eth_rx = enc28j60_rx;
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enc28j60_dev_entry.parent.eth_tx = enc28j60_tx;
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- /* Update MAC address */
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+ /* Update MAC address */
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+ /* OUI 00-04-A3 Microchip Technology, Inc. */
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enc28j60_dev_entry.dev_addr[0] = 0x00;
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- enc28j60_dev_entry.dev_addr[1] = 0x30;
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- enc28j60_dev_entry.dev_addr[2] = 0x6c;
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+ enc28j60_dev_entry.dev_addr[1] = 0x04;
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+ enc28j60_dev_entry.dev_addr[2] = 0xA3;
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+ /* generate MAC addr (only for test) */
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enc28j60_dev_entry.dev_addr[3] = 0x11;
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enc28j60_dev_entry.dev_addr[4] = 0x22;
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enc28j60_dev_entry.dev_addr[5] = 0x33;
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