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@@ -30,8 +30,13 @@
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#include <netif/ethernetif.h>
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#include "lwipopts.h"
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+#ifdef SOC_IMXRT1170_SERIES
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#define ENET_RXBD_NUM (5)
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#define ENET_TXBD_NUM (3)
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+#else
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+#define ENET_RXBD_NUM (4)
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+#define ENET_TXBD_NUM (4)
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+#endif
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#define ENET_RXBUFF_SIZE (ENET_FRAME_MAX_FRAMELEN)
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#define ENET_TXBUFF_SIZE (ENET_FRAME_MAX_FRAMELEN)
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@@ -48,16 +53,19 @@
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#include <rtdbg.h>
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#define MAX_ADDR_LEN 6
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+
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+#ifdef SOC_IMXRT1170_SERIES
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#define ENET_RING_NUM 1U
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#define RING_ID 0
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-
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typedef uint8_t rx_buffer_t[RT_ALIGN(ENET_TXBUFF_SIZE, ENET_BUFF_ALIGNMENT)];
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typedef uint8_t tx_buffer_t[RT_ALIGN(ENET_TXBUFF_SIZE, ENET_BUFF_ALIGNMENT)];
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#ifndef ENET_RXBUFF_NUM
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#define ENET_RXBUFF_NUM (ENET_RXBD_NUM * 2)
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#endif
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+#endif
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+#ifdef SOC_IMXRT1170_SERIES
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typedef void (*pbuf_free_custom_fn)(struct pbuf *p);
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/** A custom pbuf: like a pbuf, but following a function pointer to free it. */
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@@ -76,6 +84,7 @@ typedef struct rx_pbuf_wrapper
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volatile bool buffer_used; /*!< Wrapped buffer is used by ENET */
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} rx_pbuf_wrapper_t;
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+#endif
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struct rt_imxrt_eth
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{
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/* inherit from ethernet device */
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@@ -93,11 +102,13 @@ struct rt_imxrt_eth
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enet_mii_speed_t speed;
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enet_mii_duplex_t duplex;
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+#ifdef SOC_IMXRT1170_SERIES
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enet_rx_bd_struct_t *RxBuffDescrip;
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enet_tx_bd_struct_t *TxBuffDescrip;
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rx_buffer_t *RxDataBuff;
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tx_buffer_t *TxDataBuff;
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rx_pbuf_wrapper_t RxPbufs[ENET_RXBUFF_NUM];
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+#endif
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};
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AT_NONCACHEABLE_SECTION_ALIGN(static enet_tx_bd_struct_t g_txBuffDescrip[ENET_TXBD_NUM], ENET_BUFF_ALIGNMENT);
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@@ -131,6 +142,7 @@ void _enet_tx_callback(struct rt_imxrt_eth *eth)
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}
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}
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+#ifdef SOC_IMXRT1170_SERIES
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static void _enet_callback(ENET_Type *base,
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enet_handle_t *handle,
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#if FSL_FEATURE_ENET_QUEUE > 1
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@@ -139,6 +151,9 @@ static void _enet_callback(ENET_Type *base,
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enet_event_t event,
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enet_frame_info_t *frameInfo,
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void *userData)
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+#else
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+void _enet_callback(ENET_Type *base, enet_handle_t *handle, enet_event_t event, void *userData)
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+#endif
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{
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switch (event)
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{
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@@ -212,6 +227,7 @@ static void _enet_clk_init(void)
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#endif
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}
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+#ifdef SOC_IMXRT1170_SERIES
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static void *_enet_rx_alloc(ENET_Type *base, void *userData, uint8_t ringId)
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{
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void *buffer = NULL;
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@@ -264,39 +280,56 @@ static void _enet_rx_release(struct pbuf *p)
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rx_pbuf_wrapper_t *wrapper = (rx_pbuf_wrapper_t *)p;
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_enet_rx_free(imxrt_eth_device.enet_base, wrapper->buffer, &imxrt_eth_device, 0);
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}
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+#endif
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static void _enet_config(void)
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{
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enet_config_t config;
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uint32_t sysClock;
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- enet_buffer_config_t buffConfig[ENET_RING_NUM];
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- int i;
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-#ifdef PHY_USING_RTL8211F
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- EnableIRQ(ENET_1G_MAC0_Tx_Rx_1_IRQn);
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- EnableIRQ(ENET_1G_MAC0_Tx_Rx_2_IRQn);
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-#endif
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+/* prepare the buffer configuration. */
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+#ifndef SOC_IMXRT1170_SERIES
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+ enet_buffer_config_t buffConfig =
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+ {
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+ ENET_RXBD_NUM,
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+ ENET_TXBD_NUM,
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+ SDK_SIZEALIGN(ENET_RXBUFF_SIZE, ENET_BUFF_ALIGNMENT),
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+ SDK_SIZEALIGN(ENET_TXBUFF_SIZE, ENET_BUFF_ALIGNMENT),
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+ &g_rxBuffDescrip[0],
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+ &g_txBuffDescrip[0],
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+ &g_rxDataBuff[0][0],
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+ &g_txDataBuff[0][0],
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+ };
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+ /* Get default configuration. */
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+ /*
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+ * config.miiMode = kENET_RmiiMode;
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+ * config.miiSpeed = kENET_MiiSpeed100M;
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+ * config.miiDuplex = kENET_MiiFullDuplex;
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+ * config.rxMaxFrameLen = ENET_FRAME_MAX_FRAMELEN;
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+ */
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+ ENET_GetDefaultConfig(&config);
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+ config.interrupt = kENET_TxFrameInterrupt | kENET_RxFrameInterrupt;
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+ config.miiSpeed = imxrt_eth_device.speed;
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+ config.miiDuplex = imxrt_eth_device.duplex;
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+ /* Set SMI to get PHY link status. */
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+ sysClock = CLOCK_GetFreq(kCLOCK_AhbClk);
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+
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+ dbg_log(DBG_LOG, "deinit\n");
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+ ENET_Deinit(imxrt_eth_device.enet_base);
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+ dbg_log(DBG_LOG, "init\n");
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+ ENET_Init(imxrt_eth_device.enet_base, &imxrt_eth_device.enet_handle, &config, &buffConfig, &imxrt_eth_device.dev_addr[0], sysClock);
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+ dbg_log(DBG_LOG, "set call back\n");
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+ ENET_SetCallback(&imxrt_eth_device.enet_handle, _enet_callback, &imxrt_eth_device);
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+ dbg_log(DBG_LOG, "active read\n");
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+ ENET_ActiveRead(imxrt_eth_device.enet_base);
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+#else
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+ int i;
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+ enet_buffer_config_t buffConfig[ENET_RING_NUM];
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imxrt_eth_device.RxBuffDescrip = &g_rxBuffDescrip[0];
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imxrt_eth_device.TxBuffDescrip = &g_txBuffDescrip[0];
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imxrt_eth_device.RxDataBuff = &g_rxDataBuff[0];
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imxrt_eth_device.TxDataBuff = &g_txDataBuff[0];
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-
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- /* prepare the buffer configuration. */
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- // enet_buffer_config_t buffConfig[RING_NUM] =
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- // {
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- // ENET_RXBD_NUM,
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- // ENET_TXBD_NUM,
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- // sizeof(rx_buffer_t),
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- // sizeof(tx_buffer_t),
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- // &imxrt_eth_device.RxBuffDescrip[0],
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- // &imxrt_eth_device.TxBuffDescrip[0],
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- // NULL,
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- // &imxrt_eth_device.TxDataBuff[0][0],
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- // true,
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- // true,
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- // NULL,
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- // };
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buffConfig[0].rxBdNumber = ENET_RXBD_NUM; /* Receive buffer descriptor number. */
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buffConfig[0].txBdNumber = ENET_TXBD_NUM; /* Transmit buffer descriptor number. */
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buffConfig[0].rxBuffSizeAlign = sizeof(rx_buffer_t); /* Aligned receive data buffer size. */
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@@ -325,6 +358,8 @@ static void _enet_config(void)
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config.miiDuplex = imxrt_eth_device.duplex;
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#ifdef PHY_USING_RTL8211F
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config.miiMode = kENET_RgmiiMode;
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+ EnableIRQ(ENET_1G_MAC0_Tx_Rx_1_IRQn);
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+ EnableIRQ(ENET_1G_MAC0_Tx_Rx_2_IRQn);
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#else
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config.miiMode = kENET_RmiiMode;
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#endif
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@@ -332,14 +367,7 @@ static void _enet_config(void)
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config.rxBuffFree = _enet_rx_free;
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config.userData = &imxrt_eth_device;
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/* Set SMI to get PHY link status. */
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-#ifdef SOC_IMXRT1170_SERIES
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sysClock = CLOCK_GetRootClockFreq(kCLOCK_Root_Bus);
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-#else
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- sysClock = CLOCK_GetFreq(kCLOCK_AhbClk);
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-#endif
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-
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- // dbg_log(DBG_LOG, "deinit\n");
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- // ENET_Deinit(imxrt_eth_device.enet_base);
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config.interrupt |= kENET_TxFrameInterrupt | kENET_RxFrameInterrupt | kENET_TxBufferInterrupt | kENET_LateCollisionInterrupt;
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config.callback = _enet_callback;
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@@ -359,6 +387,7 @@ static void _enet_config(void)
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// ENET_SetCallback(&imxrt_eth_device.enet_handle, _enet_callback, &imxrt_eth_device);
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dbg_log(DBG_LOG, "active read\n");
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ENET_ActiveRead(imxrt_eth_device.enet_base);
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+#endif
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}
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#if defined(ETH_RX_DUMP) || defined(ETH_TX_DUMP)
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@@ -453,6 +482,7 @@ static rt_err_t rt_imxrt_eth_control(rt_device_t dev, int cmd, void *args)
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return RT_EOK;
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}
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+#ifdef SOC_IMXRT1170_SERIES
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static bool _ENET_TxDirtyRingAvailable(enet_tx_dirty_ring_t *txDirtyRing)
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{
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return !txDirtyRing->isFull;
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@@ -516,7 +546,32 @@ static void _ENET_ActiveSendRing(ENET_Type *base, uint8_t ringId)
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/* Write to active tx descriptor */
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*txDesActive = 0;
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}
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+#else
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+static void _ENET_ActiveSend(ENET_Type *base, uint32_t ringId)
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+{
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+ assert(ringId < FSL_FEATURE_ENET_QUEUE);
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+
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+ switch (ringId)
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+ {
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+ case 0:
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+ base->TDAR = ENET_TDAR_TDAR_MASK;
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+ break;
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+#if FSL_FEATURE_ENET_QUEUE > 1
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+ case 1:
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+ base->TDAR1 = ENET_TDAR1_TDAR_MASK;
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+ break;
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+ case 2:
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+ base->TDAR2 = ENET_TDAR2_TDAR_MASK;
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+ break;
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+#endif /* FSL_FEATURE_ENET_QUEUE > 1 */
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+ default:
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+ base->TDAR = ENET_TDAR_TDAR_MASK;
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+ break;
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+ }
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+}
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+#endif
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+#ifdef SOC_IMXRT1170_SERIES
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static status_t _ENET_SendFrame(ENET_Type *base,
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enet_handle_t *handle,
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const uint8_t *data,
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@@ -723,6 +778,166 @@ static status_t _ENET_SendFrame(ENET_Type *base,
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}
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return result;
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}
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+#else
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+static status_t _ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, const uint8_t *data, uint32_t length)
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+{
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+ assert(handle);
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+ assert(data);
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+
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+ volatile enet_tx_bd_struct_t *curBuffDescrip;
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+ uint32_t len = 0;
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+ uint32_t sizeleft = 0;
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+ uint32_t address;
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+
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+ /* Check the frame length. */
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+ if (length > ENET_FRAME_MAX_FRAMELEN)
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+ {
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+ return kStatus_ENET_TxFrameOverLen;
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+ }
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+
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+ /* Check if the transmit buffer is ready. */
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+ curBuffDescrip = handle->txBdCurrent[0];
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+ if (curBuffDescrip->control & ENET_BUFFDESCRIPTOR_TX_READY_MASK)
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+ {
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+ return kStatus_ENET_TxFrameBusy;
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+ }
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+#ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
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+ bool isPtpEventMessage = false;
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+ /* Check PTP message with the PTP header. */
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+ isPtpEventMessage = ENET_Ptp1588ParseFrame(data, NULL, true);
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+#endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
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+ /* One transmit buffer is enough for one frame. */
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+ if (handle->txBuffSizeAlign[0] >= length)
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+ {
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+ /* Copy data to the buffer for uDMA transfer. */
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+#if defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET
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+ address = MEMORY_ConvertMemoryMapAddress((uint32_t)curBuffDescrip->buffer, kMEMORY_DMA2Local);
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+#else
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+ address = (uint32_t)curBuffDescrip->buffer;
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+#endif /* FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET */
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+
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+ pbuf_copy_partial((const struct pbuf *)data, (void *)address, length, 0);
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+
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+ /* Set data length. */
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+ curBuffDescrip->length = length;
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+#ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
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+ /* For enable the timestamp. */
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+ if (isPtpEventMessage)
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+ {
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+ curBuffDescrip->controlExtend1 |= ENET_BUFFDESCRIPTOR_TX_TIMESTAMP_MASK;
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+ }
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+ else
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+ {
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+ curBuffDescrip->controlExtend1 &= ~ENET_BUFFDESCRIPTOR_TX_TIMESTAMP_MASK;
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+ }
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+
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+#endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
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+ curBuffDescrip->control |= (ENET_BUFFDESCRIPTOR_TX_READY_MASK | ENET_BUFFDESCRIPTOR_TX_LAST_MASK);
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+
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+ /* Increase the buffer descriptor address. */
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+ if (curBuffDescrip->control & ENET_BUFFDESCRIPTOR_TX_WRAP_MASK)
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+ {
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+ handle->txBdCurrent[0] = handle->txBdBase[0];
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+ }
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+ else
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+ {
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+ handle->txBdCurrent[0]++;
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+ }
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+#if defined(FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL) && FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL
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+ /* Add the cache clean maintain. */
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+#if defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET
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+ address = MEMORY_ConvertMemoryMapAddress((uint32_t)curBuffDescrip->buffer, kMEMORY_DMA2Local);
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+#else
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+ address = (uint32_t)curBuffDescrip->buffer;
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+#endif /* FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET */
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+ DCACHE_CleanByRange(address, length);
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+#endif /* FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL */
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+ /* Active the transmit buffer descriptor. */
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+ _ENET_ActiveSend(base, 0);
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+
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+ return kStatus_Success;
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+ }
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+ else
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+ {
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+ /* One frame requires more than one transmit buffers. */
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+ do
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+ {
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+#ifdef ENET_ENHANCEDBUFFERDESCRIPTOR_MODE
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+ /* For enable the timestamp. */
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+ if (isPtpEventMessage)
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+ {
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+ curBuffDescrip->controlExtend1 |= ENET_BUFFDESCRIPTOR_TX_TIMESTAMP_MASK;
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+ }
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+ else
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+ {
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+ curBuffDescrip->controlExtend1 &= ~ENET_BUFFDESCRIPTOR_TX_TIMESTAMP_MASK;
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+ }
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+#endif /* ENET_ENHANCEDBUFFERDESCRIPTOR_MODE */
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+
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+ /* Increase the buffer descriptor address. */
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+ if (curBuffDescrip->control & ENET_BUFFDESCRIPTOR_TX_WRAP_MASK)
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+ {
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+ handle->txBdCurrent[0] = handle->txBdBase[0];
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+ }
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+ else
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+ {
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+ handle->txBdCurrent[0]++;
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+ }
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+ /* update the size left to be transmit. */
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+ sizeleft = length - len;
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+ if (sizeleft > handle->txBuffSizeAlign[0])
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+ {
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+ /* Data copy. */
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+#if defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET
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+ address = MEMORY_ConvertMemoryMapAddress((uint32_t)curBuffDescrip->buffer, kMEMORY_DMA2Local);
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+#else
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+ address = (uint32_t)curBuffDescrip->buffer;
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+#endif /* FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET */
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+ memcpy((void *)address, data + len, handle->txBuffSizeAlign[0]);
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+ /* Data length update. */
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+ curBuffDescrip->length = handle->txBuffSizeAlign[0];
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+ len += handle->txBuffSizeAlign[0];
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+ /* Sets the control flag. */
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+ curBuffDescrip->control &= ~ENET_BUFFDESCRIPTOR_TX_LAST_MASK;
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+ curBuffDescrip->control |= ENET_BUFFDESCRIPTOR_TX_READY_MASK;
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+ /* Active the transmit buffer descriptor*/
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+ _ENET_ActiveSend(base, 0);
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+ }
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+ else
|
|
|
+ {
|
|
|
+#if defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET
|
|
|
+ address = MEMORY_ConvertMemoryMapAddress((uint32_t)curBuffDescrip->buffer, kMEMORY_DMA2Local);
|
|
|
+#else
|
|
|
+ address = (uint32_t)curBuffDescrip->buffer;
|
|
|
+#endif /* FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET */
|
|
|
+ memcpy((void *)address, data + len, sizeleft);
|
|
|
+ curBuffDescrip->length = sizeleft;
|
|
|
+ /* Set Last buffer wrap flag. */
|
|
|
+ curBuffDescrip->control |= ENET_BUFFDESCRIPTOR_TX_READY_MASK | ENET_BUFFDESCRIPTOR_TX_LAST_MASK;
|
|
|
+#if defined(FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL) && FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL
|
|
|
+ /* Add the cache clean maintain. */
|
|
|
+#if defined(FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET) && FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET
|
|
|
+ address = MEMORY_ConvertMemoryMapAddress((uint32_t)curBuffDescrip->buffer, kMEMORY_DMA2Local);
|
|
|
+#else
|
|
|
+ address = (uint32_t)curBuffDescrip->buffer;
|
|
|
+#endif /* FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET */
|
|
|
+ DCACHE_CleanByRange(address, handle->txBuffSizeAlign[0]);
|
|
|
+#endif /* FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL */
|
|
|
+ /* Active the transmit buffer descriptor. */
|
|
|
+ _ENET_ActiveSend(base, 0);
|
|
|
+
|
|
|
+ return kStatus_Success;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Get the current buffer descriptor address. */
|
|
|
+ curBuffDescrip = handle->txBdCurrent[0];
|
|
|
+
|
|
|
+ } while (!(curBuffDescrip->control & ENET_BUFFDESCRIPTOR_TX_READY_MASK));
|
|
|
+
|
|
|
+ return kStatus_ENET_TxFrameBusy;
|
|
|
+ }
|
|
|
+}
|
|
|
+#endif
|
|
|
|
|
|
/* ethernet device interface */
|
|
|
/* transmit packet. */
|
|
@@ -742,7 +957,11 @@ rt_err_t rt_imxrt_eth_tx(rt_device_t dev, struct pbuf *p)
|
|
|
|
|
|
do
|
|
|
{
|
|
|
+#ifdef SOC_IMXRT1170_SERIES
|
|
|
result = _ENET_SendFrame(imxrt_eth_device.enet_base, enet_handle, (const uint8_t *)p, p->tot_len, RING_ID, false, NULL);
|
|
|
+#else
|
|
|
+ result = _ENET_SendFrame(imxrt_eth_device.enet_base, enet_handle, (const uint8_t *)p, p->tot_len);
|
|
|
+#endif
|
|
|
|
|
|
if (result == kStatus_ENET_TxFrameBusy)
|
|
|
{
|
|
@@ -766,8 +985,12 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev)
|
|
|
ENET_Type *enet_base = imxrt_eth_device.enet_base;
|
|
|
enet_data_error_stats_t *error_statistic = &imxrt_eth_device.error_statistic;
|
|
|
|
|
|
- /* Get the Frame size */
|
|
|
+/* Get the Frame size */
|
|
|
+#ifdef SOC_IMXRT1170_SERIES
|
|
|
status = ENET_GetRxFrameSize(enet_handle, &length, RING_ID);
|
|
|
+#else
|
|
|
+ status = ENET_GetRxFrameSize(enet_handle, &length);
|
|
|
+#endif
|
|
|
|
|
|
/* Call ENET_ReadFrame when there is a received frame. */
|
|
|
if (length != 0)
|
|
@@ -777,7 +1000,11 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev)
|
|
|
|
|
|
if (p != NULL)
|
|
|
{
|
|
|
+#ifdef SOC_IMXRT1170_SERIES
|
|
|
status = ENET_ReadFrame(enet_base, enet_handle, p->payload, length, RING_ID, NULL);
|
|
|
+#else
|
|
|
+ status = ENET_ReadFrame(enet_base, enet_handle, p->payload, length);
|
|
|
+#endif
|
|
|
if (status == kStatus_Success)
|
|
|
{
|
|
|
#ifdef ETH_RX_DUMP
|
|
@@ -800,10 +1027,17 @@ struct pbuf *rt_imxrt_eth_rx(rt_device_t dev)
|
|
|
{
|
|
|
dbg_log(DBG_WARNING, "ENET_GetRxFrameSize: kStatus_ENET_RxFrameError\n");
|
|
|
/* Update the received buffer when error happened. */
|
|
|
+#ifdef SOC_IMXRT1170_SERIES
|
|
|
/* Get the error information of the received g_frame. */
|
|
|
ENET_GetRxErrBeforeReadFrame(enet_handle, error_statistic, RING_ID);
|
|
|
/* update the receive buffer. */
|
|
|
ENET_ReadFrame(enet_base, enet_handle, NULL, 0, RING_ID, NULL);
|
|
|
+#else
|
|
|
+ /* Get the error information of the received g_frame. */
|
|
|
+ ENET_GetRxErrBeforeReadFrame(enet_handle, error_statistic);
|
|
|
+ /* update the receive buffer. */
|
|
|
+ ENET_ReadFrame(enet_base, enet_handle, NULL, 0);
|
|
|
+#endif
|
|
|
}
|
|
|
|
|
|
ENET_EnableInterrupts(enet_base, kENET_RxFrameInterrupt);
|